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mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_i2s.c@489:119543c9f674, 2015-03-12 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Mar 12 14:30:49 2015 +0000
- Revision:
- 489:119543c9f674
Synchronized with git revision 051854181516992fb498d51f9ee6e70cbad9e083
Full URL: https://github.com/mbedmicro/mbed/commit/051854181516992fb498d51f9ee6e70cbad9e083/
Fix ksdk mcu HAL - stopbit
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 489:119543c9f674 | 1 | /** |
| mbed_official | 489:119543c9f674 | 2 | ****************************************************************************** |
| mbed_official | 489:119543c9f674 | 3 | * @file stm32f1xx_hal_i2s.c |
| mbed_official | 489:119543c9f674 | 4 | * @author MCD Application Team |
| mbed_official | 489:119543c9f674 | 5 | * @version V1.0.0 |
| mbed_official | 489:119543c9f674 | 6 | * @date 15-December-2014 |
| mbed_official | 489:119543c9f674 | 7 | * @brief I2S HAL module driver. |
| mbed_official | 489:119543c9f674 | 8 | * This file provides firmware functions to manage the following |
| mbed_official | 489:119543c9f674 | 9 | * functionalities of the Integrated Interchip Sound (I2S) peripheral: |
| mbed_official | 489:119543c9f674 | 10 | * + Initialization and de-initialization functions |
| mbed_official | 489:119543c9f674 | 11 | * + IO operation functions |
| mbed_official | 489:119543c9f674 | 12 | * + Peripheral State and Errors functions |
| mbed_official | 489:119543c9f674 | 13 | @verbatim |
| mbed_official | 489:119543c9f674 | 14 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 15 | ##### How to use this driver ##### |
| mbed_official | 489:119543c9f674 | 16 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 17 | [..] |
| mbed_official | 489:119543c9f674 | 18 | The I2S HAL driver can be used as follow: |
| mbed_official | 489:119543c9f674 | 19 | |
| mbed_official | 489:119543c9f674 | 20 | (#) Declare a I2S_HandleTypeDef handle structure. |
| mbed_official | 489:119543c9f674 | 21 | (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API: |
| mbed_official | 489:119543c9f674 | 22 | (##) Enable the SPIx interface clock. |
| mbed_official | 489:119543c9f674 | 23 | (##) I2S pins configuration: |
| mbed_official | 489:119543c9f674 | 24 | (+++) Enable the clock for the I2S GPIOs. |
| mbed_official | 489:119543c9f674 | 25 | (+++) Configure these I2S pins as alternate function. |
| mbed_official | 489:119543c9f674 | 26 | (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT() |
| mbed_official | 489:119543c9f674 | 27 | and HAL_I2S_Receive_IT() APIs). |
| mbed_official | 489:119543c9f674 | 28 | (+++) Configure the I2Sx interrupt priority. |
| mbed_official | 489:119543c9f674 | 29 | (+++) Enable the NVIC I2S IRQ handle. |
| mbed_official | 489:119543c9f674 | 30 | (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA() |
| mbed_official | 489:119543c9f674 | 31 | and HAL_I2S_Receive_DMA() APIs: |
| mbed_official | 489:119543c9f674 | 32 | (+++) Declare a DMA handle structure for the Tx/Rx Channel. |
| mbed_official | 489:119543c9f674 | 33 | (+++) Enable the DMAx interface clock. |
| mbed_official | 489:119543c9f674 | 34 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
| mbed_official | 489:119543c9f674 | 35 | (+++) Configure the DMA Tx/Rx Channel. |
| mbed_official | 489:119543c9f674 | 36 | (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle. |
| mbed_official | 489:119543c9f674 | 37 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the |
| mbed_official | 489:119543c9f674 | 38 | DMA Tx/Rx Channel. |
| mbed_official | 489:119543c9f674 | 39 | |
| mbed_official | 489:119543c9f674 | 40 | (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity |
| mbed_official | 489:119543c9f674 | 41 | using HAL_I2S_Init() function. |
| mbed_official | 489:119543c9f674 | 42 | |
| mbed_official | 489:119543c9f674 | 43 | -@- The specific I2S interrupts (Transmission complete interrupt, |
| mbed_official | 489:119543c9f674 | 44 | RXNE interrupt and Error Interrupts) will be managed using the macros |
| mbed_official | 489:119543c9f674 | 45 | __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process. |
| mbed_official | 489:119543c9f674 | 46 | -@- The I2SxCLK source is the system clock (provided by the HSI, the HSE or the PLL, and sourcing the AHB clock). |
| mbed_official | 489:119543c9f674 | 47 | For connectivity line devices, the I2SxCLK source can be either SYSCLK or the PLL3 VCO (2 x PLL3CLK) clock |
| mbed_official | 489:119543c9f674 | 48 | in order to achieve the maximum accuracy. |
| mbed_official | 489:119543c9f674 | 49 | -@- Make sure that either: |
| mbed_official | 489:119543c9f674 | 50 | (+@) External clock source is configured after setting correctly |
| mbed_official | 489:119543c9f674 | 51 | the define constant HSE_VALUE in the stm32f1xx_hal_conf.h file. |
| mbed_official | 489:119543c9f674 | 52 | |
| mbed_official | 489:119543c9f674 | 53 | (#) Three mode of operations are available within this driver : |
| mbed_official | 489:119543c9f674 | 54 | |
| mbed_official | 489:119543c9f674 | 55 | *** Polling mode IO operation *** |
| mbed_official | 489:119543c9f674 | 56 | ================================= |
| mbed_official | 489:119543c9f674 | 57 | [..] |
| mbed_official | 489:119543c9f674 | 58 | (+) Send an amount of data in blocking mode using HAL_I2S_Transmit() |
| mbed_official | 489:119543c9f674 | 59 | (+) Receive an amount of data in blocking mode using HAL_I2S_Receive() |
| mbed_official | 489:119543c9f674 | 60 | |
| mbed_official | 489:119543c9f674 | 61 | *** Interrupt mode IO operation *** |
| mbed_official | 489:119543c9f674 | 62 | =================================== |
| mbed_official | 489:119543c9f674 | 63 | [..] |
| mbed_official | 489:119543c9f674 | 64 | (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT() |
| mbed_official | 489:119543c9f674 | 65 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
| mbed_official | 489:119543c9f674 | 66 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
| mbed_official | 489:119543c9f674 | 67 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
| mbed_official | 489:119543c9f674 | 68 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
| mbed_official | 489:119543c9f674 | 69 | (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT() |
| mbed_official | 489:119543c9f674 | 70 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
| mbed_official | 489:119543c9f674 | 71 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
| mbed_official | 489:119543c9f674 | 72 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
| mbed_official | 489:119543c9f674 | 73 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
| mbed_official | 489:119543c9f674 | 74 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
| mbed_official | 489:119543c9f674 | 75 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
| mbed_official | 489:119543c9f674 | 76 | |
| mbed_official | 489:119543c9f674 | 77 | *** DMA mode IO operation *** |
| mbed_official | 489:119543c9f674 | 78 | ============================== |
| mbed_official | 489:119543c9f674 | 79 | [..] |
| mbed_official | 489:119543c9f674 | 80 | (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA() |
| mbed_official | 489:119543c9f674 | 81 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
| mbed_official | 489:119543c9f674 | 82 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
| mbed_official | 489:119543c9f674 | 83 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
| mbed_official | 489:119543c9f674 | 84 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
| mbed_official | 489:119543c9f674 | 85 | (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA() |
| mbed_official | 489:119543c9f674 | 86 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
| mbed_official | 489:119543c9f674 | 87 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
| mbed_official | 489:119543c9f674 | 88 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
| mbed_official | 489:119543c9f674 | 89 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
| mbed_official | 489:119543c9f674 | 90 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
| mbed_official | 489:119543c9f674 | 91 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
| mbed_official | 489:119543c9f674 | 92 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause() |
| mbed_official | 489:119543c9f674 | 93 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume() |
| mbed_official | 489:119543c9f674 | 94 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop() |
| mbed_official | 489:119543c9f674 | 95 | |
| mbed_official | 489:119543c9f674 | 96 | *** I2S HAL driver macros list *** |
| mbed_official | 489:119543c9f674 | 97 | ============================================= |
| mbed_official | 489:119543c9f674 | 98 | [..] |
| mbed_official | 489:119543c9f674 | 99 | Below the list of most used macros in USART HAL driver. |
| mbed_official | 489:119543c9f674 | 100 | |
| mbed_official | 489:119543c9f674 | 101 | (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode) |
| mbed_official | 489:119543c9f674 | 102 | (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode) |
| mbed_official | 489:119543c9f674 | 103 | (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts |
| mbed_official | 489:119543c9f674 | 104 | (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts |
| mbed_official | 489:119543c9f674 | 105 | (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not |
| mbed_official | 489:119543c9f674 | 106 | |
| mbed_official | 489:119543c9f674 | 107 | [..] |
| mbed_official | 489:119543c9f674 | 108 | (@) You can refer to the I2S HAL driver header file for more useful macros |
| mbed_official | 489:119543c9f674 | 109 | |
| mbed_official | 489:119543c9f674 | 110 | |
| mbed_official | 489:119543c9f674 | 111 | *** I2C Workarounds linked to Silicon Limitation *** |
| mbed_official | 489:119543c9f674 | 112 | ==================================================== |
| mbed_official | 489:119543c9f674 | 113 | [..] |
| mbed_official | 489:119543c9f674 | 114 | (@) Only the 16-bit mode with no data extension can be used when the I2S |
| mbed_official | 489:119543c9f674 | 115 | is in Master and used the PCM long synchronization mode. |
| mbed_official | 489:119543c9f674 | 116 | |
| mbed_official | 489:119543c9f674 | 117 | |
| mbed_official | 489:119543c9f674 | 118 | @endverbatim |
| mbed_official | 489:119543c9f674 | 119 | ****************************************************************************** |
| mbed_official | 489:119543c9f674 | 120 | * @attention |
| mbed_official | 489:119543c9f674 | 121 | * |
| mbed_official | 489:119543c9f674 | 122 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 489:119543c9f674 | 123 | * |
| mbed_official | 489:119543c9f674 | 124 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 489:119543c9f674 | 125 | * are permitted provided that the following conditions are met: |
| mbed_official | 489:119543c9f674 | 126 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 489:119543c9f674 | 127 | * this list of conditions and the following disclaimer. |
| mbed_official | 489:119543c9f674 | 128 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 489:119543c9f674 | 129 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 489:119543c9f674 | 130 | * and/or other materials provided with the distribution. |
| mbed_official | 489:119543c9f674 | 131 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 489:119543c9f674 | 132 | * may be used to endorse or promote products derived from this software |
| mbed_official | 489:119543c9f674 | 133 | * without specific prior written permission. |
| mbed_official | 489:119543c9f674 | 134 | * |
| mbed_official | 489:119543c9f674 | 135 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 489:119543c9f674 | 136 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 489:119543c9f674 | 137 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 489:119543c9f674 | 138 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 489:119543c9f674 | 139 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 489:119543c9f674 | 140 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 489:119543c9f674 | 141 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 489:119543c9f674 | 142 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 489:119543c9f674 | 143 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 489:119543c9f674 | 144 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 489:119543c9f674 | 145 | * |
| mbed_official | 489:119543c9f674 | 146 | ****************************************************************************** |
| mbed_official | 489:119543c9f674 | 147 | */ |
| mbed_official | 489:119543c9f674 | 148 | |
| mbed_official | 489:119543c9f674 | 149 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 150 | #include "stm32f1xx_hal.h" |
| mbed_official | 489:119543c9f674 | 151 | |
| mbed_official | 489:119543c9f674 | 152 | /** @addtogroup STM32F1xx_HAL_Driver |
| mbed_official | 489:119543c9f674 | 153 | * @{ |
| mbed_official | 489:119543c9f674 | 154 | */ |
| mbed_official | 489:119543c9f674 | 155 | |
| mbed_official | 489:119543c9f674 | 156 | #ifdef HAL_I2S_MODULE_ENABLED |
| mbed_official | 489:119543c9f674 | 157 | #if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC) |
| mbed_official | 489:119543c9f674 | 158 | |
| mbed_official | 489:119543c9f674 | 159 | /** @defgroup I2S I2S |
| mbed_official | 489:119543c9f674 | 160 | * @brief I2S HAL module driver |
| mbed_official | 489:119543c9f674 | 161 | * @{ |
| mbed_official | 489:119543c9f674 | 162 | */ |
| mbed_official | 489:119543c9f674 | 163 | |
| mbed_official | 489:119543c9f674 | 164 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 165 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 166 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 167 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 168 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 169 | /** @addtogroup I2S_Private_Functions I2S Private Functions |
| mbed_official | 489:119543c9f674 | 170 | * @{ |
| mbed_official | 489:119543c9f674 | 171 | */ |
| mbed_official | 489:119543c9f674 | 172 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma); |
| mbed_official | 489:119543c9f674 | 173 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
| mbed_official | 489:119543c9f674 | 174 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma); |
| mbed_official | 489:119543c9f674 | 175 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
| mbed_official | 489:119543c9f674 | 176 | static void I2S_DMAError(DMA_HandleTypeDef *hdma); |
| mbed_official | 489:119543c9f674 | 177 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s); |
| mbed_official | 489:119543c9f674 | 178 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s); |
| mbed_official | 489:119543c9f674 | 179 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout); |
| mbed_official | 489:119543c9f674 | 180 | /** |
| mbed_official | 489:119543c9f674 | 181 | * @} |
| mbed_official | 489:119543c9f674 | 182 | */ |
| mbed_official | 489:119543c9f674 | 183 | |
| mbed_official | 489:119543c9f674 | 184 | /* Exported functions ---------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 185 | /** @defgroup I2S_Exported_Functions I2S Exported Functions |
| mbed_official | 489:119543c9f674 | 186 | * @{ |
| mbed_official | 489:119543c9f674 | 187 | */ |
| mbed_official | 489:119543c9f674 | 188 | |
| mbed_official | 489:119543c9f674 | 189 | /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions |
| mbed_official | 489:119543c9f674 | 190 | * @brief Initialization and Configuration functions |
| mbed_official | 489:119543c9f674 | 191 | * |
| mbed_official | 489:119543c9f674 | 192 | @verbatim |
| mbed_official | 489:119543c9f674 | 193 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 194 | ##### Initialization and de-initialization functions ##### |
| mbed_official | 489:119543c9f674 | 195 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 196 | [..] This subsection provides a set of functions allowing to initialize and |
| mbed_official | 489:119543c9f674 | 197 | de-initialiaze the I2Sx peripheral in simplex mode: |
| mbed_official | 489:119543c9f674 | 198 | |
| mbed_official | 489:119543c9f674 | 199 | (+) User must Implement HAL_I2S_MspInit() function in which he configures |
| mbed_official | 489:119543c9f674 | 200 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
| mbed_official | 489:119543c9f674 | 201 | |
| mbed_official | 489:119543c9f674 | 202 | (+) Call the function HAL_I2S_Init() to configure the selected device with |
| mbed_official | 489:119543c9f674 | 203 | the selected configuration: |
| mbed_official | 489:119543c9f674 | 204 | (++) Mode |
| mbed_official | 489:119543c9f674 | 205 | (++) Standard |
| mbed_official | 489:119543c9f674 | 206 | (++) Data Format |
| mbed_official | 489:119543c9f674 | 207 | (++) MCLK Output |
| mbed_official | 489:119543c9f674 | 208 | (++) Audio frequency |
| mbed_official | 489:119543c9f674 | 209 | (++) Polarity |
| mbed_official | 489:119543c9f674 | 210 | |
| mbed_official | 489:119543c9f674 | 211 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration |
| mbed_official | 489:119543c9f674 | 212 | of the selected I2Sx periperal. |
| mbed_official | 489:119543c9f674 | 213 | @endverbatim |
| mbed_official | 489:119543c9f674 | 214 | * @{ |
| mbed_official | 489:119543c9f674 | 215 | */ |
| mbed_official | 489:119543c9f674 | 216 | |
| mbed_official | 489:119543c9f674 | 217 | /** |
| mbed_official | 489:119543c9f674 | 218 | * @brief Initializes the I2S according to the specified parameters |
| mbed_official | 489:119543c9f674 | 219 | * in the I2S_InitTypeDef and create the associated handle. |
| mbed_official | 489:119543c9f674 | 220 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 221 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 222 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 223 | */ |
| mbed_official | 489:119543c9f674 | 224 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 225 | { |
| mbed_official | 489:119543c9f674 | 226 | uint32_t i2sdiv = 2, i2sodd = 0, packetlength = 1; |
| mbed_official | 489:119543c9f674 | 227 | uint32_t tmp = 0, i2sclk = 0; |
| mbed_official | 489:119543c9f674 | 228 | |
| mbed_official | 489:119543c9f674 | 229 | /* Check the I2S handle allocation */ |
| mbed_official | 489:119543c9f674 | 230 | if(hi2s == NULL) |
| mbed_official | 489:119543c9f674 | 231 | { |
| mbed_official | 489:119543c9f674 | 232 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 233 | } |
| mbed_official | 489:119543c9f674 | 234 | |
| mbed_official | 489:119543c9f674 | 235 | /* Check the I2S parameters */ |
| mbed_official | 489:119543c9f674 | 236 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance)); |
| mbed_official | 489:119543c9f674 | 237 | assert_param(IS_I2S_MODE(hi2s->Init.Mode)); |
| mbed_official | 489:119543c9f674 | 238 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard)); |
| mbed_official | 489:119543c9f674 | 239 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat)); |
| mbed_official | 489:119543c9f674 | 240 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput)); |
| mbed_official | 489:119543c9f674 | 241 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq)); |
| mbed_official | 489:119543c9f674 | 242 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL)); |
| mbed_official | 489:119543c9f674 | 243 | |
| mbed_official | 489:119543c9f674 | 244 | if(hi2s->State == HAL_I2S_STATE_RESET) |
| mbed_official | 489:119543c9f674 | 245 | { |
| mbed_official | 489:119543c9f674 | 246 | /* Allocate lock resource and initialize it */ |
| mbed_official | 489:119543c9f674 | 247 | hi2s-> Lock = HAL_UNLOCKED; |
| mbed_official | 489:119543c9f674 | 248 | |
| mbed_official | 489:119543c9f674 | 249 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
| mbed_official | 489:119543c9f674 | 250 | HAL_I2S_MspInit(hi2s); |
| mbed_official | 489:119543c9f674 | 251 | } |
| mbed_official | 489:119543c9f674 | 252 | |
| mbed_official | 489:119543c9f674 | 253 | hi2s->State = HAL_I2S_STATE_BUSY; |
| mbed_official | 489:119543c9f674 | 254 | |
| mbed_official | 489:119543c9f674 | 255 | /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ |
| mbed_official | 489:119543c9f674 | 256 | if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT) |
| mbed_official | 489:119543c9f674 | 257 | { |
| mbed_official | 489:119543c9f674 | 258 | i2sodd = (uint32_t)0; |
| mbed_official | 489:119543c9f674 | 259 | i2sdiv = (uint32_t)2; |
| mbed_official | 489:119543c9f674 | 260 | } |
| mbed_official | 489:119543c9f674 | 261 | /* If the requested audio frequency is not the default, compute the prescaler */ |
| mbed_official | 489:119543c9f674 | 262 | else |
| mbed_official | 489:119543c9f674 | 263 | { |
| mbed_official | 489:119543c9f674 | 264 | /* Check the frame length (For the Prescaler computing) *******************/ |
| mbed_official | 489:119543c9f674 | 265 | if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B) |
| mbed_official | 489:119543c9f674 | 266 | { |
| mbed_official | 489:119543c9f674 | 267 | /* Packet length is 16 bits */ |
| mbed_official | 489:119543c9f674 | 268 | packetlength = 1; |
| mbed_official | 489:119543c9f674 | 269 | } |
| mbed_official | 489:119543c9f674 | 270 | else |
| mbed_official | 489:119543c9f674 | 271 | { |
| mbed_official | 489:119543c9f674 | 272 | /* Packet length is 32 bits */ |
| mbed_official | 489:119543c9f674 | 273 | packetlength = 2; |
| mbed_official | 489:119543c9f674 | 274 | } |
| mbed_official | 489:119543c9f674 | 275 | |
| mbed_official | 489:119543c9f674 | 276 | if(hi2s->Instance == SPI2) |
| mbed_official | 489:119543c9f674 | 277 | { |
| mbed_official | 489:119543c9f674 | 278 | /* Get the source clock value: based on SPI2 Instance */ |
| mbed_official | 489:119543c9f674 | 279 | i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S2); |
| mbed_official | 489:119543c9f674 | 280 | } |
| mbed_official | 489:119543c9f674 | 281 | else if(hi2s->Instance == SPI3) |
| mbed_official | 489:119543c9f674 | 282 | { |
| mbed_official | 489:119543c9f674 | 283 | /* Get the source clock value: based on SPI3 Instance */ |
| mbed_official | 489:119543c9f674 | 284 | i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S3); |
| mbed_official | 489:119543c9f674 | 285 | } |
| mbed_official | 489:119543c9f674 | 286 | else |
| mbed_official | 489:119543c9f674 | 287 | { |
| mbed_official | 489:119543c9f674 | 288 | /* Get the source clock value: based on System Clock value */ |
| mbed_official | 489:119543c9f674 | 289 | i2sclk = HAL_RCC_GetSysClockFreq(); |
| mbed_official | 489:119543c9f674 | 290 | } |
| mbed_official | 489:119543c9f674 | 291 | if(i2sclk == 0) |
| mbed_official | 489:119543c9f674 | 292 | { |
| mbed_official | 489:119543c9f674 | 293 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 294 | } |
| mbed_official | 489:119543c9f674 | 295 | |
| mbed_official | 489:119543c9f674 | 296 | /* Compute the Real divider depending on the MCLK output state, with a floating point */ |
| mbed_official | 489:119543c9f674 | 297 | if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE) |
| mbed_official | 489:119543c9f674 | 298 | { |
| mbed_official | 489:119543c9f674 | 299 | /* MCLK output is enabled */ |
| mbed_official | 489:119543c9f674 | 300 | tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5); |
| mbed_official | 489:119543c9f674 | 301 | } |
| mbed_official | 489:119543c9f674 | 302 | else |
| mbed_official | 489:119543c9f674 | 303 | { |
| mbed_official | 489:119543c9f674 | 304 | /* MCLK output is disabled */ |
| mbed_official | 489:119543c9f674 | 305 | tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5); |
| mbed_official | 489:119543c9f674 | 306 | } |
| mbed_official | 489:119543c9f674 | 307 | |
| mbed_official | 489:119543c9f674 | 308 | /* Remove the flatting point */ |
| mbed_official | 489:119543c9f674 | 309 | tmp = tmp / 10; |
| mbed_official | 489:119543c9f674 | 310 | |
| mbed_official | 489:119543c9f674 | 311 | /* Check the parity of the divider */ |
| mbed_official | 489:119543c9f674 | 312 | i2sodd = (uint32_t)(tmp & (uint32_t)1); |
| mbed_official | 489:119543c9f674 | 313 | |
| mbed_official | 489:119543c9f674 | 314 | /* Compute the i2sdiv prescaler */ |
| mbed_official | 489:119543c9f674 | 315 | i2sdiv = (uint32_t)((tmp - i2sodd) / 2); |
| mbed_official | 489:119543c9f674 | 316 | |
| mbed_official | 489:119543c9f674 | 317 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
| mbed_official | 489:119543c9f674 | 318 | i2sodd = (uint32_t) (i2sodd << 8); |
| mbed_official | 489:119543c9f674 | 319 | } |
| mbed_official | 489:119543c9f674 | 320 | |
| mbed_official | 489:119543c9f674 | 321 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
| mbed_official | 489:119543c9f674 | 322 | if((i2sdiv < 2) || (i2sdiv > 0xFF)) |
| mbed_official | 489:119543c9f674 | 323 | { |
| mbed_official | 489:119543c9f674 | 324 | /* Set the default values */ |
| mbed_official | 489:119543c9f674 | 325 | i2sdiv = 2; |
| mbed_official | 489:119543c9f674 | 326 | i2sodd = 0; |
| mbed_official | 489:119543c9f674 | 327 | } |
| mbed_official | 489:119543c9f674 | 328 | |
| mbed_official | 489:119543c9f674 | 329 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/ |
| mbed_official | 489:119543c9f674 | 330 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
| mbed_official | 489:119543c9f674 | 331 | /* And configure the I2S with the I2S_InitStruct values */ |
| mbed_official | 489:119543c9f674 | 332 | MODIFY_REG( hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN |\ |
| mbed_official | 489:119543c9f674 | 333 | SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD |\ |
| mbed_official | 489:119543c9f674 | 334 | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG |\ |
| mbed_official | 489:119543c9f674 | 335 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD),\ |
| mbed_official | 489:119543c9f674 | 336 | (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode |\ |
| mbed_official | 489:119543c9f674 | 337 | hi2s->Init.Standard | hi2s->Init.DataFormat |\ |
| mbed_official | 489:119543c9f674 | 338 | hi2s->Init.CPOL)); |
| mbed_official | 489:119543c9f674 | 339 | |
| mbed_official | 489:119543c9f674 | 340 | /* Write to SPIx I2SPR register the computed value */ |
| mbed_official | 489:119543c9f674 | 341 | hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput)); |
| mbed_official | 489:119543c9f674 | 342 | |
| mbed_official | 489:119543c9f674 | 343 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 489:119543c9f674 | 344 | hi2s->State= HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 345 | |
| mbed_official | 489:119543c9f674 | 346 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 347 | } |
| mbed_official | 489:119543c9f674 | 348 | |
| mbed_official | 489:119543c9f674 | 349 | /** |
| mbed_official | 489:119543c9f674 | 350 | * @brief DeInitializes the I2S peripheral |
| mbed_official | 489:119543c9f674 | 351 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 352 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 353 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 354 | */ |
| mbed_official | 489:119543c9f674 | 355 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 356 | { |
| mbed_official | 489:119543c9f674 | 357 | /* Check the I2S handle allocation */ |
| mbed_official | 489:119543c9f674 | 358 | if(hi2s == NULL) |
| mbed_official | 489:119543c9f674 | 359 | { |
| mbed_official | 489:119543c9f674 | 360 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 361 | } |
| mbed_official | 489:119543c9f674 | 362 | |
| mbed_official | 489:119543c9f674 | 363 | hi2s->State = HAL_I2S_STATE_BUSY; |
| mbed_official | 489:119543c9f674 | 364 | |
| mbed_official | 489:119543c9f674 | 365 | /* Disable the I2S Peripheral Clock */ |
| mbed_official | 489:119543c9f674 | 366 | __HAL_I2S_DISABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 367 | |
| mbed_official | 489:119543c9f674 | 368 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
| mbed_official | 489:119543c9f674 | 369 | HAL_I2S_MspDeInit(hi2s); |
| mbed_official | 489:119543c9f674 | 370 | |
| mbed_official | 489:119543c9f674 | 371 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 489:119543c9f674 | 372 | hi2s->State = HAL_I2S_STATE_RESET; |
| mbed_official | 489:119543c9f674 | 373 | |
| mbed_official | 489:119543c9f674 | 374 | /* Release Lock */ |
| mbed_official | 489:119543c9f674 | 375 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 376 | |
| mbed_official | 489:119543c9f674 | 377 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 378 | } |
| mbed_official | 489:119543c9f674 | 379 | |
| mbed_official | 489:119543c9f674 | 380 | /** |
| mbed_official | 489:119543c9f674 | 381 | * @brief I2S MSP Init |
| mbed_official | 489:119543c9f674 | 382 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 383 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 384 | * @retval None |
| mbed_official | 489:119543c9f674 | 385 | */ |
| mbed_official | 489:119543c9f674 | 386 | __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 387 | { |
| mbed_official | 489:119543c9f674 | 388 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 489:119543c9f674 | 389 | the HAL_I2S_MspInit could be implemented in the user file |
| mbed_official | 489:119543c9f674 | 390 | */ |
| mbed_official | 489:119543c9f674 | 391 | } |
| mbed_official | 489:119543c9f674 | 392 | |
| mbed_official | 489:119543c9f674 | 393 | /** |
| mbed_official | 489:119543c9f674 | 394 | * @brief I2S MSP DeInit |
| mbed_official | 489:119543c9f674 | 395 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 396 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 397 | * @retval None |
| mbed_official | 489:119543c9f674 | 398 | */ |
| mbed_official | 489:119543c9f674 | 399 | __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 400 | { |
| mbed_official | 489:119543c9f674 | 401 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 489:119543c9f674 | 402 | the HAL_I2S_MspDeInit could be implemented in the user file |
| mbed_official | 489:119543c9f674 | 403 | */ |
| mbed_official | 489:119543c9f674 | 404 | } |
| mbed_official | 489:119543c9f674 | 405 | |
| mbed_official | 489:119543c9f674 | 406 | /** |
| mbed_official | 489:119543c9f674 | 407 | * @} |
| mbed_official | 489:119543c9f674 | 408 | */ |
| mbed_official | 489:119543c9f674 | 409 | |
| mbed_official | 489:119543c9f674 | 410 | /** @defgroup I2S_Exported_Functions_Group2 IO operation functions |
| mbed_official | 489:119543c9f674 | 411 | * @brief Data transfers functions |
| mbed_official | 489:119543c9f674 | 412 | * |
| mbed_official | 489:119543c9f674 | 413 | @verbatim |
| mbed_official | 489:119543c9f674 | 414 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 415 | ##### IO operation functions ##### |
| mbed_official | 489:119543c9f674 | 416 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 417 | [..] |
| mbed_official | 489:119543c9f674 | 418 | This subsection provides a set of functions allowing to manage the I2S data |
| mbed_official | 489:119543c9f674 | 419 | transfers. |
| mbed_official | 489:119543c9f674 | 420 | |
| mbed_official | 489:119543c9f674 | 421 | (#) There are two modes of transfer: |
| mbed_official | 489:119543c9f674 | 422 | (++) Blocking mode : The communication is performed in the polling mode. |
| mbed_official | 489:119543c9f674 | 423 | The status of all data processing is returned by the same function |
| mbed_official | 489:119543c9f674 | 424 | after finishing transfer. |
| mbed_official | 489:119543c9f674 | 425 | (++) No-Blocking mode : The communication is performed using Interrupts |
| mbed_official | 489:119543c9f674 | 426 | or DMA. These functions return the status of the transfer startup. |
| mbed_official | 489:119543c9f674 | 427 | The end of the data processing will be indicated through the |
| mbed_official | 489:119543c9f674 | 428 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when |
| mbed_official | 489:119543c9f674 | 429 | using DMA mode. |
| mbed_official | 489:119543c9f674 | 430 | |
| mbed_official | 489:119543c9f674 | 431 | (#) Blocking mode functions are : |
| mbed_official | 489:119543c9f674 | 432 | (++) HAL_I2S_Transmit() |
| mbed_official | 489:119543c9f674 | 433 | (++) HAL_I2S_Receive() |
| mbed_official | 489:119543c9f674 | 434 | |
| mbed_official | 489:119543c9f674 | 435 | (#) No-Blocking mode functions with Interrupt are : |
| mbed_official | 489:119543c9f674 | 436 | (++) HAL_I2S_Transmit_IT() |
| mbed_official | 489:119543c9f674 | 437 | (++) HAL_I2S_Receive_IT() |
| mbed_official | 489:119543c9f674 | 438 | |
| mbed_official | 489:119543c9f674 | 439 | (#) No-Blocking mode functions with DMA are : |
| mbed_official | 489:119543c9f674 | 440 | (++) HAL_I2S_Transmit_DMA() |
| mbed_official | 489:119543c9f674 | 441 | (++) HAL_I2S_Receive_DMA() |
| mbed_official | 489:119543c9f674 | 442 | |
| mbed_official | 489:119543c9f674 | 443 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
| mbed_official | 489:119543c9f674 | 444 | (++) HAL_I2S_TxCpltCallback() |
| mbed_official | 489:119543c9f674 | 445 | (++) HAL_I2S_RxCpltCallback() |
| mbed_official | 489:119543c9f674 | 446 | (++) HAL_I2S_ErrorCallback() |
| mbed_official | 489:119543c9f674 | 447 | |
| mbed_official | 489:119543c9f674 | 448 | @endverbatim |
| mbed_official | 489:119543c9f674 | 449 | * @{ |
| mbed_official | 489:119543c9f674 | 450 | */ |
| mbed_official | 489:119543c9f674 | 451 | |
| mbed_official | 489:119543c9f674 | 452 | /** |
| mbed_official | 489:119543c9f674 | 453 | * @brief Transmit an amount of data in blocking mode |
| mbed_official | 489:119543c9f674 | 454 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 455 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 456 | * @param pData: a 16-bit pointer to data buffer. |
| mbed_official | 489:119543c9f674 | 457 | * @param Size: number of data sample to be sent: |
| mbed_official | 489:119543c9f674 | 458 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 489:119543c9f674 | 459 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 489:119543c9f674 | 460 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 489:119543c9f674 | 461 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 489:119543c9f674 | 462 | * @param Timeout: Timeout duration |
| mbed_official | 489:119543c9f674 | 463 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 489:119543c9f674 | 464 | * between Master and Slave(example: audio streaming). |
| mbed_official | 489:119543c9f674 | 465 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 466 | */ |
| mbed_official | 489:119543c9f674 | 467 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
| mbed_official | 489:119543c9f674 | 468 | { |
| mbed_official | 489:119543c9f674 | 469 | if((pData == NULL ) || (Size == 0)) |
| mbed_official | 489:119543c9f674 | 470 | { |
| mbed_official | 489:119543c9f674 | 471 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 472 | } |
| mbed_official | 489:119543c9f674 | 473 | |
| mbed_official | 489:119543c9f674 | 474 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 475 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 476 | |
| mbed_official | 489:119543c9f674 | 477 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 489:119543c9f674 | 478 | { |
| mbed_official | 489:119543c9f674 | 479 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 489:119543c9f674 | 480 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 489:119543c9f674 | 481 | { |
| mbed_official | 489:119543c9f674 | 482 | hi2s->TxXferSize = (Size << 1); |
| mbed_official | 489:119543c9f674 | 483 | hi2s->TxXferCount = (Size << 1); |
| mbed_official | 489:119543c9f674 | 484 | } |
| mbed_official | 489:119543c9f674 | 485 | else |
| mbed_official | 489:119543c9f674 | 486 | { |
| mbed_official | 489:119543c9f674 | 487 | hi2s->TxXferSize = Size; |
| mbed_official | 489:119543c9f674 | 488 | hi2s->TxXferCount = Size; |
| mbed_official | 489:119543c9f674 | 489 | } |
| mbed_official | 489:119543c9f674 | 490 | |
| mbed_official | 489:119543c9f674 | 491 | /* Set state and reset error code */ |
| mbed_official | 489:119543c9f674 | 492 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 489:119543c9f674 | 493 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
| mbed_official | 489:119543c9f674 | 494 | hi2s->pTxBuffPtr = pData; |
| mbed_official | 489:119543c9f674 | 495 | |
| mbed_official | 489:119543c9f674 | 496 | /* Check if the I2S is already enabled */ |
| mbed_official | 489:119543c9f674 | 497 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 489:119543c9f674 | 498 | { |
| mbed_official | 489:119543c9f674 | 499 | /* Enable I2S peripheral */ |
| mbed_official | 489:119543c9f674 | 500 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 501 | } |
| mbed_official | 489:119543c9f674 | 502 | |
| mbed_official | 489:119543c9f674 | 503 | while(hi2s->TxXferCount > 0) |
| mbed_official | 489:119543c9f674 | 504 | { |
| mbed_official | 489:119543c9f674 | 505 | /* Wait until TXE flag is set */ |
| mbed_official | 489:119543c9f674 | 506 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK) |
| mbed_official | 489:119543c9f674 | 507 | { |
| mbed_official | 489:119543c9f674 | 508 | return HAL_TIMEOUT; |
| mbed_official | 489:119543c9f674 | 509 | } |
| mbed_official | 489:119543c9f674 | 510 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 489:119543c9f674 | 511 | hi2s->TxXferCount--; |
| mbed_official | 489:119543c9f674 | 512 | |
| mbed_official | 489:119543c9f674 | 513 | /* Check if an underrun occurs */ |
| mbed_official | 489:119543c9f674 | 514 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET) |
| mbed_official | 489:119543c9f674 | 515 | { |
| mbed_official | 489:119543c9f674 | 516 | /* Set the I2S State ready */ |
| mbed_official | 489:119543c9f674 | 517 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 518 | |
| mbed_official | 489:119543c9f674 | 519 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 520 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 521 | |
| mbed_official | 489:119543c9f674 | 522 | /* Set the error code and execute error callback*/ |
| mbed_official | 489:119543c9f674 | 523 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR; |
| mbed_official | 489:119543c9f674 | 524 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 525 | } |
| mbed_official | 489:119543c9f674 | 526 | } |
| mbed_official | 489:119543c9f674 | 527 | |
| mbed_official | 489:119543c9f674 | 528 | /* Wait until TXE flag is set, to confirm the end of the transcation */ |
| mbed_official | 489:119543c9f674 | 529 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK) |
| mbed_official | 489:119543c9f674 | 530 | { |
| mbed_official | 489:119543c9f674 | 531 | return HAL_TIMEOUT; |
| mbed_official | 489:119543c9f674 | 532 | } |
| mbed_official | 489:119543c9f674 | 533 | /* Wait until Busy flag is reset */ |
| mbed_official | 489:119543c9f674 | 534 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK) |
| mbed_official | 489:119543c9f674 | 535 | { |
| mbed_official | 489:119543c9f674 | 536 | return HAL_TIMEOUT; |
| mbed_official | 489:119543c9f674 | 537 | } |
| mbed_official | 489:119543c9f674 | 538 | |
| mbed_official | 489:119543c9f674 | 539 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 540 | |
| mbed_official | 489:119543c9f674 | 541 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 542 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 543 | |
| mbed_official | 489:119543c9f674 | 544 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 545 | } |
| mbed_official | 489:119543c9f674 | 546 | else |
| mbed_official | 489:119543c9f674 | 547 | { |
| mbed_official | 489:119543c9f674 | 548 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 549 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 550 | return HAL_BUSY; |
| mbed_official | 489:119543c9f674 | 551 | } |
| mbed_official | 489:119543c9f674 | 552 | } |
| mbed_official | 489:119543c9f674 | 553 | |
| mbed_official | 489:119543c9f674 | 554 | /** |
| mbed_official | 489:119543c9f674 | 555 | * @brief Receive an amount of data in blocking mode |
| mbed_official | 489:119543c9f674 | 556 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 557 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 558 | * @param pData: a 16-bit pointer to data buffer. |
| mbed_official | 489:119543c9f674 | 559 | * @param Size: number of data sample to be sent: |
| mbed_official | 489:119543c9f674 | 560 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 489:119543c9f674 | 561 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 489:119543c9f674 | 562 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 489:119543c9f674 | 563 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 489:119543c9f674 | 564 | * @param Timeout: Timeout duration |
| mbed_official | 489:119543c9f674 | 565 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 489:119543c9f674 | 566 | * between Master and Slave(example: audio streaming). |
| mbed_official | 489:119543c9f674 | 567 | * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate |
| mbed_official | 489:119543c9f674 | 568 | * in continouse way and as the I2S is not disabled at the end of the I2S transaction. |
| mbed_official | 489:119543c9f674 | 569 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 570 | */ |
| mbed_official | 489:119543c9f674 | 571 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
| mbed_official | 489:119543c9f674 | 572 | { |
| mbed_official | 489:119543c9f674 | 573 | if((pData == NULL ) || (Size == 0)) |
| mbed_official | 489:119543c9f674 | 574 | { |
| mbed_official | 489:119543c9f674 | 575 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 576 | } |
| mbed_official | 489:119543c9f674 | 577 | |
| mbed_official | 489:119543c9f674 | 578 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 579 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 580 | |
| mbed_official | 489:119543c9f674 | 581 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 489:119543c9f674 | 582 | { |
| mbed_official | 489:119543c9f674 | 583 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 489:119543c9f674 | 584 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 489:119543c9f674 | 585 | { |
| mbed_official | 489:119543c9f674 | 586 | hi2s->RxXferSize = (Size << 1); |
| mbed_official | 489:119543c9f674 | 587 | hi2s->RxXferCount = (Size << 1); |
| mbed_official | 489:119543c9f674 | 588 | } |
| mbed_official | 489:119543c9f674 | 589 | else |
| mbed_official | 489:119543c9f674 | 590 | { |
| mbed_official | 489:119543c9f674 | 591 | hi2s->RxXferSize = Size; |
| mbed_official | 489:119543c9f674 | 592 | hi2s->RxXferCount = Size; |
| mbed_official | 489:119543c9f674 | 593 | } |
| mbed_official | 489:119543c9f674 | 594 | |
| mbed_official | 489:119543c9f674 | 595 | /* Set state and reset error code */ |
| mbed_official | 489:119543c9f674 | 596 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 489:119543c9f674 | 597 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
| mbed_official | 489:119543c9f674 | 598 | hi2s->pRxBuffPtr = pData; |
| mbed_official | 489:119543c9f674 | 599 | |
| mbed_official | 489:119543c9f674 | 600 | /* Check if the I2S is already enabled */ |
| mbed_official | 489:119543c9f674 | 601 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 489:119543c9f674 | 602 | { |
| mbed_official | 489:119543c9f674 | 603 | /* Enable I2S peripheral */ |
| mbed_official | 489:119543c9f674 | 604 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 605 | } |
| mbed_official | 489:119543c9f674 | 606 | |
| mbed_official | 489:119543c9f674 | 607 | /* Receive data */ |
| mbed_official | 489:119543c9f674 | 608 | while(hi2s->RxXferCount > 0) |
| mbed_official | 489:119543c9f674 | 609 | { |
| mbed_official | 489:119543c9f674 | 610 | /* Wait until RXNE flag is reset */ |
| mbed_official | 489:119543c9f674 | 611 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
| mbed_official | 489:119543c9f674 | 612 | { |
| mbed_official | 489:119543c9f674 | 613 | return HAL_TIMEOUT; |
| mbed_official | 489:119543c9f674 | 614 | } |
| mbed_official | 489:119543c9f674 | 615 | |
| mbed_official | 489:119543c9f674 | 616 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
| mbed_official | 489:119543c9f674 | 617 | hi2s->RxXferCount--; |
| mbed_official | 489:119543c9f674 | 618 | |
| mbed_official | 489:119543c9f674 | 619 | /* Check if an overrun occurs */ |
| mbed_official | 489:119543c9f674 | 620 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET) |
| mbed_official | 489:119543c9f674 | 621 | { |
| mbed_official | 489:119543c9f674 | 622 | /* Set the I2S State ready */ |
| mbed_official | 489:119543c9f674 | 623 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 624 | |
| mbed_official | 489:119543c9f674 | 625 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 626 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 627 | |
| mbed_official | 489:119543c9f674 | 628 | /* Set the error code and execute error callback*/ |
| mbed_official | 489:119543c9f674 | 629 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR; |
| mbed_official | 489:119543c9f674 | 630 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 631 | } |
| mbed_official | 489:119543c9f674 | 632 | } |
| mbed_official | 489:119543c9f674 | 633 | |
| mbed_official | 489:119543c9f674 | 634 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 635 | |
| mbed_official | 489:119543c9f674 | 636 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 637 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 638 | |
| mbed_official | 489:119543c9f674 | 639 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 640 | } |
| mbed_official | 489:119543c9f674 | 641 | else |
| mbed_official | 489:119543c9f674 | 642 | { |
| mbed_official | 489:119543c9f674 | 643 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 644 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 645 | return HAL_BUSY; |
| mbed_official | 489:119543c9f674 | 646 | } |
| mbed_official | 489:119543c9f674 | 647 | } |
| mbed_official | 489:119543c9f674 | 648 | |
| mbed_official | 489:119543c9f674 | 649 | /** |
| mbed_official | 489:119543c9f674 | 650 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
| mbed_official | 489:119543c9f674 | 651 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 652 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 653 | * @param pData: a 16-bit pointer to data buffer. |
| mbed_official | 489:119543c9f674 | 654 | * @param Size: number of data sample to be sent: |
| mbed_official | 489:119543c9f674 | 655 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 489:119543c9f674 | 656 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 489:119543c9f674 | 657 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 489:119543c9f674 | 658 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 489:119543c9f674 | 659 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 489:119543c9f674 | 660 | * between Master and Slave(example: audio streaming). |
| mbed_official | 489:119543c9f674 | 661 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 662 | */ |
| mbed_official | 489:119543c9f674 | 663 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
| mbed_official | 489:119543c9f674 | 664 | { |
| mbed_official | 489:119543c9f674 | 665 | if((pData == NULL) || (Size == 0)) |
| mbed_official | 489:119543c9f674 | 666 | { |
| mbed_official | 489:119543c9f674 | 667 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 668 | } |
| mbed_official | 489:119543c9f674 | 669 | |
| mbed_official | 489:119543c9f674 | 670 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 671 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 672 | |
| mbed_official | 489:119543c9f674 | 673 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 489:119543c9f674 | 674 | { |
| mbed_official | 489:119543c9f674 | 675 | hi2s->pTxBuffPtr = pData; |
| mbed_official | 489:119543c9f674 | 676 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
| mbed_official | 489:119543c9f674 | 677 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 489:119543c9f674 | 678 | |
| mbed_official | 489:119543c9f674 | 679 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 489:119543c9f674 | 680 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 489:119543c9f674 | 681 | { |
| mbed_official | 489:119543c9f674 | 682 | hi2s->TxXferSize = (Size << 1); |
| mbed_official | 489:119543c9f674 | 683 | hi2s->TxXferCount = (Size << 1); |
| mbed_official | 489:119543c9f674 | 684 | } |
| mbed_official | 489:119543c9f674 | 685 | else |
| mbed_official | 489:119543c9f674 | 686 | { |
| mbed_official | 489:119543c9f674 | 687 | hi2s->TxXferSize = Size; |
| mbed_official | 489:119543c9f674 | 688 | hi2s->TxXferCount = Size; |
| mbed_official | 489:119543c9f674 | 689 | } |
| mbed_official | 489:119543c9f674 | 690 | |
| mbed_official | 489:119543c9f674 | 691 | /* Enable TXE and ERR interrupt */ |
| mbed_official | 489:119543c9f674 | 692 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 489:119543c9f674 | 693 | |
| mbed_official | 489:119543c9f674 | 694 | /* Check if the I2S is already enabled */ |
| mbed_official | 489:119543c9f674 | 695 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 489:119543c9f674 | 696 | { |
| mbed_official | 489:119543c9f674 | 697 | /* Enable I2S peripheral */ |
| mbed_official | 489:119543c9f674 | 698 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 699 | } |
| mbed_official | 489:119543c9f674 | 700 | |
| mbed_official | 489:119543c9f674 | 701 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 702 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 703 | |
| mbed_official | 489:119543c9f674 | 704 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 705 | } |
| mbed_official | 489:119543c9f674 | 706 | else |
| mbed_official | 489:119543c9f674 | 707 | { |
| mbed_official | 489:119543c9f674 | 708 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 709 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 710 | return HAL_BUSY; |
| mbed_official | 489:119543c9f674 | 711 | } |
| mbed_official | 489:119543c9f674 | 712 | } |
| mbed_official | 489:119543c9f674 | 713 | |
| mbed_official | 489:119543c9f674 | 714 | /** |
| mbed_official | 489:119543c9f674 | 715 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
| mbed_official | 489:119543c9f674 | 716 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 717 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 718 | * @param pData: a 16-bit pointer to the Receive data buffer. |
| mbed_official | 489:119543c9f674 | 719 | * @param Size: number of data sample to be sent: |
| mbed_official | 489:119543c9f674 | 720 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 489:119543c9f674 | 721 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 489:119543c9f674 | 722 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 489:119543c9f674 | 723 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 489:119543c9f674 | 724 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 489:119543c9f674 | 725 | * between Master and Slave(example: audio streaming). |
| mbed_official | 489:119543c9f674 | 726 | * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation |
| mbed_official | 489:119543c9f674 | 727 | * between Master and Slave otherwise the I2S interrupt should be optimized. |
| mbed_official | 489:119543c9f674 | 728 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 729 | */ |
| mbed_official | 489:119543c9f674 | 730 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
| mbed_official | 489:119543c9f674 | 731 | { |
| mbed_official | 489:119543c9f674 | 732 | if((pData == NULL) || (Size == 0)) |
| mbed_official | 489:119543c9f674 | 733 | { |
| mbed_official | 489:119543c9f674 | 734 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 735 | } |
| mbed_official | 489:119543c9f674 | 736 | |
| mbed_official | 489:119543c9f674 | 737 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 738 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 739 | |
| mbed_official | 489:119543c9f674 | 740 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 489:119543c9f674 | 741 | { |
| mbed_official | 489:119543c9f674 | 742 | hi2s->pRxBuffPtr = pData; |
| mbed_official | 489:119543c9f674 | 743 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
| mbed_official | 489:119543c9f674 | 744 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 489:119543c9f674 | 745 | |
| mbed_official | 489:119543c9f674 | 746 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 489:119543c9f674 | 747 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 489:119543c9f674 | 748 | { |
| mbed_official | 489:119543c9f674 | 749 | hi2s->RxXferSize = (Size << 1); |
| mbed_official | 489:119543c9f674 | 750 | hi2s->RxXferCount = (Size << 1); |
| mbed_official | 489:119543c9f674 | 751 | } |
| mbed_official | 489:119543c9f674 | 752 | else |
| mbed_official | 489:119543c9f674 | 753 | { |
| mbed_official | 489:119543c9f674 | 754 | hi2s->RxXferSize = Size; |
| mbed_official | 489:119543c9f674 | 755 | hi2s->RxXferCount = Size; |
| mbed_official | 489:119543c9f674 | 756 | } |
| mbed_official | 489:119543c9f674 | 757 | |
| mbed_official | 489:119543c9f674 | 758 | /* Enable RXNE and ERR interrupt */ |
| mbed_official | 489:119543c9f674 | 759 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 489:119543c9f674 | 760 | |
| mbed_official | 489:119543c9f674 | 761 | /* Check if the I2S is already enabled */ |
| mbed_official | 489:119543c9f674 | 762 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 489:119543c9f674 | 763 | { |
| mbed_official | 489:119543c9f674 | 764 | /* Enable I2S peripheral */ |
| mbed_official | 489:119543c9f674 | 765 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 766 | } |
| mbed_official | 489:119543c9f674 | 767 | |
| mbed_official | 489:119543c9f674 | 768 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 769 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 770 | |
| mbed_official | 489:119543c9f674 | 771 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 772 | } |
| mbed_official | 489:119543c9f674 | 773 | else |
| mbed_official | 489:119543c9f674 | 774 | { |
| mbed_official | 489:119543c9f674 | 775 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 776 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 777 | return HAL_BUSY; |
| mbed_official | 489:119543c9f674 | 778 | } |
| mbed_official | 489:119543c9f674 | 779 | } |
| mbed_official | 489:119543c9f674 | 780 | |
| mbed_official | 489:119543c9f674 | 781 | /** |
| mbed_official | 489:119543c9f674 | 782 | * @brief Transmit an amount of data in non-blocking mode with DMA |
| mbed_official | 489:119543c9f674 | 783 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 784 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 785 | * @param pData: a 16-bit pointer to the Transmit data buffer. |
| mbed_official | 489:119543c9f674 | 786 | * @param Size: number of data sample to be sent: |
| mbed_official | 489:119543c9f674 | 787 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 489:119543c9f674 | 788 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 489:119543c9f674 | 789 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 489:119543c9f674 | 790 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 489:119543c9f674 | 791 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 489:119543c9f674 | 792 | * between Master and Slave(example: audio streaming). |
| mbed_official | 489:119543c9f674 | 793 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 794 | */ |
| mbed_official | 489:119543c9f674 | 795 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
| mbed_official | 489:119543c9f674 | 796 | { |
| mbed_official | 489:119543c9f674 | 797 | if((pData == NULL) || (Size == 0)) |
| mbed_official | 489:119543c9f674 | 798 | { |
| mbed_official | 489:119543c9f674 | 799 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 800 | } |
| mbed_official | 489:119543c9f674 | 801 | |
| mbed_official | 489:119543c9f674 | 802 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 803 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 804 | |
| mbed_official | 489:119543c9f674 | 805 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 489:119543c9f674 | 806 | { |
| mbed_official | 489:119543c9f674 | 807 | hi2s->pTxBuffPtr = pData; |
| mbed_official | 489:119543c9f674 | 808 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
| mbed_official | 489:119543c9f674 | 809 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 489:119543c9f674 | 810 | |
| mbed_official | 489:119543c9f674 | 811 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 489:119543c9f674 | 812 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 489:119543c9f674 | 813 | { |
| mbed_official | 489:119543c9f674 | 814 | hi2s->TxXferSize = (Size << 1); |
| mbed_official | 489:119543c9f674 | 815 | hi2s->TxXferCount = (Size << 1); |
| mbed_official | 489:119543c9f674 | 816 | } |
| mbed_official | 489:119543c9f674 | 817 | else |
| mbed_official | 489:119543c9f674 | 818 | { |
| mbed_official | 489:119543c9f674 | 819 | hi2s->TxXferSize = Size; |
| mbed_official | 489:119543c9f674 | 820 | hi2s->TxXferCount = Size; |
| mbed_official | 489:119543c9f674 | 821 | } |
| mbed_official | 489:119543c9f674 | 822 | |
| mbed_official | 489:119543c9f674 | 823 | /* Set the I2S Tx DMA Half transfert complete callback */ |
| mbed_official | 489:119543c9f674 | 824 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt; |
| mbed_official | 489:119543c9f674 | 825 | |
| mbed_official | 489:119543c9f674 | 826 | /* Set the I2S Tx DMA transfert complete callback */ |
| mbed_official | 489:119543c9f674 | 827 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt; |
| mbed_official | 489:119543c9f674 | 828 | |
| mbed_official | 489:119543c9f674 | 829 | /* Set the DMA error callback */ |
| mbed_official | 489:119543c9f674 | 830 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError; |
| mbed_official | 489:119543c9f674 | 831 | |
| mbed_official | 489:119543c9f674 | 832 | /* Enable the Tx DMA Channel */ |
| mbed_official | 489:119543c9f674 | 833 | HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); |
| mbed_official | 489:119543c9f674 | 834 | |
| mbed_official | 489:119543c9f674 | 835 | /* Check if the I2S is already enabled */ |
| mbed_official | 489:119543c9f674 | 836 | if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
| mbed_official | 489:119543c9f674 | 837 | { |
| mbed_official | 489:119543c9f674 | 838 | /* Enable I2S peripheral */ |
| mbed_official | 489:119543c9f674 | 839 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 840 | } |
| mbed_official | 489:119543c9f674 | 841 | |
| mbed_official | 489:119543c9f674 | 842 | /* Check if the I2S Tx request is already enabled */ |
| mbed_official | 489:119543c9f674 | 843 | if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN)) |
| mbed_official | 489:119543c9f674 | 844 | { |
| mbed_official | 489:119543c9f674 | 845 | /* Enable Tx DMA Request */ |
| mbed_official | 489:119543c9f674 | 846 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
| mbed_official | 489:119543c9f674 | 847 | } |
| mbed_official | 489:119543c9f674 | 848 | |
| mbed_official | 489:119543c9f674 | 849 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 850 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 851 | |
| mbed_official | 489:119543c9f674 | 852 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 853 | } |
| mbed_official | 489:119543c9f674 | 854 | else |
| mbed_official | 489:119543c9f674 | 855 | { |
| mbed_official | 489:119543c9f674 | 856 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 857 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 858 | return HAL_BUSY; |
| mbed_official | 489:119543c9f674 | 859 | } |
| mbed_official | 489:119543c9f674 | 860 | } |
| mbed_official | 489:119543c9f674 | 861 | |
| mbed_official | 489:119543c9f674 | 862 | /** |
| mbed_official | 489:119543c9f674 | 863 | * @brief Receive an amount of data in non-blocking mode with DMA |
| mbed_official | 489:119543c9f674 | 864 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 865 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 866 | * @param pData: a 16-bit pointer to the Receive data buffer. |
| mbed_official | 489:119543c9f674 | 867 | * @param Size: number of data sample to be sent: |
| mbed_official | 489:119543c9f674 | 868 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 489:119543c9f674 | 869 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 489:119543c9f674 | 870 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 489:119543c9f674 | 871 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 489:119543c9f674 | 872 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 489:119543c9f674 | 873 | * between Master and Slave(example: audio streaming). |
| mbed_official | 489:119543c9f674 | 874 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 875 | */ |
| mbed_official | 489:119543c9f674 | 876 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
| mbed_official | 489:119543c9f674 | 877 | { |
| mbed_official | 489:119543c9f674 | 878 | if((pData == NULL) || (Size == 0)) |
| mbed_official | 489:119543c9f674 | 879 | { |
| mbed_official | 489:119543c9f674 | 880 | return HAL_ERROR; |
| mbed_official | 489:119543c9f674 | 881 | } |
| mbed_official | 489:119543c9f674 | 882 | |
| mbed_official | 489:119543c9f674 | 883 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 884 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 885 | |
| mbed_official | 489:119543c9f674 | 886 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 489:119543c9f674 | 887 | { |
| mbed_official | 489:119543c9f674 | 888 | hi2s->pRxBuffPtr = pData; |
| mbed_official | 489:119543c9f674 | 889 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
| mbed_official | 489:119543c9f674 | 890 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 489:119543c9f674 | 891 | |
| mbed_official | 489:119543c9f674 | 892 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 489:119543c9f674 | 893 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
| mbed_official | 489:119543c9f674 | 894 | { |
| mbed_official | 489:119543c9f674 | 895 | hi2s->RxXferSize = (Size << 1); |
| mbed_official | 489:119543c9f674 | 896 | hi2s->RxXferCount = (Size << 1); |
| mbed_official | 489:119543c9f674 | 897 | } |
| mbed_official | 489:119543c9f674 | 898 | else |
| mbed_official | 489:119543c9f674 | 899 | { |
| mbed_official | 489:119543c9f674 | 900 | hi2s->RxXferSize = Size; |
| mbed_official | 489:119543c9f674 | 901 | hi2s->RxXferCount = Size; |
| mbed_official | 489:119543c9f674 | 902 | } |
| mbed_official | 489:119543c9f674 | 903 | |
| mbed_official | 489:119543c9f674 | 904 | |
| mbed_official | 489:119543c9f674 | 905 | /* Set the I2S Rx DMA Half transfert complete callback */ |
| mbed_official | 489:119543c9f674 | 906 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt; |
| mbed_official | 489:119543c9f674 | 907 | |
| mbed_official | 489:119543c9f674 | 908 | /* Set the I2S Rx DMA transfert complete callback */ |
| mbed_official | 489:119543c9f674 | 909 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt; |
| mbed_official | 489:119543c9f674 | 910 | |
| mbed_official | 489:119543c9f674 | 911 | /* Set the DMA error callback */ |
| mbed_official | 489:119543c9f674 | 912 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError; |
| mbed_official | 489:119543c9f674 | 913 | |
| mbed_official | 489:119543c9f674 | 914 | /* Check if Master Receiver mode is selected */ |
| mbed_official | 489:119543c9f674 | 915 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
| mbed_official | 489:119543c9f674 | 916 | { |
| mbed_official | 489:119543c9f674 | 917 | /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read |
| mbed_official | 489:119543c9f674 | 918 | access to the SPI_SR register. */ |
| mbed_official | 489:119543c9f674 | 919 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
| mbed_official | 489:119543c9f674 | 920 | } |
| mbed_official | 489:119543c9f674 | 921 | |
| mbed_official | 489:119543c9f674 | 922 | /* Enable the Rx DMA Channel */ |
| mbed_official | 489:119543c9f674 | 923 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize); |
| mbed_official | 489:119543c9f674 | 924 | |
| mbed_official | 489:119543c9f674 | 925 | /* Check if the I2S is already enabled */ |
| mbed_official | 489:119543c9f674 | 926 | if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
| mbed_official | 489:119543c9f674 | 927 | { |
| mbed_official | 489:119543c9f674 | 928 | /* Enable I2S peripheral */ |
| mbed_official | 489:119543c9f674 | 929 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 930 | } |
| mbed_official | 489:119543c9f674 | 931 | |
| mbed_official | 489:119543c9f674 | 932 | /* Check if the I2S Rx request is already enabled */ |
| mbed_official | 489:119543c9f674 | 933 | if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN)) |
| mbed_official | 489:119543c9f674 | 934 | { |
| mbed_official | 489:119543c9f674 | 935 | /* Enable Rx DMA Request */ |
| mbed_official | 489:119543c9f674 | 936 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
| mbed_official | 489:119543c9f674 | 937 | } |
| mbed_official | 489:119543c9f674 | 938 | |
| mbed_official | 489:119543c9f674 | 939 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 940 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 941 | |
| mbed_official | 489:119543c9f674 | 942 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 943 | } |
| mbed_official | 489:119543c9f674 | 944 | else |
| mbed_official | 489:119543c9f674 | 945 | { |
| mbed_official | 489:119543c9f674 | 946 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 947 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 948 | return HAL_BUSY; |
| mbed_official | 489:119543c9f674 | 949 | } |
| mbed_official | 489:119543c9f674 | 950 | } |
| mbed_official | 489:119543c9f674 | 951 | |
| mbed_official | 489:119543c9f674 | 952 | /** |
| mbed_official | 489:119543c9f674 | 953 | * @brief Pauses the audio stream playing from the Media. |
| mbed_official | 489:119543c9f674 | 954 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 955 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 956 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 957 | */ |
| mbed_official | 489:119543c9f674 | 958 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 959 | { |
| mbed_official | 489:119543c9f674 | 960 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 961 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 962 | |
| mbed_official | 489:119543c9f674 | 963 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
| mbed_official | 489:119543c9f674 | 964 | { |
| mbed_official | 489:119543c9f674 | 965 | /* Disable the I2S DMA Tx request */ |
| mbed_official | 489:119543c9f674 | 966 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
| mbed_official | 489:119543c9f674 | 967 | } |
| mbed_official | 489:119543c9f674 | 968 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
| mbed_official | 489:119543c9f674 | 969 | { |
| mbed_official | 489:119543c9f674 | 970 | /* Disable the I2S DMA Rx request */ |
| mbed_official | 489:119543c9f674 | 971 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
| mbed_official | 489:119543c9f674 | 972 | } |
| mbed_official | 489:119543c9f674 | 973 | |
| mbed_official | 489:119543c9f674 | 974 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 975 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 976 | |
| mbed_official | 489:119543c9f674 | 977 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 978 | } |
| mbed_official | 489:119543c9f674 | 979 | |
| mbed_official | 489:119543c9f674 | 980 | /** |
| mbed_official | 489:119543c9f674 | 981 | * @brief Resumes the audio stream playing from the Media. |
| mbed_official | 489:119543c9f674 | 982 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 983 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 984 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 985 | */ |
| mbed_official | 489:119543c9f674 | 986 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 987 | { |
| mbed_official | 489:119543c9f674 | 988 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 989 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 990 | |
| mbed_official | 489:119543c9f674 | 991 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
| mbed_official | 489:119543c9f674 | 992 | { |
| mbed_official | 489:119543c9f674 | 993 | /* Enable the I2S DMA Tx request */ |
| mbed_official | 489:119543c9f674 | 994 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
| mbed_official | 489:119543c9f674 | 995 | } |
| mbed_official | 489:119543c9f674 | 996 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
| mbed_official | 489:119543c9f674 | 997 | { |
| mbed_official | 489:119543c9f674 | 998 | /* Enable the I2S DMA Rx request */ |
| mbed_official | 489:119543c9f674 | 999 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
| mbed_official | 489:119543c9f674 | 1000 | } |
| mbed_official | 489:119543c9f674 | 1001 | |
| mbed_official | 489:119543c9f674 | 1002 | /* If the I2S peripheral is still not enabled, enable it */ |
| mbed_official | 489:119543c9f674 | 1003 | if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
| mbed_official | 489:119543c9f674 | 1004 | { |
| mbed_official | 489:119543c9f674 | 1005 | /* Enable I2S peripheral */ |
| mbed_official | 489:119543c9f674 | 1006 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 1007 | } |
| mbed_official | 489:119543c9f674 | 1008 | |
| mbed_official | 489:119543c9f674 | 1009 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 1010 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 1011 | |
| mbed_official | 489:119543c9f674 | 1012 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 1013 | } |
| mbed_official | 489:119543c9f674 | 1014 | |
| mbed_official | 489:119543c9f674 | 1015 | /** |
| mbed_official | 489:119543c9f674 | 1016 | * @brief Resumes the audio stream playing from the Media. |
| mbed_official | 489:119543c9f674 | 1017 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1018 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1019 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 1020 | */ |
| mbed_official | 489:119543c9f674 | 1021 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1022 | { |
| mbed_official | 489:119543c9f674 | 1023 | /* Process Locked */ |
| mbed_official | 489:119543c9f674 | 1024 | __HAL_LOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 1025 | |
| mbed_official | 489:119543c9f674 | 1026 | /* Disable the I2S Tx/Rx DMA requests */ |
| mbed_official | 489:119543c9f674 | 1027 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
| mbed_official | 489:119543c9f674 | 1028 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
| mbed_official | 489:119543c9f674 | 1029 | |
| mbed_official | 489:119543c9f674 | 1030 | /* Abort the I2S DMA Channel tx */ |
| mbed_official | 489:119543c9f674 | 1031 | if(hi2s->hdmatx != NULL) |
| mbed_official | 489:119543c9f674 | 1032 | { |
| mbed_official | 489:119543c9f674 | 1033 | /* Disable the I2S DMA channel */ |
| mbed_official | 489:119543c9f674 | 1034 | __HAL_DMA_DISABLE(hi2s->hdmatx); |
| mbed_official | 489:119543c9f674 | 1035 | HAL_DMA_Abort(hi2s->hdmatx); |
| mbed_official | 489:119543c9f674 | 1036 | } |
| mbed_official | 489:119543c9f674 | 1037 | /* Abort the I2S DMA Channel rx */ |
| mbed_official | 489:119543c9f674 | 1038 | if(hi2s->hdmarx != NULL) |
| mbed_official | 489:119543c9f674 | 1039 | { |
| mbed_official | 489:119543c9f674 | 1040 | /* Disable the I2S DMA channel */ |
| mbed_official | 489:119543c9f674 | 1041 | __HAL_DMA_DISABLE(hi2s->hdmarx); |
| mbed_official | 489:119543c9f674 | 1042 | HAL_DMA_Abort(hi2s->hdmarx); |
| mbed_official | 489:119543c9f674 | 1043 | } |
| mbed_official | 489:119543c9f674 | 1044 | |
| mbed_official | 489:119543c9f674 | 1045 | /* Disable I2S peripheral */ |
| mbed_official | 489:119543c9f674 | 1046 | __HAL_I2S_DISABLE(hi2s); |
| mbed_official | 489:119543c9f674 | 1047 | |
| mbed_official | 489:119543c9f674 | 1048 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1049 | |
| mbed_official | 489:119543c9f674 | 1050 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 1051 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 1052 | |
| mbed_official | 489:119543c9f674 | 1053 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 1054 | } |
| mbed_official | 489:119543c9f674 | 1055 | |
| mbed_official | 489:119543c9f674 | 1056 | /** |
| mbed_official | 489:119543c9f674 | 1057 | * @brief This function handles I2S interrupt request. |
| mbed_official | 489:119543c9f674 | 1058 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1059 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1060 | * @retval None |
| mbed_official | 489:119543c9f674 | 1061 | */ |
| mbed_official | 489:119543c9f674 | 1062 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1063 | { |
| mbed_official | 489:119543c9f674 | 1064 | uint32_t i2ssr = hi2s->Instance->SR; |
| mbed_official | 489:119543c9f674 | 1065 | |
| mbed_official | 489:119543c9f674 | 1066 | /* I2S in mode Receiver ------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 1067 | if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) && |
| mbed_official | 489:119543c9f674 | 1068 | ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET)) |
| mbed_official | 489:119543c9f674 | 1069 | { |
| mbed_official | 489:119543c9f674 | 1070 | I2S_Receive_IT(hi2s); |
| mbed_official | 489:119543c9f674 | 1071 | return; |
| mbed_official | 489:119543c9f674 | 1072 | } |
| mbed_official | 489:119543c9f674 | 1073 | |
| mbed_official | 489:119543c9f674 | 1074 | /* I2S in mode Tramitter -----------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 1075 | if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET)) |
| mbed_official | 489:119543c9f674 | 1076 | { |
| mbed_official | 489:119543c9f674 | 1077 | I2S_Transmit_IT(hi2s); |
| mbed_official | 489:119543c9f674 | 1078 | return; |
| mbed_official | 489:119543c9f674 | 1079 | } |
| mbed_official | 489:119543c9f674 | 1080 | |
| mbed_official | 489:119543c9f674 | 1081 | /* I2S interrupt error -------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 1082 | if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET) |
| mbed_official | 489:119543c9f674 | 1083 | { |
| mbed_official | 489:119543c9f674 | 1084 | /* I2S Overrun error interrupt occured ---------------------------------*/ |
| mbed_official | 489:119543c9f674 | 1085 | if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) |
| mbed_official | 489:119543c9f674 | 1086 | { |
| mbed_official | 489:119543c9f674 | 1087 | /* Disable RXNE and ERR interrupt */ |
| mbed_official | 489:119543c9f674 | 1088 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 489:119543c9f674 | 1089 | |
| mbed_official | 489:119543c9f674 | 1090 | /* Set the error code and execute error callback*/ |
| mbed_official | 489:119543c9f674 | 1091 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR); |
| mbed_official | 489:119543c9f674 | 1092 | } |
| mbed_official | 489:119543c9f674 | 1093 | |
| mbed_official | 489:119543c9f674 | 1094 | /* I2S Underrun error interrupt occured --------------------------------*/ |
| mbed_official | 489:119543c9f674 | 1095 | if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) |
| mbed_official | 489:119543c9f674 | 1096 | { |
| mbed_official | 489:119543c9f674 | 1097 | /* Disable TXE and ERR interrupt */ |
| mbed_official | 489:119543c9f674 | 1098 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 489:119543c9f674 | 1099 | |
| mbed_official | 489:119543c9f674 | 1100 | /* Set the error code and execute error callback*/ |
| mbed_official | 489:119543c9f674 | 1101 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR); |
| mbed_official | 489:119543c9f674 | 1102 | } |
| mbed_official | 489:119543c9f674 | 1103 | |
| mbed_official | 489:119543c9f674 | 1104 | /* Set the I2S State ready */ |
| mbed_official | 489:119543c9f674 | 1105 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1106 | /* Call the Error Callback */ |
| mbed_official | 489:119543c9f674 | 1107 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 489:119543c9f674 | 1108 | } |
| mbed_official | 489:119543c9f674 | 1109 | } |
| mbed_official | 489:119543c9f674 | 1110 | |
| mbed_official | 489:119543c9f674 | 1111 | /** |
| mbed_official | 489:119543c9f674 | 1112 | * @brief Tx Transfer Half completed callbacks |
| mbed_official | 489:119543c9f674 | 1113 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1114 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1115 | * @retval None |
| mbed_official | 489:119543c9f674 | 1116 | */ |
| mbed_official | 489:119543c9f674 | 1117 | __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1118 | { |
| mbed_official | 489:119543c9f674 | 1119 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 489:119543c9f674 | 1120 | the HAL_I2S_TxHalfCpltCallback could be implemented in the user file |
| mbed_official | 489:119543c9f674 | 1121 | */ |
| mbed_official | 489:119543c9f674 | 1122 | } |
| mbed_official | 489:119543c9f674 | 1123 | |
| mbed_official | 489:119543c9f674 | 1124 | /** |
| mbed_official | 489:119543c9f674 | 1125 | * @brief Tx Transfer completed callbacks |
| mbed_official | 489:119543c9f674 | 1126 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1127 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1128 | * @retval None |
| mbed_official | 489:119543c9f674 | 1129 | */ |
| mbed_official | 489:119543c9f674 | 1130 | __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1131 | { |
| mbed_official | 489:119543c9f674 | 1132 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 489:119543c9f674 | 1133 | the HAL_I2S_TxCpltCallback could be implemented in the user file |
| mbed_official | 489:119543c9f674 | 1134 | */ |
| mbed_official | 489:119543c9f674 | 1135 | } |
| mbed_official | 489:119543c9f674 | 1136 | |
| mbed_official | 489:119543c9f674 | 1137 | /** |
| mbed_official | 489:119543c9f674 | 1138 | * @brief Rx Transfer half completed callbacks |
| mbed_official | 489:119543c9f674 | 1139 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1140 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1141 | * @retval None |
| mbed_official | 489:119543c9f674 | 1142 | */ |
| mbed_official | 489:119543c9f674 | 1143 | __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1144 | { |
| mbed_official | 489:119543c9f674 | 1145 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 489:119543c9f674 | 1146 | the HAL_I2S_RxHalfCpltCallback could be implemented in the user file |
| mbed_official | 489:119543c9f674 | 1147 | */ |
| mbed_official | 489:119543c9f674 | 1148 | } |
| mbed_official | 489:119543c9f674 | 1149 | |
| mbed_official | 489:119543c9f674 | 1150 | /** |
| mbed_official | 489:119543c9f674 | 1151 | * @brief Rx Transfer completed callbacks |
| mbed_official | 489:119543c9f674 | 1152 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1153 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1154 | * @retval None |
| mbed_official | 489:119543c9f674 | 1155 | */ |
| mbed_official | 489:119543c9f674 | 1156 | __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1157 | { |
| mbed_official | 489:119543c9f674 | 1158 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 489:119543c9f674 | 1159 | the HAL_I2S_RxCpltCallback could be implemented in the user file |
| mbed_official | 489:119543c9f674 | 1160 | */ |
| mbed_official | 489:119543c9f674 | 1161 | } |
| mbed_official | 489:119543c9f674 | 1162 | |
| mbed_official | 489:119543c9f674 | 1163 | /** |
| mbed_official | 489:119543c9f674 | 1164 | * @brief I2S error callbacks |
| mbed_official | 489:119543c9f674 | 1165 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1166 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1167 | * @retval None |
| mbed_official | 489:119543c9f674 | 1168 | */ |
| mbed_official | 489:119543c9f674 | 1169 | __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1170 | { |
| mbed_official | 489:119543c9f674 | 1171 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 489:119543c9f674 | 1172 | the HAL_I2S_ErrorCallback could be implemented in the user file |
| mbed_official | 489:119543c9f674 | 1173 | */ |
| mbed_official | 489:119543c9f674 | 1174 | } |
| mbed_official | 489:119543c9f674 | 1175 | |
| mbed_official | 489:119543c9f674 | 1176 | /** |
| mbed_official | 489:119543c9f674 | 1177 | * @} |
| mbed_official | 489:119543c9f674 | 1178 | */ |
| mbed_official | 489:119543c9f674 | 1179 | |
| mbed_official | 489:119543c9f674 | 1180 | /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions |
| mbed_official | 489:119543c9f674 | 1181 | * @brief Peripheral State functions |
| mbed_official | 489:119543c9f674 | 1182 | * |
| mbed_official | 489:119543c9f674 | 1183 | @verbatim |
| mbed_official | 489:119543c9f674 | 1184 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 1185 | ##### Peripheral State and Errors functions ##### |
| mbed_official | 489:119543c9f674 | 1186 | =============================================================================== |
| mbed_official | 489:119543c9f674 | 1187 | [..] |
| mbed_official | 489:119543c9f674 | 1188 | This subsection permits to get in run-time the status of the peripheral |
| mbed_official | 489:119543c9f674 | 1189 | and the data flow. |
| mbed_official | 489:119543c9f674 | 1190 | |
| mbed_official | 489:119543c9f674 | 1191 | @endverbatim |
| mbed_official | 489:119543c9f674 | 1192 | * @{ |
| mbed_official | 489:119543c9f674 | 1193 | */ |
| mbed_official | 489:119543c9f674 | 1194 | |
| mbed_official | 489:119543c9f674 | 1195 | /** |
| mbed_official | 489:119543c9f674 | 1196 | * @brief Return the I2S state |
| mbed_official | 489:119543c9f674 | 1197 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1198 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1199 | * @retval HAL state |
| mbed_official | 489:119543c9f674 | 1200 | */ |
| mbed_official | 489:119543c9f674 | 1201 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1202 | { |
| mbed_official | 489:119543c9f674 | 1203 | return hi2s->State; |
| mbed_official | 489:119543c9f674 | 1204 | } |
| mbed_official | 489:119543c9f674 | 1205 | |
| mbed_official | 489:119543c9f674 | 1206 | /** |
| mbed_official | 489:119543c9f674 | 1207 | * @brief Return the I2S error code |
| mbed_official | 489:119543c9f674 | 1208 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1209 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1210 | * @retval I2S Error Code |
| mbed_official | 489:119543c9f674 | 1211 | */ |
| mbed_official | 489:119543c9f674 | 1212 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1213 | { |
| mbed_official | 489:119543c9f674 | 1214 | return hi2s->ErrorCode; |
| mbed_official | 489:119543c9f674 | 1215 | } |
| mbed_official | 489:119543c9f674 | 1216 | /** |
| mbed_official | 489:119543c9f674 | 1217 | * @} |
| mbed_official | 489:119543c9f674 | 1218 | */ |
| mbed_official | 489:119543c9f674 | 1219 | |
| mbed_official | 489:119543c9f674 | 1220 | /** |
| mbed_official | 489:119543c9f674 | 1221 | * @} |
| mbed_official | 489:119543c9f674 | 1222 | */ |
| mbed_official | 489:119543c9f674 | 1223 | |
| mbed_official | 489:119543c9f674 | 1224 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 489:119543c9f674 | 1225 | /** @addtogroup I2S_Private_Functions I2S Private Functions |
| mbed_official | 489:119543c9f674 | 1226 | * @{ |
| mbed_official | 489:119543c9f674 | 1227 | */ |
| mbed_official | 489:119543c9f674 | 1228 | /** |
| mbed_official | 489:119543c9f674 | 1229 | * @brief DMA I2S transmit process complete callback |
| mbed_official | 489:119543c9f674 | 1230 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1231 | * the configuration information for the specified DMA module. |
| mbed_official | 489:119543c9f674 | 1232 | * @retval None |
| mbed_official | 489:119543c9f674 | 1233 | */ |
| mbed_official | 489:119543c9f674 | 1234 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma) |
| mbed_official | 489:119543c9f674 | 1235 | { |
| mbed_official | 489:119543c9f674 | 1236 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
| mbed_official | 489:119543c9f674 | 1237 | |
| mbed_official | 489:119543c9f674 | 1238 | if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) |
| mbed_official | 489:119543c9f674 | 1239 | { |
| mbed_official | 489:119543c9f674 | 1240 | /* Disable Tx DMA Request */ |
| mbed_official | 489:119543c9f674 | 1241 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
| mbed_official | 489:119543c9f674 | 1242 | |
| mbed_official | 489:119543c9f674 | 1243 | hi2s->TxXferCount = 0; |
| mbed_official | 489:119543c9f674 | 1244 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1245 | } |
| mbed_official | 489:119543c9f674 | 1246 | HAL_I2S_TxCpltCallback(hi2s); |
| mbed_official | 489:119543c9f674 | 1247 | } |
| mbed_official | 489:119543c9f674 | 1248 | |
| mbed_official | 489:119543c9f674 | 1249 | /** |
| mbed_official | 489:119543c9f674 | 1250 | * @brief DMA I2S transmit process half complete callback |
| mbed_official | 489:119543c9f674 | 1251 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1252 | * the configuration information for the specified DMA module. |
| mbed_official | 489:119543c9f674 | 1253 | * @retval None |
| mbed_official | 489:119543c9f674 | 1254 | */ |
| mbed_official | 489:119543c9f674 | 1255 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
| mbed_official | 489:119543c9f674 | 1256 | { |
| mbed_official | 489:119543c9f674 | 1257 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
| mbed_official | 489:119543c9f674 | 1258 | |
| mbed_official | 489:119543c9f674 | 1259 | HAL_I2S_TxHalfCpltCallback(hi2s); |
| mbed_official | 489:119543c9f674 | 1260 | } |
| mbed_official | 489:119543c9f674 | 1261 | |
| mbed_official | 489:119543c9f674 | 1262 | /** |
| mbed_official | 489:119543c9f674 | 1263 | * @brief DMA I2S receive process complete callback |
| mbed_official | 489:119543c9f674 | 1264 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1265 | * the configuration information for the specified DMA module. |
| mbed_official | 489:119543c9f674 | 1266 | * @retval None |
| mbed_official | 489:119543c9f674 | 1267 | */ |
| mbed_official | 489:119543c9f674 | 1268 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma) |
| mbed_official | 489:119543c9f674 | 1269 | { |
| mbed_official | 489:119543c9f674 | 1270 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
| mbed_official | 489:119543c9f674 | 1271 | |
| mbed_official | 489:119543c9f674 | 1272 | if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) |
| mbed_official | 489:119543c9f674 | 1273 | { |
| mbed_official | 489:119543c9f674 | 1274 | /* Disable Rx DMA Request */ |
| mbed_official | 489:119543c9f674 | 1275 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
| mbed_official | 489:119543c9f674 | 1276 | hi2s->RxXferCount = 0; |
| mbed_official | 489:119543c9f674 | 1277 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1278 | } |
| mbed_official | 489:119543c9f674 | 1279 | HAL_I2S_RxCpltCallback(hi2s); |
| mbed_official | 489:119543c9f674 | 1280 | } |
| mbed_official | 489:119543c9f674 | 1281 | |
| mbed_official | 489:119543c9f674 | 1282 | /** |
| mbed_official | 489:119543c9f674 | 1283 | * @brief DMA I2S receive process half complete callback |
| mbed_official | 489:119543c9f674 | 1284 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1285 | * the configuration information for the specified DMA module. |
| mbed_official | 489:119543c9f674 | 1286 | * @retval None |
| mbed_official | 489:119543c9f674 | 1287 | */ |
| mbed_official | 489:119543c9f674 | 1288 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
| mbed_official | 489:119543c9f674 | 1289 | { |
| mbed_official | 489:119543c9f674 | 1290 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
| mbed_official | 489:119543c9f674 | 1291 | |
| mbed_official | 489:119543c9f674 | 1292 | HAL_I2S_RxHalfCpltCallback(hi2s); |
| mbed_official | 489:119543c9f674 | 1293 | } |
| mbed_official | 489:119543c9f674 | 1294 | |
| mbed_official | 489:119543c9f674 | 1295 | /** |
| mbed_official | 489:119543c9f674 | 1296 | * @brief DMA I2S communication error callback |
| mbed_official | 489:119543c9f674 | 1297 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1298 | * the configuration information for the specified DMA module. |
| mbed_official | 489:119543c9f674 | 1299 | * @retval None |
| mbed_official | 489:119543c9f674 | 1300 | */ |
| mbed_official | 489:119543c9f674 | 1301 | static void I2S_DMAError(DMA_HandleTypeDef *hdma) |
| mbed_official | 489:119543c9f674 | 1302 | { |
| mbed_official | 489:119543c9f674 | 1303 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
| mbed_official | 489:119543c9f674 | 1304 | |
| mbed_official | 489:119543c9f674 | 1305 | /* Disable Rx and Tx DMA Request */ |
| mbed_official | 489:119543c9f674 | 1306 | CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
| mbed_official | 489:119543c9f674 | 1307 | hi2s->TxXferCount = 0; |
| mbed_official | 489:119543c9f674 | 1308 | hi2s->RxXferCount = 0; |
| mbed_official | 489:119543c9f674 | 1309 | |
| mbed_official | 489:119543c9f674 | 1310 | hi2s->State= HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1311 | |
| mbed_official | 489:119543c9f674 | 1312 | /* Set the error code and execute error callback*/ |
| mbed_official | 489:119543c9f674 | 1313 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA); |
| mbed_official | 489:119543c9f674 | 1314 | HAL_I2S_ErrorCallback(hi2s); |
| mbed_official | 489:119543c9f674 | 1315 | } |
| mbed_official | 489:119543c9f674 | 1316 | |
| mbed_official | 489:119543c9f674 | 1317 | /** |
| mbed_official | 489:119543c9f674 | 1318 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
| mbed_official | 489:119543c9f674 | 1319 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1320 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1321 | * @retval None |
| mbed_official | 489:119543c9f674 | 1322 | */ |
| mbed_official | 489:119543c9f674 | 1323 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1324 | { |
| mbed_official | 489:119543c9f674 | 1325 | /* Transmit data */ |
| mbed_official | 489:119543c9f674 | 1326 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 489:119543c9f674 | 1327 | hi2s->TxXferCount--; |
| mbed_official | 489:119543c9f674 | 1328 | |
| mbed_official | 489:119543c9f674 | 1329 | if(hi2s->TxXferCount == 0) |
| mbed_official | 489:119543c9f674 | 1330 | { |
| mbed_official | 489:119543c9f674 | 1331 | /* Disable TXE and ERR interrupt */ |
| mbed_official | 489:119543c9f674 | 1332 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 489:119543c9f674 | 1333 | |
| mbed_official | 489:119543c9f674 | 1334 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1335 | HAL_I2S_TxCpltCallback(hi2s); |
| mbed_official | 489:119543c9f674 | 1336 | } |
| mbed_official | 489:119543c9f674 | 1337 | } |
| mbed_official | 489:119543c9f674 | 1338 | |
| mbed_official | 489:119543c9f674 | 1339 | /** |
| mbed_official | 489:119543c9f674 | 1340 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
| mbed_official | 489:119543c9f674 | 1341 | * @param hi2s: I2S handle |
| mbed_official | 489:119543c9f674 | 1342 | * @retval None |
| mbed_official | 489:119543c9f674 | 1343 | */ |
| mbed_official | 489:119543c9f674 | 1344 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s) |
| mbed_official | 489:119543c9f674 | 1345 | { |
| mbed_official | 489:119543c9f674 | 1346 | /* Receive data */ |
| mbed_official | 489:119543c9f674 | 1347 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
| mbed_official | 489:119543c9f674 | 1348 | hi2s->RxXferCount--; |
| mbed_official | 489:119543c9f674 | 1349 | |
| mbed_official | 489:119543c9f674 | 1350 | if(hi2s->RxXferCount == 0) |
| mbed_official | 489:119543c9f674 | 1351 | { |
| mbed_official | 489:119543c9f674 | 1352 | /* Disable RXNE and ERR interrupt */ |
| mbed_official | 489:119543c9f674 | 1353 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 489:119543c9f674 | 1354 | |
| mbed_official | 489:119543c9f674 | 1355 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1356 | HAL_I2S_RxCpltCallback(hi2s); |
| mbed_official | 489:119543c9f674 | 1357 | } |
| mbed_official | 489:119543c9f674 | 1358 | } |
| mbed_official | 489:119543c9f674 | 1359 | |
| mbed_official | 489:119543c9f674 | 1360 | |
| mbed_official | 489:119543c9f674 | 1361 | /** |
| mbed_official | 489:119543c9f674 | 1362 | * @brief This function handles I2S Communication Timeout. |
| mbed_official | 489:119543c9f674 | 1363 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 489:119543c9f674 | 1364 | * the configuration information for I2S module |
| mbed_official | 489:119543c9f674 | 1365 | * @param Flag: Flag checked |
| mbed_official | 489:119543c9f674 | 1366 | * @param Status: Value of the flag expected |
| mbed_official | 489:119543c9f674 | 1367 | * @param Timeout: Duration of the timeout |
| mbed_official | 489:119543c9f674 | 1368 | * @retval HAL status |
| mbed_official | 489:119543c9f674 | 1369 | */ |
| mbed_official | 489:119543c9f674 | 1370 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout) |
| mbed_official | 489:119543c9f674 | 1371 | { |
| mbed_official | 489:119543c9f674 | 1372 | uint32_t tickstart = 0; |
| mbed_official | 489:119543c9f674 | 1373 | |
| mbed_official | 489:119543c9f674 | 1374 | /* Get tick */ |
| mbed_official | 489:119543c9f674 | 1375 | tickstart = HAL_GetTick(); |
| mbed_official | 489:119543c9f674 | 1376 | |
| mbed_official | 489:119543c9f674 | 1377 | /* Wait until flag is set */ |
| mbed_official | 489:119543c9f674 | 1378 | if(Status == RESET) |
| mbed_official | 489:119543c9f674 | 1379 | { |
| mbed_official | 489:119543c9f674 | 1380 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET) |
| mbed_official | 489:119543c9f674 | 1381 | { |
| mbed_official | 489:119543c9f674 | 1382 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 489:119543c9f674 | 1383 | { |
| mbed_official | 489:119543c9f674 | 1384 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
| mbed_official | 489:119543c9f674 | 1385 | { |
| mbed_official | 489:119543c9f674 | 1386 | /* Set the I2S State ready */ |
| mbed_official | 489:119543c9f674 | 1387 | hi2s->State= HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1388 | |
| mbed_official | 489:119543c9f674 | 1389 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 1390 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 1391 | |
| mbed_official | 489:119543c9f674 | 1392 | return HAL_TIMEOUT; |
| mbed_official | 489:119543c9f674 | 1393 | } |
| mbed_official | 489:119543c9f674 | 1394 | } |
| mbed_official | 489:119543c9f674 | 1395 | } |
| mbed_official | 489:119543c9f674 | 1396 | } |
| mbed_official | 489:119543c9f674 | 1397 | else |
| mbed_official | 489:119543c9f674 | 1398 | { |
| mbed_official | 489:119543c9f674 | 1399 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET) |
| mbed_official | 489:119543c9f674 | 1400 | { |
| mbed_official | 489:119543c9f674 | 1401 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 489:119543c9f674 | 1402 | { |
| mbed_official | 489:119543c9f674 | 1403 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
| mbed_official | 489:119543c9f674 | 1404 | { |
| mbed_official | 489:119543c9f674 | 1405 | /* Set the I2S State ready */ |
| mbed_official | 489:119543c9f674 | 1406 | hi2s->State= HAL_I2S_STATE_READY; |
| mbed_official | 489:119543c9f674 | 1407 | |
| mbed_official | 489:119543c9f674 | 1408 | /* Process Unlocked */ |
| mbed_official | 489:119543c9f674 | 1409 | __HAL_UNLOCK(hi2s); |
| mbed_official | 489:119543c9f674 | 1410 | |
| mbed_official | 489:119543c9f674 | 1411 | return HAL_TIMEOUT; |
| mbed_official | 489:119543c9f674 | 1412 | } |
| mbed_official | 489:119543c9f674 | 1413 | } |
| mbed_official | 489:119543c9f674 | 1414 | } |
| mbed_official | 489:119543c9f674 | 1415 | } |
| mbed_official | 489:119543c9f674 | 1416 | return HAL_OK; |
| mbed_official | 489:119543c9f674 | 1417 | } |
| mbed_official | 489:119543c9f674 | 1418 | |
| mbed_official | 489:119543c9f674 | 1419 | /** |
| mbed_official | 489:119543c9f674 | 1420 | * @} |
| mbed_official | 489:119543c9f674 | 1421 | */ |
| mbed_official | 489:119543c9f674 | 1422 | |
| mbed_official | 489:119543c9f674 | 1423 | /** |
| mbed_official | 489:119543c9f674 | 1424 | * @} |
| mbed_official | 489:119543c9f674 | 1425 | */ |
| mbed_official | 489:119543c9f674 | 1426 | |
| mbed_official | 489:119543c9f674 | 1427 | #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
| mbed_official | 489:119543c9f674 | 1428 | #endif /* HAL_I2S_MODULE_ENABLED */ |
| mbed_official | 489:119543c9f674 | 1429 | |
| mbed_official | 489:119543c9f674 | 1430 | |
| mbed_official | 489:119543c9f674 | 1431 | /** |
| mbed_official | 489:119543c9f674 | 1432 | * @} |
| mbed_official | 489:119543c9f674 | 1433 | */ |
| mbed_official | 489:119543c9f674 | 1434 | |
| mbed_official | 489:119543c9f674 | 1435 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |