stm32l4xx_hal_sram.h

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_sram.h
00004   * @author  MCD Application Team
00005   * @version V1.5.1
00006   * @date    31-May-2016
00007   * @brief   Header file of SRAM HAL module.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */ 
00037 
00038 /* Define to prevent recursive inclusion -------------------------------------*/
00039 #ifndef __STM32L4xx_HAL_SRAM_H
00040 #define __STM32L4xx_HAL_SRAM_H
00041 
00042 #ifdef __cplusplus
00043  extern "C" {
00044 #endif
00045 
00046 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
00047 
00048 /* Includes ------------------------------------------------------------------*/
00049 #include "stm32l4xx_ll_fmc.h"
00050 
00051 /** @addtogroup STM32L4xx_HAL_Driver
00052   * @{
00053   */
00054 
00055 /** @addtogroup SRAM
00056   * @{
00057   */ 
00058 
00059 /* Exported typedef ----------------------------------------------------------*/
00060 
00061 /** @defgroup SRAM_Exported_Types SRAM Exported Types
00062   * @{
00063   */
00064 /** 
00065   * @brief  HAL SRAM State structures definition  
00066   */ 
00067 typedef enum
00068 {
00069   HAL_SRAM_STATE_RESET     = 0x00,  /*!< SRAM not yet initialized or disabled           */
00070   HAL_SRAM_STATE_READY     = 0x01,  /*!< SRAM initialized and ready for use             */
00071   HAL_SRAM_STATE_BUSY      = 0x02,  /*!< SRAM internal process is ongoing               */
00072   HAL_SRAM_STATE_ERROR     = 0x03,  /*!< SRAM error state                               */
00073   HAL_SRAM_STATE_PROTECTED = 0x04   /*!< SRAM peripheral NORSRAM device write protected */
00074   
00075 }HAL_SRAM_StateTypeDef;
00076 
00077 /** 
00078   * @brief  SRAM handle Structure definition  
00079   */ 
00080 typedef struct
00081 {
00082   FMC_NORSRAM_TypeDef           *Instance;  /*!< Register base address                        */ 
00083   
00084   FMC_NORSRAM_EXTENDED_TypeDef  *Extended;  /*!< Extended mode register base address          */
00085   
00086   FMC_NORSRAM_InitTypeDef       Init;       /*!< SRAM device control configuration parameters */
00087 
00088   HAL_LockTypeDef               Lock;       /*!< SRAM locking object                          */ 
00089   
00090   __IO HAL_SRAM_StateTypeDef    State;      /*!< SRAM device access state                     */
00091   
00092   DMA_HandleTypeDef             *hdma;      /*!< Pointer DMA handler                          */
00093   
00094 }SRAM_HandleTypeDef; 
00095 
00096 /**
00097   * @}
00098   */
00099 
00100 /* Exported constants --------------------------------------------------------*/
00101 /* Exported macro ------------------------------------------------------------*/
00102 
00103 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
00104  * @{
00105  */
00106 
00107 /** @brief Reset SRAM handle state.
00108   * @param  __HANDLE__: SRAM handle
00109   * @retval None
00110   */
00111 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
00112 
00113 /**
00114   * @}
00115   */
00116 
00117 /* Exported functions --------------------------------------------------------*/
00118 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
00119   * @{
00120   */
00121 
00122 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
00123  * @{
00124  */
00125 
00126 /* Initialization/de-initialization functions  ********************************/
00127 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
00128 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
00129 void              HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
00130 void              HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
00131 
00132 void              HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
00133 void              HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
00134 
00135 /**
00136   * @}
00137   */
00138 
00139 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
00140  * @{
00141  */
00142 
00143 /* I/O operation functions  ***************************************************/
00144 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
00145 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
00146 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
00147 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
00148 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
00149 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
00150 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
00151 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
00152 
00153 /**
00154   * @}
00155   */
00156   
00157 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
00158  * @{
00159  */
00160 
00161 /* SRAM Control functions  ****************************************************/
00162 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
00163 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
00164 
00165 /**
00166   * @}
00167   */
00168 
00169 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
00170  * @{
00171  */
00172 
00173 /* SRAM Peripheral State functions ********************************************/
00174 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
00175 
00176 /**
00177   * @}
00178   */ 
00179 
00180 /**
00181   * @}
00182   */
00183   
00184 /**
00185   * @}
00186   */ 
00187 
00188 /**
00189   * @}
00190   */
00191 
00192 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
00193 
00194 #ifdef __cplusplus
00195 }
00196 #endif
00197 
00198 #endif /* __STM32L4xx_HAL_SRAM_H */
00199 
00200 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/