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HAL_L476/stm32l4xx_ll_rcc.c@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
Ready-to-copy

Who changed what in which revision?

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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_ll_rcc.c
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief RCC LL module driver.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37 #if defined(USE_FULL_LL_DRIVER)
elmot 1:d0dfbce63a89 38
elmot 1:d0dfbce63a89 39 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 40 #include "stm32l4xx_ll_rcc.h"
elmot 1:d0dfbce63a89 41 #ifdef USE_FULL_ASSERT
elmot 1:d0dfbce63a89 42 #include "stm32_assert.h"
elmot 1:d0dfbce63a89 43 #else
elmot 1:d0dfbce63a89 44 #define assert_param(expr) ((void)0U)
elmot 1:d0dfbce63a89 45 #endif
elmot 1:d0dfbce63a89 46 /** @addtogroup STM32L4xx_LL_Driver
elmot 1:d0dfbce63a89 47 * @{
elmot 1:d0dfbce63a89 48 */
elmot 1:d0dfbce63a89 49
elmot 1:d0dfbce63a89 50 #if defined(RCC)
elmot 1:d0dfbce63a89 51
elmot 1:d0dfbce63a89 52 /** @addtogroup RCC_LL
elmot 1:d0dfbce63a89 53 * @{
elmot 1:d0dfbce63a89 54 */
elmot 1:d0dfbce63a89 55
elmot 1:d0dfbce63a89 56 /* Private types -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 57 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 58 /* Private constants ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 59 /* Private macros ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 60 /** @addtogroup RCC_LL_Private_Macros
elmot 1:d0dfbce63a89 61 * @{
elmot 1:d0dfbce63a89 62 */
elmot 1:d0dfbce63a89 63 #if defined(RCC_CCIPR_USART3SEL)
elmot 1:d0dfbce63a89 64 #define IS_LL_RCC_USART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
elmot 1:d0dfbce63a89 65 || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE) \
elmot 1:d0dfbce63a89 66 || ((__VALUE__) == LL_RCC_USART3_CLKSOURCE))
elmot 1:d0dfbce63a89 67 #else
elmot 1:d0dfbce63a89 68 #define IS_LL_RCC_USART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
elmot 1:d0dfbce63a89 69 || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE))
elmot 1:d0dfbce63a89 70
elmot 1:d0dfbce63a89 71 #endif /* RCC_CCIPR_USART3SEL */
elmot 1:d0dfbce63a89 72 #if defined(RCC_CCIPR_UART4SEL) && defined(RCC_CCIPR_UART5SEL)
elmot 1:d0dfbce63a89 73 #define IS_LL_RCC_UART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_UART4_CLKSOURCE) \
elmot 1:d0dfbce63a89 74 || ((__VALUE__) == LL_RCC_UART5_CLKSOURCE))
elmot 1:d0dfbce63a89 75 #elif defined(RCC_CCIPR_UART4SEL)
elmot 1:d0dfbce63a89 76 #define IS_LL_RCC_UART_INSTANCE(__VALUE__) ((__VALUE__) == LL_RCC_UART4_CLKSOURCE)
elmot 1:d0dfbce63a89 77 #elif defined(RCC_CCIPR_UART5SEL)
elmot 1:d0dfbce63a89 78 #define IS_LL_RCC_UART_INSTANCE(__VALUE__) ((__VALUE__) == LL_RCC_UART5_CLKSOURCE)
elmot 1:d0dfbce63a89 79 #endif /* RCC_CCIPR_UART4SEL && RCC_CCIPR_UART5SEL*/
elmot 1:d0dfbce63a89 80
elmot 1:d0dfbce63a89 81 #define IS_LL_RCC_LPUART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_LPUART1_CLKSOURCE))
elmot 1:d0dfbce63a89 82
elmot 1:d0dfbce63a89 83 #if defined(RCC_CCIPR_I2C2SEL)&&defined(RCC_CCIPR_I2C3SEL)
elmot 1:d0dfbce63a89 84 #define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2C1_CLKSOURCE) \
elmot 1:d0dfbce63a89 85 || ((__VALUE__) == LL_RCC_I2C2_CLKSOURCE) \
elmot 1:d0dfbce63a89 86 || ((__VALUE__) == LL_RCC_I2C3_CLKSOURCE))
elmot 1:d0dfbce63a89 87
elmot 1:d0dfbce63a89 88 #elif !defined(RCC_CCIPR_I2C2SEL)&&defined(RCC_CCIPR_I2C3SEL)
elmot 1:d0dfbce63a89 89 #define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2C1_CLKSOURCE) \
elmot 1:d0dfbce63a89 90 || ((__VALUE__) == LL_RCC_I2C3_CLKSOURCE))
elmot 1:d0dfbce63a89 91
elmot 1:d0dfbce63a89 92 #else
elmot 1:d0dfbce63a89 93 #define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_I2C1_CLKSOURCE)
elmot 1:d0dfbce63a89 94
elmot 1:d0dfbce63a89 95 #endif /* RCC_CCIPR_I2C2SEL && RCC_CCIPR_I2C3SEL */
elmot 1:d0dfbce63a89 96 #define IS_LL_RCC_LPTIM_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_LPTIM1_CLKSOURCE) \
elmot 1:d0dfbce63a89 97 || ((__VALUE__) == LL_RCC_LPTIM2_CLKSOURCE))
elmot 1:d0dfbce63a89 98
elmot 1:d0dfbce63a89 99 #if defined(RCC_CCIPR_SAI2SEL)
elmot 1:d0dfbce63a89 100 #define IS_LL_RCC_SAI_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_SAI1_CLKSOURCE) \
elmot 1:d0dfbce63a89 101 || ((__VALUE__) == LL_RCC_SAI2_CLKSOURCE))
elmot 1:d0dfbce63a89 102 #else
elmot 1:d0dfbce63a89 103 #define IS_LL_RCC_SAI_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_SAI1_CLKSOURCE)
elmot 1:d0dfbce63a89 104 #endif /* RCC_CCIPR_SAI2SEL */
elmot 1:d0dfbce63a89 105
elmot 1:d0dfbce63a89 106 #define IS_LL_RCC_SDMMC_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_SDMMC1_CLKSOURCE))
elmot 1:d0dfbce63a89 107
elmot 1:d0dfbce63a89 108 #define IS_LL_RCC_RNG_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_RNG_CLKSOURCE))
elmot 1:d0dfbce63a89 109
elmot 1:d0dfbce63a89 110 #if defined(USB_OTG_FS) || defined(USB)
elmot 1:d0dfbce63a89 111 #define IS_LL_RCC_USB_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USB_CLKSOURCE))
elmot 1:d0dfbce63a89 112 #endif /* USB_OTG_FS || USB */
elmot 1:d0dfbce63a89 113
elmot 1:d0dfbce63a89 114 #define IS_LL_RCC_ADC_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_ADC_CLKSOURCE))
elmot 1:d0dfbce63a89 115
elmot 1:d0dfbce63a89 116 #define IS_LL_RCC_SWPMI_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_SWPMI1_CLKSOURCE))
elmot 1:d0dfbce63a89 117
elmot 1:d0dfbce63a89 118 #define IS_LL_RCC_DFSDM_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_DFSDM1_CLKSOURCE))
elmot 1:d0dfbce63a89 119
elmot 1:d0dfbce63a89 120 /**
elmot 1:d0dfbce63a89 121 * @}
elmot 1:d0dfbce63a89 122 */
elmot 1:d0dfbce63a89 123
elmot 1:d0dfbce63a89 124 /* Private function prototypes -----------------------------------------------*/
elmot 1:d0dfbce63a89 125 /** @defgroup RCC_LL_Private_Functions RCC Private functions
elmot 1:d0dfbce63a89 126 * @{
elmot 1:d0dfbce63a89 127 */
elmot 1:d0dfbce63a89 128 uint32_t RCC_GetSystemClockFreq(void);
elmot 1:d0dfbce63a89 129 uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
elmot 1:d0dfbce63a89 130 uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
elmot 1:d0dfbce63a89 131 uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency);
elmot 1:d0dfbce63a89 132 uint32_t RCC_PLL_GetFreqDomain_SYS(void);
elmot 1:d0dfbce63a89 133 uint32_t RCC_PLL_GetFreqDomain_SAI(void);
elmot 1:d0dfbce63a89 134 uint32_t RCC_PLL_GetFreqDomain_48M(void);
elmot 1:d0dfbce63a89 135 uint32_t RCC_PLLSAI1_GetFreqDomain_SAI(void);
elmot 1:d0dfbce63a89 136 uint32_t RCC_PLLSAI1_GetFreqDomain_48M(void);
elmot 1:d0dfbce63a89 137 uint32_t RCC_PLLSAI1_GetFreqDomain_ADC(void);
elmot 1:d0dfbce63a89 138 #if defined(RCC_PLLSAI2_SUPPORT)
elmot 1:d0dfbce63a89 139 uint32_t RCC_PLLSAI2_GetFreqDomain_SAI(void);
elmot 1:d0dfbce63a89 140 uint32_t RCC_PLLSAI2_GetFreqDomain_ADC(void);
elmot 1:d0dfbce63a89 141 #endif /*RCC_PLLSAI2_SUPPORT*/
elmot 1:d0dfbce63a89 142 /**
elmot 1:d0dfbce63a89 143 * @}
elmot 1:d0dfbce63a89 144 */
elmot 1:d0dfbce63a89 145
elmot 1:d0dfbce63a89 146
elmot 1:d0dfbce63a89 147 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 148 /** @addtogroup RCC_LL_Exported_Functions
elmot 1:d0dfbce63a89 149 * @{
elmot 1:d0dfbce63a89 150 */
elmot 1:d0dfbce63a89 151
elmot 1:d0dfbce63a89 152 /** @addtogroup RCC_LL_EF_Init
elmot 1:d0dfbce63a89 153 * @{
elmot 1:d0dfbce63a89 154 */
elmot 1:d0dfbce63a89 155
elmot 1:d0dfbce63a89 156 /**
elmot 1:d0dfbce63a89 157 * @brief Reset the RCC clock configuration to the default reset state.
elmot 1:d0dfbce63a89 158 * @note The default reset state of the clock configuration is given below:
elmot 1:d0dfbce63a89 159 * - MSI ON and used as system clock source
elmot 1:d0dfbce63a89 160 * - HSE, HSI, PLL and PLLSAIxSource OFF
elmot 1:d0dfbce63a89 161 * - AHB, APB1 and APB2 prescaler set to 1.
elmot 1:d0dfbce63a89 162 * - CSS, MCO OFF
elmot 1:d0dfbce63a89 163 * - All interrupts disabled
elmot 1:d0dfbce63a89 164 * @note This function doesn't modify the configuration of the
elmot 1:d0dfbce63a89 165 * - Peripheral clocks
elmot 1:d0dfbce63a89 166 * - LSI, LSE and RTC clocks
elmot 1:d0dfbce63a89 167 * @retval An ErrorStatus enumeration value:
elmot 1:d0dfbce63a89 168 * - SUCCESS: RCC registers are de-initialized
elmot 1:d0dfbce63a89 169 * - ERROR: not applicable
elmot 1:d0dfbce63a89 170 */
elmot 1:d0dfbce63a89 171 ErrorStatus LL_RCC_DeInit(void)
elmot 1:d0dfbce63a89 172 {
elmot 1:d0dfbce63a89 173 uint32_t vl_mask = 0;
elmot 1:d0dfbce63a89 174
elmot 1:d0dfbce63a89 175 /* Set MSION bit */
elmot 1:d0dfbce63a89 176 LL_RCC_MSI_Enable();
elmot 1:d0dfbce63a89 177
elmot 1:d0dfbce63a89 178 /* Insure MSIRDY bit is set before writing default MSIRANGE value */
elmot 1:d0dfbce63a89 179 while (LL_RCC_MSI_IsReady() == 0)
elmot 1:d0dfbce63a89 180 {
elmot 1:d0dfbce63a89 181 __NOP();
elmot 1:d0dfbce63a89 182 }
elmot 1:d0dfbce63a89 183
elmot 1:d0dfbce63a89 184 /* Set MSIRANGE default value */
elmot 1:d0dfbce63a89 185 LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
elmot 1:d0dfbce63a89 186 /* Set MSITRIM bits to the reset value*/
elmot 1:d0dfbce63a89 187 LL_RCC_MSI_SetCalibTrimming(0);
elmot 1:d0dfbce63a89 188
elmot 1:d0dfbce63a89 189 /* Set HSITRIM bits to the reset value*/
elmot 1:d0dfbce63a89 190 LL_RCC_HSI_SetCalibTrimming(0x10);
elmot 1:d0dfbce63a89 191
elmot 1:d0dfbce63a89 192 /* Reset CFGR register */
elmot 1:d0dfbce63a89 193 LL_RCC_WriteReg(CFGR, 0x00000000);
elmot 1:d0dfbce63a89 194
elmot 1:d0dfbce63a89 195 vl_mask = 0xFFFFFFFFU;
elmot 1:d0dfbce63a89 196
elmot 1:d0dfbce63a89 197 /* Reset HSION, HSIKERON, HSIASFS, HSEON, PLLSYSON bits */
elmot 1:d0dfbce63a89 198 CLEAR_BIT(vl_mask, (RCC_CR_HSION | RCC_CR_HSIASFS | RCC_CR_HSIKERON | RCC_CR_HSEON |
elmot 1:d0dfbce63a89 199 RCC_CR_PLLON));
elmot 1:d0dfbce63a89 200
elmot 1:d0dfbce63a89 201 /* Reset PLLSAI1ON bit */
elmot 1:d0dfbce63a89 202 CLEAR_BIT(vl_mask, RCC_CR_PLLSAI1ON);
elmot 1:d0dfbce63a89 203
elmot 1:d0dfbce63a89 204 #if defined(RCC_PLLSAI2_SUPPORT)
elmot 1:d0dfbce63a89 205 /* Reset PLLSAI2ON bit */
elmot 1:d0dfbce63a89 206 CLEAR_BIT(vl_mask, RCC_CR_PLLSAI2ON);
elmot 1:d0dfbce63a89 207 #endif /*RCC_PLLSAI2_SUPPORT*/
elmot 1:d0dfbce63a89 208
elmot 1:d0dfbce63a89 209 /* Write new mask in CR register */
elmot 1:d0dfbce63a89 210 LL_RCC_WriteReg(CR, vl_mask);
elmot 1:d0dfbce63a89 211
elmot 1:d0dfbce63a89 212 /* Reset PLLCFGR register */
elmot 1:d0dfbce63a89 213 LL_RCC_WriteReg(PLLCFGR, 16 << RCC_POSITION_PLLN);
elmot 1:d0dfbce63a89 214
elmot 1:d0dfbce63a89 215 /* Reset PLLSAI1CFGR register */
elmot 1:d0dfbce63a89 216 LL_RCC_WriteReg(PLLSAI1CFGR, 16 << RCC_POSITION_PLLSAI1N);
elmot 1:d0dfbce63a89 217
elmot 1:d0dfbce63a89 218 #if defined(RCC_PLLSAI2_SUPPORT)
elmot 1:d0dfbce63a89 219 /* Reset PLLSAI2CFGR register */
elmot 1:d0dfbce63a89 220 LL_RCC_WriteReg(PLLSAI2CFGR, 16 << RCC_POSITION_PLLSAI2N);
elmot 1:d0dfbce63a89 221 #endif /*RCC_PLLSAI2_SUPPORT*/
elmot 1:d0dfbce63a89 222
elmot 1:d0dfbce63a89 223 /* Reset HSEBYP bit */
elmot 1:d0dfbce63a89 224 LL_RCC_HSE_DisableBypass();
elmot 1:d0dfbce63a89 225
elmot 1:d0dfbce63a89 226 /* Disable all interrupts */
elmot 1:d0dfbce63a89 227 LL_RCC_WriteReg(CIER, 0x00000000);
elmot 1:d0dfbce63a89 228
elmot 1:d0dfbce63a89 229 return SUCCESS;
elmot 1:d0dfbce63a89 230 }
elmot 1:d0dfbce63a89 231
elmot 1:d0dfbce63a89 232 /**
elmot 1:d0dfbce63a89 233 * @}
elmot 1:d0dfbce63a89 234 */
elmot 1:d0dfbce63a89 235
elmot 1:d0dfbce63a89 236 /** @addtogroup RCC_LL_EF_Get_Freq
elmot 1:d0dfbce63a89 237 * @brief Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks
elmot 1:d0dfbce63a89 238 * and different peripheral clocks available on the device.
elmot 1:d0dfbce63a89 239 * @note If SYSCLK source is MSI, function returns values based on MSI_VALUE(*)
elmot 1:d0dfbce63a89 240 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
elmot 1:d0dfbce63a89 241 * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
elmot 1:d0dfbce63a89 242 * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(***)
elmot 1:d0dfbce63a89 243 * or HSI_VALUE(**) or MSI_VALUE(*) multiplied/divided by the PLL factors.
elmot 1:d0dfbce63a89 244 * @note (*) MSI_VALUE is a constant defined in this file (default value
elmot 1:d0dfbce63a89 245 * 4 MHz) but the real value may vary depending on the variations
elmot 1:d0dfbce63a89 246 * in voltage and temperature.
elmot 1:d0dfbce63a89 247 * @note (**) HSI_VALUE is a constant defined in this file (default value
elmot 1:d0dfbce63a89 248 * 16 MHz) but the real value may vary depending on the variations
elmot 1:d0dfbce63a89 249 * in voltage and temperature.
elmot 1:d0dfbce63a89 250 * @note (***) HSE_VALUE is a constant defined in this file (default value
elmot 1:d0dfbce63a89 251 * 8 MHz), user has to ensure that HSE_VALUE is same as the real
elmot 1:d0dfbce63a89 252 * frequency of the crystal used. Otherwise, this function may
elmot 1:d0dfbce63a89 253 * have wrong result.
elmot 1:d0dfbce63a89 254 * @note The result of this function could be incorrect when using fractional
elmot 1:d0dfbce63a89 255 * value for HSE crystal.
elmot 1:d0dfbce63a89 256 * @note This function can be used by the user application to compute the
elmot 1:d0dfbce63a89 257 * baud-rate for the communication peripherals or configure other parameters.
elmot 1:d0dfbce63a89 258 * @{
elmot 1:d0dfbce63a89 259 */
elmot 1:d0dfbce63a89 260
elmot 1:d0dfbce63a89 261 /**
elmot 1:d0dfbce63a89 262 * @brief Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks
elmot 1:d0dfbce63a89 263 * @note Each time SYSCLK, HCLK, PCLK1 and/or PCLK2 clock changes, this function
elmot 1:d0dfbce63a89 264 * must be called to update structure fields. Otherwise, any
elmot 1:d0dfbce63a89 265 * configuration based on this function will be incorrect.
elmot 1:d0dfbce63a89 266 * @param RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies
elmot 1:d0dfbce63a89 267 * @retval None
elmot 1:d0dfbce63a89 268 */
elmot 1:d0dfbce63a89 269 void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
elmot 1:d0dfbce63a89 270 {
elmot 1:d0dfbce63a89 271 /* Get SYSCLK frequency */
elmot 1:d0dfbce63a89 272 RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 273
elmot 1:d0dfbce63a89 274 /* HCLK clock frequency */
elmot 1:d0dfbce63a89 275 RCC_Clocks->HCLK_Frequency = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
elmot 1:d0dfbce63a89 276
elmot 1:d0dfbce63a89 277 /* PCLK1 clock frequency */
elmot 1:d0dfbce63a89 278 RCC_Clocks->PCLK1_Frequency = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
elmot 1:d0dfbce63a89 279
elmot 1:d0dfbce63a89 280 /* PCLK2 clock frequency */
elmot 1:d0dfbce63a89 281 RCC_Clocks->PCLK2_Frequency = RCC_GetPCLK2ClockFreq(RCC_Clocks->HCLK_Frequency);
elmot 1:d0dfbce63a89 282 }
elmot 1:d0dfbce63a89 283
elmot 1:d0dfbce63a89 284 /**
elmot 1:d0dfbce63a89 285 * @brief Return USARTx clock frequency
elmot 1:d0dfbce63a89 286 * @param USARTxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 287 * @arg @ref LL_RCC_USART1_CLKSOURCE
elmot 1:d0dfbce63a89 288 * @arg @ref LL_RCC_USART2_CLKSOURCE
elmot 1:d0dfbce63a89 289 * @arg @ref LL_RCC_USART3_CLKSOURCE (*)
elmot 1:d0dfbce63a89 290 *
elmot 1:d0dfbce63a89 291 * (*) value not defined in all devices.
elmot 1:d0dfbce63a89 292 * @retval USART clock frequency (in Hz)
elmot 1:d0dfbce63a89 293 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
elmot 1:d0dfbce63a89 294 */
elmot 1:d0dfbce63a89 295 uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource)
elmot 1:d0dfbce63a89 296 {
elmot 1:d0dfbce63a89 297 uint32_t usart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 298
elmot 1:d0dfbce63a89 299 /* Check parameter */
elmot 1:d0dfbce63a89 300 assert_param(IS_LL_RCC_USART_CLKSOURCE(USARTxSource));
elmot 1:d0dfbce63a89 301
elmot 1:d0dfbce63a89 302 if (USARTxSource == LL_RCC_USART1_CLKSOURCE)
elmot 1:d0dfbce63a89 303 {
elmot 1:d0dfbce63a89 304 /* USART1CLK clock frequency */
elmot 1:d0dfbce63a89 305 switch (LL_RCC_GetUSARTClockSource(USARTxSource))
elmot 1:d0dfbce63a89 306 {
elmot 1:d0dfbce63a89 307 case LL_RCC_USART1_CLKSOURCE_SYSCLK: /* USART1 Clock is System Clock */
elmot 1:d0dfbce63a89 308 usart_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 309 break;
elmot 1:d0dfbce63a89 310
elmot 1:d0dfbce63a89 311 case LL_RCC_USART1_CLKSOURCE_HSI: /* USART1 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 312 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 313 {
elmot 1:d0dfbce63a89 314 usart_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 315 }
elmot 1:d0dfbce63a89 316 break;
elmot 1:d0dfbce63a89 317
elmot 1:d0dfbce63a89 318 case LL_RCC_USART1_CLKSOURCE_LSE: /* USART1 Clock is LSE Osc. */
elmot 1:d0dfbce63a89 319 if (LL_RCC_LSE_IsReady())
elmot 1:d0dfbce63a89 320 {
elmot 1:d0dfbce63a89 321 usart_frequency = LSE_VALUE;
elmot 1:d0dfbce63a89 322 }
elmot 1:d0dfbce63a89 323 break;
elmot 1:d0dfbce63a89 324
elmot 1:d0dfbce63a89 325 case LL_RCC_USART1_CLKSOURCE_PCLK2: /* USART1 Clock is PCLK2 */
elmot 1:d0dfbce63a89 326 default:
elmot 1:d0dfbce63a89 327 usart_frequency = RCC_GetPCLK2ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 328 break;
elmot 1:d0dfbce63a89 329 }
elmot 1:d0dfbce63a89 330 }
elmot 1:d0dfbce63a89 331 else if (USARTxSource == LL_RCC_USART2_CLKSOURCE)
elmot 1:d0dfbce63a89 332 {
elmot 1:d0dfbce63a89 333 /* USART2CLK clock frequency */
elmot 1:d0dfbce63a89 334 switch (LL_RCC_GetUSARTClockSource(USARTxSource))
elmot 1:d0dfbce63a89 335 {
elmot 1:d0dfbce63a89 336 case LL_RCC_USART2_CLKSOURCE_SYSCLK: /* USART2 Clock is System Clock */
elmot 1:d0dfbce63a89 337 usart_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 338 break;
elmot 1:d0dfbce63a89 339
elmot 1:d0dfbce63a89 340 case LL_RCC_USART2_CLKSOURCE_HSI: /* USART2 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 341 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 342 {
elmot 1:d0dfbce63a89 343 usart_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 344 }
elmot 1:d0dfbce63a89 345 break;
elmot 1:d0dfbce63a89 346
elmot 1:d0dfbce63a89 347 case LL_RCC_USART2_CLKSOURCE_LSE: /* USART2 Clock is LSE Osc. */
elmot 1:d0dfbce63a89 348 if (LL_RCC_LSE_IsReady())
elmot 1:d0dfbce63a89 349 {
elmot 1:d0dfbce63a89 350 usart_frequency = LSE_VALUE;
elmot 1:d0dfbce63a89 351 }
elmot 1:d0dfbce63a89 352 break;
elmot 1:d0dfbce63a89 353
elmot 1:d0dfbce63a89 354 case LL_RCC_USART2_CLKSOURCE_PCLK1: /* USART2 Clock is PCLK1 */
elmot 1:d0dfbce63a89 355 default:
elmot 1:d0dfbce63a89 356 usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 357 break;
elmot 1:d0dfbce63a89 358 }
elmot 1:d0dfbce63a89 359 }
elmot 1:d0dfbce63a89 360 else
elmot 1:d0dfbce63a89 361 {
elmot 1:d0dfbce63a89 362 #if defined(RCC_CCIPR_USART3SEL)
elmot 1:d0dfbce63a89 363 if (USARTxSource == LL_RCC_USART3_CLKSOURCE)
elmot 1:d0dfbce63a89 364 {
elmot 1:d0dfbce63a89 365 /* USART3CLK clock frequency */
elmot 1:d0dfbce63a89 366 switch (LL_RCC_GetUSARTClockSource(USARTxSource))
elmot 1:d0dfbce63a89 367 {
elmot 1:d0dfbce63a89 368 case LL_RCC_USART3_CLKSOURCE_SYSCLK: /* USART3 Clock is System Clock */
elmot 1:d0dfbce63a89 369 usart_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 370 break;
elmot 1:d0dfbce63a89 371
elmot 1:d0dfbce63a89 372 case LL_RCC_USART3_CLKSOURCE_HSI: /* USART3 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 373 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 374 {
elmot 1:d0dfbce63a89 375 usart_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 376 }
elmot 1:d0dfbce63a89 377 break;
elmot 1:d0dfbce63a89 378
elmot 1:d0dfbce63a89 379 case LL_RCC_USART3_CLKSOURCE_LSE: /* USART3 Clock is LSE Osc. */
elmot 1:d0dfbce63a89 380 if (LL_RCC_LSE_IsReady())
elmot 1:d0dfbce63a89 381 {
elmot 1:d0dfbce63a89 382 usart_frequency = LSE_VALUE;
elmot 1:d0dfbce63a89 383 }
elmot 1:d0dfbce63a89 384 break;
elmot 1:d0dfbce63a89 385
elmot 1:d0dfbce63a89 386 case LL_RCC_USART3_CLKSOURCE_PCLK1: /* USART3 Clock is PCLK1 */
elmot 1:d0dfbce63a89 387 default:
elmot 1:d0dfbce63a89 388 usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 389 break;
elmot 1:d0dfbce63a89 390 }
elmot 1:d0dfbce63a89 391 }
elmot 1:d0dfbce63a89 392 #endif /* RCC_CCIPR_USART3SEL */
elmot 1:d0dfbce63a89 393 }
elmot 1:d0dfbce63a89 394 return usart_frequency;
elmot 1:d0dfbce63a89 395 }
elmot 1:d0dfbce63a89 396
elmot 1:d0dfbce63a89 397 #if defined(RCC_CCIPR_UART4SEL) || defined(RCC_CCIPR_UART5SEL)
elmot 1:d0dfbce63a89 398 /**
elmot 1:d0dfbce63a89 399 * @brief Return UARTx clock frequency
elmot 1:d0dfbce63a89 400 * @param UARTxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 401 * @arg @ref LL_RCC_UART4_CLKSOURCE
elmot 1:d0dfbce63a89 402 * @arg @ref LL_RCC_UART5_CLKSOURCE
elmot 1:d0dfbce63a89 403 * @retval UART clock frequency (in Hz)
elmot 1:d0dfbce63a89 404 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
elmot 1:d0dfbce63a89 405 */
elmot 1:d0dfbce63a89 406 uint32_t LL_RCC_GetUARTClockFreq(uint32_t UARTxSource)
elmot 1:d0dfbce63a89 407 {
elmot 1:d0dfbce63a89 408 uint32_t uart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 409
elmot 1:d0dfbce63a89 410 /* Check parameter */
elmot 1:d0dfbce63a89 411 assert_param(IS_LL_RCC_UART_CLKSOURCE(UARTxSource));
elmot 1:d0dfbce63a89 412
elmot 1:d0dfbce63a89 413 #if defined(RCC_CCIPR_UART4SEL)
elmot 1:d0dfbce63a89 414 if (UARTxSource == LL_RCC_UART4_CLKSOURCE)
elmot 1:d0dfbce63a89 415 {
elmot 1:d0dfbce63a89 416 /* UART4CLK clock frequency */
elmot 1:d0dfbce63a89 417 switch (LL_RCC_GetUARTClockSource(UARTxSource))
elmot 1:d0dfbce63a89 418 {
elmot 1:d0dfbce63a89 419 case LL_RCC_UART4_CLKSOURCE_SYSCLK: /* UART4 Clock is System Clock */
elmot 1:d0dfbce63a89 420 uart_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 421 break;
elmot 1:d0dfbce63a89 422
elmot 1:d0dfbce63a89 423 case LL_RCC_UART4_CLKSOURCE_HSI: /* UART4 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 424 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 425 {
elmot 1:d0dfbce63a89 426 uart_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 427 }
elmot 1:d0dfbce63a89 428 break;
elmot 1:d0dfbce63a89 429
elmot 1:d0dfbce63a89 430 case LL_RCC_UART4_CLKSOURCE_LSE: /* UART4 Clock is LSE Osc. */
elmot 1:d0dfbce63a89 431 if (LL_RCC_LSE_IsReady())
elmot 1:d0dfbce63a89 432 {
elmot 1:d0dfbce63a89 433 uart_frequency = LSE_VALUE;
elmot 1:d0dfbce63a89 434 }
elmot 1:d0dfbce63a89 435 break;
elmot 1:d0dfbce63a89 436
elmot 1:d0dfbce63a89 437 case LL_RCC_UART4_CLKSOURCE_PCLK1: /* UART4 Clock is PCLK1 */
elmot 1:d0dfbce63a89 438 default:
elmot 1:d0dfbce63a89 439 uart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 440 break;
elmot 1:d0dfbce63a89 441 }
elmot 1:d0dfbce63a89 442 }
elmot 1:d0dfbce63a89 443 #endif /* RCC_CCIPR_UART4SEL */
elmot 1:d0dfbce63a89 444
elmot 1:d0dfbce63a89 445 #if defined(RCC_CCIPR_UART5SEL)
elmot 1:d0dfbce63a89 446 if (UARTxSource == LL_RCC_UART5_CLKSOURCE)
elmot 1:d0dfbce63a89 447 {
elmot 1:d0dfbce63a89 448 /* UART5CLK clock frequency */
elmot 1:d0dfbce63a89 449 switch (LL_RCC_GetUARTClockSource(UARTxSource))
elmot 1:d0dfbce63a89 450 {
elmot 1:d0dfbce63a89 451 case LL_RCC_UART5_CLKSOURCE_SYSCLK: /* UART5 Clock is System Clock */
elmot 1:d0dfbce63a89 452 uart_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 453 break;
elmot 1:d0dfbce63a89 454
elmot 1:d0dfbce63a89 455 case LL_RCC_UART5_CLKSOURCE_HSI: /* UART5 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 456 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 457 {
elmot 1:d0dfbce63a89 458 uart_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 459 }
elmot 1:d0dfbce63a89 460 break;
elmot 1:d0dfbce63a89 461
elmot 1:d0dfbce63a89 462 case LL_RCC_UART5_CLKSOURCE_LSE: /* UART5 Clock is LSE Osc. */
elmot 1:d0dfbce63a89 463 if (LL_RCC_LSE_IsReady())
elmot 1:d0dfbce63a89 464 {
elmot 1:d0dfbce63a89 465 uart_frequency = LSE_VALUE;
elmot 1:d0dfbce63a89 466 }
elmot 1:d0dfbce63a89 467 break;
elmot 1:d0dfbce63a89 468
elmot 1:d0dfbce63a89 469 case LL_RCC_UART5_CLKSOURCE_PCLK1: /* UART5 Clock is PCLK1 */
elmot 1:d0dfbce63a89 470 default:
elmot 1:d0dfbce63a89 471 uart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 472 break;
elmot 1:d0dfbce63a89 473 }
elmot 1:d0dfbce63a89 474 }
elmot 1:d0dfbce63a89 475 #endif /* RCC_CCIPR_UART5SEL */
elmot 1:d0dfbce63a89 476
elmot 1:d0dfbce63a89 477 return uart_frequency;
elmot 1:d0dfbce63a89 478 }
elmot 1:d0dfbce63a89 479 #endif /* RCC_CCIPR_UART4SEL || RCC_CCIPR_UART5SEL */
elmot 1:d0dfbce63a89 480
elmot 1:d0dfbce63a89 481 /**
elmot 1:d0dfbce63a89 482 * @brief Return I2Cx clock frequency
elmot 1:d0dfbce63a89 483 * @param I2CxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 484 * @arg @ref LL_RCC_I2C1_CLKSOURCE
elmot 1:d0dfbce63a89 485 * @arg @ref LL_RCC_I2C2_CLKSOURCE (*)
elmot 1:d0dfbce63a89 486 *
elmot 1:d0dfbce63a89 487 * (*) value not defined in all devices.
elmot 1:d0dfbce63a89 488 * @arg @ref LL_RCC_I2C3_CLKSOURCE
elmot 1:d0dfbce63a89 489 * @retval I2C clock frequency (in Hz)
elmot 1:d0dfbce63a89 490 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that HSI oscillator is not ready
elmot 1:d0dfbce63a89 491 */
elmot 1:d0dfbce63a89 492 uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource)
elmot 1:d0dfbce63a89 493 {
elmot 1:d0dfbce63a89 494 uint32_t i2c_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 495
elmot 1:d0dfbce63a89 496 /* Check parameter */
elmot 1:d0dfbce63a89 497 assert_param(IS_LL_RCC_I2C_CLKSOURCE(I2CxSource));
elmot 1:d0dfbce63a89 498
elmot 1:d0dfbce63a89 499 if (I2CxSource == LL_RCC_I2C1_CLKSOURCE)
elmot 1:d0dfbce63a89 500 {
elmot 1:d0dfbce63a89 501 /* I2C1 CLK clock frequency */
elmot 1:d0dfbce63a89 502 switch (LL_RCC_GetI2CClockSource(I2CxSource))
elmot 1:d0dfbce63a89 503 {
elmot 1:d0dfbce63a89 504 case LL_RCC_I2C1_CLKSOURCE_SYSCLK: /* I2C1 Clock is System Clock */
elmot 1:d0dfbce63a89 505 i2c_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 506 break;
elmot 1:d0dfbce63a89 507
elmot 1:d0dfbce63a89 508 case LL_RCC_I2C1_CLKSOURCE_HSI: /* I2C1 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 509 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 510 {
elmot 1:d0dfbce63a89 511 i2c_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 512 }
elmot 1:d0dfbce63a89 513 break;
elmot 1:d0dfbce63a89 514
elmot 1:d0dfbce63a89 515 case LL_RCC_I2C1_CLKSOURCE_PCLK1: /* I2C1 Clock is PCLK1 */
elmot 1:d0dfbce63a89 516 default:
elmot 1:d0dfbce63a89 517 i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 518 break;
elmot 1:d0dfbce63a89 519 }
elmot 1:d0dfbce63a89 520 }
elmot 1:d0dfbce63a89 521 #if defined(RCC_CCIPR_I2C2SEL)
elmot 1:d0dfbce63a89 522 else if (I2CxSource == LL_RCC_I2C2_CLKSOURCE)
elmot 1:d0dfbce63a89 523 {
elmot 1:d0dfbce63a89 524 /* I2C2 CLK clock frequency */
elmot 1:d0dfbce63a89 525 switch (LL_RCC_GetI2CClockSource(I2CxSource))
elmot 1:d0dfbce63a89 526 {
elmot 1:d0dfbce63a89 527 case LL_RCC_I2C2_CLKSOURCE_SYSCLK: /* I2C2 Clock is System Clock */
elmot 1:d0dfbce63a89 528 i2c_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 529 break;
elmot 1:d0dfbce63a89 530
elmot 1:d0dfbce63a89 531 case LL_RCC_I2C2_CLKSOURCE_HSI: /* I2C2 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 532 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 533 {
elmot 1:d0dfbce63a89 534 i2c_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 535 }
elmot 1:d0dfbce63a89 536 break;
elmot 1:d0dfbce63a89 537
elmot 1:d0dfbce63a89 538 case LL_RCC_I2C2_CLKSOURCE_PCLK1: /* I2C2 Clock is PCLK1 */
elmot 1:d0dfbce63a89 539 default:
elmot 1:d0dfbce63a89 540 i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 541 break;
elmot 1:d0dfbce63a89 542 }
elmot 1:d0dfbce63a89 543 }
elmot 1:d0dfbce63a89 544 #endif /*RCC_CCIPR_I2C2SEL*/
elmot 1:d0dfbce63a89 545 else
elmot 1:d0dfbce63a89 546 {
elmot 1:d0dfbce63a89 547 if (I2CxSource == LL_RCC_I2C3_CLKSOURCE)
elmot 1:d0dfbce63a89 548 {
elmot 1:d0dfbce63a89 549 /* I2C3 CLK clock frequency */
elmot 1:d0dfbce63a89 550 switch (LL_RCC_GetI2CClockSource(I2CxSource))
elmot 1:d0dfbce63a89 551 {
elmot 1:d0dfbce63a89 552 case LL_RCC_I2C3_CLKSOURCE_SYSCLK: /* I2C3 Clock is System Clock */
elmot 1:d0dfbce63a89 553 i2c_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 554 break;
elmot 1:d0dfbce63a89 555
elmot 1:d0dfbce63a89 556 case LL_RCC_I2C3_CLKSOURCE_HSI: /* I2C3 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 557 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 558 {
elmot 1:d0dfbce63a89 559 i2c_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 560 }
elmot 1:d0dfbce63a89 561 break;
elmot 1:d0dfbce63a89 562
elmot 1:d0dfbce63a89 563 case LL_RCC_I2C3_CLKSOURCE_PCLK1: /* I2C3 Clock is PCLK1 */
elmot 1:d0dfbce63a89 564 default:
elmot 1:d0dfbce63a89 565 i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 566 break;
elmot 1:d0dfbce63a89 567 }
elmot 1:d0dfbce63a89 568 }
elmot 1:d0dfbce63a89 569 }
elmot 1:d0dfbce63a89 570
elmot 1:d0dfbce63a89 571 return i2c_frequency;
elmot 1:d0dfbce63a89 572 }
elmot 1:d0dfbce63a89 573
elmot 1:d0dfbce63a89 574 /**
elmot 1:d0dfbce63a89 575 * @brief Return LPUARTx clock frequency
elmot 1:d0dfbce63a89 576 * @param LPUARTxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 577 * @arg @ref LL_RCC_LPUART1_CLKSOURCE
elmot 1:d0dfbce63a89 578 * @retval LPUART clock frequency (in Hz)
elmot 1:d0dfbce63a89 579 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
elmot 1:d0dfbce63a89 580 */
elmot 1:d0dfbce63a89 581 uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource)
elmot 1:d0dfbce63a89 582 {
elmot 1:d0dfbce63a89 583 uint32_t lpuart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 584
elmot 1:d0dfbce63a89 585 /* Check parameter */
elmot 1:d0dfbce63a89 586 assert_param(IS_LL_RCC_LPUART_CLKSOURCE(LPUARTxSource));
elmot 1:d0dfbce63a89 587
elmot 1:d0dfbce63a89 588 /* LPUART1CLK clock frequency */
elmot 1:d0dfbce63a89 589 switch (LL_RCC_GetLPUARTClockSource(LPUARTxSource))
elmot 1:d0dfbce63a89 590 {
elmot 1:d0dfbce63a89 591 case LL_RCC_LPUART1_CLKSOURCE_SYSCLK: /* LPUART1 Clock is System Clock */
elmot 1:d0dfbce63a89 592 lpuart_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 593 break;
elmot 1:d0dfbce63a89 594
elmot 1:d0dfbce63a89 595 case LL_RCC_LPUART1_CLKSOURCE_HSI: /* LPUART1 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 596 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 597 {
elmot 1:d0dfbce63a89 598 lpuart_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 599 }
elmot 1:d0dfbce63a89 600 break;
elmot 1:d0dfbce63a89 601
elmot 1:d0dfbce63a89 602 case LL_RCC_LPUART1_CLKSOURCE_LSE: /* LPUART1 Clock is LSE Osc. */
elmot 1:d0dfbce63a89 603 if (LL_RCC_LSE_IsReady())
elmot 1:d0dfbce63a89 604 {
elmot 1:d0dfbce63a89 605 lpuart_frequency = LSE_VALUE;
elmot 1:d0dfbce63a89 606 }
elmot 1:d0dfbce63a89 607 break;
elmot 1:d0dfbce63a89 608
elmot 1:d0dfbce63a89 609 case LL_RCC_LPUART1_CLKSOURCE_PCLK1: /* LPUART1 Clock is PCLK1 */
elmot 1:d0dfbce63a89 610 default:
elmot 1:d0dfbce63a89 611 lpuart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 612 break;
elmot 1:d0dfbce63a89 613 }
elmot 1:d0dfbce63a89 614
elmot 1:d0dfbce63a89 615 return lpuart_frequency;
elmot 1:d0dfbce63a89 616 }
elmot 1:d0dfbce63a89 617
elmot 1:d0dfbce63a89 618 /**
elmot 1:d0dfbce63a89 619 * @brief Return LPTIMx clock frequency
elmot 1:d0dfbce63a89 620 * @param LPTIMxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 621 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE
elmot 1:d0dfbce63a89 622 * @arg @ref LL_RCC_LPTIM2_CLKSOURCE
elmot 1:d0dfbce63a89 623 * @retval LPTIM clock frequency (in Hz)
elmot 1:d0dfbce63a89 624 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
elmot 1:d0dfbce63a89 625 */
elmot 1:d0dfbce63a89 626 uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource)
elmot 1:d0dfbce63a89 627 {
elmot 1:d0dfbce63a89 628 uint32_t lptim_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 629
elmot 1:d0dfbce63a89 630 /* Check parameter */
elmot 1:d0dfbce63a89 631 assert_param(IS_LL_RCC_LPTIM_CLKSOURCE(LPTIMxSource));
elmot 1:d0dfbce63a89 632
elmot 1:d0dfbce63a89 633 if (LPTIMxSource == LL_RCC_LPTIM1_CLKSOURCE)
elmot 1:d0dfbce63a89 634 {
elmot 1:d0dfbce63a89 635 /* LPTIM1CLK clock frequency */
elmot 1:d0dfbce63a89 636 switch (LL_RCC_GetLPTIMClockSource(LPTIMxSource))
elmot 1:d0dfbce63a89 637 {
elmot 1:d0dfbce63a89 638 case LL_RCC_LPTIM1_CLKSOURCE_LSI: /* LPTIM1 Clock is LSI Osc. */
elmot 1:d0dfbce63a89 639 if (LL_RCC_LSI_IsReady())
elmot 1:d0dfbce63a89 640 {
elmot 1:d0dfbce63a89 641 lptim_frequency = LSI_VALUE;
elmot 1:d0dfbce63a89 642 }
elmot 1:d0dfbce63a89 643 break;
elmot 1:d0dfbce63a89 644
elmot 1:d0dfbce63a89 645 case LL_RCC_LPTIM1_CLKSOURCE_HSI: /* LPTIM1 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 646 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 647 {
elmot 1:d0dfbce63a89 648 lptim_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 649 }
elmot 1:d0dfbce63a89 650 break;
elmot 1:d0dfbce63a89 651
elmot 1:d0dfbce63a89 652 case LL_RCC_LPTIM1_CLKSOURCE_LSE: /* LPTIM1 Clock is LSE Osc. */
elmot 1:d0dfbce63a89 653 if (LL_RCC_LSE_IsReady())
elmot 1:d0dfbce63a89 654 {
elmot 1:d0dfbce63a89 655 lptim_frequency = LSE_VALUE;
elmot 1:d0dfbce63a89 656 }
elmot 1:d0dfbce63a89 657 break;
elmot 1:d0dfbce63a89 658
elmot 1:d0dfbce63a89 659 case LL_RCC_LPTIM1_CLKSOURCE_PCLK1: /* LPTIM1 Clock is PCLK1 */
elmot 1:d0dfbce63a89 660 default:
elmot 1:d0dfbce63a89 661 lptim_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 662 break;
elmot 1:d0dfbce63a89 663 }
elmot 1:d0dfbce63a89 664 }
elmot 1:d0dfbce63a89 665 else
elmot 1:d0dfbce63a89 666 {
elmot 1:d0dfbce63a89 667 if (LPTIMxSource == LL_RCC_LPTIM2_CLKSOURCE)
elmot 1:d0dfbce63a89 668 {
elmot 1:d0dfbce63a89 669 /* LPTIM2CLK clock frequency */
elmot 1:d0dfbce63a89 670 switch (LL_RCC_GetLPTIMClockSource(LPTIMxSource))
elmot 1:d0dfbce63a89 671 {
elmot 1:d0dfbce63a89 672 case LL_RCC_LPTIM2_CLKSOURCE_LSI: /* LPTIM2 Clock is LSI Osc. */
elmot 1:d0dfbce63a89 673 if (LL_RCC_LSI_IsReady())
elmot 1:d0dfbce63a89 674 {
elmot 1:d0dfbce63a89 675 lptim_frequency = LSI_VALUE;
elmot 1:d0dfbce63a89 676 }
elmot 1:d0dfbce63a89 677 break;
elmot 1:d0dfbce63a89 678
elmot 1:d0dfbce63a89 679 case LL_RCC_LPTIM2_CLKSOURCE_HSI: /* LPTIM2 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 680 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 681 {
elmot 1:d0dfbce63a89 682 lptim_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 683 }
elmot 1:d0dfbce63a89 684 break;
elmot 1:d0dfbce63a89 685
elmot 1:d0dfbce63a89 686 case LL_RCC_LPTIM2_CLKSOURCE_LSE: /* LPTIM2 Clock is LSE Osc. */
elmot 1:d0dfbce63a89 687 if (LL_RCC_LSE_IsReady())
elmot 1:d0dfbce63a89 688 {
elmot 1:d0dfbce63a89 689 lptim_frequency = LSE_VALUE;
elmot 1:d0dfbce63a89 690 }
elmot 1:d0dfbce63a89 691 break;
elmot 1:d0dfbce63a89 692
elmot 1:d0dfbce63a89 693 case LL_RCC_LPTIM2_CLKSOURCE_PCLK1: /* LPTIM2 Clock is PCLK1 */
elmot 1:d0dfbce63a89 694 default:
elmot 1:d0dfbce63a89 695 lptim_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 696 break;
elmot 1:d0dfbce63a89 697 }
elmot 1:d0dfbce63a89 698 }
elmot 1:d0dfbce63a89 699 }
elmot 1:d0dfbce63a89 700
elmot 1:d0dfbce63a89 701 return lptim_frequency;
elmot 1:d0dfbce63a89 702 }
elmot 1:d0dfbce63a89 703
elmot 1:d0dfbce63a89 704 /**
elmot 1:d0dfbce63a89 705 * @brief Return SAIx clock frequency
elmot 1:d0dfbce63a89 706 * @param SAIxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 707 * @arg @ref LL_RCC_SAI1_CLKSOURCE
elmot 1:d0dfbce63a89 708 * @arg @ref LL_RCC_SAI2_CLKSOURCE (*)
elmot 1:d0dfbce63a89 709 *
elmot 1:d0dfbce63a89 710 * (*) value not defined in all devices.
elmot 1:d0dfbce63a89 711 * @retval SAI clock frequency (in Hz)
elmot 1:d0dfbce63a89 712 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that PLL is not ready
elmot 1:d0dfbce63a89 713 * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that external clock is used
elmot 1:d0dfbce63a89 714 */
elmot 1:d0dfbce63a89 715 uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource)
elmot 1:d0dfbce63a89 716 {
elmot 1:d0dfbce63a89 717 uint32_t sai_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 718
elmot 1:d0dfbce63a89 719 /* Check parameter */
elmot 1:d0dfbce63a89 720 assert_param(IS_LL_RCC_SAI_CLKSOURCE(SAIxSource));
elmot 1:d0dfbce63a89 721
elmot 1:d0dfbce63a89 722 if (SAIxSource == LL_RCC_SAI1_CLKSOURCE)
elmot 1:d0dfbce63a89 723 {
elmot 1:d0dfbce63a89 724 /* SAI1CLK clock frequency */
elmot 1:d0dfbce63a89 725 switch (LL_RCC_GetSAIClockSource(SAIxSource))
elmot 1:d0dfbce63a89 726 {
elmot 1:d0dfbce63a89 727 case LL_RCC_SAI1_CLKSOURCE_PLLSAI1: /* PLLSAI1 clock used as SAI1 clock source */
elmot 1:d0dfbce63a89 728 if (LL_RCC_PLLSAI1_IsReady())
elmot 1:d0dfbce63a89 729 {
elmot 1:d0dfbce63a89 730 sai_frequency = RCC_PLLSAI1_GetFreqDomain_SAI();
elmot 1:d0dfbce63a89 731 }
elmot 1:d0dfbce63a89 732 break;
elmot 1:d0dfbce63a89 733
elmot 1:d0dfbce63a89 734 #if defined(RCC_PLLSAI2_SUPPORT)
elmot 1:d0dfbce63a89 735 case LL_RCC_SAI1_CLKSOURCE_PLLSAI2: /* PLLSAI2 clock used as SAI1 clock source */
elmot 1:d0dfbce63a89 736 if (LL_RCC_PLLSAI2_IsReady())
elmot 1:d0dfbce63a89 737 {
elmot 1:d0dfbce63a89 738 sai_frequency = RCC_PLLSAI2_GetFreqDomain_SAI();
elmot 1:d0dfbce63a89 739 }
elmot 1:d0dfbce63a89 740 break;
elmot 1:d0dfbce63a89 741
elmot 1:d0dfbce63a89 742 #endif /* RCC_PLLSAI2_SUPPORT */
elmot 1:d0dfbce63a89 743 case LL_RCC_SAI1_CLKSOURCE_PLL: /* PLL clock used as SAI1 clock source */
elmot 1:d0dfbce63a89 744 if (LL_RCC_PLL_IsReady())
elmot 1:d0dfbce63a89 745 {
elmot 1:d0dfbce63a89 746 sai_frequency = RCC_PLL_GetFreqDomain_SAI();
elmot 1:d0dfbce63a89 747 }
elmot 1:d0dfbce63a89 748 break;
elmot 1:d0dfbce63a89 749
elmot 1:d0dfbce63a89 750 case LL_RCC_SAI1_CLKSOURCE_PIN: /* External input clock used as SAI1 clock source */
elmot 1:d0dfbce63a89 751 default:
elmot 1:d0dfbce63a89 752 sai_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
elmot 1:d0dfbce63a89 753 break;
elmot 1:d0dfbce63a89 754 }
elmot 1:d0dfbce63a89 755 }
elmot 1:d0dfbce63a89 756 else
elmot 1:d0dfbce63a89 757 {
elmot 1:d0dfbce63a89 758 #if defined(RCC_CCIPR_SAI2SEL)
elmot 1:d0dfbce63a89 759 if (SAIxSource == LL_RCC_SAI2_CLKSOURCE)
elmot 1:d0dfbce63a89 760 {
elmot 1:d0dfbce63a89 761 /* SAI2CLK clock frequency */
elmot 1:d0dfbce63a89 762 switch (LL_RCC_GetSAIClockSource(SAIxSource))
elmot 1:d0dfbce63a89 763 {
elmot 1:d0dfbce63a89 764 case LL_RCC_SAI2_CLKSOURCE_PLLSAI1: /* PLLSAI1 clock used as SAI2 clock source */
elmot 1:d0dfbce63a89 765 if (LL_RCC_PLLSAI1_IsReady())
elmot 1:d0dfbce63a89 766 {
elmot 1:d0dfbce63a89 767 sai_frequency = RCC_PLLSAI1_GetFreqDomain_SAI();
elmot 1:d0dfbce63a89 768 }
elmot 1:d0dfbce63a89 769 break;
elmot 1:d0dfbce63a89 770
elmot 1:d0dfbce63a89 771 #if defined(RCC_PLLSAI2_SUPPORT)
elmot 1:d0dfbce63a89 772 case LL_RCC_SAI2_CLKSOURCE_PLLSAI2: /* PLLSAI2 clock used as SAI2 clock source */
elmot 1:d0dfbce63a89 773 if (LL_RCC_PLLSAI2_IsReady())
elmot 1:d0dfbce63a89 774 {
elmot 1:d0dfbce63a89 775 sai_frequency = RCC_PLLSAI2_GetFreqDomain_SAI();
elmot 1:d0dfbce63a89 776 }
elmot 1:d0dfbce63a89 777 break;
elmot 1:d0dfbce63a89 778
elmot 1:d0dfbce63a89 779 #endif /* RCC_PLLSAI2_SUPPORT */
elmot 1:d0dfbce63a89 780 case LL_RCC_SAI2_CLKSOURCE_PLL: /* PLL clock used as SAI2 clock source */
elmot 1:d0dfbce63a89 781 if (LL_RCC_PLL_IsReady())
elmot 1:d0dfbce63a89 782 {
elmot 1:d0dfbce63a89 783 sai_frequency = RCC_PLL_GetFreqDomain_SAI();
elmot 1:d0dfbce63a89 784 }
elmot 1:d0dfbce63a89 785 break;
elmot 1:d0dfbce63a89 786
elmot 1:d0dfbce63a89 787 case LL_RCC_SAI2_CLKSOURCE_PIN: /* External input clock used as SAI2 clock source */
elmot 1:d0dfbce63a89 788 default:
elmot 1:d0dfbce63a89 789 sai_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
elmot 1:d0dfbce63a89 790 break;
elmot 1:d0dfbce63a89 791 }
elmot 1:d0dfbce63a89 792 }
elmot 1:d0dfbce63a89 793 #endif /*RCC_CCIPR_SAI2SEL*/
elmot 1:d0dfbce63a89 794 }
elmot 1:d0dfbce63a89 795
elmot 1:d0dfbce63a89 796 return sai_frequency;
elmot 1:d0dfbce63a89 797 }
elmot 1:d0dfbce63a89 798
elmot 1:d0dfbce63a89 799 /**
elmot 1:d0dfbce63a89 800 * @brief Return SDMMCx clock frequency
elmot 1:d0dfbce63a89 801 * @param SDMMCxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 802 * @arg @ref LL_RCC_SDMMC1_CLKSOURCE
elmot 1:d0dfbce63a89 803 * @retval SDMMC clock frequency (in Hz)
elmot 1:d0dfbce63a89 804 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (MSI) or PLL is not ready
elmot 1:d0dfbce63a89 805 * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
elmot 1:d0dfbce63a89 806 */
elmot 1:d0dfbce63a89 807 uint32_t LL_RCC_GetSDMMCClockFreq(uint32_t SDMMCxSource)
elmot 1:d0dfbce63a89 808 {
elmot 1:d0dfbce63a89 809 uint32_t sdmmc_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 810
elmot 1:d0dfbce63a89 811 /* Check parameter */
elmot 1:d0dfbce63a89 812 assert_param(IS_LL_RCC_SDMMC_CLKSOURCE(SDMMCxSource));
elmot 1:d0dfbce63a89 813
elmot 1:d0dfbce63a89 814 /* SDMMC1CLK clock frequency */
elmot 1:d0dfbce63a89 815 switch (LL_RCC_GetSDMMCClockSource(SDMMCxSource))
elmot 1:d0dfbce63a89 816 {
elmot 1:d0dfbce63a89 817 case LL_RCC_SDMMC1_CLKSOURCE_PLLSAI1: /* PLLSAI1 clock used as SDMMC1 clock source */
elmot 1:d0dfbce63a89 818 if (LL_RCC_PLLSAI1_IsReady())
elmot 1:d0dfbce63a89 819 {
elmot 1:d0dfbce63a89 820 sdmmc_frequency = RCC_PLLSAI1_GetFreqDomain_48M();
elmot 1:d0dfbce63a89 821 }
elmot 1:d0dfbce63a89 822 break;
elmot 1:d0dfbce63a89 823
elmot 1:d0dfbce63a89 824 case LL_RCC_SDMMC1_CLKSOURCE_PLL: /* PLL clock used as SDMMC1 clock source */
elmot 1:d0dfbce63a89 825 if (LL_RCC_PLL_IsReady())
elmot 1:d0dfbce63a89 826 {
elmot 1:d0dfbce63a89 827 sdmmc_frequency = RCC_PLL_GetFreqDomain_48M();
elmot 1:d0dfbce63a89 828 }
elmot 1:d0dfbce63a89 829 break;
elmot 1:d0dfbce63a89 830
elmot 1:d0dfbce63a89 831 case LL_RCC_SDMMC1_CLKSOURCE_MSI: /* MSI clock used as SDMMC1 clock source */
elmot 1:d0dfbce63a89 832 if (LL_RCC_MSI_IsReady())
elmot 1:d0dfbce63a89 833 {
elmot 1:d0dfbce63a89 834 sdmmc_frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 835 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 836 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 837 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 838 }
elmot 1:d0dfbce63a89 839 break;
elmot 1:d0dfbce63a89 840
elmot 1:d0dfbce63a89 841 case LL_RCC_SDMMC1_CLKSOURCE_NONE: /* No clock used as SDMMC1 clock source */
elmot 1:d0dfbce63a89 842 default:
elmot 1:d0dfbce63a89 843 sdmmc_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
elmot 1:d0dfbce63a89 844 break;
elmot 1:d0dfbce63a89 845 }
elmot 1:d0dfbce63a89 846
elmot 1:d0dfbce63a89 847 return sdmmc_frequency;
elmot 1:d0dfbce63a89 848 }
elmot 1:d0dfbce63a89 849
elmot 1:d0dfbce63a89 850 /**
elmot 1:d0dfbce63a89 851 * @brief Return RNGx clock frequency
elmot 1:d0dfbce63a89 852 * @param RNGxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 853 * @arg @ref LL_RCC_RNG_CLKSOURCE
elmot 1:d0dfbce63a89 854 * @retval RNG clock frequency (in Hz)
elmot 1:d0dfbce63a89 855 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (MSI) or PLL is not ready
elmot 1:d0dfbce63a89 856 * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
elmot 1:d0dfbce63a89 857 */
elmot 1:d0dfbce63a89 858 uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource)
elmot 1:d0dfbce63a89 859 {
elmot 1:d0dfbce63a89 860 uint32_t rng_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 861
elmot 1:d0dfbce63a89 862 /* Check parameter */
elmot 1:d0dfbce63a89 863 assert_param(IS_LL_RCC_RNG_CLKSOURCE(RNGxSource));
elmot 1:d0dfbce63a89 864
elmot 1:d0dfbce63a89 865 /* RNGCLK clock frequency */
elmot 1:d0dfbce63a89 866 switch (LL_RCC_GetRNGClockSource(RNGxSource))
elmot 1:d0dfbce63a89 867 {
elmot 1:d0dfbce63a89 868 case LL_RCC_RNG_CLKSOURCE_PLLSAI1: /* PLLSAI1 clock used as RNG clock source */
elmot 1:d0dfbce63a89 869 if (LL_RCC_PLLSAI1_IsReady())
elmot 1:d0dfbce63a89 870 {
elmot 1:d0dfbce63a89 871 rng_frequency = RCC_PLLSAI1_GetFreqDomain_48M();
elmot 1:d0dfbce63a89 872 }
elmot 1:d0dfbce63a89 873 break;
elmot 1:d0dfbce63a89 874
elmot 1:d0dfbce63a89 875 case LL_RCC_RNG_CLKSOURCE_PLL: /* PLL clock used as RNG clock source */
elmot 1:d0dfbce63a89 876 if (LL_RCC_PLL_IsReady())
elmot 1:d0dfbce63a89 877 {
elmot 1:d0dfbce63a89 878 rng_frequency = RCC_PLL_GetFreqDomain_48M();
elmot 1:d0dfbce63a89 879 }
elmot 1:d0dfbce63a89 880 break;
elmot 1:d0dfbce63a89 881
elmot 1:d0dfbce63a89 882 case LL_RCC_RNG_CLKSOURCE_MSI: /* MSI clock used as RNG clock source */
elmot 1:d0dfbce63a89 883 if (LL_RCC_MSI_IsReady())
elmot 1:d0dfbce63a89 884 {
elmot 1:d0dfbce63a89 885 rng_frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 886 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 887 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 888 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 889 }
elmot 1:d0dfbce63a89 890 break;
elmot 1:d0dfbce63a89 891
elmot 1:d0dfbce63a89 892 case LL_RCC_RNG_CLKSOURCE_NONE: /* No clock used as RNG clock source */
elmot 1:d0dfbce63a89 893 default:
elmot 1:d0dfbce63a89 894 rng_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
elmot 1:d0dfbce63a89 895 break;
elmot 1:d0dfbce63a89 896 }
elmot 1:d0dfbce63a89 897
elmot 1:d0dfbce63a89 898 return rng_frequency;
elmot 1:d0dfbce63a89 899 }
elmot 1:d0dfbce63a89 900
elmot 1:d0dfbce63a89 901 #if defined(USB_OTG_FS) || defined(USB)
elmot 1:d0dfbce63a89 902 /**
elmot 1:d0dfbce63a89 903 * @brief Return USBx clock frequency
elmot 1:d0dfbce63a89 904 * @param USBxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 905 * @arg @ref LL_RCC_USB_CLKSOURCE
elmot 1:d0dfbce63a89 906 * @retval USB clock frequency (in Hz)
elmot 1:d0dfbce63a89 907 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (MSI) or PLL is not ready
elmot 1:d0dfbce63a89 908 * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
elmot 1:d0dfbce63a89 909 */
elmot 1:d0dfbce63a89 910 uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
elmot 1:d0dfbce63a89 911 {
elmot 1:d0dfbce63a89 912 uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 913
elmot 1:d0dfbce63a89 914 /* Check parameter */
elmot 1:d0dfbce63a89 915 assert_param(IS_LL_RCC_USB_CLKSOURCE(USBxSource));
elmot 1:d0dfbce63a89 916
elmot 1:d0dfbce63a89 917 /* USBCLK clock frequency */
elmot 1:d0dfbce63a89 918 switch (LL_RCC_GetUSBClockSource(USBxSource))
elmot 1:d0dfbce63a89 919 {
elmot 1:d0dfbce63a89 920 case LL_RCC_USB_CLKSOURCE_PLLSAI1: /* PLLSAI1 clock used as USB clock source */
elmot 1:d0dfbce63a89 921 if (LL_RCC_PLLSAI1_IsReady())
elmot 1:d0dfbce63a89 922 {
elmot 1:d0dfbce63a89 923 usb_frequency = RCC_PLLSAI1_GetFreqDomain_48M();
elmot 1:d0dfbce63a89 924 }
elmot 1:d0dfbce63a89 925 break;
elmot 1:d0dfbce63a89 926
elmot 1:d0dfbce63a89 927 case LL_RCC_USB_CLKSOURCE_PLL: /* PLL clock used as USB clock source */
elmot 1:d0dfbce63a89 928 if (LL_RCC_PLL_IsReady())
elmot 1:d0dfbce63a89 929 {
elmot 1:d0dfbce63a89 930 usb_frequency = RCC_PLL_GetFreqDomain_48M();
elmot 1:d0dfbce63a89 931 }
elmot 1:d0dfbce63a89 932 break;
elmot 1:d0dfbce63a89 933
elmot 1:d0dfbce63a89 934 case LL_RCC_USB_CLKSOURCE_MSI: /* MSI clock used as USB clock source */
elmot 1:d0dfbce63a89 935 if (LL_RCC_MSI_IsReady())
elmot 1:d0dfbce63a89 936 {
elmot 1:d0dfbce63a89 937 usb_frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 938 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 939 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 940 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 941 }
elmot 1:d0dfbce63a89 942 break;
elmot 1:d0dfbce63a89 943
elmot 1:d0dfbce63a89 944 case LL_RCC_USB_CLKSOURCE_NONE: /* No clock used as USB clock source */
elmot 1:d0dfbce63a89 945 default:
elmot 1:d0dfbce63a89 946 usb_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
elmot 1:d0dfbce63a89 947 break;
elmot 1:d0dfbce63a89 948 }
elmot 1:d0dfbce63a89 949
elmot 1:d0dfbce63a89 950 return usb_frequency;
elmot 1:d0dfbce63a89 951 }
elmot 1:d0dfbce63a89 952 #endif /* USB_OTG_FS || USB */
elmot 1:d0dfbce63a89 953
elmot 1:d0dfbce63a89 954 /**
elmot 1:d0dfbce63a89 955 * @brief Return ADCx clock frequency
elmot 1:d0dfbce63a89 956 * @param ADCxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 957 * @arg @ref LL_RCC_ADC_CLKSOURCE
elmot 1:d0dfbce63a89 958 * @retval ADC clock frequency (in Hz)
elmot 1:d0dfbce63a89 959 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (MSI) or PLL is not ready
elmot 1:d0dfbce63a89 960 * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
elmot 1:d0dfbce63a89 961 */
elmot 1:d0dfbce63a89 962 uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource)
elmot 1:d0dfbce63a89 963 {
elmot 1:d0dfbce63a89 964 uint32_t adc_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 965
elmot 1:d0dfbce63a89 966 /* Check parameter */
elmot 1:d0dfbce63a89 967 assert_param(IS_LL_RCC_ADC_CLKSOURCE(ADCxSource));
elmot 1:d0dfbce63a89 968
elmot 1:d0dfbce63a89 969 /* ADCCLK clock frequency */
elmot 1:d0dfbce63a89 970 switch (LL_RCC_GetADCClockSource(ADCxSource))
elmot 1:d0dfbce63a89 971 {
elmot 1:d0dfbce63a89 972 case LL_RCC_ADC_CLKSOURCE_PLLSAI1: /* PLLSAI1 clock used as ADC clock source */
elmot 1:d0dfbce63a89 973 if (LL_RCC_PLLSAI1_IsReady())
elmot 1:d0dfbce63a89 974 {
elmot 1:d0dfbce63a89 975 adc_frequency = RCC_PLLSAI1_GetFreqDomain_ADC();
elmot 1:d0dfbce63a89 976 }
elmot 1:d0dfbce63a89 977 break;
elmot 1:d0dfbce63a89 978
elmot 1:d0dfbce63a89 979 #if defined(RCC_PLLSAI2_SUPPORT)
elmot 1:d0dfbce63a89 980 case LL_RCC_ADC_CLKSOURCE_PLLSAI2: /* PLLSAI2 clock used as ADC clock source */
elmot 1:d0dfbce63a89 981 if (LL_RCC_PLLSAI2_IsReady())
elmot 1:d0dfbce63a89 982 {
elmot 1:d0dfbce63a89 983 adc_frequency = RCC_PLLSAI2_GetFreqDomain_ADC();
elmot 1:d0dfbce63a89 984 }
elmot 1:d0dfbce63a89 985 break;
elmot 1:d0dfbce63a89 986 #endif /* RCC_PLLSAI2_SUPPORT */
elmot 1:d0dfbce63a89 987
elmot 1:d0dfbce63a89 988 case LL_RCC_ADC_CLKSOURCE_SYSCLK: /* SYSCLK clock used as ADC clock source */
elmot 1:d0dfbce63a89 989 adc_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 990 break;
elmot 1:d0dfbce63a89 991 case LL_RCC_ADC_CLKSOURCE_NONE: /* No clock used as ADC clock source */
elmot 1:d0dfbce63a89 992 default:
elmot 1:d0dfbce63a89 993 adc_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
elmot 1:d0dfbce63a89 994 break;
elmot 1:d0dfbce63a89 995 }
elmot 1:d0dfbce63a89 996
elmot 1:d0dfbce63a89 997 return adc_frequency;
elmot 1:d0dfbce63a89 998 }
elmot 1:d0dfbce63a89 999
elmot 1:d0dfbce63a89 1000 /**
elmot 1:d0dfbce63a89 1001 * @brief Return SWPMIx clock frequency
elmot 1:d0dfbce63a89 1002 * @param SWPMIxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1003 * @arg @ref LL_RCC_SWPMI1_CLKSOURCE
elmot 1:d0dfbce63a89 1004 * @retval SWPMI clock frequency (in Hz)
elmot 1:d0dfbce63a89 1005 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI) is not ready
elmot 1:d0dfbce63a89 1006 */
elmot 1:d0dfbce63a89 1007 uint32_t LL_RCC_GetSWPMIClockFreq(uint32_t SWPMIxSource)
elmot 1:d0dfbce63a89 1008 {
elmot 1:d0dfbce63a89 1009 uint32_t swpmi_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 1010
elmot 1:d0dfbce63a89 1011 /* Check parameter */
elmot 1:d0dfbce63a89 1012 assert_param(IS_LL_RCC_SWPMI_CLKSOURCE(SWPMIxSource));
elmot 1:d0dfbce63a89 1013
elmot 1:d0dfbce63a89 1014 /* SWPMI1CLK clock frequency */
elmot 1:d0dfbce63a89 1015 switch (LL_RCC_GetSWPMIClockSource(SWPMIxSource))
elmot 1:d0dfbce63a89 1016 {
elmot 1:d0dfbce63a89 1017 case LL_RCC_SWPMI1_CLKSOURCE_HSI: /* SWPMI1 Clock is HSI Osc. */
elmot 1:d0dfbce63a89 1018 if (LL_RCC_HSI_IsReady())
elmot 1:d0dfbce63a89 1019 {
elmot 1:d0dfbce63a89 1020 swpmi_frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 1021 }
elmot 1:d0dfbce63a89 1022 break;
elmot 1:d0dfbce63a89 1023
elmot 1:d0dfbce63a89 1024 case LL_RCC_SWPMI1_CLKSOURCE_PCLK: /* SWPMI1 Clock is PCLK1 */
elmot 1:d0dfbce63a89 1025 default:
elmot 1:d0dfbce63a89 1026 swpmi_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 1027 break;
elmot 1:d0dfbce63a89 1028 }
elmot 1:d0dfbce63a89 1029
elmot 1:d0dfbce63a89 1030 return swpmi_frequency;
elmot 1:d0dfbce63a89 1031 }
elmot 1:d0dfbce63a89 1032
elmot 1:d0dfbce63a89 1033 #if defined(DFSDM1_Channel0)
elmot 1:d0dfbce63a89 1034 /**
elmot 1:d0dfbce63a89 1035 * @brief Return DFSDMx clock frequency
elmot 1:d0dfbce63a89 1036 * @param DFSDMxSource This parameter can be one of the following values:
elmot 1:d0dfbce63a89 1037 * @arg @ref LL_RCC_DFSDM1_CLKSOURCE
elmot 1:d0dfbce63a89 1038 * @retval DFSDM clock frequency (in Hz)
elmot 1:d0dfbce63a89 1039 */
elmot 1:d0dfbce63a89 1040 uint32_t LL_RCC_GetDFSDMClockFreq(uint32_t DFSDMxSource)
elmot 1:d0dfbce63a89 1041 {
elmot 1:d0dfbce63a89 1042 uint32_t dfsdm_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
elmot 1:d0dfbce63a89 1043
elmot 1:d0dfbce63a89 1044 /* Check parameter */
elmot 1:d0dfbce63a89 1045 assert_param(IS_LL_RCC_DFSDM_CLKSOURCE(DFSDMxSource));
elmot 1:d0dfbce63a89 1046
elmot 1:d0dfbce63a89 1047 /* DFSDM1CLK clock frequency */
elmot 1:d0dfbce63a89 1048 switch (LL_RCC_GetDFSDMClockSource(DFSDMxSource))
elmot 1:d0dfbce63a89 1049 {
elmot 1:d0dfbce63a89 1050 case LL_RCC_DFSDM1_CLKSOURCE_SYSCLK: /* DFSDM1 Clock is SYSCLK */
elmot 1:d0dfbce63a89 1051 dfsdm_frequency = RCC_GetSystemClockFreq();
elmot 1:d0dfbce63a89 1052 break;
elmot 1:d0dfbce63a89 1053
elmot 1:d0dfbce63a89 1054 case LL_RCC_DFSDM1_CLKSOURCE_PCLK: /* DFSDM1 Clock is PCLK1 */
elmot 1:d0dfbce63a89 1055 default:
elmot 1:d0dfbce63a89 1056 dfsdm_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
elmot 1:d0dfbce63a89 1057 break;
elmot 1:d0dfbce63a89 1058 }
elmot 1:d0dfbce63a89 1059
elmot 1:d0dfbce63a89 1060 return dfsdm_frequency;
elmot 1:d0dfbce63a89 1061 }
elmot 1:d0dfbce63a89 1062 #endif /* DFSDM1_Channel0 */
elmot 1:d0dfbce63a89 1063
elmot 1:d0dfbce63a89 1064 /**
elmot 1:d0dfbce63a89 1065 * @}
elmot 1:d0dfbce63a89 1066 */
elmot 1:d0dfbce63a89 1067
elmot 1:d0dfbce63a89 1068 /**
elmot 1:d0dfbce63a89 1069 * @}
elmot 1:d0dfbce63a89 1070 */
elmot 1:d0dfbce63a89 1071
elmot 1:d0dfbce63a89 1072 /** @addtogroup RCC_LL_Private_Functions
elmot 1:d0dfbce63a89 1073 * @{
elmot 1:d0dfbce63a89 1074 */
elmot 1:d0dfbce63a89 1075
elmot 1:d0dfbce63a89 1076 /**
elmot 1:d0dfbce63a89 1077 * @brief Return SYSTEM clock frequency
elmot 1:d0dfbce63a89 1078 * @retval SYSTEM clock frequency (in Hz)
elmot 1:d0dfbce63a89 1079 */
elmot 1:d0dfbce63a89 1080 uint32_t RCC_GetSystemClockFreq(void)
elmot 1:d0dfbce63a89 1081 {
elmot 1:d0dfbce63a89 1082 uint32_t frequency = 0;
elmot 1:d0dfbce63a89 1083
elmot 1:d0dfbce63a89 1084 /* Get SYSCLK source -------------------------------------------------------*/
elmot 1:d0dfbce63a89 1085 switch (LL_RCC_GetSysClkSource())
elmot 1:d0dfbce63a89 1086 {
elmot 1:d0dfbce63a89 1087 case LL_RCC_SYS_CLKSOURCE_STATUS_MSI: /* MSI used as system clock source */
elmot 1:d0dfbce63a89 1088 frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1089 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1090 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1091 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1092 break;
elmot 1:d0dfbce63a89 1093
elmot 1:d0dfbce63a89 1094 case LL_RCC_SYS_CLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
elmot 1:d0dfbce63a89 1095 frequency = HSI_VALUE;
elmot 1:d0dfbce63a89 1096 break;
elmot 1:d0dfbce63a89 1097
elmot 1:d0dfbce63a89 1098 case LL_RCC_SYS_CLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
elmot 1:d0dfbce63a89 1099 frequency = HSE_VALUE;
elmot 1:d0dfbce63a89 1100 break;
elmot 1:d0dfbce63a89 1101
elmot 1:d0dfbce63a89 1102 case LL_RCC_SYS_CLKSOURCE_STATUS_PLL: /* PLL used as system clock source */
elmot 1:d0dfbce63a89 1103 frequency = RCC_PLL_GetFreqDomain_SYS();
elmot 1:d0dfbce63a89 1104 break;
elmot 1:d0dfbce63a89 1105
elmot 1:d0dfbce63a89 1106 default:
elmot 1:d0dfbce63a89 1107 frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1108 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1109 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1110 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1111 break;
elmot 1:d0dfbce63a89 1112 }
elmot 1:d0dfbce63a89 1113
elmot 1:d0dfbce63a89 1114 return frequency;
elmot 1:d0dfbce63a89 1115 }
elmot 1:d0dfbce63a89 1116
elmot 1:d0dfbce63a89 1117 /**
elmot 1:d0dfbce63a89 1118 * @brief Return HCLK clock frequency
elmot 1:d0dfbce63a89 1119 * @param SYSCLK_Frequency SYSCLK clock frequency
elmot 1:d0dfbce63a89 1120 * @retval HCLK clock frequency (in Hz)
elmot 1:d0dfbce63a89 1121 */
elmot 1:d0dfbce63a89 1122 uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
elmot 1:d0dfbce63a89 1123 {
elmot 1:d0dfbce63a89 1124 /* HCLK clock frequency */
elmot 1:d0dfbce63a89 1125 return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
elmot 1:d0dfbce63a89 1126 }
elmot 1:d0dfbce63a89 1127
elmot 1:d0dfbce63a89 1128 /**
elmot 1:d0dfbce63a89 1129 * @brief Return PCLK1 clock frequency
elmot 1:d0dfbce63a89 1130 * @param HCLK_Frequency HCLK clock frequency
elmot 1:d0dfbce63a89 1131 * @retval PCLK1 clock frequency (in Hz)
elmot 1:d0dfbce63a89 1132 */
elmot 1:d0dfbce63a89 1133 uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
elmot 1:d0dfbce63a89 1134 {
elmot 1:d0dfbce63a89 1135 /* PCLK1 clock frequency */
elmot 1:d0dfbce63a89 1136 return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
elmot 1:d0dfbce63a89 1137 }
elmot 1:d0dfbce63a89 1138
elmot 1:d0dfbce63a89 1139 /**
elmot 1:d0dfbce63a89 1140 * @brief Return PCLK2 clock frequency
elmot 1:d0dfbce63a89 1141 * @param HCLK_Frequency HCLK clock frequency
elmot 1:d0dfbce63a89 1142 * @retval PCLK2 clock frequency (in Hz)
elmot 1:d0dfbce63a89 1143 */
elmot 1:d0dfbce63a89 1144 uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
elmot 1:d0dfbce63a89 1145 {
elmot 1:d0dfbce63a89 1146 /* PCLK2 clock frequency */
elmot 1:d0dfbce63a89 1147 return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler());
elmot 1:d0dfbce63a89 1148 }
elmot 1:d0dfbce63a89 1149
elmot 1:d0dfbce63a89 1150 /**
elmot 1:d0dfbce63a89 1151 * @brief Return PLL clock frequency used for system domain
elmot 1:d0dfbce63a89 1152 * @retval PLL clock frequency (in Hz)
elmot 1:d0dfbce63a89 1153 */
elmot 1:d0dfbce63a89 1154 uint32_t RCC_PLL_GetFreqDomain_SYS(void)
elmot 1:d0dfbce63a89 1155 {
elmot 1:d0dfbce63a89 1156 uint32_t pllinputfreq = 0, pllsource = 0;
elmot 1:d0dfbce63a89 1157
elmot 1:d0dfbce63a89 1158 /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
elmot 1:d0dfbce63a89 1159 SYSCLK = PLL_VCO / PLLR
elmot 1:d0dfbce63a89 1160 */
elmot 1:d0dfbce63a89 1161 pllsource = LL_RCC_PLL_GetMainSource();
elmot 1:d0dfbce63a89 1162
elmot 1:d0dfbce63a89 1163 switch (pllsource)
elmot 1:d0dfbce63a89 1164 {
elmot 1:d0dfbce63a89 1165 case LL_RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */
elmot 1:d0dfbce63a89 1166 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1167 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1168 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1169 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1170 break;
elmot 1:d0dfbce63a89 1171
elmot 1:d0dfbce63a89 1172 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
elmot 1:d0dfbce63a89 1173 pllinputfreq = HSI_VALUE;
elmot 1:d0dfbce63a89 1174 break;
elmot 1:d0dfbce63a89 1175
elmot 1:d0dfbce63a89 1176 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
elmot 1:d0dfbce63a89 1177 pllinputfreq = HSE_VALUE;
elmot 1:d0dfbce63a89 1178 break;
elmot 1:d0dfbce63a89 1179
elmot 1:d0dfbce63a89 1180 default:
elmot 1:d0dfbce63a89 1181 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1182 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1183 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1184 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1185 break;
elmot 1:d0dfbce63a89 1186 }
elmot 1:d0dfbce63a89 1187 return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
elmot 1:d0dfbce63a89 1188 LL_RCC_PLL_GetN(), LL_RCC_PLL_GetR());
elmot 1:d0dfbce63a89 1189 }
elmot 1:d0dfbce63a89 1190 /**
elmot 1:d0dfbce63a89 1191 * @brief Return PLL clock frequency used for SAI domain
elmot 1:d0dfbce63a89 1192 * @retval PLL clock frequency (in Hz)
elmot 1:d0dfbce63a89 1193 */
elmot 1:d0dfbce63a89 1194 uint32_t RCC_PLL_GetFreqDomain_SAI(void)
elmot 1:d0dfbce63a89 1195 {
elmot 1:d0dfbce63a89 1196 uint32_t pllinputfreq = 0, pllsource = 0;
elmot 1:d0dfbce63a89 1197
elmot 1:d0dfbce63a89 1198 /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE / PLLM) * PLLN
elmot 1:d0dfbce63a89 1199 SAI Domain clock = PLL_VCO / PLLP
elmot 1:d0dfbce63a89 1200 */
elmot 1:d0dfbce63a89 1201 pllsource = LL_RCC_PLL_GetMainSource();
elmot 1:d0dfbce63a89 1202
elmot 1:d0dfbce63a89 1203 switch (pllsource)
elmot 1:d0dfbce63a89 1204 {
elmot 1:d0dfbce63a89 1205 case LL_RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */
elmot 1:d0dfbce63a89 1206 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1207 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1208 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1209 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1210 break;
elmot 1:d0dfbce63a89 1211
elmot 1:d0dfbce63a89 1212 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
elmot 1:d0dfbce63a89 1213 pllinputfreq = HSI_VALUE;
elmot 1:d0dfbce63a89 1214 break;
elmot 1:d0dfbce63a89 1215
elmot 1:d0dfbce63a89 1216 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
elmot 1:d0dfbce63a89 1217 pllinputfreq = HSE_VALUE;
elmot 1:d0dfbce63a89 1218 break;
elmot 1:d0dfbce63a89 1219
elmot 1:d0dfbce63a89 1220 default:
elmot 1:d0dfbce63a89 1221 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1222 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1223 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1224 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1225 break;
elmot 1:d0dfbce63a89 1226 }
elmot 1:d0dfbce63a89 1227 return __LL_RCC_CALC_PLLCLK_SAI_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
elmot 1:d0dfbce63a89 1228 LL_RCC_PLL_GetN(), LL_RCC_PLL_GetP());
elmot 1:d0dfbce63a89 1229 }
elmot 1:d0dfbce63a89 1230
elmot 1:d0dfbce63a89 1231 /**
elmot 1:d0dfbce63a89 1232 * @brief Return PLL clock frequency used for 48 MHz domain
elmot 1:d0dfbce63a89 1233 * @retval PLL clock frequency (in Hz)
elmot 1:d0dfbce63a89 1234 */
elmot 1:d0dfbce63a89 1235 uint32_t RCC_PLL_GetFreqDomain_48M(void)
elmot 1:d0dfbce63a89 1236 {
elmot 1:d0dfbce63a89 1237 uint32_t pllinputfreq = 0, pllsource = 0;
elmot 1:d0dfbce63a89 1238
elmot 1:d0dfbce63a89 1239 /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
elmot 1:d0dfbce63a89 1240 48M Domain clock = PLL_VCO / PLLQ
elmot 1:d0dfbce63a89 1241 */
elmot 1:d0dfbce63a89 1242 pllsource = LL_RCC_PLL_GetMainSource();
elmot 1:d0dfbce63a89 1243
elmot 1:d0dfbce63a89 1244 switch (pllsource)
elmot 1:d0dfbce63a89 1245 {
elmot 1:d0dfbce63a89 1246 case LL_RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */
elmot 1:d0dfbce63a89 1247 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1248 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1249 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1250 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1251 break;
elmot 1:d0dfbce63a89 1252
elmot 1:d0dfbce63a89 1253 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
elmot 1:d0dfbce63a89 1254 pllinputfreq = HSI_VALUE;
elmot 1:d0dfbce63a89 1255 break;
elmot 1:d0dfbce63a89 1256
elmot 1:d0dfbce63a89 1257 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
elmot 1:d0dfbce63a89 1258 pllinputfreq = HSE_VALUE;
elmot 1:d0dfbce63a89 1259 break;
elmot 1:d0dfbce63a89 1260
elmot 1:d0dfbce63a89 1261 default:
elmot 1:d0dfbce63a89 1262 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1263 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1264 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1265 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1266 break;
elmot 1:d0dfbce63a89 1267 }
elmot 1:d0dfbce63a89 1268 return __LL_RCC_CALC_PLLCLK_48M_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
elmot 1:d0dfbce63a89 1269 LL_RCC_PLL_GetN(), LL_RCC_PLL_GetQ());
elmot 1:d0dfbce63a89 1270 }
elmot 1:d0dfbce63a89 1271
elmot 1:d0dfbce63a89 1272 /**
elmot 1:d0dfbce63a89 1273 * @brief Return PLLSAI1 clock frequency used for SAI domain
elmot 1:d0dfbce63a89 1274 * @retval PLLSAI1 clock frequency (in Hz)
elmot 1:d0dfbce63a89 1275 */
elmot 1:d0dfbce63a89 1276 uint32_t RCC_PLLSAI1_GetFreqDomain_SAI(void)
elmot 1:d0dfbce63a89 1277 {
elmot 1:d0dfbce63a89 1278 uint32_t pllinputfreq = 0, pllsource = 0;
elmot 1:d0dfbce63a89 1279
elmot 1:d0dfbce63a89 1280 /* PLLSAI1_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLSAI1N
elmot 1:d0dfbce63a89 1281 SAI Domain clock = PLLSAI1_VCO / PLLSAI1P
elmot 1:d0dfbce63a89 1282 */
elmot 1:d0dfbce63a89 1283 pllsource = LL_RCC_PLL_GetMainSource();
elmot 1:d0dfbce63a89 1284
elmot 1:d0dfbce63a89 1285 switch (pllsource)
elmot 1:d0dfbce63a89 1286 {
elmot 1:d0dfbce63a89 1287 case LL_RCC_PLLSOURCE_MSI: /* MSI used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1288 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1289 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1290 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1291 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1292 break;
elmot 1:d0dfbce63a89 1293
elmot 1:d0dfbce63a89 1294 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1295 pllinputfreq = HSI_VALUE;
elmot 1:d0dfbce63a89 1296 break;
elmot 1:d0dfbce63a89 1297
elmot 1:d0dfbce63a89 1298 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1299 pllinputfreq = HSE_VALUE;
elmot 1:d0dfbce63a89 1300 break;
elmot 1:d0dfbce63a89 1301
elmot 1:d0dfbce63a89 1302 default:
elmot 1:d0dfbce63a89 1303 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1304 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1305 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1306 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1307 break;
elmot 1:d0dfbce63a89 1308 }
elmot 1:d0dfbce63a89 1309 return __LL_RCC_CALC_PLLSAI1_SAI_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
elmot 1:d0dfbce63a89 1310 LL_RCC_PLLSAI1_GetN(), LL_RCC_PLLSAI1_GetP());
elmot 1:d0dfbce63a89 1311 }
elmot 1:d0dfbce63a89 1312
elmot 1:d0dfbce63a89 1313 /**
elmot 1:d0dfbce63a89 1314 * @brief Return PLLSAI1 clock frequency used for 48Mhz domain
elmot 1:d0dfbce63a89 1315 * @retval PLLSAI1 clock frequency (in Hz)
elmot 1:d0dfbce63a89 1316 */
elmot 1:d0dfbce63a89 1317 uint32_t RCC_PLLSAI1_GetFreqDomain_48M(void)
elmot 1:d0dfbce63a89 1318 {
elmot 1:d0dfbce63a89 1319 uint32_t pllinputfreq = 0, pllsource = 0;
elmot 1:d0dfbce63a89 1320
elmot 1:d0dfbce63a89 1321 /* PLLSAI1_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLSAI1N
elmot 1:d0dfbce63a89 1322 48M Domain clock = PLLSAI1_VCO / PLLSAI1Q
elmot 1:d0dfbce63a89 1323 */
elmot 1:d0dfbce63a89 1324 pllsource = LL_RCC_PLL_GetMainSource();
elmot 1:d0dfbce63a89 1325
elmot 1:d0dfbce63a89 1326 switch (pllsource)
elmot 1:d0dfbce63a89 1327 {
elmot 1:d0dfbce63a89 1328 case LL_RCC_PLLSOURCE_MSI: /* MSI used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1329 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1330 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1331 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1332 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1333 break;
elmot 1:d0dfbce63a89 1334
elmot 1:d0dfbce63a89 1335 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1336 pllinputfreq = HSI_VALUE;
elmot 1:d0dfbce63a89 1337 break;
elmot 1:d0dfbce63a89 1338
elmot 1:d0dfbce63a89 1339 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1340 pllinputfreq = HSE_VALUE;
elmot 1:d0dfbce63a89 1341 break;
elmot 1:d0dfbce63a89 1342
elmot 1:d0dfbce63a89 1343 default:
elmot 1:d0dfbce63a89 1344 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1345 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1346 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1347 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1348 break;
elmot 1:d0dfbce63a89 1349 }
elmot 1:d0dfbce63a89 1350 return __LL_RCC_CALC_PLLSAI1_48M_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
elmot 1:d0dfbce63a89 1351 LL_RCC_PLLSAI1_GetN(), LL_RCC_PLLSAI1_GetQ());
elmot 1:d0dfbce63a89 1352 }
elmot 1:d0dfbce63a89 1353
elmot 1:d0dfbce63a89 1354 /**
elmot 1:d0dfbce63a89 1355 * @brief Return PLLSAI1 clock frequency used for ADC domain
elmot 1:d0dfbce63a89 1356 * @retval PLLSAI1 clock frequency (in Hz)
elmot 1:d0dfbce63a89 1357 */
elmot 1:d0dfbce63a89 1358 uint32_t RCC_PLLSAI1_GetFreqDomain_ADC(void)
elmot 1:d0dfbce63a89 1359 {
elmot 1:d0dfbce63a89 1360 uint32_t pllinputfreq = 0, pllsource = 0;
elmot 1:d0dfbce63a89 1361
elmot 1:d0dfbce63a89 1362 /* PLLSAI1_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLSAI1N
elmot 1:d0dfbce63a89 1363 48M Domain clock = PLLSAI1_VCO / PLLSAI1R
elmot 1:d0dfbce63a89 1364 */
elmot 1:d0dfbce63a89 1365 pllsource = LL_RCC_PLL_GetMainSource();
elmot 1:d0dfbce63a89 1366
elmot 1:d0dfbce63a89 1367 switch (pllsource)
elmot 1:d0dfbce63a89 1368 {
elmot 1:d0dfbce63a89 1369 case LL_RCC_PLLSOURCE_MSI: /* MSI used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1370 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1371 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1372 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1373 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1374 break;
elmot 1:d0dfbce63a89 1375
elmot 1:d0dfbce63a89 1376 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1377 pllinputfreq = HSI_VALUE;
elmot 1:d0dfbce63a89 1378 break;
elmot 1:d0dfbce63a89 1379
elmot 1:d0dfbce63a89 1380 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLLSAI1 clock source */
elmot 1:d0dfbce63a89 1381 pllinputfreq = HSE_VALUE;
elmot 1:d0dfbce63a89 1382 break;
elmot 1:d0dfbce63a89 1383
elmot 1:d0dfbce63a89 1384 default:
elmot 1:d0dfbce63a89 1385 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1386 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1387 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1388 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1389 break;
elmot 1:d0dfbce63a89 1390 }
elmot 1:d0dfbce63a89 1391 return __LL_RCC_CALC_PLLSAI1_ADC_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
elmot 1:d0dfbce63a89 1392 LL_RCC_PLLSAI1_GetN(), LL_RCC_PLLSAI1_GetR());
elmot 1:d0dfbce63a89 1393 }
elmot 1:d0dfbce63a89 1394
elmot 1:d0dfbce63a89 1395 #if defined(RCC_PLLSAI2_SUPPORT)
elmot 1:d0dfbce63a89 1396 /**
elmot 1:d0dfbce63a89 1397 * @brief Return PLLSAI2 clock frequency used for SAI domain
elmot 1:d0dfbce63a89 1398 * @retval PLLSAI2 clock frequency (in Hz)
elmot 1:d0dfbce63a89 1399 */
elmot 1:d0dfbce63a89 1400 uint32_t RCC_PLLSAI2_GetFreqDomain_SAI(void)
elmot 1:d0dfbce63a89 1401 {
elmot 1:d0dfbce63a89 1402 uint32_t pllinputfreq = 0, pllsource = 0;
elmot 1:d0dfbce63a89 1403
elmot 1:d0dfbce63a89 1404 /* PLLSAI2_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLSAI2N
elmot 1:d0dfbce63a89 1405 SAI Domain clock = PLLSAI2_VCO / PLLSAI2P
elmot 1:d0dfbce63a89 1406 */
elmot 1:d0dfbce63a89 1407 pllsource = LL_RCC_PLL_GetMainSource();
elmot 1:d0dfbce63a89 1408
elmot 1:d0dfbce63a89 1409 switch (pllsource)
elmot 1:d0dfbce63a89 1410 {
elmot 1:d0dfbce63a89 1411 case LL_RCC_PLLSOURCE_MSI: /* MSI used as PLLSAI2 clock source */
elmot 1:d0dfbce63a89 1412 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1413 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1414 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1415 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1416 break;
elmot 1:d0dfbce63a89 1417
elmot 1:d0dfbce63a89 1418 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLLSAI2 clock source */
elmot 1:d0dfbce63a89 1419 pllinputfreq = HSI_VALUE;
elmot 1:d0dfbce63a89 1420 break;
elmot 1:d0dfbce63a89 1421
elmot 1:d0dfbce63a89 1422 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLLSAI2 clock source */
elmot 1:d0dfbce63a89 1423 pllinputfreq = HSE_VALUE;
elmot 1:d0dfbce63a89 1424 break;
elmot 1:d0dfbce63a89 1425
elmot 1:d0dfbce63a89 1426 default:
elmot 1:d0dfbce63a89 1427 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1428 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1429 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1430 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1431 break;
elmot 1:d0dfbce63a89 1432 }
elmot 1:d0dfbce63a89 1433 return __LL_RCC_CALC_PLLSAI2_SAI_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
elmot 1:d0dfbce63a89 1434 LL_RCC_PLLSAI2_GetN(), LL_RCC_PLLSAI2_GetP());
elmot 1:d0dfbce63a89 1435 }
elmot 1:d0dfbce63a89 1436
elmot 1:d0dfbce63a89 1437 /**
elmot 1:d0dfbce63a89 1438 * @brief Return PLLSAI2 clock frequency used for ADC domain
elmot 1:d0dfbce63a89 1439 * @retval PLLSAI2 clock frequency (in Hz)
elmot 1:d0dfbce63a89 1440 */
elmot 1:d0dfbce63a89 1441 uint32_t RCC_PLLSAI2_GetFreqDomain_ADC(void)
elmot 1:d0dfbce63a89 1442 {
elmot 1:d0dfbce63a89 1443 uint32_t pllinputfreq = 0, pllsource = 0;
elmot 1:d0dfbce63a89 1444
elmot 1:d0dfbce63a89 1445 /* PLLSAI2_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLSAI2N
elmot 1:d0dfbce63a89 1446 48M Domain clock = PLLSAI2_VCO / PLLSAI2R
elmot 1:d0dfbce63a89 1447 */
elmot 1:d0dfbce63a89 1448 pllsource = LL_RCC_PLL_GetMainSource();
elmot 1:d0dfbce63a89 1449
elmot 1:d0dfbce63a89 1450 switch (pllsource)
elmot 1:d0dfbce63a89 1451 {
elmot 1:d0dfbce63a89 1452 case LL_RCC_PLLSOURCE_MSI: /* MSI used as PLLSAI2 clock source */
elmot 1:d0dfbce63a89 1453 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1454 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1455 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1456 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1457 break;
elmot 1:d0dfbce63a89 1458
elmot 1:d0dfbce63a89 1459 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLLSAI2 clock source */
elmot 1:d0dfbce63a89 1460 pllinputfreq = HSI_VALUE;
elmot 1:d0dfbce63a89 1461 break;
elmot 1:d0dfbce63a89 1462
elmot 1:d0dfbce63a89 1463 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLLSAI2 clock source */
elmot 1:d0dfbce63a89 1464 pllinputfreq = HSE_VALUE;
elmot 1:d0dfbce63a89 1465 break;
elmot 1:d0dfbce63a89 1466
elmot 1:d0dfbce63a89 1467 default:
elmot 1:d0dfbce63a89 1468 pllinputfreq = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_IsEnabledRangeSelect(),
elmot 1:d0dfbce63a89 1469 (LL_RCC_MSI_IsEnabledRangeSelect() ?
elmot 1:d0dfbce63a89 1470 LL_RCC_MSI_GetRange() :
elmot 1:d0dfbce63a89 1471 LL_RCC_MSI_GetRangeAfterStandby()));
elmot 1:d0dfbce63a89 1472 break;
elmot 1:d0dfbce63a89 1473 }
elmot 1:d0dfbce63a89 1474 return __LL_RCC_CALC_PLLSAI2_ADC_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
elmot 1:d0dfbce63a89 1475 LL_RCC_PLLSAI2_GetN(), LL_RCC_PLLSAI2_GetR());
elmot 1:d0dfbce63a89 1476 }
elmot 1:d0dfbce63a89 1477
elmot 1:d0dfbce63a89 1478 #endif /*RCC_PLLSAI2_SUPPORT*/
elmot 1:d0dfbce63a89 1479 /**
elmot 1:d0dfbce63a89 1480 * @}
elmot 1:d0dfbce63a89 1481 */
elmot 1:d0dfbce63a89 1482
elmot 1:d0dfbce63a89 1483 /**
elmot 1:d0dfbce63a89 1484 * @}
elmot 1:d0dfbce63a89 1485 */
elmot 1:d0dfbce63a89 1486
elmot 1:d0dfbce63a89 1487 #endif /* defined(RCC) */
elmot 1:d0dfbce63a89 1488
elmot 1:d0dfbce63a89 1489 /**
elmot 1:d0dfbce63a89 1490 * @}
elmot 1:d0dfbce63a89 1491 */
elmot 1:d0dfbce63a89 1492
elmot 1:d0dfbce63a89 1493 #endif /* USE_FULL_LL_DRIVER */
elmot 1:d0dfbce63a89 1494
elmot 1:d0dfbce63a89 1495 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/