stm32l4xx_hal_spi.h

00001  /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_spi.h
00004   * @author  MCD Application Team
00005   * @version V1.5.1
00006   * @date    31-May-2016
00007   * @brief   Header file of SPI HAL module.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */
00037 
00038 /* Define to prevent recursive inclusion -------------------------------------*/
00039 #ifndef __STM32L4xx_HAL_SPI_H
00040 #define __STM32L4xx_HAL_SPI_H
00041 
00042 #ifdef __cplusplus
00043  extern "C" {
00044 #endif
00045 
00046 /* Includes ------------------------------------------------------------------*/
00047 #include "stm32l4xx_hal_def.h"
00048 
00049 /** @addtogroup STM32L4xx_HAL_Driver
00050   * @{
00051   */
00052 
00053 /** @addtogroup SPI
00054   * @{
00055   */
00056 
00057 /* Exported types ------------------------------------------------------------*/
00058 /** @defgroup SPI_Exported_Types SPI Exported Types
00059   * @{
00060   */
00061 
00062 /**
00063   * @brief  SPI Configuration Structure definition
00064   */
00065 typedef struct
00066 {
00067   uint32_t Mode;                /*!< Specifies the SPI operating mode.
00068                                      This parameter can be a value of @ref SPI_Mode */
00069 
00070   uint32_t Direction;           /*!< Specifies the SPI bidirectional mode state.
00071                                      This parameter can be a value of @ref SPI_Direction */
00072 
00073   uint32_t DataSize;            /*!< Specifies the SPI data size.
00074                                      This parameter can be a value of @ref SPI_Data_Size */
00075 
00076   uint32_t CLKPolarity;         /*!< Specifies the serial clock steady state.
00077                                      This parameter can be a value of @ref SPI_Clock_Polarity */
00078 
00079   uint32_t CLKPhase;            /*!< Specifies the clock active edge for the bit capture.
00080                                      This parameter can be a value of @ref SPI_Clock_Phase */
00081 
00082   uint32_t NSS;                 /*!< Specifies whether the NSS signal is managed by
00083                                      hardware (NSS pin) or by software using the SSI bit.
00084                                      This parameter can be a value of @ref SPI_Slave_Select_management */
00085 
00086   uint32_t BaudRatePrescaler;   /*!< Specifies the Baud Rate prescaler value which will be
00087                                      used to configure the transmit and receive SCK clock.
00088                                      This parameter can be a value of @ref SPI_BaudRate_Prescaler
00089                                      @note The communication clock is derived from the master
00090                                      clock. The slave clock does not need to be set. */
00091 
00092   uint32_t FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
00093                                      This parameter can be a value of @ref SPI_MSB_LSB_transmission */
00094 
00095   uint32_t TIMode;              /*!< Specifies if the TI mode is enabled or not .
00096                                      This parameter can be a value of @ref SPI_TI_mode */
00097 
00098   uint32_t CRCCalculation;      /*!< Specifies if the CRC calculation is enabled or not.
00099                                      This parameter can be a value of @ref SPI_CRC_Calculation */
00100 
00101   uint32_t CRCPolynomial;       /*!< Specifies the polynomial used for the CRC calculation.
00102                                      This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
00103 
00104   uint32_t CRCLength;           /*!< Specifies the CRC Length used for the CRC calculation.
00105                                      CRC Length is only used with Data8 and Data16, not other data size
00106                                      This parameter can be a value of @ref SPI_CRC_length */
00107 
00108   uint32_t NSSPMode;            /*!< Specifies whether the NSSP signal is enabled or not .
00109                                      This parameter can be a value of @ref SPI_NSSP_Mode
00110                                      This mode is activated by the NSSP bit in the SPIx_CR2 register and
00111                                      it takes effect only if the SPI interface is configured as Motorola SPI
00112                                      master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
00113                                      CPOL setting is ignored).. */
00114 } SPI_InitTypeDef;
00115 
00116 /**
00117   * @brief  HAL State structures definition
00118   */
00119 typedef enum
00120 {
00121   HAL_SPI_STATE_RESET      = 0x00,    /*!< Peripheral not Initialized                         */
00122   HAL_SPI_STATE_READY      = 0x01,    /*!< Peripheral Initialized and ready for use           */
00123   HAL_SPI_STATE_BUSY       = 0x02,    /*!< an internal process is ongoing                     */
00124   HAL_SPI_STATE_BUSY_TX    = 0x03,    /*!< Data Transmission process is ongoing               */
00125   HAL_SPI_STATE_BUSY_RX    = 0x04,    /*!< Data Reception process is ongoing                  */
00126   HAL_SPI_STATE_BUSY_TX_RX = 0x05,    /*!< Data Transmission and Reception process is ongoing*/
00127   HAL_SPI_STATE_ERROR      = 0x06     /*!< SPI error state                                   */
00128 }HAL_SPI_StateTypeDef;
00129 
00130 /**
00131   * @brief  SPI handle Structure definition
00132   */
00133 typedef struct __SPI_HandleTypeDef
00134 {
00135   SPI_TypeDef                *Instance;      /*!< SPI registers base address               */
00136 
00137   SPI_InitTypeDef            Init;           /*!< SPI communication parameters             */
00138 
00139   uint8_t                    *pTxBuffPtr;    /*!< Pointer to SPI Tx transfer Buffer        */
00140 
00141   uint16_t                   TxXferSize;     /*!< SPI Tx Transfer size                     */
00142 
00143   uint16_t                   TxXferCount;    /*!< SPI Tx Transfer Counter                  */
00144 
00145   uint8_t                    *pRxBuffPtr;    /*!< Pointer to SPI Rx transfer Buffer        */
00146 
00147   uint16_t                   RxXferSize;     /*!< SPI Rx Transfer size                     */
00148 
00149   uint16_t                   RxXferCount;    /*!< SPI Rx Transfer Counter                  */
00150 
00151   uint32_t                   CRCSize;        /*!< SPI CRC size used for the transfer       */
00152 
00153   void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx IRQ handler */
00154 
00155   void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx IRQ handler */
00156 
00157   DMA_HandleTypeDef          *hdmatx;        /*!< SPI Tx DMA Handle parameters             */
00158 
00159   DMA_HandleTypeDef          *hdmarx;        /*!< SPI Rx DMA Handle parameters             */
00160 
00161   HAL_LockTypeDef            Lock;           /*!< Locking object                           */
00162 
00163   __IO HAL_SPI_StateTypeDef  State;          /*!< SPI communication state                  */
00164 
00165   __IO uint32_t              ErrorCode;      /*!< SPI Error code                           */
00166 
00167 }SPI_HandleTypeDef;
00168 
00169 /**
00170   * @}
00171   */
00172 
00173 /* Exported constants --------------------------------------------------------*/
00174 
00175 /** @defgroup SPI_Exported_Constants SPI Exported Constants
00176   * @{
00177   */
00178 
00179 /** @defgroup SPI_Error_Code SPI Error Code
00180   * @{
00181   */
00182 #define HAL_SPI_ERROR_NONE   (uint32_t)0x00000000  /*!< No error                          */
00183 #define HAL_SPI_ERROR_MODF   (uint32_t)0x00000001  /*!< MODF error                        */
00184 #define HAL_SPI_ERROR_CRC    (uint32_t)0x00000002  /*!< CRC error                         */
00185 #define HAL_SPI_ERROR_OVR    (uint32_t)0x00000004  /*!< OVR error                         */
00186 #define HAL_SPI_ERROR_FRE    (uint32_t)0x00000008  /*!< FRE error                         */
00187 #define HAL_SPI_ERROR_DMA    (uint32_t)0x00000010  /*!< DMA transfer error                */
00188 #define HAL_SPI_ERROR_FLAG   (uint32_t)0x00000020  /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
00189 #define HAL_SPI_ERROR_UNKNOW (uint32_t)0x00000040  /*!< Unknown error                     */
00190 /**
00191   * @}
00192   */
00193 
00194 
00195 /** @defgroup SPI_Mode SPI Mode
00196   * @{
00197   */
00198 #define SPI_MODE_SLAVE                  ((uint32_t)0x00000000)
00199 #define SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)
00200 /**
00201   * @}
00202   */
00203 
00204 /** @defgroup SPI_Direction SPI Direction Mode
00205   * @{
00206   */
00207 #define SPI_DIRECTION_2LINES            ((uint32_t)0x00000000)
00208 #define SPI_DIRECTION_2LINES_RXONLY     SPI_CR1_RXONLY
00209 #define SPI_DIRECTION_1LINE             SPI_CR1_BIDIMODE
00210 /**
00211   * @}
00212   */
00213 
00214 /** @defgroup SPI_Data_Size SPI Data Size
00215   * @{
00216   */
00217 #define SPI_DATASIZE_4BIT               ((uint32_t)0x0300)
00218 #define SPI_DATASIZE_5BIT               ((uint32_t)0x0400)
00219 #define SPI_DATASIZE_6BIT               ((uint32_t)0x0500)
00220 #define SPI_DATASIZE_7BIT               ((uint32_t)0x0600)
00221 #define SPI_DATASIZE_8BIT               ((uint32_t)0x0700)
00222 #define SPI_DATASIZE_9BIT               ((uint32_t)0x0800)
00223 #define SPI_DATASIZE_10BIT              ((uint32_t)0x0900)
00224 #define SPI_DATASIZE_11BIT              ((uint32_t)0x0A00)
00225 #define SPI_DATASIZE_12BIT              ((uint32_t)0x0B00)
00226 #define SPI_DATASIZE_13BIT              ((uint32_t)0x0C00)
00227 #define SPI_DATASIZE_14BIT              ((uint32_t)0x0D00)
00228 #define SPI_DATASIZE_15BIT              ((uint32_t)0x0E00)
00229 #define SPI_DATASIZE_16BIT              ((uint32_t)0x0F00)
00230 /**
00231   * @}
00232   */
00233 
00234 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
00235   * @{
00236   */
00237 #define SPI_POLARITY_LOW                ((uint32_t)0x00000000)
00238 #define SPI_POLARITY_HIGH               SPI_CR1_CPOL
00239 /**
00240   * @}
00241   */
00242 
00243 /** @defgroup SPI_Clock_Phase SPI Clock Phase
00244   * @{
00245   */
00246 #define SPI_PHASE_1EDGE                 ((uint32_t)0x00000000)
00247 #define SPI_PHASE_2EDGE                 SPI_CR1_CPHA
00248 /**
00249   * @}
00250   */
00251 
00252 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
00253   * @{
00254   */
00255 #define SPI_NSS_SOFT                    SPI_CR1_SSM
00256 #define SPI_NSS_HARD_INPUT              ((uint32_t)0x00000000)
00257 #define SPI_NSS_HARD_OUTPUT             ((uint32_t)0x00040000)
00258 /**
00259   * @}
00260   */
00261 
00262 /** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
00263   * @{
00264   */
00265 #define SPI_NSS_PULSE_ENABLE            SPI_CR2_NSSP
00266 #define SPI_NSS_PULSE_DISABLE           ((uint32_t)0x00000000)
00267 /**
00268   * @}
00269   */
00270 
00271 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
00272   * @{
00273   */
00274 #define SPI_BAUDRATEPRESCALER_2         ((uint32_t)0x00000000)
00275 #define SPI_BAUDRATEPRESCALER_4         ((uint32_t)0x00000008)
00276 #define SPI_BAUDRATEPRESCALER_8         ((uint32_t)0x00000010)
00277 #define SPI_BAUDRATEPRESCALER_16        ((uint32_t)0x00000018)
00278 #define SPI_BAUDRATEPRESCALER_32        ((uint32_t)0x00000020)
00279 #define SPI_BAUDRATEPRESCALER_64        ((uint32_t)0x00000028)
00280 #define SPI_BAUDRATEPRESCALER_128       ((uint32_t)0x00000030)
00281 #define SPI_BAUDRATEPRESCALER_256       ((uint32_t)0x00000038)
00282 /**
00283   * @}
00284   */
00285 
00286 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
00287   * @{
00288   */
00289 #define SPI_FIRSTBIT_MSB                ((uint32_t)0x00000000)
00290 #define SPI_FIRSTBIT_LSB                SPI_CR1_LSBFIRST
00291 /**
00292   * @}
00293   */
00294 
00295 /** @defgroup SPI_TI_mode SPI TI mode
00296   * @{
00297   */
00298 #define SPI_TIMODE_DISABLE              ((uint32_t)0x00000000)
00299 #define SPI_TIMODE_ENABLE               SPI_CR2_FRF
00300 /**
00301   * @}
00302   */
00303 
00304 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
00305   * @{
00306   */
00307 #define SPI_CRCCALCULATION_DISABLE      ((uint32_t)0x00000000)
00308 #define SPI_CRCCALCULATION_ENABLE       SPI_CR1_CRCEN
00309 /**
00310   * @}
00311   */
00312 
00313 /** @defgroup SPI_CRC_length SPI CRC Length
00314   * @{
00315   * This parameter can be one of the following values:
00316   *     SPI_CRC_LENGTH_DATASIZE: aligned with the data size
00317   *     SPI_CRC_LENGTH_8BIT    : CRC 8bit
00318   *     SPI_CRC_LENGTH_16BIT   : CRC 16bit
00319   */
00320 #define SPI_CRC_LENGTH_DATASIZE         ((uint32_t)0x00000000)
00321 #define SPI_CRC_LENGTH_8BIT             ((uint32_t)0x00000001)
00322 #define SPI_CRC_LENGTH_16BIT            ((uint32_t)0x00000002)
00323 /**
00324   * @}
00325   */
00326 
00327 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold
00328   * @{
00329   * This parameter can be one of the following values:
00330   *     SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
00331   *          RXNE event is generated if the FIFO
00332   *          level is greater or equal to 1/2(16-bits).
00333   *     SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
00334   *          level is greater or equal to 1/4(8 bits). */
00335 #define SPI_RXFIFO_THRESHOLD            SPI_CR2_FRXTH
00336 #define SPI_RXFIFO_THRESHOLD_QF         SPI_CR2_FRXTH
00337 #define SPI_RXFIFO_THRESHOLD_HF         ((uint32_t)0x00000000)
00338 
00339 /**
00340   * @}
00341   */
00342 
00343 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
00344   * @brief SPI Interrupt definition
00345   *        Elements values convention: 0xXXXXXXXX
00346   *           - XXXXXXXX  : Interrupt control mask
00347   * @{
00348   */
00349 #define SPI_IT_TXE                      SPI_CR2_TXEIE
00350 #define SPI_IT_RXNE                     SPI_CR2_RXNEIE
00351 #define SPI_IT_ERR                      SPI_CR2_ERRIE
00352 /**
00353   * @}
00354   */
00355 
00356 
00357 /** @defgroup SPI_Flag_definition SPI Flag definition
00358   * @brief Flag definition
00359   *        Elements values convention: 0xXXXXYYYY
00360   *           - XXXX  : Flag register Index
00361   *           - YYYY  : Flag mask
00362   * @{
00363   */
00364 #define SPI_FLAG_RXNE                   SPI_SR_RXNE   /* SPI status flag: Rx buffer not empty flag */
00365 #define SPI_FLAG_TXE                    SPI_SR_TXE    /* SPI status flag: Tx buffer empty flag */
00366 #define SPI_FLAG_BSY                    SPI_SR_BSY    /* SPI status flag: Busy flag */
00367 #define SPI_FLAG_CRCERR                 SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
00368 #define SPI_FLAG_MODF                   SPI_SR_MODF   /* SPI Error flag: Mode fault flag */
00369 #define SPI_FLAG_OVR                    SPI_SR_OVR    /* SPI Error flag: Overrun flag */
00370 #define SPI_FLAG_FRE                    SPI_SR_FRE    /* SPI Error flag: TI mode frame format error flag */
00371 #define SPI_FLAG_FTLVL                  SPI_SR_FTLVL  /* SPI fifo transmission level */
00372 #define SPI_FLAG_FRLVL                  SPI_SR_FRLVL  /* SPI fifo reception level */
00373 /**
00374   * @}
00375   */
00376 
00377 /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
00378   * @{
00379   */
00380 #define SPI_FTLVL_EMPTY           ((uint32_t)0x0000)
00381 #define SPI_FTLVL_QUARTER_FULL    ((uint32_t)0x0800)
00382 #define SPI_FTLVL_HALF_FULL       ((uint32_t)0x1000)
00383 #define SPI_FTLVL_FULL            ((uint32_t)0x1800)
00384 
00385 /**
00386   * @}
00387   */
00388 
00389 /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
00390   * @{
00391   */
00392 #define SPI_FRLVL_EMPTY           ((uint32_t)0x0000)
00393 #define SPI_FRLVL_QUARTER_FULL    ((uint32_t)0x0200)
00394 #define SPI_FRLVL_HALF_FULL       ((uint32_t)0x0400)
00395 #define SPI_FRLVL_FULL            ((uint32_t)0x0600)
00396 /**
00397   * @}
00398   */
00399 
00400 /**
00401   * @}
00402   */
00403 
00404 /* Exported macros ------------------------------------------------------------*/
00405 /** @defgroup SPI_Exported_Macros SPI Exported Macros
00406   * @{
00407   */
00408 
00409 /** @brief  Reset SPI handle state.
00410   * @param  __HANDLE__: SPI handle.
00411   * @retval None
00412   */
00413 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
00414 
00415 /** @brief  Enable or disable the specified SPI interrupts.
00416   * @param  __HANDLE__: specifies the SPI Handle.
00417   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00418   * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
00419   *        This parameter can be one of the following values:
00420   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
00421   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
00422   *            @arg SPI_IT_ERR: Error interrupt enable
00423   * @retval None
00424   */
00425 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
00426 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
00427 
00428 /** @brief  Check whether the specified SPI interrupt source is enabled or not.
00429   * @param  __HANDLE__: specifies the SPI Handle.
00430   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00431   * @param  __INTERRUPT__: specifies the SPI interrupt source to check.
00432   *          This parameter can be one of the following values:
00433   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
00434   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
00435   *            @arg SPI_IT_ERR: Error interrupt enable
00436   * @retval The new state of __IT__ (TRUE or FALSE).
00437   */
00438 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
00439 
00440 /** @brief  Check whether the specified SPI flag is set or not.
00441   * @param  __HANDLE__: specifies the SPI Handle.
00442   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00443   * @param  __FLAG__: specifies the flag to check.
00444   *        This parameter can be one of the following values:
00445   *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
00446   *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
00447   *            @arg SPI_FLAG_CRCERR: CRC error flag
00448   *            @arg SPI_FLAG_MODF: Mode fault flag
00449   *            @arg SPI_FLAG_OVR: Overrun flag
00450   *            @arg SPI_FLAG_BSY: Busy flag
00451   *            @arg SPI_FLAG_FRE: Frame format error flag
00452   *            @arg SPI_FLAG_FTLVL: SPI fifo transmission level
00453   *            @arg SPI_FLAG_FRLVL: SPI fifo reception level
00454   * @retval The new state of __FLAG__ (TRUE or FALSE).
00455   */
00456 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
00457 
00458 /** @brief  Clear the SPI CRCERR pending flag.
00459   * @param  __HANDLE__: specifies the SPI Handle.
00460   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00461   * @retval None
00462   */
00463 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
00464 
00465 /** @brief  Clear the SPI MODF pending flag.
00466   * @param  __HANDLE__: specifies the SPI Handle.
00467   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00468   *
00469   * @retval None
00470   */
00471 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)        \
00472    do{                                              \
00473      __IO uint32_t tmpreg;                          \
00474      tmpreg = (__HANDLE__)->Instance->SR;           \
00475      (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
00476      UNUSED(tmpreg);                                \
00477    } while(0)
00478 
00479 /** @brief  Clear the SPI OVR pending flag.
00480   * @param  __HANDLE__: specifies the SPI Handle.
00481   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00482   *
00483   * @retval None
00484   */
00485 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)         \
00486    do{                                              \
00487      __IO uint32_t tmpreg;                          \
00488      tmpreg = (__HANDLE__)->Instance->DR;           \
00489      tmpreg = (__HANDLE__)->Instance->SR;           \
00490      UNUSED(tmpreg);                                \
00491    } while(0)
00492 
00493 /** @brief  Clear the SPI FRE pending flag.
00494   * @param  __HANDLE__: specifies the SPI Handle.
00495   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00496   *
00497   * @retval None
00498   */
00499 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__)         \
00500    do{                                              \
00501      __IO uint32_t tmpreg;                          \
00502      tmpreg = (__HANDLE__)->Instance->SR;           \
00503      UNUSED(tmpreg);                                \
00504    } while(0)
00505 
00506 /** @brief  Enable the SPI peripheral.
00507   * @param  __HANDLE__: specifies the SPI Handle.
00508   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00509   * @retval None
00510   */
00511 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |=  SPI_CR1_SPE)
00512 
00513 /** @brief  Disable the SPI peripheral.
00514   * @param  __HANDLE__: specifies the SPI Handle.
00515   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00516   * @retval None
00517   */
00518 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
00519 
00520 /**
00521   * @}
00522   */
00523 
00524 /* Private macros --------------------------------------------------------*/
00525 /** @defgroup SPI_Private_Macros   SPI Private Macros
00526   * @{
00527   */
00528 
00529 /** @brief  Set the SPI transmit-only mode.
00530   * @param  __HANDLE__: specifies the SPI Handle.
00531   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00532   * @retval None
00533   */
00534 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
00535 
00536 /** @brief  Set the SPI receive-only mode.
00537   * @param  __HANDLE__: specifies the SPI Handle.
00538   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00539   * @retval None
00540   */
00541 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
00542 
00543 /** @brief  Reset the CRC calculation of the SPI.
00544   * @param  __HANDLE__: specifies the SPI Handle.
00545   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
00546   * @retval None
00547   */
00548 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
00549                                      (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
00550 
00551 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
00552                            ((MODE) == SPI_MODE_MASTER))
00553 
00554 #define IS_SPI_DIRECTION(MODE)   (((MODE) == SPI_DIRECTION_2LINES) || \
00555                                   ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
00556                                   ((MODE) == SPI_DIRECTION_1LINE))
00557 
00558 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
00559 
00560 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
00561                                                  ((MODE) == SPI_DIRECTION_1LINE))
00562 
00563 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
00564                                    ((DATASIZE) == SPI_DATASIZE_15BIT) || \
00565                                    ((DATASIZE) == SPI_DATASIZE_14BIT) || \
00566                                    ((DATASIZE) == SPI_DATASIZE_13BIT) || \
00567                                    ((DATASIZE) == SPI_DATASIZE_12BIT) || \
00568                                    ((DATASIZE) == SPI_DATASIZE_11BIT) || \
00569                                    ((DATASIZE) == SPI_DATASIZE_10BIT) || \
00570                                    ((DATASIZE) == SPI_DATASIZE_9BIT)  || \
00571                                    ((DATASIZE) == SPI_DATASIZE_8BIT)  || \
00572                                    ((DATASIZE) == SPI_DATASIZE_7BIT)  || \
00573                                    ((DATASIZE) == SPI_DATASIZE_6BIT)  || \
00574                                    ((DATASIZE) == SPI_DATASIZE_5BIT)  || \
00575                                    ((DATASIZE) == SPI_DATASIZE_4BIT))
00576 
00577 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
00578                            ((CPOL) == SPI_POLARITY_HIGH))
00579 
00580 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
00581                            ((CPHA) == SPI_PHASE_2EDGE))
00582 
00583 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
00584                          ((NSS) == SPI_NSS_HARD_INPUT) || \
00585                          ((NSS) == SPI_NSS_HARD_OUTPUT))
00586 
00587 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
00588                            ((NSSP) == SPI_NSS_PULSE_DISABLE))
00589 
00590 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
00591                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
00592                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
00593                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
00594                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
00595                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
00596                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
00597                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
00598 
00599 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
00600                                ((BIT) == SPI_FIRSTBIT_LSB))
00601 
00602 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
00603                              ((MODE) == SPI_TIMODE_ENABLE))
00604 
00605 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
00606                                              ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
00607 
00608 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
00609                                    ((LENGTH) == SPI_CRC_LENGTH_8BIT)  ||   \
00610                                    ((LENGTH) == SPI_CRC_LENGTH_16BIT))
00611 
00612 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
00613 
00614 
00615 /**
00616   * @}
00617   */
00618 
00619 /* Include SPI HAL Extended module */
00620 #include "stm32l4xx_hal_spi_ex.h"
00621 
00622 /* Exported functions --------------------------------------------------------*/
00623 /** @addtogroup SPI_Exported_Functions
00624   * @{
00625   */
00626 
00627 /* Initialization and de-initialization functions  ****************************/
00628 /** @addtogroup SPI_Exported_Functions_Group1
00629   * @{
00630   */
00631 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
00632 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
00633 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
00634 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
00635 /**
00636   * @}
00637   */
00638 
00639 /* IO operation functions *****************************************************/
00640 /** @addtogroup SPI_Exported_Functions_Group2
00641   * @{
00642   */
00643 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
00644 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
00645 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
00646 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
00647 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
00648 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
00649 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
00650 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
00651 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
00652 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
00653 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
00654 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
00655 
00656 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
00657 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
00658 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
00659 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
00660 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
00661 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
00662 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
00663 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
00664 /**
00665   * @}
00666   */
00667 
00668 /* Peripheral State and Error functions ***************************************/
00669 /** @addtogroup SPI_Exported_Functions_Group3
00670   * @{
00671   */
00672 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
00673 uint32_t             HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
00674 /**
00675   * @}
00676   */
00677 
00678 /**
00679   * @}
00680   */
00681 
00682 /**
00683   * @}
00684   */
00685 
00686 /**
00687   * @}
00688   */
00689 
00690 #ifdef __cplusplus
00691 }
00692 #endif
00693 
00694 #endif /* __STM32L4xx_HAL_SPI_H */
00695 
00696 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/