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stm32l4xx_hal_pcd.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_pcd.h 00004 * @author MCD Application Team 00005 * @version V1.5.1 00006 * @date 31-May-2016 00007 * @brief Header file of PCD HAL module. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 00012 * 00013 * Redistribution and use in source and binary forms, with or without modification, 00014 * are permitted provided that the following conditions are met: 00015 * 1. Redistributions of source code must retain the above copyright notice, 00016 * this list of conditions and the following disclaimer. 00017 * 2. Redistributions in binary form must reproduce the above copyright notice, 00018 * this list of conditions and the following disclaimer in the documentation 00019 * and/or other materials provided with the distribution. 00020 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00021 * may be used to endorse or promote products derived from this software 00022 * without specific prior written permission. 00023 * 00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00027 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00028 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00029 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00030 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00031 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00032 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00034 * 00035 ****************************************************************************** 00036 */ 00037 00038 /* Define to prevent recursive inclusion -------------------------------------*/ 00039 #ifndef __STM32L4xx_HAL_PCD_H 00040 #define __STM32L4xx_HAL_PCD_H 00041 00042 #ifdef __cplusplus 00043 extern "C" { 00044 #endif 00045 00046 #if defined(STM32L475xx) || defined(STM32L476xx) || \ 00047 defined(STM32L485xx) || defined(STM32L486xx) || \ 00048 defined(STM32L432xx) || defined(STM32L433xx) || \ 00049 defined(STM32L442xx) || defined(STM32L443xx) 00050 00051 /* Includes ------------------------------------------------------------------*/ 00052 #include "stm32l4xx_ll_usb.h" 00053 00054 /** @addtogroup STM32L4xx_HAL_Driver 00055 * @{ 00056 */ 00057 00058 /** @addtogroup PCD 00059 * @{ 00060 */ 00061 00062 /* Exported types ------------------------------------------------------------*/ 00063 /** @defgroup PCD_Exported_Types PCD Exported Types 00064 * @{ 00065 */ 00066 00067 /** 00068 * @brief PCD State structure definition 00069 */ 00070 typedef enum 00071 { 00072 HAL_PCD_STATE_RESET = 0x00, 00073 HAL_PCD_STATE_READY = 0x01, 00074 HAL_PCD_STATE_ERROR = 0x02, 00075 HAL_PCD_STATE_BUSY = 0x03, 00076 HAL_PCD_STATE_TIMEOUT = 0x04 00077 } PCD_StateTypeDef; 00078 00079 /* Device LPM suspend state */ 00080 typedef enum 00081 { 00082 LPM_L0 = 0x00, /* on */ 00083 LPM_L1 = 0x01, /* LPM L1 sleep */ 00084 LPM_L2 = 0x02, /* suspend */ 00085 LPM_L3 = 0x03, /* off */ 00086 }PCD_LPM_StateTypeDef; 00087 00088 #if defined (USB) 00089 /** 00090 * @brief PCD double buffered endpoint direction 00091 */ 00092 typedef enum 00093 { 00094 PCD_EP_DBUF_OUT, 00095 PCD_EP_DBUF_IN, 00096 PCD_EP_DBUF_ERR, 00097 }PCD_EP_DBUF_DIR; 00098 00099 /** 00100 * @brief PCD endpoint buffer number 00101 */ 00102 typedef enum 00103 { 00104 PCD_EP_NOBUF, 00105 PCD_EP_BUF0, 00106 PCD_EP_BUF1 00107 }PCD_EP_BUF_NUM; 00108 #endif /* USB */ 00109 00110 #if defined (USB_OTG_FS) 00111 typedef USB_OTG_GlobalTypeDef PCD_TypeDef; 00112 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; 00113 typedef USB_OTG_EPTypeDef PCD_EPTypeDef; 00114 #endif /* USB_OTG_FS */ 00115 00116 #if defined (USB) 00117 typedef USB_TypeDef PCD_TypeDef; 00118 typedef USB_CfgTypeDef PCD_InitTypeDef; 00119 typedef USB_EPTypeDef PCD_EPTypeDef; 00120 #endif /* USB */ 00121 typedef struct 00122 { 00123 HAL_LockTypeDef Lock; 00124 } PCD_EPLockDef; 00125 00126 /** 00127 * @brief PCD Handle Structure definition 00128 */ 00129 typedef struct 00130 { 00131 PCD_TypeDef *Instance; /*!< Register base address */ 00132 PCD_InitTypeDef Init; /*!< PCD required parameters */ 00133 __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */ 00134 PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */ 00135 PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */ 00136 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ 00137 PCD_EPLockDef EPLock[15]; 00138 __IO PCD_StateTypeDef State; /*!< PCD communication state */ 00139 uint32_t Setup[12]; /*!< Setup packet buffer */ 00140 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ 00141 uint32_t BESL; 00142 00143 00144 uint32_t lpm_active; /*!< Enable or disable the Link Power Management . 00145 This parameter can be set to ENABLE or DISABLE */ 00146 00147 uint32_t battery_charging_active; /*!< Enable or disable Battery charging. 00148 This parameter can be set to ENABLE or DISABLE */ 00149 void *pData; /*!< Pointer to upper stack Handler */ 00150 00151 } PCD_HandleTypeDef; 00152 00153 /** 00154 * @} 00155 */ 00156 00157 /* Include PCD HAL Extended module */ 00158 #include "stm32l4xx_hal_pcd_ex.h" 00159 00160 /* Exported constants --------------------------------------------------------*/ 00161 /** @defgroup PCD_Exported_Constants PCD Exported Constants 00162 * @{ 00163 */ 00164 00165 /** @defgroup PCD_Speed PCD Speed 00166 * @{ 00167 */ 00168 #define PCD_SPEED_FULL 1 00169 /** 00170 * @} 00171 */ 00172 00173 /** @defgroup PCD_PHY_Module PCD PHY Module 00174 * @{ 00175 */ 00176 #define PCD_PHY_EMBEDDED 1 00177 /** 00178 * @} 00179 */ 00180 00181 /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value 00182 * @{ 00183 */ 00184 #ifndef USBD_FS_TRDT_VALUE 00185 #define USBD_FS_TRDT_VALUE 5 00186 #endif /* USBD_FS_TRDT_VALUE */ 00187 /** 00188 * @} 00189 */ 00190 00191 /** 00192 * @} 00193 */ 00194 00195 /* Exported macros -----------------------------------------------------------*/ 00196 /** @defgroup PCD_Exported_Macros PCD Exported Macros 00197 * @brief macros to handle interrupts and specific clock configurations 00198 * @{ 00199 */ 00200 #if defined (USB_OTG_FS) 00201 #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) 00202 #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) 00203 00204 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 00205 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) 00206 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0) 00207 00208 00209 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ 00210 ~(USB_OTG_PCGCCTL_STOPCLK) 00211 00212 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK 00213 00214 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10) 00215 00216 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE 00217 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) 00218 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE) 00219 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE 00220 00221 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\ 00222 EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ 00223 EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ 00224 } while(0) 00225 00226 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\ 00227 EXTI->FTSR1 |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\ 00228 EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ 00229 } while(0) 00230 00231 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\ 00232 EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ 00233 EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ 00234 EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ 00235 EXTI->FTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ 00236 } while(0) 00237 00238 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_OTG_FS_WAKEUP_EXTI_LINE) 00239 00240 #endif /* USB_OTG_FS */ 00241 00242 #if defined (USB) 00243 #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) 00244 #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) 00245 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 00246 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) 00247 00248 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE 00249 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) 00250 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE) 00251 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE 00252 00253 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\ 00254 EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ 00255 EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\ 00256 } while(0) 00257 00258 #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\ 00259 EXTI->FTSR1 |= (USB_WAKEUP_EXTI_LINE);\ 00260 EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ 00261 } while(0) 00262 00263 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\ 00264 EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ 00265 EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ 00266 EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\ 00267 EXTI->FTSR1 |= USB_WAKEUP_EXTI_LINE;\ 00268 } while(0) 00269 00270 #define __HAL_USB_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_WAKEUP_EXTI_LINE) 00271 00272 #endif /* USB */ 00273 00274 /** 00275 * @} 00276 */ 00277 00278 /** @addtogroup PCD_Exported_Functions PCD Exported Functions 00279 * @{ 00280 */ 00281 00282 /* Initialization/de-initialization functions ********************************/ 00283 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 00284 * @{ 00285 */ 00286 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); 00287 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); 00288 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); 00289 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); 00290 /** 00291 * @} 00292 */ 00293 00294 /* I/O operation functions ***************************************************/ 00295 /* Non-Blocking mode: Interrupt */ 00296 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions 00297 * @{ 00298 */ 00299 /* Non-Blocking mode: Interrupt */ 00300 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); 00301 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); 00302 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); 00303 00304 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00305 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00306 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); 00307 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); 00308 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); 00309 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); 00310 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); 00311 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00312 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00313 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); 00314 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); 00315 /** 00316 * @} 00317 */ 00318 00319 /* Peripheral Control functions **********************************************/ 00320 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions 00321 * @{ 00322 */ 00323 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); 00324 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); 00325 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); 00326 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); 00327 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00328 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 00329 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 00330 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00331 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00332 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00333 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00334 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 00335 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 00336 /** 00337 * @} 00338 */ 00339 00340 /* Peripheral State functions ************************************************/ 00341 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions 00342 * @{ 00343 */ 00344 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); 00345 /** 00346 * @} 00347 */ 00348 00349 /** 00350 * @} 00351 */ 00352 00353 /* Private constants ---------------------------------------------------------*/ 00354 /** @defgroup PCD_Private_Constants PCD Private Constants 00355 * @{ 00356 */ 00357 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt 00358 * @{ 00359 */ 00360 #if defined (USB_OTG_FS) 00361 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08) 00362 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C) 00363 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10) 00364 00365 #define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17 Connected to the USB EXTI Line */ 00366 #endif /* USB_OTG_FS */ 00367 00368 #if defined (USB) 00369 #define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17Connected to the USB EXTI Line */ 00370 #endif /* USB */ 00371 00372 /** 00373 * @} 00374 */ 00375 00376 #if defined (USB) 00377 /** @defgroup PCD_EP0_MPS PCD EP0 MPS 00378 * @{ 00379 */ 00380 #define PCD_EP0MPS_64 DEP0CTL_MPS_64 00381 #define PCD_EP0MPS_32 DEP0CTL_MPS_32 00382 #define PCD_EP0MPS_16 DEP0CTL_MPS_16 00383 #define PCD_EP0MPS_08 DEP0CTL_MPS_8 00384 /** 00385 * @} 00386 */ 00387 00388 /** @defgroup PCD_ENDP PCD ENDP 00389 * @{ 00390 */ 00391 #define PCD_ENDP0 ((uint8_t)0) 00392 #define PCD_ENDP1 ((uint8_t)1) 00393 #define PCD_ENDP2 ((uint8_t)2) 00394 #define PCD_ENDP3 ((uint8_t)3) 00395 #define PCD_ENDP4 ((uint8_t)4) 00396 #define PCD_ENDP5 ((uint8_t)5) 00397 #define PCD_ENDP6 ((uint8_t)6) 00398 #define PCD_ENDP7 ((uint8_t)7) 00399 /** 00400 * @} 00401 */ 00402 00403 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind 00404 * @{ 00405 */ 00406 #define PCD_SNG_BUF 0 00407 #define PCD_DBL_BUF 1 00408 /** 00409 * @} 00410 */ 00411 #endif /* USB */ 00412 /** 00413 * @} 00414 */ 00415 00416 /* Private macros ------------------------------------------------------------*/ 00417 /** @addtogroup PCD_Private_Macros PCD Private Macros 00418 * @{ 00419 */ 00420 #if defined (USB) 00421 /* SetENDPOINT */ 00422 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue)) 00423 00424 /* GetENDPOINT */ 00425 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2)) 00426 00427 /* ENDPOINT transfer */ 00428 #define USB_EP0StartXfer USB_EPStartXfer 00429 00430 /** 00431 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) 00432 * @param USBx: USB peripheral instance register address. 00433 * @param bEpNum: Endpoint Number. 00434 * @param wType: Endpoint Type. 00435 * @retval None 00436 */ 00437 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ 00438 ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) ))) 00439 00440 /** 00441 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) 00442 * @param USBx: USB peripheral instance register address. 00443 * @param bEpNum: Endpoint Number. 00444 * @retval Endpoint Type 00445 */ 00446 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) 00447 00448 /** 00449 * @brief free buffer used from the application realizing it to the line 00450 toggles bit SW_BUF in the double buffered endpoint register 00451 * @param USBx: USB peripheral instance register address. 00452 * @param bEpNum: Endpoint Number. 00453 * @param bDir: Direction 00454 * @retval None 00455 */ 00456 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ 00457 {\ 00458 if ((bDir) == PCD_EP_DBUF_OUT)\ 00459 { /* OUT double buffered endpoint */\ 00460 PCD_TX_DTOG((USBx), (bEpNum));\ 00461 }\ 00462 else if ((bDir) == PCD_EP_DBUF_IN)\ 00463 { /* IN double buffered endpoint */\ 00464 PCD_RX_DTOG((USBx), (bEpNum));\ 00465 }\ 00466 } 00467 00468 /** 00469 * @brief gets direction of the double buffered endpoint 00470 * @param USBx: USB peripheral instance register address. 00471 * @param bEpNum: Endpoint Number. 00472 * @retval EP_DBUF_OUT, EP_DBUF_IN, 00473 * EP_DBUF_ERR if the endpoint counter not yet programmed. 00474 */ 00475 #define PCD_GET_DB_DIR(USBx, bEpNum)\ 00476 {\ 00477 if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\ 00478 return(PCD_EP_DBUF_OUT);\ 00479 else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\ 00480 return(PCD_EP_DBUF_IN);\ 00481 else\ 00482 return(PCD_EP_DBUF_ERR);\ 00483 } 00484 00485 /** 00486 * @brief sets the status for tx transfer (bits STAT_TX[1:0]). 00487 * @param USBx: USB peripheral instance register address. 00488 * @param bEpNum: Endpoint Number. 00489 * @param wState: new state 00490 * @retval None 00491 */ 00492 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\ 00493 \ 00494 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\ 00495 /* toggle first bit ? */ \ 00496 if((USB_EPTX_DTOG1 & (wState))!= 0)\ 00497 { \ 00498 _wRegVal ^= USB_EPTX_DTOG1; \ 00499 } \ 00500 /* toggle second bit ? */ \ 00501 if((USB_EPTX_DTOG2 & (wState))!= 0) \ 00502 { \ 00503 _wRegVal ^= USB_EPTX_DTOG2; \ 00504 } \ 00505 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\ 00506 } /* PCD_SET_EP_TX_STATUS */ 00507 00508 /** 00509 * @brief sets the status for rx transfer (bits STAT_TX[1:0]) 00510 * @param USBx: USB peripheral instance register address. 00511 * @param bEpNum: Endpoint Number. 00512 * @param wState: new state 00513 * @retval None 00514 */ 00515 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ 00516 register uint16_t _wRegVal; \ 00517 \ 00518 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\ 00519 /* toggle first bit ? */ \ 00520 if((USB_EPRX_DTOG1 & (wState))!= 0) \ 00521 { \ 00522 _wRegVal ^= USB_EPRX_DTOG1; \ 00523 } \ 00524 /* toggle second bit ? */ \ 00525 if((USB_EPRX_DTOG2 & (wState))!= 0) \ 00526 { \ 00527 _wRegVal ^= USB_EPRX_DTOG2; \ 00528 } \ 00529 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ 00530 } /* PCD_SET_EP_RX_STATUS */ 00531 00532 /** 00533 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) 00534 * @param USBx: USB peripheral instance register address. 00535 * @param bEpNum: Endpoint Number. 00536 * @param wStaterx: new state. 00537 * @param wStatetx: new state. 00538 * @retval None 00539 */ 00540 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\ 00541 register uint32_t _wRegVal; \ 00542 \ 00543 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\ 00544 /* toggle first bit ? */ \ 00545 if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \ 00546 { \ 00547 _wRegVal ^= USB_EPRX_DTOG1; \ 00548 } \ 00549 /* toggle second bit ? */ \ 00550 if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \ 00551 { \ 00552 _wRegVal ^= USB_EPRX_DTOG2; \ 00553 } \ 00554 /* toggle first bit ? */ \ 00555 if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \ 00556 { \ 00557 _wRegVal ^= USB_EPTX_DTOG1; \ 00558 } \ 00559 /* toggle second bit ? */ \ 00560 if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \ 00561 { \ 00562 _wRegVal ^= USB_EPTX_DTOG2; \ 00563 } \ 00564 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ 00565 } /* PCD_SET_EP_TXRX_STATUS */ 00566 00567 /** 00568 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] 00569 * /STAT_RX[1:0]) 00570 * @param USBx: USB peripheral instance register address. 00571 * @param bEpNum: Endpoint Number. 00572 * @retval status 00573 */ 00574 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) 00575 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) 00576 00577 /** 00578 * @brief sets directly the VALID tx/rx-status into the endpoint register 00579 * @param USBx: USB peripheral instance register address. 00580 * @param bEpNum: Endpoint Number. 00581 * @retval None 00582 */ 00583 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) 00584 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) 00585 00586 /** 00587 * @brief checks stall condition in an endpoint. 00588 * @param USBx: USB peripheral instance register address. 00589 * @param bEpNum: Endpoint Number. 00590 * @retval TRUE = endpoint in stall condition. 00591 */ 00592 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ 00593 == USB_EP_TX_STALL) 00594 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ 00595 == USB_EP_RX_STALL) 00596 00597 /** 00598 * @brief set & clear EP_KIND bit. 00599 * @param USBx: USB peripheral instance register address. 00600 * @param bEpNum: Endpoint Number. 00601 * @retval None 00602 */ 00603 #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ 00604 (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK)))) 00605 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ 00606 (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK)))) 00607 00608 /** 00609 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. 00610 * @param USBx: USB peripheral instance register address. 00611 * @param bEpNum: Endpoint Number. 00612 * @retval None 00613 */ 00614 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 00615 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 00616 00617 /** 00618 * @brief Sets/clears directly EP_KIND bit in the endpoint register. 00619 * @param USBx: USB peripheral instance register address. 00620 * @param bEpNum: Endpoint Number. 00621 * @retval None 00622 */ 00623 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 00624 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 00625 00626 /** 00627 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. 00628 * @param USBx: USB peripheral instance register address. 00629 * @param bEpNum: Endpoint Number. 00630 * @retval None 00631 */ 00632 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ 00633 PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK)) 00634 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ 00635 PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK)) 00636 00637 /** 00638 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. 00639 * @param USBx: USB peripheral instance register address. 00640 * @param bEpNum: Endpoint Number. 00641 * @retval None 00642 */ 00643 #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ 00644 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) 00645 #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ 00646 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) 00647 00648 /** 00649 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. 00650 * @param USBx: USB peripheral instance register address. 00651 * @param bEpNum: Endpoint Number. 00652 * @retval None 00653 */ 00654 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\ 00655 { \ 00656 PCD_RX_DTOG((USBx), (bEpNum)); \ 00657 } 00658 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\ 00659 { \ 00660 PCD_TX_DTOG((USBx), (bEpNum)); \ 00661 } 00662 00663 /** 00664 * @brief Sets address in an endpoint register. 00665 * @param USBx: USB peripheral instance register address. 00666 * @param bEpNum: Endpoint Number. 00667 * @param bAddr: Address. 00668 * @retval None 00669 */ 00670 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ 00671 USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr)) 00672 00673 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) 00674 00675 #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400))) 00676 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400))) 00677 #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400))) 00678 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400))) 00679 00680 #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\ 00681 uint16_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \ 00682 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ 00683 } 00684 00685 /** 00686 * @brief sets address of the tx/rx buffer. 00687 * @param USBx: USB peripheral instance register address. 00688 * @param bEpNum: Endpoint Number. 00689 * @param wAddr: address to be set (must be word aligned). 00690 * @retval None 00691 */ 00692 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) 00693 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) 00694 00695 /** 00696 * @brief Gets address of the tx/rx buffer. 00697 * @param USBx: USB peripheral instance register address. 00698 * @param bEpNum: Endpoint Number. 00699 * @retval address of the buffer. 00700 */ 00701 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) 00702 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) 00703 00704 /** 00705 * @brief Sets counter of rx buffer with no. of blocks. 00706 * @param dwReg: Register 00707 * @param wCount: Counter. 00708 * @param wNBlocks: no. of Blocks. 00709 * @retval None 00710 */ 00711 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ 00712 (wNBlocks) = (wCount) >> 5;\ 00713 if(((wCount) & 0x1f) == 0)\ 00714 { \ 00715 (wNBlocks)--;\ 00716 } \ 00717 *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \ 00718 }/* PCD_CALC_BLK32 */ 00719 00720 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ 00721 (wNBlocks) = (wCount) >> 1;\ 00722 if(((wCount) & 0x1) != 0)\ 00723 { \ 00724 (wNBlocks)++;\ 00725 } \ 00726 *pdwReg = (uint16_t)((wNBlocks) << 10);\ 00727 }/* PCD_CALC_BLK2 */ 00728 00729 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ 00730 uint16_t wNBlocks;\ 00731 if((wCount) > 62) \ 00732 { \ 00733 PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \ 00734 } \ 00735 else \ 00736 { \ 00737 PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \ 00738 } \ 00739 }/* PCD_SET_EP_CNT_RX_REG */ 00740 00741 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\ 00742 uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \ 00743 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ 00744 } 00745 00746 /** 00747 * @brief sets counter for the tx/rx buffer. 00748 * @param USBx: USB peripheral instance register address. 00749 * @param bEpNum: Endpoint Number. 00750 * @param wCount: Counter value. 00751 * @retval None 00752 */ 00753 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) 00754 00755 00756 /** 00757 * @brief gets counter of the tx buffer. 00758 * @param USBx: USB peripheral instance register address. 00759 * @param bEpNum: Endpoint Number. 00760 * @retval Counter value 00761 */ 00762 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff) 00763 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff) 00764 00765 /** 00766 * @brief Sets buffer 0/1 address in a double buffer endpoint. 00767 * @param USBx: USB peripheral instance register address. 00768 * @param bEpNum: Endpoint Number. 00769 * @param wBuf0Addr: buffer 0 address. 00770 * @retval Counter value 00771 */ 00772 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));} 00773 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));} 00774 00775 /** 00776 * @brief Sets addresses in a double buffer endpoint. 00777 * @param USBx: USB peripheral instance register address. 00778 * @param bEpNum: Endpoint Number. 00779 * @param wBuf0Addr: buffer 0 address. 00780 * @param wBuf1Addr = buffer 1 address. 00781 * @retval None 00782 */ 00783 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ 00784 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\ 00785 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\ 00786 } /* PCD_SET_EP_DBUF_ADDR */ 00787 00788 /** 00789 * @brief Gets buffer 0/1 address of a double buffer endpoint. 00790 * @param USBx: USB peripheral instance register address. 00791 * @param bEpNum: Endpoint Number. 00792 * @retval None 00793 */ 00794 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) 00795 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) 00796 00797 /** 00798 * @brief Gets buffer 0/1 address of a double buffer endpoint. 00799 * @param USBx: USB peripheral instance register address. 00800 * @param bEpNum: Endpoint Number. 00801 * @param bDir: endpoint dir EP_DBUF_OUT = OUT 00802 * EP_DBUF_IN = IN 00803 * @param wCount: Counter value 00804 * @retval None 00805 */ 00806 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ 00807 if((bDir) == PCD_EP_DBUF_OUT)\ 00808 /* OUT endpoint */ \ 00809 {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \ 00810 else if((bDir) == PCD_EP_DBUF_IN)\ 00811 /* IN endpoint */ \ 00812 *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ 00813 } /* SetEPDblBuf0Count*/ 00814 00815 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ 00816 if((bDir) == PCD_EP_DBUF_OUT)\ 00817 {/* OUT endpoint */ \ 00818 PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \ 00819 } \ 00820 else if((bDir) == PCD_EP_DBUF_IN)\ 00821 {/* IN endpoint */ \ 00822 *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ 00823 } \ 00824 } /* SetEPDblBuf1Count */ 00825 00826 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\ 00827 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 00828 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 00829 } /* PCD_SET_EP_DBUF_CNT */ 00830 00831 /** 00832 * @brief Gets buffer 0/1 rx/tx counter for double buffering. 00833 * @param USBx: USB peripheral instance register address. 00834 * @param bEpNum: Endpoint Number. 00835 * @retval None 00836 */ 00837 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) 00838 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) 00839 00840 #endif /* USB */ 00841 00842 #if defined(STM32L432xx) || defined(STM32L433xx) || \ 00843 defined(STM32L442xx) || defined(STM32L443xx) 00844 /** @defgroup PCD_Instance_definition PCD Instance definition 00845 * @{ 00846 */ 00847 #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE 00848 /** 00849 * @} 00850 */ 00851 #endif /* STM32L432xx || STM32L433xx || */ 00852 /* STM32L442xx || STM32L443xx */ 00853 00854 /** 00855 * @} 00856 */ 00857 00858 /** 00859 * @} 00860 */ 00861 00862 /** 00863 * @} 00864 */ 00865 00866 #endif /* STM32L475xx || STM32L476xx || */ 00867 /* STM32L485xx || STM32L486xx || */ 00868 /* STM32L432xx || STM32L433xx || */ 00869 /* STM32L442xx || STM32L443xx */ 00870 00871 #ifdef __cplusplus 00872 } 00873 #endif 00874 00875 00876 #endif /* __STM32L4xx_HAL_PCD_H */ 00877 00878 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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