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stm32l4xx_hal_i2c.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_i2c.h 00004 * @author MCD Application Team 00005 * @version V1.5.1 00006 * @date 31-May-2016 00007 * @brief Header file of I2C HAL module. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 00012 * 00013 * Redistribution and use in source and binary forms, with or without modification, 00014 * are permitted provided that the following conditions are met: 00015 * 1. Redistributions of source code must retain the above copyright notice, 00016 * this list of conditions and the following disclaimer. 00017 * 2. Redistributions in binary form must reproduce the above copyright notice, 00018 * this list of conditions and the following disclaimer in the documentation 00019 * and/or other materials provided with the distribution. 00020 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00021 * may be used to endorse or promote products derived from this software 00022 * without specific prior written permission. 00023 * 00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00027 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00028 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00029 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00030 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00031 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00032 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00034 * 00035 ****************************************************************************** 00036 */ 00037 00038 /* Define to prevent recursive inclusion -------------------------------------*/ 00039 #ifndef __STM32L4xx_HAL_I2C_H 00040 #define __STM32L4xx_HAL_I2C_H 00041 00042 #ifdef __cplusplus 00043 extern "C" { 00044 #endif 00045 00046 /* Includes ------------------------------------------------------------------*/ 00047 #include "stm32l4xx_hal_def.h" 00048 00049 /** @addtogroup STM32L4xx_HAL_Driver 00050 * @{ 00051 */ 00052 00053 /** @addtogroup I2C 00054 * @{ 00055 */ 00056 00057 /* Exported types ------------------------------------------------------------*/ 00058 /** @defgroup I2C_Exported_Types I2C Exported Types 00059 * @{ 00060 */ 00061 00062 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition 00063 * @brief I2C Configuration Structure definition 00064 * @{ 00065 */ 00066 typedef struct 00067 { 00068 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. 00069 This parameter calculated by referring to I2C initialization 00070 section in Reference manual */ 00071 00072 uint32_t OwnAddress1; /*!< Specifies the first device own address. 00073 This parameter can be a 7-bit or 10-bit address. */ 00074 00075 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 00076 This parameter can be a value of @ref I2C_ADDRESSING_MODE */ 00077 00078 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 00079 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ 00080 00081 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 00082 This parameter can be a 7-bit address. */ 00083 00084 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected 00085 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ 00086 00087 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 00088 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ 00089 00090 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 00091 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ 00092 00093 }I2C_InitTypeDef; 00094 00095 /** 00096 * @} 00097 */ 00098 00099 /** @defgroup HAL_state_structure_definition HAL state structure definition 00100 * @brief HAL State structure definition 00101 * @note HAL I2C State value coding follow below described bitmap :\n 00102 * b7-b6 Error information\n 00103 * 00 : No Error\n 00104 * 01 : Abort (Abort user request on going)\n 00105 * 10 : Timeout\n 00106 * 11 : Error\n 00107 * b5 IP initilisation status\n 00108 * 0 : Reset (IP not initialized)\n 00109 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n 00110 * b4 (not used)\n 00111 * x : Should be set to 0\n 00112 * b3\n 00113 * 0 : Ready or Busy (No Listen mode ongoing)\n 00114 * 1 : Listen (IP in Address Listen Mode)\n 00115 * b2 Intrinsic process state\n 00116 * 0 : Ready\n 00117 * 1 : Busy (IP busy with some configuration or internal operations)\n 00118 * b1 Rx state\n 00119 * 0 : Ready (no Rx operation ongoing)\n 00120 * 1 : Busy (Rx operation ongoing)\n 00121 * b0 Tx state\n 00122 * 0 : Ready (no Tx operation ongoing)\n 00123 * 1 : Busy (Tx operation ongoing) 00124 * @{ 00125 */ 00126 typedef enum 00127 { 00128 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 00129 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 00130 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 00131 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 00132 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 00133 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 00134 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 00135 process is ongoing */ 00136 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 00137 process is ongoing */ 00138 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 00139 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 00140 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ 00141 00142 }HAL_I2C_StateTypeDef; 00143 00144 /** 00145 * @} 00146 */ 00147 00148 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 00149 * @brief HAL Mode structure definition 00150 * @note HAL I2C Mode value coding follow below described bitmap :\n 00151 * b7 (not used)\n 00152 * x : Should be set to 0\n 00153 * b6\n 00154 * 0 : None\n 00155 * 1 : Memory (HAL I2C communication is in Memory Mode)\n 00156 * b5\n 00157 * 0 : None\n 00158 * 1 : Slave (HAL I2C communication is in Slave Mode)\n 00159 * b4\n 00160 * 0 : None\n 00161 * 1 : Master (HAL I2C communication is in Master Mode)\n 00162 * b3-b2-b1-b0 (not used)\n 00163 * xxxx : Should be set to 0000 00164 * @{ 00165 */ 00166 typedef enum 00167 { 00168 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ 00169 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ 00170 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ 00171 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ 00172 00173 }HAL_I2C_ModeTypeDef; 00174 00175 /** 00176 * @} 00177 */ 00178 00179 /** @defgroup I2C_Error_Code_definition I2C Error Code definition 00180 * @brief I2C Error Code definition 00181 * @{ 00182 */ 00183 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ 00184 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 00185 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 00186 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 00187 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 00188 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 00189 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 00190 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 00191 /** 00192 * @} 00193 */ 00194 00195 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition 00196 * @brief I2C handle Structure definition 00197 * @{ 00198 */ 00199 typedef struct __I2C_HandleTypeDef 00200 { 00201 I2C_TypeDef *Instance; /*!< I2C registers base address */ 00202 00203 I2C_InitTypeDef Init; /*!< I2C communication parameters */ 00204 00205 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ 00206 00207 uint16_t XferSize; /*!< I2C transfer size */ 00208 00209 __IO uint16_t XferCount; /*!< I2C transfer counter */ 00210 00211 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can 00212 be a value of @ref I2C_XFEROPTIONS */ 00213 00214 __IO uint32_t PreviousState; /*!< I2C communication Previous state */ 00215 00216 HAL_StatusTypeDef (*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */ 00217 00218 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ 00219 00220 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ 00221 00222 HAL_LockTypeDef Lock; /*!< I2C locking object */ 00223 00224 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ 00225 00226 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ 00227 00228 __IO uint32_t ErrorCode; /*!< I2C Error code */ 00229 00230 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ 00231 }I2C_HandleTypeDef; 00232 /** 00233 * @} 00234 */ 00235 00236 /** 00237 * @} 00238 */ 00239 /* Exported constants --------------------------------------------------------*/ 00240 00241 /** @defgroup I2C_Exported_Constants I2C Exported Constants 00242 * @{ 00243 */ 00244 00245 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options 00246 * @{ 00247 */ 00248 #define I2C_NO_OPTION_FRAME (0xFFFF0000U) 00249 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) 00250 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 00251 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 00252 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 00253 /** 00254 * @} 00255 */ 00256 00257 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode 00258 * @{ 00259 */ 00260 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) 00261 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) 00262 /** 00263 * @} 00264 */ 00265 00266 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode 00267 * @{ 00268 */ 00269 #define I2C_DUALADDRESS_DISABLE (0x00000000U) 00270 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN 00271 /** 00272 * @} 00273 */ 00274 00275 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks 00276 * @{ 00277 */ 00278 #define I2C_OA2_NOMASK ((uint8_t)0x00U) 00279 #define I2C_OA2_MASK01 ((uint8_t)0x01U) 00280 #define I2C_OA2_MASK02 ((uint8_t)0x02U) 00281 #define I2C_OA2_MASK03 ((uint8_t)0x03U) 00282 #define I2C_OA2_MASK04 ((uint8_t)0x04U) 00283 #define I2C_OA2_MASK05 ((uint8_t)0x05U) 00284 #define I2C_OA2_MASK06 ((uint8_t)0x06U) 00285 #define I2C_OA2_MASK07 ((uint8_t)0x07U) 00286 /** 00287 * @} 00288 */ 00289 00290 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode 00291 * @{ 00292 */ 00293 #define I2C_GENERALCALL_DISABLE (0x00000000U) 00294 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN 00295 /** 00296 * @} 00297 */ 00298 00299 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode 00300 * @{ 00301 */ 00302 #define I2C_NOSTRETCH_DISABLE (0x00000000U) 00303 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 00304 /** 00305 * @} 00306 */ 00307 00308 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size 00309 * @{ 00310 */ 00311 #define I2C_MEMADD_SIZE_8BIT (0x00000001U) 00312 #define I2C_MEMADD_SIZE_16BIT (0x00000002U) 00313 /** 00314 * @} 00315 */ 00316 00317 /** @defgroup I2C_XferDirection I2C Transfer Direction 00318 * @{ 00319 */ 00320 #define I2C_DIRECTION_TRANSMIT (0x00000000U) 00321 #define I2C_DIRECTION_RECEIVE (0x00000001U) 00322 /** 00323 * @} 00324 */ 00325 00326 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode 00327 * @{ 00328 */ 00329 #define I2C_RELOAD_MODE I2C_CR2_RELOAD 00330 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND 00331 #define I2C_SOFTEND_MODE (0x00000000U) 00332 /** 00333 * @} 00334 */ 00335 00336 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode 00337 * @{ 00338 */ 00339 #define I2C_NO_STARTSTOP (0x00000000U) 00340 #define I2C_GENERATE_STOP I2C_CR2_STOP 00341 #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) 00342 #define I2C_GENERATE_START_WRITE I2C_CR2_START 00343 /** 00344 * @} 00345 */ 00346 00347 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition 00348 * @brief I2C Interrupt definition 00349 * Elements values convention: 0xXXXXXXXX 00350 * - XXXXXXXX : Interrupt control mask 00351 * @{ 00352 */ 00353 #define I2C_IT_ERRI I2C_CR1_ERRIE 00354 #define I2C_IT_TCI I2C_CR1_TCIE 00355 #define I2C_IT_STOPI I2C_CR1_STOPIE 00356 #define I2C_IT_NACKI I2C_CR1_NACKIE 00357 #define I2C_IT_ADDRI I2C_CR1_ADDRIE 00358 #define I2C_IT_RXI I2C_CR1_RXIE 00359 #define I2C_IT_TXI I2C_CR1_TXIE 00360 /** 00361 * @} 00362 */ 00363 00364 /** @defgroup I2C_Flag_definition I2C Flag definition 00365 * @{ 00366 */ 00367 #define I2C_FLAG_TXE I2C_ISR_TXE 00368 #define I2C_FLAG_TXIS I2C_ISR_TXIS 00369 #define I2C_FLAG_RXNE I2C_ISR_RXNE 00370 #define I2C_FLAG_ADDR I2C_ISR_ADDR 00371 #define I2C_FLAG_AF I2C_ISR_NACKF 00372 #define I2C_FLAG_STOPF I2C_ISR_STOPF 00373 #define I2C_FLAG_TC I2C_ISR_TC 00374 #define I2C_FLAG_TCR I2C_ISR_TCR 00375 #define I2C_FLAG_BERR I2C_ISR_BERR 00376 #define I2C_FLAG_ARLO I2C_ISR_ARLO 00377 #define I2C_FLAG_OVR I2C_ISR_OVR 00378 #define I2C_FLAG_PECERR I2C_ISR_PECERR 00379 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT 00380 #define I2C_FLAG_ALERT I2C_ISR_ALERT 00381 #define I2C_FLAG_BUSY I2C_ISR_BUSY 00382 #define I2C_FLAG_DIR I2C_ISR_DIR 00383 /** 00384 * @} 00385 */ 00386 00387 /** 00388 * @} 00389 */ 00390 00391 /* Exported macros -----------------------------------------------------------*/ 00392 00393 /** @defgroup I2C_Exported_Macros I2C Exported Macros 00394 * @{ 00395 */ 00396 00397 /** @brief Reset I2C handle state. 00398 * @param __HANDLE__ specifies the I2C Handle. 00399 * @retval None 00400 */ 00401 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 00402 00403 /** @brief Enable the specified I2C interrupt. 00404 * @param __HANDLE__ specifies the I2C Handle. 00405 * @param __INTERRUPT__ specifies the interrupt source to enable. 00406 * This parameter can be one of the following values: 00407 * @arg @ref I2C_IT_ERRI Errors interrupt enable 00408 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 00409 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 00410 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 00411 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 00412 * @arg @ref I2C_IT_RXI RX interrupt enable 00413 * @arg @ref I2C_IT_TXI TX interrupt enable 00414 * 00415 * @retval None 00416 */ 00417 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 00418 00419 /** @brief Disable the specified I2C interrupt. 00420 * @param __HANDLE__ specifies the I2C Handle. 00421 * @param __INTERRUPT__ specifies the interrupt source to disable. 00422 * This parameter can be one of the following values: 00423 * @arg @ref I2C_IT_ERRI Errors interrupt enable 00424 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 00425 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 00426 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 00427 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 00428 * @arg @ref I2C_IT_RXI RX interrupt enable 00429 * @arg @ref I2C_IT_TXI TX interrupt enable 00430 * 00431 * @retval None 00432 */ 00433 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 00434 00435 /** @brief Check whether the specified I2C interrupt source is enabled or not. 00436 * @param __HANDLE__ specifies the I2C Handle. 00437 * @param __INTERRUPT__ specifies the I2C interrupt source to check. 00438 * This parameter can be one of the following values: 00439 * @arg @ref I2C_IT_ERRI Errors interrupt enable 00440 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 00441 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 00442 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 00443 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 00444 * @arg @ref I2C_IT_RXI RX interrupt enable 00445 * @arg @ref I2C_IT_TXI TX interrupt enable 00446 * 00447 * @retval The new state of __INTERRUPT__ (SET or RESET). 00448 */ 00449 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00450 00451 /** @brief Check whether the specified I2C flag is set or not. 00452 * @param __HANDLE__ specifies the I2C Handle. 00453 * @param __FLAG__ specifies the flag to check. 00454 * This parameter can be one of the following values: 00455 * @arg @ref I2C_FLAG_TXE Transmit data register empty 00456 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status 00457 * @arg @ref I2C_FLAG_RXNE Receive data register not empty 00458 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 00459 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 00460 * @arg @ref I2C_FLAG_STOPF STOP detection flag 00461 * @arg @ref I2C_FLAG_TC Transfer complete (master mode) 00462 * @arg @ref I2C_FLAG_TCR Transfer complete reload 00463 * @arg @ref I2C_FLAG_BERR Bus error 00464 * @arg @ref I2C_FLAG_ARLO Arbitration lost 00465 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 00466 * @arg @ref I2C_FLAG_PECERR PEC error in reception 00467 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 00468 * @arg @ref I2C_FLAG_ALERT SMBus alert 00469 * @arg @ref I2C_FLAG_BUSY Bus busy 00470 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) 00471 * 00472 * @retval The new state of __FLAG__ (SET or RESET). 00473 */ 00474 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 00475 00476 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. 00477 * @param __HANDLE__ specifies the I2C Handle. 00478 * @param __FLAG__ specifies the flag to clear. 00479 * This parameter can be any combination of the following values: 00480 * @arg @ref I2C_FLAG_TXE Transmit data register empty 00481 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 00482 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 00483 * @arg @ref I2C_FLAG_STOPF STOP detection flag 00484 * @arg @ref I2C_FLAG_BERR Bus error 00485 * @arg @ref I2C_FLAG_ARLO Arbitration lost 00486 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 00487 * @arg @ref I2C_FLAG_PECERR PEC error in reception 00488 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 00489 * @arg @ref I2C_FLAG_ALERT SMBus alert 00490 * 00491 * @retval None 00492 */ 00493 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ 00494 : ((__HANDLE__)->Instance->ICR = (__FLAG__))) 00495 00496 /** @brief Enable the specified I2C peripheral. 00497 * @param __HANDLE__ specifies the I2C Handle. 00498 * @retval None 00499 */ 00500 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 00501 00502 /** @brief Disable the specified I2C peripheral. 00503 * @param __HANDLE__ specifies the I2C Handle. 00504 * @retval None 00505 */ 00506 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 00507 00508 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. 00509 * @param __HANDLE__: specifies the I2C Handle. 00510 * @retval None 00511 */ 00512 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) 00513 /** 00514 * @} 00515 */ 00516 00517 /* Include I2C HAL Extended module */ 00518 #include "stm32l4xx_hal_i2c_ex.h" 00519 00520 /* Exported functions --------------------------------------------------------*/ 00521 /** @addtogroup I2C_Exported_Functions 00522 * @{ 00523 */ 00524 00525 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions 00526 * @{ 00527 */ 00528 /* Initialization and de-initialization functions******************************/ 00529 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 00530 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c); 00531 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); 00532 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); 00533 /** 00534 * @} 00535 */ 00536 00537 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions 00538 * @{ 00539 */ 00540 /* IO operation functions ****************************************************/ 00541 /******* Blocking mode: Polling */ 00542 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00543 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00544 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00545 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00546 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00547 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00548 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); 00549 00550 /******* Non-Blocking mode: Interrupt */ 00551 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00552 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00553 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 00554 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 00555 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00556 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00557 00558 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00559 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00560 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00561 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00562 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); 00563 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); 00564 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); 00565 00566 /******* Non-Blocking mode: DMA */ 00567 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00568 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00569 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 00570 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 00571 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00572 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00573 /** 00574 * @} 00575 */ 00576 00577 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 00578 * @{ 00579 */ 00580 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 00581 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); 00582 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); 00583 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); 00584 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); 00585 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); 00586 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); 00587 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 00588 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); 00589 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); 00590 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); 00591 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); 00592 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); 00593 /** 00594 * @} 00595 */ 00596 00597 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 00598 * @{ 00599 */ 00600 /* Peripheral State, Mode and Error functions *********************************/ 00601 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); 00602 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); 00603 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); 00604 00605 /** 00606 * @} 00607 */ 00608 00609 /** 00610 * @} 00611 */ 00612 00613 /* Private constants ---------------------------------------------------------*/ 00614 /** @defgroup I2C_Private_Constants I2C Private Constants 00615 * @{ 00616 */ 00617 00618 /** 00619 * @} 00620 */ 00621 00622 /* Private macros ------------------------------------------------------------*/ 00623 /** @defgroup I2C_Private_Macro I2C Private Macros 00624 * @{ 00625 */ 00626 00627 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 00628 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 00629 00630 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 00631 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 00632 00633 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ 00634 ((MASK) == I2C_OA2_MASK01) || \ 00635 ((MASK) == I2C_OA2_MASK02) || \ 00636 ((MASK) == I2C_OA2_MASK03) || \ 00637 ((MASK) == I2C_OA2_MASK04) || \ 00638 ((MASK) == I2C_OA2_MASK05) || \ 00639 ((MASK) == I2C_OA2_MASK06) || \ 00640 ((MASK) == I2C_OA2_MASK07)) 00641 00642 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 00643 ((CALL) == I2C_GENERALCALL_ENABLE)) 00644 00645 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 00646 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 00647 00648 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 00649 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 00650 00651 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ 00652 ((MODE) == I2C_AUTOEND_MODE) || \ 00653 ((MODE) == I2C_SOFTEND_MODE)) 00654 00655 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ 00656 ((REQUEST) == I2C_GENERATE_START_READ) || \ 00657 ((REQUEST) == I2C_GENERATE_START_WRITE) || \ 00658 ((REQUEST) == I2C_NO_STARTSTOP)) 00659 00660 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 00661 ((REQUEST) == I2C_NEXT_FRAME) || \ 00662 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 00663 ((REQUEST) == I2C_LAST_FRAME)) 00664 00665 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) 00666 00667 #define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U) 00668 #define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) 00669 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) 00670 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1) 00671 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2) 00672 00673 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 00674 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 00675 00676 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) 00677 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 00678 00679 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ 00680 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) 00681 /** 00682 * @} 00683 */ 00684 00685 /* Private Functions ---------------------------------------------------------*/ 00686 /** @defgroup I2C_Private_Functions I2C Private Functions 00687 * @{ 00688 */ 00689 /* Private functions are defined in stm32l4xx_hal_i2c.c file */ 00690 /** 00691 * @} 00692 */ 00693 00694 /** 00695 * @} 00696 */ 00697 00698 /** 00699 * @} 00700 */ 00701 00702 #ifdef __cplusplus 00703 } 00704 #endif 00705 00706 00707 #endif /* __STM32L4xx_HAL_I2C_H */ 00708 00709 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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