stm32l4xx_hal_flash.h

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_flash.h
00004   * @author  MCD Application Team
00005   * @version V1.5.1 
00006   * @date    31-May-2016
00007   * @brief   Header file of FLASH HAL module.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */
00037 
00038 /* Define to prevent recursive inclusion -------------------------------------*/
00039 #ifndef __STM32L4xx_HAL_FLASH_H
00040 #define __STM32L4xx_HAL_FLASH_H
00041 
00042 #ifdef __cplusplus
00043  extern "C" {
00044 #endif
00045 
00046 /* Includes ------------------------------------------------------------------*/
00047 #include "stm32l4xx_hal_def.h"
00048 
00049 /** @addtogroup STM32L4xx_HAL_Driver
00050   * @{
00051   */
00052 
00053 /** @addtogroup FLASH
00054   * @{
00055   */ 
00056 
00057 /* Exported types ------------------------------------------------------------*/
00058 /** @defgroup FLASH_Exported_Types FLASH Exported Types
00059   * @{
00060   */
00061 
00062 /**
00063   * @brief  FLASH Erase structure definition
00064   */
00065 typedef struct
00066 { 
00067   uint32_t TypeErase;   /*!< Mass erase or page erase.
00068                              This parameter can be a value of @ref FLASH_Type_Erase */
00069   uint32_t Banks;       /*!< Select bank to erase.
00070                              This parameter must be a value of @ref FLASH_Banks 
00071                              (FLASH_BANK_BOTH should be used only for mass erase) */        
00072   uint32_t Page;        /*!< Initial Flash page to erase when page erase is disabled
00073                              This parameter must be a value between 0 and (max number of pages in the bank - 1) 
00074                              (eg : 255 for 1MB dual bank) */
00075   uint32_t NbPages;     /*!< Number of pages to be erased.
00076                              This parameter must be a value between 1 and (max number of pages in the bank - value of initial page)*/           
00077 } FLASH_EraseInitTypeDef;
00078 
00079 /**
00080   * @brief  FLASH Option Bytes Program structure definition
00081   */
00082 typedef struct
00083 {
00084   uint32_t OptionType;     /*!< Option byte to be configured.
00085                                 This parameter can be a combination of the values of @ref FLASH_OB_Type */
00086   uint32_t WRPArea;        /*!< Write protection area to be programmed (used for OPTIONBYTE_WRP).
00087                                 Only one WRP area could be programmed at the same time.
00088                                 This parameter can be value of @ref FLASH_OB_WRP_Area */
00089   uint32_t WRPStartOffset; /*!< Write protection start offset (used for OPTIONBYTE_WRP).
00090                                 This parameter must be a value between 0 and (max number of pages in the bank - 1)
00091                                 (eg : 25 for 1MB dual bank) */
00092   uint32_t WRPEndOffset;   /*!< Write protection end offset (used for OPTIONBYTE_WRP).
00093                                 This parameter must be a value between WRPStartOffset and (max number of pages in the bank - 1) */
00094   uint32_t RDPLevel;       /*!< Set the read protection level.. (used for OPTIONBYTE_RDP).
00095                                 This parameter can be a value of @ref FLASH_OB_Read_Protection */
00096   uint32_t USERType;       /*!< User option byte(s) to be configured (used for OPTIONBYTE_USER).
00097                                 This parameter can be a combination of @ref FLASH_OB_USER_Type */
00098   uint32_t USERConfig;     /*!< Value of the user option byte (used for OPTIONBYTE_USER).
00099                                 This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
00100                                 @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY,
00101                                 @ref FLASH_OB_USER_nRST_SHUTDOWN, @ref FLASH_OB_USER_IWDG_SW, 
00102                                 @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY, 
00103                                 @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_BFB2, 
00104                                 @ref FLASH_OB_USER_DUALBANK, @ref FLASH_OB_USER_nBOOT1, 
00105                                 @ref FLASH_OB_USER_SRAM2_PE and @ref FLASH_OB_USER_SRAM2_RST */
00106   uint32_t PCROPConfig;    /*!< Configuration of the PCROP (used for OPTIONBYTE_PCROP).
00107                                 This parameter must be a combination of @ref FLASH_Banks (except FLASH_BANK_BOTH) 
00108                                 and @ref FLASH_OB_PCROP_RDP */
00109   uint32_t PCROPStartAddr; /*!< PCROP Start address (used for OPTIONBYTE_PCROP).
00110                                 This parameter must be a value between begin and end of bank 
00111                                 => Be careful of the bank swapping for the address */
00112   uint32_t PCROPEndAddr;   /*!< PCROP End address (used for OPTIONBYTE_PCROP).
00113                                 This parameter must be a value between PCROP Start address and end of bank */
00114 } FLASH_OBProgramInitTypeDef;
00115 
00116 /**
00117   * @brief  FLASH Procedure structure definition
00118   */
00119 typedef enum 
00120 {
00121   FLASH_PROC_NONE = 0,
00122   FLASH_PROC_PAGE_ERASE,
00123   FLASH_PROC_MASS_ERASE,
00124   FLASH_PROC_PROGRAM,
00125   FLASH_PROC_PROGRAM_LAST
00126 } FLASH_ProcedureTypeDef;
00127 
00128 /** 
00129   * @brief  FLASH handle Structure definition  
00130   */
00131 typedef struct
00132 {
00133   HAL_LockTypeDef             Lock;              /* FLASH locking object */
00134   __IO uint32_t               ErrorCode;         /* FLASH error code */
00135   __IO FLASH_ProcedureTypeDef ProcedureOnGoing;  /* Internal variable to indicate which procedure is ongoing or not in IT context */
00136   __IO uint32_t               Address;           /* Internal variable to save address selected for program in IT context */
00137   __IO uint32_t               Bank;              /* Internal variable to save current bank selected during erase in IT context */
00138   __IO uint32_t               Page;              /* Internal variable to define the current page which is erasing in IT context */
00139   __IO uint32_t               NbPagesToErase;    /* Internal variable to save the remaining pages to erase in IT context */
00140 }FLASH_ProcessTypeDef;
00141 
00142 /**
00143   * @}
00144   */
00145 
00146 /* Exported constants --------------------------------------------------------*/
00147 /** @defgroup FLASH_Exported_Constants FLASH Exported Constants
00148   * @{
00149   */
00150 
00151 /** @defgroup FLASH_Error FLASH Error
00152   * @{
00153   */ 
00154 #define HAL_FLASH_ERROR_NONE      ((uint32_t)0x00000000)
00155 #define HAL_FLASH_ERROR_OP        ((uint32_t)0x00000001)
00156 #define HAL_FLASH_ERROR_PROG      ((uint32_t)0x00000002)
00157 #define HAL_FLASH_ERROR_WRP       ((uint32_t)0x00000004)
00158 #define HAL_FLASH_ERROR_PGA       ((uint32_t)0x00000008)
00159 #define HAL_FLASH_ERROR_SIZ       ((uint32_t)0x00000010)
00160 #define HAL_FLASH_ERROR_PGS       ((uint32_t)0x00000020)
00161 #define HAL_FLASH_ERROR_MIS       ((uint32_t)0x00000040)
00162 #define HAL_FLASH_ERROR_FAST      ((uint32_t)0x00000080)
00163 #define HAL_FLASH_ERROR_RD        ((uint32_t)0x00000100)
00164 #define HAL_FLASH_ERROR_OPTV      ((uint32_t)0x00000200)
00165 #define HAL_FLASH_ERROR_ECCD      ((uint32_t)0x00000400)
00166 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx)
00167 #define HAL_FLASH_ERROR_PEMPTY    ((uint32_t)0x00000800)
00168 #endif 
00169 /**
00170   * @}
00171   */
00172 
00173 /** @defgroup FLASH_Type_Erase FLASH Erase Type
00174   * @{
00175   */ 
00176 #define FLASH_TYPEERASE_PAGES     ((uint32_t)0x00)  /*!<Pages erase only*/
00177 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01)  /*!<Flash mass erase activation*/
00178 /**
00179   * @}
00180   */
00181 
00182 /** @defgroup FLASH_Banks FLASH Banks
00183   * @{
00184   */
00185 #define FLASH_BANK_1              ((uint32_t)0x01)                          /*!< Bank 1   */
00186 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
00187 #define FLASH_BANK_2              ((uint32_t)0x02)                          /*!< Bank 2   */
00188 #define FLASH_BANK_BOTH           ((uint32_t)(FLASH_BANK_1 | FLASH_BANK_2)) /*!< Bank1 and Bank2  */
00189 #else
00190 #define FLASH_BANK_BOTH           ((uint32_t)(FLASH_BANK_1))                /*!< Bank 1   */
00191 #endif
00192 /**
00193   * @}
00194   */
00195 
00196 
00197 /** @defgroup FLASH_Type_Program FLASH Program Type
00198   * @{
00199   */
00200 #define FLASH_TYPEPROGRAM_DOUBLEWORD    ((uint32_t)0x00)  /*!<Program a double-word (64-bit) at a specified address.*/
00201 #define FLASH_TYPEPROGRAM_FAST          ((uint32_t)0x01)  /*!<Fast program a 32 row double-word (64-bit) at a specified address.
00202                                                                  And another 32 row double-word (64-bit) will be programmed */
00203 #define FLASH_TYPEPROGRAM_FAST_AND_LAST ((uint32_t)0x02)  /*!<Fast program a 32 row double-word (64-bit) at a specified address.
00204                                                                  And this is the last 32 row double-word (64-bit) programmed */
00205 /**
00206   * @}
00207   */
00208 
00209 /** @defgroup FLASH_OB_Type FLASH Option Bytes Type
00210   * @{
00211   */
00212 #define OPTIONBYTE_WRP            ((uint32_t)0x01)  /*!< WRP option byte configuration */
00213 #define OPTIONBYTE_RDP            ((uint32_t)0x02)  /*!< RDP option byte configuration */
00214 #define OPTIONBYTE_USER           ((uint32_t)0x04)  /*!< USER option byte configuration */
00215 #define OPTIONBYTE_PCROP          ((uint32_t)0x08)  /*!< PCROP option byte configuration */
00216 /**
00217   * @}
00218   */
00219 
00220 /** @defgroup FLASH_OB_WRP_Area FLASH WRP Area
00221   * @{
00222   */ 
00223 #define OB_WRPAREA_BANK1_AREAA    ((uint32_t)0x00)  /*!< Flash Bank 1 Area A */
00224 #define OB_WRPAREA_BANK1_AREAB    ((uint32_t)0x01)  /*!< Flash Bank 1 Area B */
00225 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
00226 #define OB_WRPAREA_BANK2_AREAA    ((uint32_t)0x02)  /*!< Flash Bank 2 Area A */
00227 #define OB_WRPAREA_BANK2_AREAB    ((uint32_t)0x04)  /*!< Flash Bank 2 Area B */
00228 #endif
00229 /**
00230   * @}
00231   */
00232 
00233 /** @defgroup FLASH_OB_Read_Protection FLASH Option Bytes Read Protection
00234   * @{
00235   */
00236 #define OB_RDP_LEVEL_0            ((uint32_t)0xAA)
00237 #define OB_RDP_LEVEL_1            ((uint32_t)0xBB)
00238 #define OB_RDP_LEVEL_2            ((uint32_t)0xCC) /*!< Warning: When enabling read protection level 2 
00239                                                         it's no more possible to go back to level 1 or 0 */
00240 /**
00241   * @}
00242   */ 
00243 
00244 /** @defgroup FLASH_OB_USER_Type FLASH Option Bytes User Type
00245   * @{
00246   */
00247 #define OB_USER_BOR_LEV           ((uint32_t)0x0001)                   /*!< BOR reset Level */
00248 #define OB_USER_nRST_STOP         ((uint32_t)0x0002)                   /*!< Reset generated when entering the stop mode */
00249 #define OB_USER_nRST_STDBY        ((uint32_t)0x0004)                   /*!< Reset generated when entering the standby mode */
00250 #define OB_USER_IWDG_SW           ((uint32_t)0x0008)                   /*!< Independent watchdog selection */
00251 #define OB_USER_IWDG_STOP         ((uint32_t)0x0010)                   /*!< Independent watchdog counter freeze in stop mode */
00252 #define OB_USER_IWDG_STDBY        ((uint32_t)0x0020)                   /*!< Independent watchdog counter freeze in standby mode */
00253 #define OB_USER_WWDG_SW           ((uint32_t)0x0040)                   /*!< Window watchdog selection */
00254 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
00255 #define OB_USER_BFB2              ((uint32_t)0x0080)                   /*!< Dual-bank boot */
00256 #define OB_USER_DUALBANK          ((uint32_t)0x0100)                   /*!< Dual-Bank on 512KB or 256KB Flash memory devices */
00257 #endif
00258 #define OB_USER_nBOOT1            ((uint32_t)0x0200)                   /*!< Boot configuration */
00259 #define OB_USER_SRAM2_PE          ((uint32_t)0x0400)                   /*!< SRAM2 parity check enable */
00260 #define OB_USER_SRAM2_RST         ((uint32_t)0x0800)                   /*!< SRAM2 Erase when system reset */
00261 #define OB_USER_nRST_SHDW         ((uint32_t)0x1000)                   /*!< Reset generated when entering the shutdown mode */
00262 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx)
00263 #define OB_USER_nSWBOOT0          ((uint32_t)0x2000)                   /*!< Software BOOT0 */
00264 #define OB_USER_nBOOT0            ((uint32_t)0x4000)                   /*!< nBOOT0 option bit */
00265 #endif
00266 /**
00267   * @}
00268   */ 
00269 
00270 /** @defgroup FLASH_OB_USER_BOR_LEVEL FLASH Option Bytes User BOR Level
00271   * @{
00272   */
00273 #define OB_BOR_LEVEL_0            ((uint32_t)FLASH_OPTR_BOR_LEV_0)     /*!< Reset level threshold is around 1.7V */
00274 #define OB_BOR_LEVEL_1            ((uint32_t)FLASH_OPTR_BOR_LEV_1)     /*!< Reset level threshold is around 2.0V */
00275 #define OB_BOR_LEVEL_2            ((uint32_t)FLASH_OPTR_BOR_LEV_2)     /*!< Reset level threshold is around 2.2V */
00276 #define OB_BOR_LEVEL_3            ((uint32_t)FLASH_OPTR_BOR_LEV_3)     /*!< Reset level threshold is around 2.5V */
00277 #define OB_BOR_LEVEL_4            ((uint32_t)FLASH_OPTR_BOR_LEV_4)     /*!< Reset level threshold is around 2.8V */
00278 /**
00279   * @}
00280   */ 
00281 
00282 /** @defgroup FLASH_OB_USER_nRST_STOP FLASH Option Bytes User Reset On Stop 
00283   * @{
00284   */
00285 #define OB_STOP_RST               ((uint32_t)0x0000)                   /*!< Reset generated when entering the stop mode */
00286 #define OB_STOP_NORST             ((uint32_t)FLASH_OPTR_nRST_STOP)     /*!< No reset generated when entering the stop mode */
00287 /**
00288   * @}
00289   */ 
00290 
00291 /** @defgroup FLASH_OB_USER_nRST_STANDBY FLASH Option Bytes User Reset On Standby
00292   * @{
00293   */
00294 #define OB_STANDBY_RST            ((uint32_t)0x0000)                   /*!< Reset generated when entering the standby mode */
00295 #define OB_STANDBY_NORST          ((uint32_t)FLASH_OPTR_nRST_STDBY)    /*!< No reset generated when entering the standby mode */
00296 /**
00297   * @}
00298   */ 
00299 
00300 /** @defgroup FLASH_OB_USER_nRST_SHUTDOWN FLASH Option Bytes User Reset On Shutdown
00301   * @{
00302   */
00303 #define OB_SHUTDOWN_RST           ((uint32_t)0x0000)                   /*!< Reset generated when entering the shutdown mode */
00304 #define OB_SHUTDOWN_NORST         ((uint32_t)FLASH_OPTR_nRST_SHDW)     /*!< No reset generated when entering the shutdown mode */
00305 /**
00306   * @}
00307   */ 
00308 
00309 /** @defgroup FLASH_OB_USER_IWDG_SW FLASH Option Bytes User IWDG Type
00310   * @{
00311   */
00312 #define OB_IWDG_HW                ((uint32_t)0x00000)                  /*!< Hardware independent watchdog */
00313 #define OB_IWDG_SW                ((uint32_t)FLASH_OPTR_IWDG_SW)       /*!< Software independent watchdog */
00314 /**
00315   * @}
00316   */ 
00317 
00318 /** @defgroup FLASH_OB_USER_IWDG_STOP FLASH Option Bytes User IWDG Mode On Stop
00319   * @{
00320   */
00321 #define OB_IWDG_STOP_FREEZE       ((uint32_t)0x00000)                  /*!< Independent watchdog counter is frozen in Stop mode */
00322 #define OB_IWDG_STOP_RUN          ((uint32_t)FLASH_OPTR_IWDG_STOP)     /*!< Independent watchdog counter is running in Stop mode */
00323 /**
00324   * @}
00325   */ 
00326 
00327 /** @defgroup FLASH_OB_USER_IWDG_STANDBY FLASH Option Bytes User IWDG Mode On Standby
00328   * @{
00329   */
00330 #define OB_IWDG_STDBY_FREEZE      ((uint32_t)0x00000)                  /*!< Independent watchdog counter is frozen in Standby mode */
00331 #define OB_IWDG_STDBY_RUN         ((uint32_t)FLASH_OPTR_IWDG_STDBY)    /*!< Independent watchdog counter is running in Standby mode */
00332 /**
00333   * @}
00334   */ 
00335 
00336 /** @defgroup FLASH_OB_USER_WWDG_SW FLASH Option Bytes User WWDG Type
00337   * @{
00338   */
00339 #define OB_WWDG_HW                ((uint32_t)0x00000)                  /*!< Hardware window watchdog */
00340 #define OB_WWDG_SW                ((uint32_t)FLASH_OPTR_WWDG_SW)       /*!< Software window watchdog */
00341 /**
00342   * @}
00343   */ 
00344 
00345 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
00346 /** @defgroup FLASH_OB_USER_BFB2 FLASH Option Bytes User BFB2 Mode
00347   * @{
00348   */
00349 #define OB_BFB2_DISABLE           ((uint32_t)0x000000)                 /*!< Dual-bank boot disable */
00350 #define OB_BFB2_ENABLE            ((uint32_t)FLASH_OPTR_BFB2)          /*!< Dual-bank boot enable */
00351 /**
00352   * @}
00353   */ 
00354 
00355 /** @defgroup FLASH_OB_USER_DUALBANK FLASH Option Bytes User Dual-bank Type
00356   * @{
00357   */
00358 #define OB_DUALBANK_SINGLE        ((uint32_t)0x000000)                 /*!< 256 KB/512 KB Single-bank Flash */
00359 #define OB_DUALBANK_DUAL          ((uint32_t)FLASH_OPTR_DUALBANK)      /*!< 256 KB/512 KB Dual-bank Flash */
00360 /**
00361   * @}
00362   */ 
00363 #endif
00364 
00365 /** @defgroup FLASH_OB_USER_nBOOT1 FLASH Option Bytes User BOOT1 Type
00366   * @{
00367   */
00368 #define OB_BOOT1_SRAM             ((uint32_t)0x000000)                 /*!< Embedded SRAM1 is selected as boot space (if BOOT0=1) */
00369 #define OB_BOOT1_SYSTEM           ((uint32_t)FLASH_OPTR_nBOOT1)        /*!< System memory is selected as boot space (if BOOT0=1) */
00370 /**
00371   * @}
00372   */ 
00373 
00374 /** @defgroup FLASH_OB_USER_SRAM2_PE FLASH Option Bytes User SRAM2 Parity Check Type
00375   * @{
00376   */
00377 #define OB_SRAM2_PARITY_ENABLE    ((uint32_t)0x0000000)                /*!< SRAM2 parity check enable */
00378 #define OB_SRAM2_PARITY_DISABLE   ((uint32_t)FLASH_OPTR_SRAM2_PE)      /*!< SRAM2 parity check disable */
00379 /**
00380   * @}
00381   */ 
00382 
00383 /** @defgroup FLASH_OB_USER_SRAM2_RST FLASH Option Bytes User SRAM2 Erase On Reset Type
00384   * @{
00385   */
00386 #define OB_SRAM2_RST_ERASE        ((uint32_t)0x0000000)                /*!< SRAM2 erased when a system reset occurs */
00387 #define OB_SRAM2_RST_NOT_ERASE    ((uint32_t)FLASH_OPTR_SRAM2_RST)     /*!< SRAM2 is not erased when a system reset occurs */
00388 /**
00389   * @}
00390   */ 
00391 
00392 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx)
00393 /** @defgroup OB_USER_nSWBOOT0 FLASH Option Bytes User Software BOOT0
00394   * @{
00395   */
00396 #define OB_BOOT0_FROM_OB          ((uint32_t)0x0000000)                /*!< BOOT0 taken from the option bit nBOOT0 */
00397 #define OB_BOOT0_FROM_PIN         ((uint32_t)FLASH_OPTR_nSWBOOT0)      /*!< BOOT0 taken from PH3/BOOT0 pin */
00398 /**
00399   * @}
00400   */ 
00401 
00402 /** @defgroup OB_USER_nBOOT0 FLASH Option Bytes User nBOOT0 option bit
00403   * @{
00404   */
00405 #define OB_BOOT0_RESET            ((uint32_t)0x0000000)                /*!< nBOOT0 = 0 */
00406 #define OB_BOOT0_SET              ((uint32_t)FLASH_OPTR_nBOOT0)        /*!< nBOOT0 = 1 */
00407 /**
00408   * @}
00409   */ 
00410 #endif
00411 
00412 /** @defgroup FLASH_OB_PCROP_RDP FLASH Option Bytes PCROP On RDP Level Type
00413   * @{
00414   */
00415 #define OB_PCROP_RDP_NOT_ERASE    ((uint32_t)0x00000000)               /*!< PCROP area is not erased when the RDP level 
00416                                                                             is decreased from Level 1 to Level 0 */
00417 #define OB_PCROP_RDP_ERASE        ((uint32_t)FLASH_PCROP1ER_PCROP_RDP) /*!< PCROP area is erased when the RDP level is 
00418                                                                             decreased from Level 1 to Level 0 (full mass erase) */
00419 /**
00420   * @}
00421   */ 
00422 
00423 /** @defgroup FLASH_Latency FLASH Latency
00424   * @{
00425   */ 
00426 #define FLASH_LATENCY_0           FLASH_ACR_LATENCY_0WS                /*!< FLASH Zero wait state */
00427 #define FLASH_LATENCY_1           FLASH_ACR_LATENCY_1WS                /*!< FLASH One wait state */
00428 #define FLASH_LATENCY_2           FLASH_ACR_LATENCY_2WS                /*!< FLASH Two wait states */
00429 #define FLASH_LATENCY_3           FLASH_ACR_LATENCY_3WS                /*!< FLASH Three wait states */
00430 #define FLASH_LATENCY_4           FLASH_ACR_LATENCY_4WS                /*!< FLASH Four wait states */
00431 /**
00432   * @}
00433   */ 
00434 
00435 /** @defgroup FLASH_Keys FLASH Keys
00436   * @{
00437   */ 
00438 #define FLASH_KEY1                ((uint32_t)0x45670123U)               /*!< Flash key1 */
00439 #define FLASH_KEY2                ((uint32_t)0xCDEF89ABU)               /*!< Flash key2: used with FLASH_KEY1 
00440                                                                             to unlock the FLASH registers access */
00441 
00442 #define FLASH_PDKEY1              ((uint32_t)0x04152637U)               /*!< Flash power down key1 */
00443 #define FLASH_PDKEY2              ((uint32_t)0xFAFBFCFDU)               /*!< Flash power down key2: used with FLASH_PDKEY1 
00444                                                                             to unlock the RUN_PD bit in FLASH_ACR */
00445 
00446 #define FLASH_OPTKEY1             ((uint32_t)0x08192A3BU)               /*!< Flash option byte key1 */
00447 #define FLASH_OPTKEY2             ((uint32_t)0x4C5D6E7FU)               /*!< Flash option byte key2: used with FLASH_OPTKEY1 
00448                                                                             to allow option bytes operations */
00449 /**
00450   * @}
00451   */
00452 
00453 /** @defgroup FLASH_Flags FLASH Flags Definition
00454   * @{
00455   */ 
00456 #define FLASH_FLAG_EOP            FLASH_SR_EOP                         /*!< FLASH End of operation flag */
00457 #define FLASH_FLAG_OPERR          FLASH_SR_OPERR                       /*!< FLASH Operation error flag */
00458 #define FLASH_FLAG_PROGERR        FLASH_SR_PROGERR                     /*!< FLASH Programming error flag */
00459 #define FLASH_FLAG_WRPERR         FLASH_SR_WRPERR                      /*!< FLASH Write protection error flag */
00460 #define FLASH_FLAG_PGAERR         FLASH_SR_PGAERR                      /*!< FLASH Programming alignment error flag */
00461 #define FLASH_FLAG_SIZERR         FLASH_SR_SIZERR                      /*!< FLASH Size error flag  */
00462 #define FLASH_FLAG_PGSERR         FLASH_SR_PGSERR                      /*!< FLASH Programming sequence error flag */
00463 #define FLASH_FLAG_MISERR         FLASH_SR_MISERR                      /*!< FLASH Fast programming data miss error flag */
00464 #define FLASH_FLAG_FASTERR        FLASH_SR_FASTERR                     /*!< FLASH Fast programming error flag */
00465 #define FLASH_FLAG_RDERR          FLASH_SR_RDERR                       /*!< FLASH PCROP read error flag */
00466 #define FLASH_FLAG_OPTVERR        FLASH_SR_OPTVERR                     /*!< FLASH Option validity error flag  */
00467 #define FLASH_FLAG_BSY            FLASH_SR_BSY                         /*!< FLASH Busy flag */
00468 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx)
00469 #define FLASH_FLAG_PEMPTY         FLASH_SR_PEMPTY                      /*!< FLASH Program empty */
00470 #endif
00471 #define FLASH_FLAG_ECCC           FLASH_ECCR_ECCC                      /*!< FLASH ECC correction */
00472 #define FLASH_FLAG_ECCD           FLASH_ECCR_ECCD                      /*!< FLASH ECC detection */
00473 
00474 #define FLASH_FLAG_ALL_ERRORS     (FLASH_FLAG_OPERR   | FLASH_FLAG_PROGERR | FLASH_FLAG_WRPERR | \
00475                                    FLASH_FLAG_PGAERR  | FLASH_FLAG_SIZERR  | FLASH_FLAG_PGSERR | \
00476                                    FLASH_FLAG_MISERR  | FLASH_FLAG_FASTERR | FLASH_FLAG_RDERR  | \
00477                                    FLASH_FLAG_OPTVERR | FLASH_FLAG_ECCD)
00478 /**
00479   * @}
00480   */ 
00481 
00482 /** @defgroup FLASH_Interrupt_definition FLASH Interrupts Definition
00483   * @brief FLASH Interrupt definition
00484   * @{
00485   */ 
00486 #define FLASH_IT_EOP              FLASH_CR_EOPIE                       /*!< End of FLASH Operation Interrupt source */
00487 #define FLASH_IT_OPERR            FLASH_CR_ERRIE                       /*!< Error Interrupt source */
00488 #define FLASH_IT_RDERR            FLASH_CR_RDERRIE                     /*!< PCROP Read Error Interrupt source*/
00489 #define FLASH_IT_ECCC             (FLASH_ECCR_ECCIE >> 24)             /*!< ECC Correction Interrupt source */
00490 /**
00491   * @}
00492   */  
00493 
00494 /**
00495   * @}
00496   */
00497 
00498 /* Exported macros -----------------------------------------------------------*/
00499 /** @defgroup FLASH_Exported_Macros FLASH Exported Macros
00500  *  @brief macros to control FLASH features 
00501  *  @{
00502  */
00503 
00504 /**
00505   * @brief  Set the FLASH Latency.
00506   * @param  __LATENCY__: FLASH Latency                   
00507   *         This parameter can be one of the following values :
00508   *     @arg FLASH_LATENCY_0: FLASH Zero wait state
00509   *     @arg FLASH_LATENCY_1: FLASH One wait state    
00510   *     @arg FLASH_LATENCY_2: FLASH Two wait states
00511   *     @arg FLASH_LATENCY_3: FLASH Three wait states
00512   *     @arg FLASH_LATENCY_4: FLASH Four wait states
00513   * @retval None
00514   */ 
00515 #define __HAL_FLASH_SET_LATENCY(__LATENCY__)    (MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (__LATENCY__)))
00516 
00517 /**
00518   * @brief  Get the FLASH Latency.
00519   * @retval FLASH Latency                   
00520   *         This parameter can be one of the following values :
00521   *     @arg FLASH_LATENCY_0: FLASH Zero wait state
00522   *     @arg FLASH_LATENCY_1: FLASH One wait state    
00523   *     @arg FLASH_LATENCY_2: FLASH Two wait states
00524   *     @arg FLASH_LATENCY_3: FLASH Three wait states
00525   *     @arg FLASH_LATENCY_4: FLASH Four wait states
00526   */ 
00527 #define __HAL_FLASH_GET_LATENCY()               READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)
00528 
00529 /**
00530   * @brief  Enable the FLASH prefetch buffer.
00531   * @retval None
00532   */ 
00533 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE()    SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN)
00534 
00535 /**
00536   * @brief  Disable the FLASH prefetch buffer.
00537   * @retval None
00538   */
00539 #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE()   CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN)
00540 
00541 /**
00542   * @brief  Enable the FLASH instruction cache.
00543   * @retval none
00544   */ 
00545 #define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE()  SET_BIT(FLASH->ACR, FLASH_ACR_ICEN)
00546 
00547 /**
00548   * @brief  Disable the FLASH instruction cache.
00549   * @retval none
00550   */ 
00551 #define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN)
00552 
00553 /**
00554   * @brief  Enable the FLASH data cache.
00555   * @retval none
00556   */ 
00557 #define __HAL_FLASH_DATA_CACHE_ENABLE()         SET_BIT(FLASH->ACR, FLASH_ACR_DCEN)
00558 
00559 /**
00560   * @brief  Disable the FLASH data cache.
00561   * @retval none
00562   */ 
00563 #define __HAL_FLASH_DATA_CACHE_DISABLE()        CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN)
00564 
00565 /**
00566   * @brief  Reset the FLASH instruction Cache.
00567   * @note   This function must be used only when the Instruction Cache is disabled.  
00568   * @retval None
00569   */
00570 #define __HAL_FLASH_INSTRUCTION_CACHE_RESET()   do { SET_BIT(FLASH->ACR, FLASH_ACR_ICRST);   \
00571                                                      CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST); \
00572                                                    } while (0)
00573 
00574 /**
00575   * @brief  Reset the FLASH data Cache.
00576   * @note   This function must be used only when the data Cache is disabled.  
00577   * @retval None
00578   */
00579 #define __HAL_FLASH_DATA_CACHE_RESET()          do { SET_BIT(FLASH->ACR, FLASH_ACR_DCRST);   \
00580                                                      CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST); \
00581                                                    } while (0)
00582 
00583 /**
00584   * @brief  Enable the FLASH power down during Low-power run mode.
00585   * @note   Writing this bit  to 0 this bit, automatically the keys are
00586   *         loss and a new unlock sequence is necessary to re-write it to 1.
00587   */
00588 #define __HAL_FLASH_POWER_DOWN_ENABLE()         do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \
00589                                                      WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \
00590                                                      SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);   \
00591                                                    } while (0)
00592 
00593 /**
00594   * @brief  Disable the FLASH power down during Low-power run mode.
00595   * @note   Writing this bit  to 0 this bit, automatically the keys are
00596   *         loss and a new unlock sequence is necessary to re-write it to 1.
00597   */
00598 #define __HAL_FLASH_POWER_DOWN_DISABLE()        do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \
00599                                                      WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \
00600                                                      CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \
00601                                                    } while (0)
00602 
00603 /**
00604   * @brief  Enable the FLASH power down during Low-Power sleep mode
00605   * @retval none
00606   */ 
00607 #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE()    SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
00608 
00609 /**
00610   * @brief  Disable the FLASH power down during Low-Power sleep mode
00611   * @retval none
00612   */ 
00613 #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE()   CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
00614 
00615 /**
00616   * @}
00617   */  
00618 
00619 /** @defgroup FLASH_Interrupt FLASH Interrupts Macros
00620  *  @brief macros to handle FLASH interrupts
00621  * @{
00622  */ 
00623 
00624 /**
00625   * @brief  Enable the specified FLASH interrupt.
00626   * @param  __INTERRUPT__: FLASH interrupt 
00627   *         This parameter can be any combination of the following values:
00628   *     @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
00629   *     @arg FLASH_IT_OPERR: Error Interrupt    
00630   *     @arg FLASH_IT_RDERR: PCROP Read Error Interrupt
00631   *     @arg FLASH_IT_ECCC: ECC Correction Interrupt
00632   * @retval none
00633   */  
00634 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__)    do { if((__INTERRUPT__) & FLASH_IT_ECCC) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\
00635                                                      if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { SET_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\
00636                                                    } while(0)
00637 
00638 /**
00639   * @brief  Disable the specified FLASH interrupt.
00640   * @param  __INTERRUPT__: FLASH interrupt 
00641   *         This parameter can be any combination of the following values:
00642   *     @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
00643   *     @arg FLASH_IT_OPERR: Error Interrupt    
00644   *     @arg FLASH_IT_RDERR: PCROP Read Error Interrupt
00645   *     @arg FLASH_IT_ECCC: ECC Correction Interrupt
00646   * @retval none
00647   */  
00648 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__)   do { if((__INTERRUPT__) & FLASH_IT_ECCC) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\
00649                                                      if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\
00650                                                    } while(0)
00651 
00652 /**
00653   * @brief  Check whether the specified FLASH flag is set or not.
00654   * @param  __FLAG__: specifies the FLASH flag to check.
00655   *   This parameter can be one of the following values:
00656   *     @arg FLASH_FLAG_EOP: FLASH End of Operation flag
00657   *     @arg FLASH_FLAG_OPERR: FLASH Operation error flag
00658   *     @arg FLASH_FLAG_PROGERR: FLASH Programming error flag
00659   *     @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag 
00660   *     @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag
00661   *     @arg FLASH_FLAG_SIZERR: FLASH Size error flag
00662   *     @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag
00663   *     @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag
00664   *     @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag
00665   *     @arg FLASH_FLAG_RDERR: FLASH PCROP read  error flag
00666   *     @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag
00667   *     @arg FLASH_FLAG_BSY: FLASH write/erase operations in progress flag 
00668   *     @arg FLASH_FLAG_PEMPTY : FLASH Boot from not programmed flash (apply only for STM32L43x/STM32L44x devices)
00669   *     @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected
00670   *     @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected
00671   * @retval The new state of FLASH_FLAG (SET or RESET).
00672   */
00673 #define __HAL_FLASH_GET_FLAG(__FLAG__)          (((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) ? \
00674                                                  (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__))  : \
00675                                                  (READ_BIT(FLASH->SR,   (__FLAG__)) == (__FLAG__)))
00676 
00677 /**
00678   * @brief  Clear the FLASH's pending flags.
00679   * @param  __FLAG__: specifies the FLASH flags to clear.
00680   *   This parameter can be any combination of the following values:
00681   *     @arg FLASH_FLAG_EOP: FLASH End of Operation flag
00682   *     @arg FLASH_FLAG_OPERR: FLASH Operation error flag
00683   *     @arg FLASH_FLAG_PROGERR: FLASH Programming error flag
00684   *     @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag 
00685   *     @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag
00686   *     @arg FLASH_FLAG_SIZERR: FLASH Size error flag
00687   *     @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag
00688   *     @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag
00689   *     @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag
00690   *     @arg FLASH_FLAG_RDERR: FLASH PCROP read  error flag
00691   *     @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag
00692   *     @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected
00693   *     @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected
00694   *     @arg FLASH_FLAG_ALL_ERRORS: FLASH All errors flags
00695   * @retval None
00696   */
00697 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__)        do { if((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { SET_BIT(FLASH->ECCR, ((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\
00698                                                      if((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { WRITE_REG(FLASH->SR, ((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\
00699                                                    } while(0)
00700 /**
00701   * @}
00702   */  
00703 
00704 /* Include FLASH HAL Extended module */
00705 #include "stm32l4xx_hal_flash_ex.h"
00706 #include "stm32l4xx_hal_flash_ramfunc.h"
00707 
00708 /* Exported functions --------------------------------------------------------*/ 
00709 /** @addtogroup FLASH_Exported_Functions
00710   * @{
00711   */
00712 
00713 /* Program operation functions  ***********************************************/
00714 /** @addtogroup FLASH_Exported_Functions_Group1
00715   * @{
00716   */
00717 HAL_StatusTypeDef  HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
00718 HAL_StatusTypeDef  HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
00719 /* FLASH IRQ handler method */
00720 void               HAL_FLASH_IRQHandler(void);
00721 /* Callbacks in non blocking modes */ 
00722 void               HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
00723 void               HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
00724 /**
00725   * @}
00726   */
00727 
00728 /* Peripheral Control functions  **********************************************/
00729 /** @addtogroup FLASH_Exported_Functions_Group2
00730   * @{
00731   */
00732 HAL_StatusTypeDef  HAL_FLASH_Unlock(void);
00733 HAL_StatusTypeDef  HAL_FLASH_Lock(void);
00734 /* Option bytes control */
00735 HAL_StatusTypeDef  HAL_FLASH_OB_Unlock(void);
00736 HAL_StatusTypeDef  HAL_FLASH_OB_Lock(void);
00737 HAL_StatusTypeDef  HAL_FLASH_OB_Launch(void);
00738 /**
00739   * @}
00740   */
00741 
00742 /* Peripheral State functions  ************************************************/
00743 /** @addtogroup FLASH_Exported_Functions_Group3
00744   * @{
00745   */
00746 uint32_t HAL_FLASH_GetError(void);
00747 /**
00748   * @}
00749   */
00750 
00751 /**
00752   * @}
00753   */
00754 
00755 /* Private constants --------------------------------------------------------*/
00756 /** @defgroup FLASH_Private_Constants FLASH Private Constants
00757   * @{
00758   */
00759 #define FLASH_SIZE_DATA_REGISTER           ((uint32_t)0x1FFF75E0)
00760     
00761 #define FLASH_SIZE                         ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x400 << 10) : \
00762                                             (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10))
00763 
00764 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
00765 #define FLASH_BANK_SIZE                    (FLASH_SIZE >> 1)
00766 #else
00767 #define FLASH_BANK_SIZE                    (FLASH_SIZE)
00768 #endif
00769 
00770 #define FLASH_PAGE_SIZE                    ((uint32_t)0x800)
00771 
00772 #define FLASH_TIMEOUT_VALUE                ((uint32_t)50000)/* 50 s */
00773 /**
00774   * @}
00775   */
00776  
00777 /* Private macros ------------------------------------------------------------*/
00778 /** @defgroup FLASH_Private_Macros FLASH Private Macros
00779  *  @{
00780  */
00781 
00782 #define IS_FLASH_TYPEERASE(VALUE)          (((VALUE) == FLASH_TYPEERASE_PAGES) || \
00783                                             ((VALUE) == FLASH_TYPEERASE_MASSERASE))  
00784 
00785 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
00786 #define IS_FLASH_BANK(BANK)                (((BANK) == FLASH_BANK_1)  || \
00787                                             ((BANK) == FLASH_BANK_2)  || \
00788                                             ((BANK) == FLASH_BANK_BOTH))
00789 
00790 #define IS_FLASH_BANK_EXCLUSIVE(BANK)      (((BANK) == FLASH_BANK_1)  || \
00791                                             ((BANK) == FLASH_BANK_2))
00792 #else
00793 #define IS_FLASH_BANK(BANK)                ((BANK) == FLASH_BANK_1)
00794 
00795 #define IS_FLASH_BANK_EXCLUSIVE(BANK)      ((BANK) == FLASH_BANK_1)
00796 #endif
00797 
00798 #define IS_FLASH_TYPEPROGRAM(VALUE)        (((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \
00799                                             ((VALUE) == FLASH_TYPEPROGRAM_FAST) || \
00800                                             ((VALUE) == FLASH_TYPEPROGRAM_FAST_AND_LAST))  
00801 
00802 #define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE)        && ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? \
00803                                             ((ADDRESS) <= FLASH_BASE+0xFFFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? \
00804                                             ((ADDRESS) <= FLASH_BASE+0x7FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? \
00805                                             ((ADDRESS) <= FLASH_BASE+0x3FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? \
00806                                             ((ADDRESS) <= FLASH_BASE+0x1FFFF) : ((ADDRESS) <= FLASH_BASE+0xFFFFF)))))) 
00807 
00808 #define IS_FLASH_OTP_ADDRESS(ADDRESS)      (((ADDRESS) >= 0x1FFF7000) && ((ADDRESS) <= 0x1FFF73FF))
00809 
00810 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS)  (IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) || IS_FLASH_OTP_ADDRESS(ADDRESS))
00811 
00812 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
00813 #define IS_FLASH_PAGE(PAGE)                (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? ((PAGE) < 256) : \
00814                                             ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 128) : \
00815                                             ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 64) : \
00816                                             ((PAGE) < 256)))))
00817 #else
00818 #define IS_FLASH_PAGE(PAGE)                (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \
00819                                             ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80)  ? ((PAGE) < 64) : \
00820                                             ((PAGE) < 128))))
00821 #endif
00822 
00823 #define IS_OPTIONBYTE(VALUE)               (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP)))
00824 
00825 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
00826 #define IS_OB_WRPAREA(VALUE)               (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB) || \
00827                                             ((VALUE) == OB_WRPAREA_BANK2_AREAA) || ((VALUE) == OB_WRPAREA_BANK2_AREAB))
00828 #else
00829 #define IS_OB_WRPAREA(VALUE)               (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB))
00830 #endif
00831 
00832 #define IS_OB_RDP_LEVEL(LEVEL)             (((LEVEL) == OB_RDP_LEVEL_0)   ||\
00833                                             ((LEVEL) == OB_RDP_LEVEL_1)/* ||\
00834                                             ((LEVEL) == OB_RDP_LEVEL_2)*/)
00835 
00836 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
00837 #define IS_OB_USER_TYPE(TYPE)              (((TYPE) <= (uint32_t)0x1FFF) && ((TYPE) != 0))
00838 #else
00839 #define IS_OB_USER_TYPE(TYPE)              (((TYPE) <= (uint32_t)0x7E7F) && ((TYPE) != 0) && (((TYPE)&0x0180) == 0))
00840 #endif
00841 
00842 #define IS_OB_USER_BOR_LEVEL(LEVEL)        (((LEVEL) == OB_BOR_LEVEL_0) || ((LEVEL) == OB_BOR_LEVEL_1) || \
00843                                             ((LEVEL) == OB_BOR_LEVEL_2) || ((LEVEL) == OB_BOR_LEVEL_3) || \
00844                                             ((LEVEL) == OB_BOR_LEVEL_4))
00845 
00846 #define IS_OB_USER_STOP(VALUE)             (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST))
00847 
00848 #define IS_OB_USER_STANDBY(VALUE)          (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_NORST))
00849 
00850 #define IS_OB_USER_SHUTDOWN(VALUE)         (((VALUE) == OB_SHUTDOWN_RST) || ((VALUE) == OB_SHUTDOWN_NORST))
00851 
00852 #define IS_OB_USER_IWDG(VALUE)             (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW))
00853 
00854 #define IS_OB_USER_IWDG_STOP(VALUE)        (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_RUN))
00855 
00856 #define IS_OB_USER_IWDG_STDBY(VALUE)       (((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_RUN))
00857 
00858 #define IS_OB_USER_WWDG(VALUE)             (((VALUE) == OB_WWDG_HW) || ((VALUE) == OB_WWDG_SW))
00859 
00860 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
00861 #define IS_OB_USER_BFB2(VALUE)             (((VALUE) == OB_BFB2_DISABLE) || ((VALUE) == OB_BFB2_ENABLE))
00862 
00863 #define IS_OB_USER_DUALBANK(VALUE)         (((VALUE) == OB_DUALBANK_SINGLE) || ((VALUE) == OB_DUALBANK_DUAL))
00864 #endif
00865 
00866 #define IS_OB_USER_BOOT1(VALUE)            (((VALUE) == OB_BOOT1_SRAM) || ((VALUE) == OB_BOOT1_SYSTEM))
00867 
00868 #define IS_OB_USER_SRAM2_PARITY(VALUE)     (((VALUE) == OB_SRAM2_PARITY_ENABLE) || ((VALUE) == OB_SRAM2_PARITY_DISABLE))
00869 
00870 #define IS_OB_USER_SRAM2_RST(VALUE)        (((VALUE) == OB_SRAM2_RST_ERASE) || ((VALUE) == OB_SRAM2_RST_NOT_ERASE))
00871 
00872 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx)
00873 #define IS_OB_USER_SWBOOT0(VALUE)          (((VALUE) == OB_BOOT0_FROM_OB) || ((VALUE) == OB_BOOT0_FROM_PIN))
00874 
00875 #define IS_OB_USER_BOOT0(VALUE)            (((VALUE) == OB_BOOT0_RESET) || ((VALUE) == OB_BOOT0_SET))
00876 #endif
00877 
00878 #define IS_OB_PCROP_RDP(VALUE)             (((VALUE) == OB_PCROP_RDP_NOT_ERASE) || ((VALUE) == OB_PCROP_RDP_ERASE))
00879 
00880 #define IS_FLASH_LATENCY(LATENCY)          (((LATENCY) == FLASH_LATENCY_0) || \
00881                                             ((LATENCY) == FLASH_LATENCY_1) || \
00882                                             ((LATENCY) == FLASH_LATENCY_2) || \
00883                                             ((LATENCY) == FLASH_LATENCY_3) || \
00884                                             ((LATENCY) == FLASH_LATENCY_4))
00885 /**
00886   * @}
00887   */ 
00888 
00889 /**
00890   * @}
00891   */ 
00892 
00893 /**
00894   * @}
00895   */ 
00896 
00897 #ifdef __cplusplus
00898 }
00899 #endif
00900 
00901 #endif /* __STM32L4xx_HAL_FLASH_H */
00902 
00903 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/