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HAL_L476/stm32l4xx_hal_pwr_ex.h@1:d0dfbce63a89, 2017-02-24 (annotated)

Committer:
elmot
Date:
Fri Feb 24 21:13:56 2017 +0000
Revision:
1:d0dfbce63a89
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elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_hal_pwr_ex.h
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief Header file of PWR HAL Extended module.
elmot 1:d0dfbce63a89 8 ******************************************************************************
elmot 1:d0dfbce63a89 9 * @attention
elmot 1:d0dfbce63a89 10 *
elmot 1:d0dfbce63a89 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 12 *
elmot 1:d0dfbce63a89 13 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 14 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 15 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 16 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 18 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 19 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 21 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 22 * without specific prior written permission.
elmot 1:d0dfbce63a89 23 *
elmot 1:d0dfbce63a89 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 34 *
elmot 1:d0dfbce63a89 35 ******************************************************************************
elmot 1:d0dfbce63a89 36 */
elmot 1:d0dfbce63a89 37
elmot 1:d0dfbce63a89 38 /* Define to prevent recursive inclusion -------------------------------------*/
elmot 1:d0dfbce63a89 39 #ifndef __STM32L4xx_HAL_PWR_EX_H
elmot 1:d0dfbce63a89 40 #define __STM32L4xx_HAL_PWR_EX_H
elmot 1:d0dfbce63a89 41
elmot 1:d0dfbce63a89 42 #ifdef __cplusplus
elmot 1:d0dfbce63a89 43 extern "C" {
elmot 1:d0dfbce63a89 44 #endif
elmot 1:d0dfbce63a89 45
elmot 1:d0dfbce63a89 46 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 47 #include "stm32l4xx_hal_def.h"
elmot 1:d0dfbce63a89 48
elmot 1:d0dfbce63a89 49 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 50 * @{
elmot 1:d0dfbce63a89 51 */
elmot 1:d0dfbce63a89 52
elmot 1:d0dfbce63a89 53 /** @addtogroup PWREx
elmot 1:d0dfbce63a89 54 * @{
elmot 1:d0dfbce63a89 55 */
elmot 1:d0dfbce63a89 56
elmot 1:d0dfbce63a89 57
elmot 1:d0dfbce63a89 58 /* Exported types ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 59
elmot 1:d0dfbce63a89 60 /** @defgroup PWREx_Exported_Types PWR Extended Exported Types
elmot 1:d0dfbce63a89 61 * @{
elmot 1:d0dfbce63a89 62 */
elmot 1:d0dfbce63a89 63
elmot 1:d0dfbce63a89 64
elmot 1:d0dfbce63a89 65 /**
elmot 1:d0dfbce63a89 66 * @brief PWR PVM configuration structure definition
elmot 1:d0dfbce63a89 67 */
elmot 1:d0dfbce63a89 68 typedef struct
elmot 1:d0dfbce63a89 69 {
elmot 1:d0dfbce63a89 70 uint32_t PVMType; /*!< PVMType: Specifies which voltage is monitored and against which threshold.
elmot 1:d0dfbce63a89 71 This parameter can be a value of @ref PWREx_PVM_Type.
elmot 1:d0dfbce63a89 72 @arg @ref PWR_PVM_1 Peripheral Voltage Monitoring 1 enable: VDDUSB versus 1.2 V (applicable when USB feature is supported).
elmot 1:d0dfbce63a89 73 @if STM32L486xx
elmot 1:d0dfbce63a89 74 @arg @ref PWR_PVM_2 Peripheral Voltage Monitoring 2 enable: VDDIO2 versus 0.9 V (applicable when VDDIO2 is present on device).
elmot 1:d0dfbce63a89 75 @endif
elmot 1:d0dfbce63a89 76 @arg @ref PWR_PVM_3 Peripheral Voltage Monitoring 3 enable: VDDA versus 1.62 V.
elmot 1:d0dfbce63a89 77 @arg @ref PWR_PVM_4 Peripheral Voltage Monitoring 4 enable: VDDA versus 2.2 V. */
elmot 1:d0dfbce63a89 78
elmot 1:d0dfbce63a89 79 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
elmot 1:d0dfbce63a89 80 This parameter can be a value of @ref PWREx_PVM_Mode. */
elmot 1:d0dfbce63a89 81 }PWR_PVMTypeDef;
elmot 1:d0dfbce63a89 82
elmot 1:d0dfbce63a89 83 /**
elmot 1:d0dfbce63a89 84 * @}
elmot 1:d0dfbce63a89 85 */
elmot 1:d0dfbce63a89 86
elmot 1:d0dfbce63a89 87 /* Exported constants --------------------------------------------------------*/
elmot 1:d0dfbce63a89 88
elmot 1:d0dfbce63a89 89 /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants
elmot 1:d0dfbce63a89 90 * @{
elmot 1:d0dfbce63a89 91 */
elmot 1:d0dfbce63a89 92
elmot 1:d0dfbce63a89 93 /** @defgroup PWREx_WUP_Polarity Shift to apply to retrieve polarity information from PWR_WAKEUP_PINy_xxx constants
elmot 1:d0dfbce63a89 94 * @{
elmot 1:d0dfbce63a89 95 */
elmot 1:d0dfbce63a89 96 #define PWR_WUP_POLARITY_SHIFT 0x05 /*!< Internal constant used to retrieve wakeup pin polariry */
elmot 1:d0dfbce63a89 97 /**
elmot 1:d0dfbce63a89 98 * @}
elmot 1:d0dfbce63a89 99 */
elmot 1:d0dfbce63a89 100
elmot 1:d0dfbce63a89 101
elmot 1:d0dfbce63a89 102 /** @defgroup PWREx_WakeUp_Pins PWR wake-up pins
elmot 1:d0dfbce63a89 103 * @{
elmot 1:d0dfbce63a89 104 */
elmot 1:d0dfbce63a89 105 #define PWR_WAKEUP_PIN1 PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */
elmot 1:d0dfbce63a89 106 #define PWR_WAKEUP_PIN2 PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */
elmot 1:d0dfbce63a89 107 #define PWR_WAKEUP_PIN3 PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */
elmot 1:d0dfbce63a89 108 #define PWR_WAKEUP_PIN4 PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */
elmot 1:d0dfbce63a89 109 #define PWR_WAKEUP_PIN5 PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */
elmot 1:d0dfbce63a89 110 #define PWR_WAKEUP_PIN1_HIGH PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */
elmot 1:d0dfbce63a89 111 #define PWR_WAKEUP_PIN2_HIGH PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */
elmot 1:d0dfbce63a89 112 #define PWR_WAKEUP_PIN3_HIGH PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */
elmot 1:d0dfbce63a89 113 #define PWR_WAKEUP_PIN4_HIGH PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */
elmot 1:d0dfbce63a89 114 #define PWR_WAKEUP_PIN5_HIGH PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */
elmot 1:d0dfbce63a89 115 #define PWR_WAKEUP_PIN1_LOW (uint32_t)((PWR_CR4_WP1<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP1) /*!< Wakeup pin 1 (with low level polarity) */
elmot 1:d0dfbce63a89 116 #define PWR_WAKEUP_PIN2_LOW (uint32_t)((PWR_CR4_WP2<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP2) /*!< Wakeup pin 2 (with low level polarity) */
elmot 1:d0dfbce63a89 117 #define PWR_WAKEUP_PIN3_LOW (uint32_t)((PWR_CR4_WP3<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP3) /*!< Wakeup pin 3 (with low level polarity) */
elmot 1:d0dfbce63a89 118 #define PWR_WAKEUP_PIN4_LOW (uint32_t)((PWR_CR4_WP4<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP4) /*!< Wakeup pin 4 (with low level polarity) */
elmot 1:d0dfbce63a89 119 #define PWR_WAKEUP_PIN5_LOW (uint32_t)((PWR_CR4_WP5<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP5) /*!< Wakeup pin 5 (with low level polarity) */
elmot 1:d0dfbce63a89 120 /**
elmot 1:d0dfbce63a89 121 * @}
elmot 1:d0dfbce63a89 122 */
elmot 1:d0dfbce63a89 123
elmot 1:d0dfbce63a89 124 /** @defgroup PWREx_PVM_Type Peripheral Voltage Monitoring type
elmot 1:d0dfbce63a89 125 * @{
elmot 1:d0dfbce63a89 126 */
elmot 1:d0dfbce63a89 127 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
elmot 1:d0dfbce63a89 128 defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 129 #define PWR_PVM_1 PWR_CR2_PVME1 /*!< Peripheral Voltage Monitoring 1 enable: VDDUSB versus 1.2 V (applicable when USB feature is supported) */
elmot 1:d0dfbce63a89 130 #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
elmot 1:d0dfbce63a89 131 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 132 #define PWR_PVM_2 PWR_CR2_PVME2 /*!< Peripheral Voltage Monitoring 2 enable: VDDIO2 versus 0.9 V (applicable when VDDIO2 is present on device) */
elmot 1:d0dfbce63a89 133 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
elmot 1:d0dfbce63a89 134 #define PWR_PVM_3 PWR_CR2_PVME3 /*!< Peripheral Voltage Monitoring 3 enable: VDDA versus 1.62 V */
elmot 1:d0dfbce63a89 135 #define PWR_PVM_4 PWR_CR2_PVME4 /*!< Peripheral Voltage Monitoring 4 enable: VDDA versus 2.2 V */
elmot 1:d0dfbce63a89 136 /**
elmot 1:d0dfbce63a89 137 * @}
elmot 1:d0dfbce63a89 138 */
elmot 1:d0dfbce63a89 139
elmot 1:d0dfbce63a89 140 /** @defgroup PWREx_PVM_Mode PWR PVM interrupt and event mode
elmot 1:d0dfbce63a89 141 * @{
elmot 1:d0dfbce63a89 142 */
elmot 1:d0dfbce63a89 143 #define PWR_PVM_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
elmot 1:d0dfbce63a89 144 #define PWR_PVM_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
elmot 1:d0dfbce63a89 145 #define PWR_PVM_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
elmot 1:d0dfbce63a89 146 #define PWR_PVM_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
elmot 1:d0dfbce63a89 147 #define PWR_PVM_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
elmot 1:d0dfbce63a89 148 #define PWR_PVM_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
elmot 1:d0dfbce63a89 149 #define PWR_PVM_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
elmot 1:d0dfbce63a89 150 /**
elmot 1:d0dfbce63a89 151 * @}
elmot 1:d0dfbce63a89 152 */
elmot 1:d0dfbce63a89 153
elmot 1:d0dfbce63a89 154
elmot 1:d0dfbce63a89 155
elmot 1:d0dfbce63a89 156 /** @defgroup PWREx_Regulator_Voltage_Scale PWR Regulator voltage scale
elmot 1:d0dfbce63a89 157 * @{
elmot 1:d0dfbce63a89 158 */
elmot 1:d0dfbce63a89 159 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS_0 /*!< Voltage scaling range 1 */
elmot 1:d0dfbce63a89 160 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 /*!< Voltage scaling range 2 */
elmot 1:d0dfbce63a89 161 /**
elmot 1:d0dfbce63a89 162 * @}
elmot 1:d0dfbce63a89 163 */
elmot 1:d0dfbce63a89 164
elmot 1:d0dfbce63a89 165
elmot 1:d0dfbce63a89 166 /** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR battery charging resistor selection
elmot 1:d0dfbce63a89 167 * @{
elmot 1:d0dfbce63a89 168 */
elmot 1:d0dfbce63a89 169 #define PWR_BATTERY_CHARGING_RESISTOR_5 ((uint32_t)0x00000000) /*!< VBAT charging through a 5 kOhms resistor */
elmot 1:d0dfbce63a89 170 #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR4_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */
elmot 1:d0dfbce63a89 171 /**
elmot 1:d0dfbce63a89 172 * @}
elmot 1:d0dfbce63a89 173 */
elmot 1:d0dfbce63a89 174
elmot 1:d0dfbce63a89 175 /** @defgroup PWREx_VBAT_Battery_Charging PWR battery charging
elmot 1:d0dfbce63a89 176 * @{
elmot 1:d0dfbce63a89 177 */
elmot 1:d0dfbce63a89 178 #define PWR_BATTERY_CHARGING_DISABLE ((uint32_t)0x00000000)
elmot 1:d0dfbce63a89 179 #define PWR_BATTERY_CHARGING_ENABLE PWR_CR4_VBE
elmot 1:d0dfbce63a89 180 /**
elmot 1:d0dfbce63a89 181 * @}
elmot 1:d0dfbce63a89 182 */
elmot 1:d0dfbce63a89 183
elmot 1:d0dfbce63a89 184 /** @defgroup PWREx_GPIO_Bit_Number GPIO bit number for I/O setting in standby/shutdown mode
elmot 1:d0dfbce63a89 185 * @{
elmot 1:d0dfbce63a89 186 */
elmot 1:d0dfbce63a89 187 #define PWR_GPIO_BIT_0 PWR_PUCRA_PA0 /*!< GPIO port I/O pin 0 */
elmot 1:d0dfbce63a89 188 #define PWR_GPIO_BIT_1 PWR_PUCRA_PA1 /*!< GPIO port I/O pin 1 */
elmot 1:d0dfbce63a89 189 #define PWR_GPIO_BIT_2 PWR_PUCRA_PA2 /*!< GPIO port I/O pin 2 */
elmot 1:d0dfbce63a89 190 #define PWR_GPIO_BIT_3 PWR_PUCRA_PA3 /*!< GPIO port I/O pin 3 */
elmot 1:d0dfbce63a89 191 #define PWR_GPIO_BIT_4 PWR_PUCRA_PA4 /*!< GPIO port I/O pin 4 */
elmot 1:d0dfbce63a89 192 #define PWR_GPIO_BIT_5 PWR_PUCRA_PA5 /*!< GPIO port I/O pin 5 */
elmot 1:d0dfbce63a89 193 #define PWR_GPIO_BIT_6 PWR_PUCRA_PA6 /*!< GPIO port I/O pin 6 */
elmot 1:d0dfbce63a89 194 #define PWR_GPIO_BIT_7 PWR_PUCRA_PA7 /*!< GPIO port I/O pin 7 */
elmot 1:d0dfbce63a89 195 #define PWR_GPIO_BIT_8 PWR_PUCRA_PA8 /*!< GPIO port I/O pin 8 */
elmot 1:d0dfbce63a89 196 #define PWR_GPIO_BIT_9 PWR_PUCRA_PA9 /*!< GPIO port I/O pin 9 */
elmot 1:d0dfbce63a89 197 #define PWR_GPIO_BIT_10 PWR_PUCRA_PA10 /*!< GPIO port I/O pin 10 */
elmot 1:d0dfbce63a89 198 #define PWR_GPIO_BIT_11 PWR_PUCRA_PA11 /*!< GPIO port I/O pin 11 */
elmot 1:d0dfbce63a89 199 #define PWR_GPIO_BIT_12 PWR_PUCRA_PA12 /*!< GPIO port I/O pin 12 */
elmot 1:d0dfbce63a89 200 #define PWR_GPIO_BIT_13 PWR_PUCRA_PA13 /*!< GPIO port I/O pin 13 */
elmot 1:d0dfbce63a89 201 #define PWR_GPIO_BIT_14 PWR_PDCRA_PA14 /*!< GPIO port I/O pin 14 */
elmot 1:d0dfbce63a89 202 #define PWR_GPIO_BIT_15 PWR_PUCRA_PA15 /*!< GPIO port I/O pin 15 */
elmot 1:d0dfbce63a89 203 /**
elmot 1:d0dfbce63a89 204 * @}
elmot 1:d0dfbce63a89 205 */
elmot 1:d0dfbce63a89 206
elmot 1:d0dfbce63a89 207 /** @defgroup PWREx_GPIO GPIO port
elmot 1:d0dfbce63a89 208 * @{
elmot 1:d0dfbce63a89 209 */
elmot 1:d0dfbce63a89 210 #define PWR_GPIO_A 0x00000000 /*!< GPIO port A */
elmot 1:d0dfbce63a89 211 #define PWR_GPIO_B 0x00000001 /*!< GPIO port B */
elmot 1:d0dfbce63a89 212 #define PWR_GPIO_C 0x00000002 /*!< GPIO port C */
elmot 1:d0dfbce63a89 213 #if defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) || \
elmot 1:d0dfbce63a89 214 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 215 #define PWR_GPIO_D 0x00000003 /*!< GPIO port D */
elmot 1:d0dfbce63a89 216 #define PWR_GPIO_E 0x00000004 /*!< GPIO port E */
elmot 1:d0dfbce63a89 217 #endif
elmot 1:d0dfbce63a89 218 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 219 #define PWR_GPIO_F 0x00000005 /*!< GPIO port F */
elmot 1:d0dfbce63a89 220 #define PWR_GPIO_G 0x00000006 /*!< GPIO port G */
elmot 1:d0dfbce63a89 221 #endif
elmot 1:d0dfbce63a89 222 #define PWR_GPIO_H 0x00000007 /*!< GPIO port H */
elmot 1:d0dfbce63a89 223 /**
elmot 1:d0dfbce63a89 224 * @}
elmot 1:d0dfbce63a89 225 */
elmot 1:d0dfbce63a89 226
elmot 1:d0dfbce63a89 227 /** @defgroup PWREx_PVM_EXTI_LINE PWR PVM external interrupts lines
elmot 1:d0dfbce63a89 228 * @{
elmot 1:d0dfbce63a89 229 */
elmot 1:d0dfbce63a89 230 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 231 #define PWR_EXTI_LINE_PVM1 ((uint32_t)0x00000008) /*!< External interrupt line 35 Connected to the PVM1 EXTI Line */
elmot 1:d0dfbce63a89 232 #endif /* defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 233 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 234 #define PWR_EXTI_LINE_PVM2 ((uint32_t)0x00000010) /*!< External interrupt line 36 Connected to the PVM2 EXTI Line */
elmot 1:d0dfbce63a89 235 #endif /* defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 236 #define PWR_EXTI_LINE_PVM3 ((uint32_t)0x00000020) /*!< External interrupt line 37 Connected to the PVM3 EXTI Line */
elmot 1:d0dfbce63a89 237 #define PWR_EXTI_LINE_PVM4 ((uint32_t)0x00000040) /*!< External interrupt line 38 Connected to the PVM4 EXTI Line */
elmot 1:d0dfbce63a89 238 /**
elmot 1:d0dfbce63a89 239 * @}
elmot 1:d0dfbce63a89 240 */
elmot 1:d0dfbce63a89 241
elmot 1:d0dfbce63a89 242 /** @defgroup PWREx_PVM_EVENT_LINE PWR PVM event lines
elmot 1:d0dfbce63a89 243 * @{
elmot 1:d0dfbce63a89 244 */
elmot 1:d0dfbce63a89 245 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 246 #define PWR_EVENT_LINE_PVM1 ((uint32_t)0x00000008) /*!< Event line 35 Connected to the PVM1 EXTI Line */
elmot 1:d0dfbce63a89 247 #endif /* defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 248 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 249 #define PWR_EVENT_LINE_PVM2 ((uint32_t)0x00000010) /*!< Event line 36 Connected to the PVM2 EXTI Line */
elmot 1:d0dfbce63a89 250 #endif /* defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 251 #define PWR_EVENT_LINE_PVM3 ((uint32_t)0x00000020) /*!< Event line 37 Connected to the PVM3 EXTI Line */
elmot 1:d0dfbce63a89 252 #define PWR_EVENT_LINE_PVM4 ((uint32_t)0x00000040) /*!< Event line 38 Connected to the PVM4 EXTI Line */
elmot 1:d0dfbce63a89 253 /**
elmot 1:d0dfbce63a89 254 * @}
elmot 1:d0dfbce63a89 255 */
elmot 1:d0dfbce63a89 256
elmot 1:d0dfbce63a89 257 /** @defgroup PWREx_Flag PWR Status Flags
elmot 1:d0dfbce63a89 258 * Elements values convention: 0000 0000 0XXY YYYYb
elmot 1:d0dfbce63a89 259 * - Y YYYY : Flag position in the XX register (5 bits)
elmot 1:d0dfbce63a89 260 * - XX : Status register (2 bits)
elmot 1:d0dfbce63a89 261 * - 01: SR1 register
elmot 1:d0dfbce63a89 262 * - 10: SR2 register
elmot 1:d0dfbce63a89 263 * The only exception is PWR_FLAG_WU, encompassing all
elmot 1:d0dfbce63a89 264 * wake-up flags and set to PWR_SR1_WUF.
elmot 1:d0dfbce63a89 265 * @{
elmot 1:d0dfbce63a89 266 */
elmot 1:d0dfbce63a89 267 #define PWR_FLAG_WUF1 ((uint32_t)0x0020) /*!< Wakeup event on wakeup pin 1 */
elmot 1:d0dfbce63a89 268 #define PWR_FLAG_WUF2 ((uint32_t)0x0021) /*!< Wakeup event on wakeup pin 2 */
elmot 1:d0dfbce63a89 269 #define PWR_FLAG_WUF3 ((uint32_t)0x0022) /*!< Wakeup event on wakeup pin 3 */
elmot 1:d0dfbce63a89 270 #define PWR_FLAG_WUF4 ((uint32_t)0x0023) /*!< Wakeup event on wakeup pin 4 */
elmot 1:d0dfbce63a89 271 #define PWR_FLAG_WUF5 ((uint32_t)0x0024) /*!< Wakeup event on wakeup pin 5 */
elmot 1:d0dfbce63a89 272 #define PWR_FLAG_WU PWR_SR1_WUF /*!< Encompass wakeup event on all wakeup pins */
elmot 1:d0dfbce63a89 273 #define PWR_FLAG_SB ((uint32_t)0x0028) /*!< Standby flag */
elmot 1:d0dfbce63a89 274 #define PWR_FLAG_WUFI ((uint32_t)0x002F) /*!< Wakeup on internal wakeup line */
elmot 1:d0dfbce63a89 275
elmot 1:d0dfbce63a89 276 #define PWR_FLAG_REGLPS ((uint32_t)0x0048) /*!< Low-power regulator start flag */
elmot 1:d0dfbce63a89 277 #define PWR_FLAG_REGLPF ((uint32_t)0x0049) /*!< Low-power regulator flag */
elmot 1:d0dfbce63a89 278 #define PWR_FLAG_VOSF ((uint32_t)0x004A) /*!< Voltage scaling flag */
elmot 1:d0dfbce63a89 279 #define PWR_FLAG_PVDO ((uint32_t)0x004B) /*!< Power Voltage Detector output flag */
elmot 1:d0dfbce63a89 280 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 281 #define PWR_FLAG_PVMO1 ((uint32_t)0x004C) /*!< Power Voltage Monitoring 1 output flag */
elmot 1:d0dfbce63a89 282 #endif /* defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 283 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 284 #define PWR_FLAG_PVMO2 ((uint32_t)0x004D) /*!< Power Voltage Monitoring 2 output flag */
elmot 1:d0dfbce63a89 285 #endif /* defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 286 #define PWR_FLAG_PVMO3 ((uint32_t)0x004E) /*!< Power Voltage Monitoring 3 output flag */
elmot 1:d0dfbce63a89 287 #define PWR_FLAG_PVMO4 ((uint32_t)0x004F) /*!< Power Voltage Monitoring 4 output flag */
elmot 1:d0dfbce63a89 288 /**
elmot 1:d0dfbce63a89 289 * @}
elmot 1:d0dfbce63a89 290 */
elmot 1:d0dfbce63a89 291
elmot 1:d0dfbce63a89 292 /**
elmot 1:d0dfbce63a89 293 * @}
elmot 1:d0dfbce63a89 294 */
elmot 1:d0dfbce63a89 295
elmot 1:d0dfbce63a89 296 /* Exported macros -----------------------------------------------------------*/
elmot 1:d0dfbce63a89 297 /** @defgroup PWREx_Exported_Macros PWR Extended Exported Macros
elmot 1:d0dfbce63a89 298 * @{
elmot 1:d0dfbce63a89 299 */
elmot 1:d0dfbce63a89 300
elmot 1:d0dfbce63a89 301 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 302 /**
elmot 1:d0dfbce63a89 303 * @brief Enable the PVM1 Extended Interrupt Line.
elmot 1:d0dfbce63a89 304 * @retval None
elmot 1:d0dfbce63a89 305 */
elmot 1:d0dfbce63a89 306 #define __HAL_PWR_PVM1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 307
elmot 1:d0dfbce63a89 308 /**
elmot 1:d0dfbce63a89 309 * @brief Disable the PVM1 Extended Interrupt Line.
elmot 1:d0dfbce63a89 310 * @retval None
elmot 1:d0dfbce63a89 311 */
elmot 1:d0dfbce63a89 312 #define __HAL_PWR_PVM1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 313
elmot 1:d0dfbce63a89 314 /**
elmot 1:d0dfbce63a89 315 * @brief Enable the PVM1 Event Line.
elmot 1:d0dfbce63a89 316 * @retval None
elmot 1:d0dfbce63a89 317 */
elmot 1:d0dfbce63a89 318 #define __HAL_PWR_PVM1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1)
elmot 1:d0dfbce63a89 319
elmot 1:d0dfbce63a89 320 /**
elmot 1:d0dfbce63a89 321 * @brief Disable the PVM1 Event Line.
elmot 1:d0dfbce63a89 322 * @retval None
elmot 1:d0dfbce63a89 323 */
elmot 1:d0dfbce63a89 324 #define __HAL_PWR_PVM1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1)
elmot 1:d0dfbce63a89 325
elmot 1:d0dfbce63a89 326 /**
elmot 1:d0dfbce63a89 327 * @brief Enable the PVM1 Extended Interrupt Rising Trigger.
elmot 1:d0dfbce63a89 328 * @retval None
elmot 1:d0dfbce63a89 329 */
elmot 1:d0dfbce63a89 330 #define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 331
elmot 1:d0dfbce63a89 332 /**
elmot 1:d0dfbce63a89 333 * @brief Disable the PVM1 Extended Interrupt Rising Trigger.
elmot 1:d0dfbce63a89 334 * @retval None
elmot 1:d0dfbce63a89 335 */
elmot 1:d0dfbce63a89 336 #define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 337
elmot 1:d0dfbce63a89 338 /**
elmot 1:d0dfbce63a89 339 * @brief Enable the PVM1 Extended Interrupt Falling Trigger.
elmot 1:d0dfbce63a89 340 * @retval None
elmot 1:d0dfbce63a89 341 */
elmot 1:d0dfbce63a89 342 #define __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 343
elmot 1:d0dfbce63a89 344
elmot 1:d0dfbce63a89 345 /**
elmot 1:d0dfbce63a89 346 * @brief Disable the PVM1 Extended Interrupt Falling Trigger.
elmot 1:d0dfbce63a89 347 * @retval None
elmot 1:d0dfbce63a89 348 */
elmot 1:d0dfbce63a89 349 #define __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 350
elmot 1:d0dfbce63a89 351
elmot 1:d0dfbce63a89 352 /**
elmot 1:d0dfbce63a89 353 * @brief PVM1 EXTI line configuration: set rising & falling edge trigger.
elmot 1:d0dfbce63a89 354 * @retval None
elmot 1:d0dfbce63a89 355 */
elmot 1:d0dfbce63a89 356 #define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_FALLING_EDGE() \
elmot 1:d0dfbce63a89 357 do { \
elmot 1:d0dfbce63a89 358 __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); \
elmot 1:d0dfbce63a89 359 __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); \
elmot 1:d0dfbce63a89 360 } while(0)
elmot 1:d0dfbce63a89 361
elmot 1:d0dfbce63a89 362 /**
elmot 1:d0dfbce63a89 363 * @brief Disable the PVM1 Extended Interrupt Rising & Falling Trigger.
elmot 1:d0dfbce63a89 364 * @retval None
elmot 1:d0dfbce63a89 365 */
elmot 1:d0dfbce63a89 366 #define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_FALLING_EDGE() \
elmot 1:d0dfbce63a89 367 do { \
elmot 1:d0dfbce63a89 368 __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); \
elmot 1:d0dfbce63a89 369 __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); \
elmot 1:d0dfbce63a89 370 } while(0)
elmot 1:d0dfbce63a89 371
elmot 1:d0dfbce63a89 372 /**
elmot 1:d0dfbce63a89 373 * @brief Generate a Software interrupt on selected EXTI line.
elmot 1:d0dfbce63a89 374 * @retval None
elmot 1:d0dfbce63a89 375 */
elmot 1:d0dfbce63a89 376 #define __HAL_PWR_PVM1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 377
elmot 1:d0dfbce63a89 378 /**
elmot 1:d0dfbce63a89 379 * @brief Check whether the specified PVM1 EXTI interrupt flag is set or not.
elmot 1:d0dfbce63a89 380 * @retval EXTI PVM1 Line Status.
elmot 1:d0dfbce63a89 381 */
elmot 1:d0dfbce63a89 382 #define __HAL_PWR_PVM1_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 383
elmot 1:d0dfbce63a89 384 /**
elmot 1:d0dfbce63a89 385 * @brief Clear the PVM1 EXTI flag.
elmot 1:d0dfbce63a89 386 * @retval None
elmot 1:d0dfbce63a89 387 */
elmot 1:d0dfbce63a89 388 #define __HAL_PWR_PVM1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM1)
elmot 1:d0dfbce63a89 389
elmot 1:d0dfbce63a89 390 #endif /* defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 391
elmot 1:d0dfbce63a89 392
elmot 1:d0dfbce63a89 393 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 394 /**
elmot 1:d0dfbce63a89 395 * @brief Enable the PVM2 Extended Interrupt Line.
elmot 1:d0dfbce63a89 396 * @retval None
elmot 1:d0dfbce63a89 397 */
elmot 1:d0dfbce63a89 398 #define __HAL_PWR_PVM2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 399
elmot 1:d0dfbce63a89 400 /**
elmot 1:d0dfbce63a89 401 * @brief Disable the PVM2 Extended Interrupt Line.
elmot 1:d0dfbce63a89 402 * @retval None
elmot 1:d0dfbce63a89 403 */
elmot 1:d0dfbce63a89 404 #define __HAL_PWR_PVM2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 405
elmot 1:d0dfbce63a89 406 /**
elmot 1:d0dfbce63a89 407 * @brief Enable the PVM2 Event Line.
elmot 1:d0dfbce63a89 408 * @retval None
elmot 1:d0dfbce63a89 409 */
elmot 1:d0dfbce63a89 410 #define __HAL_PWR_PVM2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2)
elmot 1:d0dfbce63a89 411
elmot 1:d0dfbce63a89 412 /**
elmot 1:d0dfbce63a89 413 * @brief Disable the PVM2 Event Line.
elmot 1:d0dfbce63a89 414 * @retval None
elmot 1:d0dfbce63a89 415 */
elmot 1:d0dfbce63a89 416 #define __HAL_PWR_PVM2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2)
elmot 1:d0dfbce63a89 417
elmot 1:d0dfbce63a89 418 /**
elmot 1:d0dfbce63a89 419 * @brief Enable the PVM2 Extended Interrupt Rising Trigger.
elmot 1:d0dfbce63a89 420 * @retval None
elmot 1:d0dfbce63a89 421 */
elmot 1:d0dfbce63a89 422 #define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 423
elmot 1:d0dfbce63a89 424 /**
elmot 1:d0dfbce63a89 425 * @brief Disable the PVM2 Extended Interrupt Rising Trigger.
elmot 1:d0dfbce63a89 426 * @retval None
elmot 1:d0dfbce63a89 427 */
elmot 1:d0dfbce63a89 428 #define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 429
elmot 1:d0dfbce63a89 430 /**
elmot 1:d0dfbce63a89 431 * @brief Enable the PVM2 Extended Interrupt Falling Trigger.
elmot 1:d0dfbce63a89 432 * @retval None
elmot 1:d0dfbce63a89 433 */
elmot 1:d0dfbce63a89 434 #define __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 435
elmot 1:d0dfbce63a89 436
elmot 1:d0dfbce63a89 437 /**
elmot 1:d0dfbce63a89 438 * @brief Disable the PVM2 Extended Interrupt Falling Trigger.
elmot 1:d0dfbce63a89 439 * @retval None
elmot 1:d0dfbce63a89 440 */
elmot 1:d0dfbce63a89 441 #define __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 442
elmot 1:d0dfbce63a89 443
elmot 1:d0dfbce63a89 444 /**
elmot 1:d0dfbce63a89 445 * @brief PVM2 EXTI line configuration: set rising & falling edge trigger.
elmot 1:d0dfbce63a89 446 * @retval None
elmot 1:d0dfbce63a89 447 */
elmot 1:d0dfbce63a89 448 #define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_FALLING_EDGE() \
elmot 1:d0dfbce63a89 449 do { \
elmot 1:d0dfbce63a89 450 __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); \
elmot 1:d0dfbce63a89 451 __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); \
elmot 1:d0dfbce63a89 452 } while(0)
elmot 1:d0dfbce63a89 453
elmot 1:d0dfbce63a89 454 /**
elmot 1:d0dfbce63a89 455 * @brief Disable the PVM2 Extended Interrupt Rising & Falling Trigger.
elmot 1:d0dfbce63a89 456 * @retval None
elmot 1:d0dfbce63a89 457 */
elmot 1:d0dfbce63a89 458 #define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_FALLING_EDGE() \
elmot 1:d0dfbce63a89 459 do { \
elmot 1:d0dfbce63a89 460 __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); \
elmot 1:d0dfbce63a89 461 __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); \
elmot 1:d0dfbce63a89 462 } while(0)
elmot 1:d0dfbce63a89 463
elmot 1:d0dfbce63a89 464 /**
elmot 1:d0dfbce63a89 465 * @brief Generate a Software interrupt on selected EXTI line.
elmot 1:d0dfbce63a89 466 * @retval None
elmot 1:d0dfbce63a89 467 */
elmot 1:d0dfbce63a89 468 #define __HAL_PWR_PVM2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 469
elmot 1:d0dfbce63a89 470 /**
elmot 1:d0dfbce63a89 471 * @brief Check whether the specified PVM2 EXTI interrupt flag is set or not.
elmot 1:d0dfbce63a89 472 * @retval EXTI PVM2 Line Status.
elmot 1:d0dfbce63a89 473 */
elmot 1:d0dfbce63a89 474 #define __HAL_PWR_PVM2_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 475
elmot 1:d0dfbce63a89 476 /**
elmot 1:d0dfbce63a89 477 * @brief Clear the PVM2 EXTI flag.
elmot 1:d0dfbce63a89 478 * @retval None
elmot 1:d0dfbce63a89 479 */
elmot 1:d0dfbce63a89 480 #define __HAL_PWR_PVM2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM2)
elmot 1:d0dfbce63a89 481
elmot 1:d0dfbce63a89 482 #endif /* defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 483
elmot 1:d0dfbce63a89 484
elmot 1:d0dfbce63a89 485 /**
elmot 1:d0dfbce63a89 486 * @brief Enable the PVM3 Extended Interrupt Line.
elmot 1:d0dfbce63a89 487 * @retval None
elmot 1:d0dfbce63a89 488 */
elmot 1:d0dfbce63a89 489 #define __HAL_PWR_PVM3_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 490
elmot 1:d0dfbce63a89 491 /**
elmot 1:d0dfbce63a89 492 * @brief Disable the PVM3 Extended Interrupt Line.
elmot 1:d0dfbce63a89 493 * @retval None
elmot 1:d0dfbce63a89 494 */
elmot 1:d0dfbce63a89 495 #define __HAL_PWR_PVM3_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 496
elmot 1:d0dfbce63a89 497 /**
elmot 1:d0dfbce63a89 498 * @brief Enable the PVM3 Event Line.
elmot 1:d0dfbce63a89 499 * @retval None
elmot 1:d0dfbce63a89 500 */
elmot 1:d0dfbce63a89 501 #define __HAL_PWR_PVM3_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3)
elmot 1:d0dfbce63a89 502
elmot 1:d0dfbce63a89 503 /**
elmot 1:d0dfbce63a89 504 * @brief Disable the PVM3 Event Line.
elmot 1:d0dfbce63a89 505 * @retval None
elmot 1:d0dfbce63a89 506 */
elmot 1:d0dfbce63a89 507 #define __HAL_PWR_PVM3_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3)
elmot 1:d0dfbce63a89 508
elmot 1:d0dfbce63a89 509 /**
elmot 1:d0dfbce63a89 510 * @brief Enable the PVM3 Extended Interrupt Rising Trigger.
elmot 1:d0dfbce63a89 511 * @retval None
elmot 1:d0dfbce63a89 512 */
elmot 1:d0dfbce63a89 513 #define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 514
elmot 1:d0dfbce63a89 515 /**
elmot 1:d0dfbce63a89 516 * @brief Disable the PVM3 Extended Interrupt Rising Trigger.
elmot 1:d0dfbce63a89 517 * @retval None
elmot 1:d0dfbce63a89 518 */
elmot 1:d0dfbce63a89 519 #define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 520
elmot 1:d0dfbce63a89 521 /**
elmot 1:d0dfbce63a89 522 * @brief Enable the PVM3 Extended Interrupt Falling Trigger.
elmot 1:d0dfbce63a89 523 * @retval None
elmot 1:d0dfbce63a89 524 */
elmot 1:d0dfbce63a89 525 #define __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 526
elmot 1:d0dfbce63a89 527
elmot 1:d0dfbce63a89 528 /**
elmot 1:d0dfbce63a89 529 * @brief Disable the PVM3 Extended Interrupt Falling Trigger.
elmot 1:d0dfbce63a89 530 * @retval None
elmot 1:d0dfbce63a89 531 */
elmot 1:d0dfbce63a89 532 #define __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 533
elmot 1:d0dfbce63a89 534
elmot 1:d0dfbce63a89 535 /**
elmot 1:d0dfbce63a89 536 * @brief PVM3 EXTI line configuration: set rising & falling edge trigger.
elmot 1:d0dfbce63a89 537 * @retval None
elmot 1:d0dfbce63a89 538 */
elmot 1:d0dfbce63a89 539 #define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_FALLING_EDGE() \
elmot 1:d0dfbce63a89 540 do { \
elmot 1:d0dfbce63a89 541 __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); \
elmot 1:d0dfbce63a89 542 __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); \
elmot 1:d0dfbce63a89 543 } while(0)
elmot 1:d0dfbce63a89 544
elmot 1:d0dfbce63a89 545 /**
elmot 1:d0dfbce63a89 546 * @brief Disable the PVM3 Extended Interrupt Rising & Falling Trigger.
elmot 1:d0dfbce63a89 547 * @retval None
elmot 1:d0dfbce63a89 548 */
elmot 1:d0dfbce63a89 549 #define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_FALLING_EDGE() \
elmot 1:d0dfbce63a89 550 do { \
elmot 1:d0dfbce63a89 551 __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); \
elmot 1:d0dfbce63a89 552 __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); \
elmot 1:d0dfbce63a89 553 } while(0)
elmot 1:d0dfbce63a89 554
elmot 1:d0dfbce63a89 555 /**
elmot 1:d0dfbce63a89 556 * @brief Generate a Software interrupt on selected EXTI line.
elmot 1:d0dfbce63a89 557 * @retval None
elmot 1:d0dfbce63a89 558 */
elmot 1:d0dfbce63a89 559 #define __HAL_PWR_PVM3_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 560
elmot 1:d0dfbce63a89 561 /**
elmot 1:d0dfbce63a89 562 * @brief Check whether the specified PVM3 EXTI interrupt flag is set or not.
elmot 1:d0dfbce63a89 563 * @retval EXTI PVM3 Line Status.
elmot 1:d0dfbce63a89 564 */
elmot 1:d0dfbce63a89 565 #define __HAL_PWR_PVM3_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 566
elmot 1:d0dfbce63a89 567 /**
elmot 1:d0dfbce63a89 568 * @brief Clear the PVM3 EXTI flag.
elmot 1:d0dfbce63a89 569 * @retval None
elmot 1:d0dfbce63a89 570 */
elmot 1:d0dfbce63a89 571 #define __HAL_PWR_PVM3_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM3)
elmot 1:d0dfbce63a89 572
elmot 1:d0dfbce63a89 573
elmot 1:d0dfbce63a89 574
elmot 1:d0dfbce63a89 575
elmot 1:d0dfbce63a89 576 /**
elmot 1:d0dfbce63a89 577 * @brief Enable the PVM4 Extended Interrupt Line.
elmot 1:d0dfbce63a89 578 * @retval None
elmot 1:d0dfbce63a89 579 */
elmot 1:d0dfbce63a89 580 #define __HAL_PWR_PVM4_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 581
elmot 1:d0dfbce63a89 582 /**
elmot 1:d0dfbce63a89 583 * @brief Disable the PVM4 Extended Interrupt Line.
elmot 1:d0dfbce63a89 584 * @retval None
elmot 1:d0dfbce63a89 585 */
elmot 1:d0dfbce63a89 586 #define __HAL_PWR_PVM4_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 587
elmot 1:d0dfbce63a89 588 /**
elmot 1:d0dfbce63a89 589 * @brief Enable the PVM4 Event Line.
elmot 1:d0dfbce63a89 590 * @retval None
elmot 1:d0dfbce63a89 591 */
elmot 1:d0dfbce63a89 592 #define __HAL_PWR_PVM4_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4)
elmot 1:d0dfbce63a89 593
elmot 1:d0dfbce63a89 594 /**
elmot 1:d0dfbce63a89 595 * @brief Disable the PVM4 Event Line.
elmot 1:d0dfbce63a89 596 * @retval None
elmot 1:d0dfbce63a89 597 */
elmot 1:d0dfbce63a89 598 #define __HAL_PWR_PVM4_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4)
elmot 1:d0dfbce63a89 599
elmot 1:d0dfbce63a89 600 /**
elmot 1:d0dfbce63a89 601 * @brief Enable the PVM4 Extended Interrupt Rising Trigger.
elmot 1:d0dfbce63a89 602 * @retval None
elmot 1:d0dfbce63a89 603 */
elmot 1:d0dfbce63a89 604 #define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 605
elmot 1:d0dfbce63a89 606 /**
elmot 1:d0dfbce63a89 607 * @brief Disable the PVM4 Extended Interrupt Rising Trigger.
elmot 1:d0dfbce63a89 608 * @retval None
elmot 1:d0dfbce63a89 609 */
elmot 1:d0dfbce63a89 610 #define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 611
elmot 1:d0dfbce63a89 612 /**
elmot 1:d0dfbce63a89 613 * @brief Enable the PVM4 Extended Interrupt Falling Trigger.
elmot 1:d0dfbce63a89 614 * @retval None
elmot 1:d0dfbce63a89 615 */
elmot 1:d0dfbce63a89 616 #define __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 617
elmot 1:d0dfbce63a89 618
elmot 1:d0dfbce63a89 619 /**
elmot 1:d0dfbce63a89 620 * @brief Disable the PVM4 Extended Interrupt Falling Trigger.
elmot 1:d0dfbce63a89 621 * @retval None
elmot 1:d0dfbce63a89 622 */
elmot 1:d0dfbce63a89 623 #define __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 624
elmot 1:d0dfbce63a89 625
elmot 1:d0dfbce63a89 626 /**
elmot 1:d0dfbce63a89 627 * @brief PVM4 EXTI line configuration: set rising & falling edge trigger.
elmot 1:d0dfbce63a89 628 * @retval None
elmot 1:d0dfbce63a89 629 */
elmot 1:d0dfbce63a89 630 #define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_FALLING_EDGE() \
elmot 1:d0dfbce63a89 631 do { \
elmot 1:d0dfbce63a89 632 __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); \
elmot 1:d0dfbce63a89 633 __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); \
elmot 1:d0dfbce63a89 634 } while(0)
elmot 1:d0dfbce63a89 635
elmot 1:d0dfbce63a89 636 /**
elmot 1:d0dfbce63a89 637 * @brief Disable the PVM4 Extended Interrupt Rising & Falling Trigger.
elmot 1:d0dfbce63a89 638 * @retval None
elmot 1:d0dfbce63a89 639 */
elmot 1:d0dfbce63a89 640 #define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_FALLING_EDGE() \
elmot 1:d0dfbce63a89 641 do { \
elmot 1:d0dfbce63a89 642 __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); \
elmot 1:d0dfbce63a89 643 __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); \
elmot 1:d0dfbce63a89 644 } while(0)
elmot 1:d0dfbce63a89 645
elmot 1:d0dfbce63a89 646 /**
elmot 1:d0dfbce63a89 647 * @brief Generate a Software interrupt on selected EXTI line.
elmot 1:d0dfbce63a89 648 * @retval None
elmot 1:d0dfbce63a89 649 */
elmot 1:d0dfbce63a89 650 #define __HAL_PWR_PVM4_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 651
elmot 1:d0dfbce63a89 652 /**
elmot 1:d0dfbce63a89 653 * @brief Check whether or not the specified PVM4 EXTI interrupt flag is set.
elmot 1:d0dfbce63a89 654 * @retval EXTI PVM4 Line Status.
elmot 1:d0dfbce63a89 655 */
elmot 1:d0dfbce63a89 656 #define __HAL_PWR_PVM4_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 657
elmot 1:d0dfbce63a89 658 /**
elmot 1:d0dfbce63a89 659 * @brief Clear the PVM4 EXTI flag.
elmot 1:d0dfbce63a89 660 * @retval None
elmot 1:d0dfbce63a89 661 */
elmot 1:d0dfbce63a89 662 #define __HAL_PWR_PVM4_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM4)
elmot 1:d0dfbce63a89 663
elmot 1:d0dfbce63a89 664
elmot 1:d0dfbce63a89 665 /**
elmot 1:d0dfbce63a89 666 * @brief Configure the main internal regulator output voltage.
elmot 1:d0dfbce63a89 667 * @param __REGULATOR__: specifies the regulator output voltage to achieve
elmot 1:d0dfbce63a89 668 * a tradeoff between performance and power consumption.
elmot 1:d0dfbce63a89 669 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 670 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode,
elmot 1:d0dfbce63a89 671 * typical output voltage at 1.2 V,
elmot 1:d0dfbce63a89 672 * system frequency up to 80 MHz.
elmot 1:d0dfbce63a89 673 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode,
elmot 1:d0dfbce63a89 674 * typical output voltage at 1.0 V,
elmot 1:d0dfbce63a89 675 * system frequency up to 26 MHz.
elmot 1:d0dfbce63a89 676 * @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but doesn't check
elmot 1:d0dfbce63a89 677 * whether or not VOSF flag is cleared when moving from range 2 to range 1. User
elmot 1:d0dfbce63a89 678 * may resort to __HAL_PWR_GET_FLAG() macro to check VOSF bit resetting.
elmot 1:d0dfbce63a89 679 * @retval None
elmot 1:d0dfbce63a89 680 */
elmot 1:d0dfbce63a89 681 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
elmot 1:d0dfbce63a89 682 __IO uint32_t tmpreg; \
elmot 1:d0dfbce63a89 683 MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \
elmot 1:d0dfbce63a89 684 /* Delay after an RCC peripheral clock enabling */ \
elmot 1:d0dfbce63a89 685 tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \
elmot 1:d0dfbce63a89 686 UNUSED(tmpreg); \
elmot 1:d0dfbce63a89 687 } while(0)
elmot 1:d0dfbce63a89 688
elmot 1:d0dfbce63a89 689 /**
elmot 1:d0dfbce63a89 690 * @}
elmot 1:d0dfbce63a89 691 */
elmot 1:d0dfbce63a89 692
elmot 1:d0dfbce63a89 693 /* Private macros --------------------------------------------------------*/
elmot 1:d0dfbce63a89 694 /** @addtogroup PWREx_Private_Macros PWR Extended Private Macros
elmot 1:d0dfbce63a89 695 * @{
elmot 1:d0dfbce63a89 696 */
elmot 1:d0dfbce63a89 697
elmot 1:d0dfbce63a89 698 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
elmot 1:d0dfbce63a89 699 ((PIN) == PWR_WAKEUP_PIN2) || \
elmot 1:d0dfbce63a89 700 ((PIN) == PWR_WAKEUP_PIN3) || \
elmot 1:d0dfbce63a89 701 ((PIN) == PWR_WAKEUP_PIN4) || \
elmot 1:d0dfbce63a89 702 ((PIN) == PWR_WAKEUP_PIN5) || \
elmot 1:d0dfbce63a89 703 ((PIN) == PWR_WAKEUP_PIN1_HIGH) || \
elmot 1:d0dfbce63a89 704 ((PIN) == PWR_WAKEUP_PIN2_HIGH) || \
elmot 1:d0dfbce63a89 705 ((PIN) == PWR_WAKEUP_PIN3_HIGH) || \
elmot 1:d0dfbce63a89 706 ((PIN) == PWR_WAKEUP_PIN4_HIGH) || \
elmot 1:d0dfbce63a89 707 ((PIN) == PWR_WAKEUP_PIN5_HIGH) || \
elmot 1:d0dfbce63a89 708 ((PIN) == PWR_WAKEUP_PIN1_LOW) || \
elmot 1:d0dfbce63a89 709 ((PIN) == PWR_WAKEUP_PIN2_LOW) || \
elmot 1:d0dfbce63a89 710 ((PIN) == PWR_WAKEUP_PIN3_LOW) || \
elmot 1:d0dfbce63a89 711 ((PIN) == PWR_WAKEUP_PIN4_LOW) || \
elmot 1:d0dfbce63a89 712 ((PIN) == PWR_WAKEUP_PIN5_LOW))
elmot 1:d0dfbce63a89 713
elmot 1:d0dfbce63a89 714 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 715 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\
elmot 1:d0dfbce63a89 716 ((TYPE) == PWR_PVM_2) ||\
elmot 1:d0dfbce63a89 717 ((TYPE) == PWR_PVM_3) ||\
elmot 1:d0dfbce63a89 718 ((TYPE) == PWR_PVM_4))
elmot 1:d0dfbce63a89 719 #elif defined (STM32L471xx)
elmot 1:d0dfbce63a89 720 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_2) ||\
elmot 1:d0dfbce63a89 721 ((TYPE) == PWR_PVM_3) ||\
elmot 1:d0dfbce63a89 722 ((TYPE) == PWR_PVM_4))
elmot 1:d0dfbce63a89 723 #endif
elmot 1:d0dfbce63a89 724
elmot 1:d0dfbce63a89 725 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx)
elmot 1:d0dfbce63a89 726 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\
elmot 1:d0dfbce63a89 727 ((TYPE) == PWR_PVM_3) ||\
elmot 1:d0dfbce63a89 728 ((TYPE) == PWR_PVM_4))
elmot 1:d0dfbce63a89 729 #elif defined (STM32L431xx)
elmot 1:d0dfbce63a89 730 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_3) ||\
elmot 1:d0dfbce63a89 731 ((TYPE) == PWR_PVM_4))
elmot 1:d0dfbce63a89 732 #endif
elmot 1:d0dfbce63a89 733
elmot 1:d0dfbce63a89 734 #define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\
elmot 1:d0dfbce63a89 735 ((MODE) == PWR_PVM_MODE_IT_RISING) ||\
elmot 1:d0dfbce63a89 736 ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\
elmot 1:d0dfbce63a89 737 ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\
elmot 1:d0dfbce63a89 738 ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\
elmot 1:d0dfbce63a89 739 ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\
elmot 1:d0dfbce63a89 740 ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING))
elmot 1:d0dfbce63a89 741
elmot 1:d0dfbce63a89 742 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
elmot 1:d0dfbce63a89 743 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
elmot 1:d0dfbce63a89 744
elmot 1:d0dfbce63a89 745 #define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\
elmot 1:d0dfbce63a89 746 ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5))
elmot 1:d0dfbce63a89 747
elmot 1:d0dfbce63a89 748 #define IS_PWR_BATTERY_CHARGING(CHARGING) (((CHARGING) == PWR_BATTERY_CHARGING_DISABLE) ||\
elmot 1:d0dfbce63a89 749 ((CHARGING) == PWR_BATTERY_CHARGING_ENABLE))
elmot 1:d0dfbce63a89 750
elmot 1:d0dfbce63a89 751 #define IS_PWR_GPIO_BIT_NUMBER(BIT_NUMBER) (((BIT_NUMBER) & GPIO_PIN_MASK) != (uint32_t)0x00)
elmot 1:d0dfbce63a89 752
elmot 1:d0dfbce63a89 753
elmot 1:d0dfbce63a89 754 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 755 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
elmot 1:d0dfbce63a89 756 ((GPIO) == PWR_GPIO_B) ||\
elmot 1:d0dfbce63a89 757 ((GPIO) == PWR_GPIO_C) ||\
elmot 1:d0dfbce63a89 758 ((GPIO) == PWR_GPIO_D) ||\
elmot 1:d0dfbce63a89 759 ((GPIO) == PWR_GPIO_E) ||\
elmot 1:d0dfbce63a89 760 ((GPIO) == PWR_GPIO_F) ||\
elmot 1:d0dfbce63a89 761 ((GPIO) == PWR_GPIO_G) ||\
elmot 1:d0dfbce63a89 762 ((GPIO) == PWR_GPIO_H))
elmot 1:d0dfbce63a89 763 #endif
elmot 1:d0dfbce63a89 764 #if defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx)
elmot 1:d0dfbce63a89 765 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
elmot 1:d0dfbce63a89 766 ((GPIO) == PWR_GPIO_B) ||\
elmot 1:d0dfbce63a89 767 ((GPIO) == PWR_GPIO_C) ||\
elmot 1:d0dfbce63a89 768 ((GPIO) == PWR_GPIO_D) ||\
elmot 1:d0dfbce63a89 769 ((GPIO) == PWR_GPIO_E) ||\
elmot 1:d0dfbce63a89 770 ((GPIO) == PWR_GPIO_H))
elmot 1:d0dfbce63a89 771 #elif defined (STM32L432xx) || defined (STM32L442xx)
elmot 1:d0dfbce63a89 772 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
elmot 1:d0dfbce63a89 773 ((GPIO) == PWR_GPIO_B) ||\
elmot 1:d0dfbce63a89 774 ((GPIO) == PWR_GPIO_C) ||\
elmot 1:d0dfbce63a89 775 ((GPIO) == PWR_GPIO_H))
elmot 1:d0dfbce63a89 776 #endif
elmot 1:d0dfbce63a89 777
elmot 1:d0dfbce63a89 778
elmot 1:d0dfbce63a89 779 /**
elmot 1:d0dfbce63a89 780 * @}
elmot 1:d0dfbce63a89 781 */
elmot 1:d0dfbce63a89 782
elmot 1:d0dfbce63a89 783
elmot 1:d0dfbce63a89 784 /** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions
elmot 1:d0dfbce63a89 785 * @{
elmot 1:d0dfbce63a89 786 */
elmot 1:d0dfbce63a89 787
elmot 1:d0dfbce63a89 788 /** @addtogroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions
elmot 1:d0dfbce63a89 789 * @{
elmot 1:d0dfbce63a89 790 */
elmot 1:d0dfbce63a89 791
elmot 1:d0dfbce63a89 792
elmot 1:d0dfbce63a89 793 /* Peripheral Control functions **********************************************/
elmot 1:d0dfbce63a89 794 uint32_t HAL_PWREx_GetVoltageRange(void);
elmot 1:d0dfbce63a89 795 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
elmot 1:d0dfbce63a89 796 void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection);
elmot 1:d0dfbce63a89 797 void HAL_PWREx_DisableBatteryCharging(void);
elmot 1:d0dfbce63a89 798 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 799 void HAL_PWREx_EnableVddUSB(void);
elmot 1:d0dfbce63a89 800 void HAL_PWREx_DisableVddUSB(void);
elmot 1:d0dfbce63a89 801 #endif /* defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 802 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 803 void HAL_PWREx_EnableVddIO2(void);
elmot 1:d0dfbce63a89 804 void HAL_PWREx_DisableVddIO2(void);
elmot 1:d0dfbce63a89 805 #endif /* defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 806 void HAL_PWREx_EnableInternalWakeUpLine(void);
elmot 1:d0dfbce63a89 807 void HAL_PWREx_DisableInternalWakeUpLine(void);
elmot 1:d0dfbce63a89 808 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
elmot 1:d0dfbce63a89 809 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
elmot 1:d0dfbce63a89 810 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
elmot 1:d0dfbce63a89 811 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
elmot 1:d0dfbce63a89 812 void HAL_PWREx_EnablePullUpPullDownConfig(void);
elmot 1:d0dfbce63a89 813 void HAL_PWREx_DisablePullUpPullDownConfig(void);
elmot 1:d0dfbce63a89 814 void HAL_PWREx_EnableSRAM2ContentRetention(void);
elmot 1:d0dfbce63a89 815 void HAL_PWREx_DisableSRAM2ContentRetention(void);
elmot 1:d0dfbce63a89 816 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 817 void HAL_PWREx_EnablePVM1(void);
elmot 1:d0dfbce63a89 818 void HAL_PWREx_DisablePVM1(void);
elmot 1:d0dfbce63a89 819 #endif /* defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 820 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 821 void HAL_PWREx_EnablePVM2(void);
elmot 1:d0dfbce63a89 822 void HAL_PWREx_DisablePVM2(void);
elmot 1:d0dfbce63a89 823 #endif /* defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 824 void HAL_PWREx_EnablePVM3(void);
elmot 1:d0dfbce63a89 825 void HAL_PWREx_DisablePVM3(void);
elmot 1:d0dfbce63a89 826 void HAL_PWREx_EnablePVM4(void);
elmot 1:d0dfbce63a89 827 void HAL_PWREx_DisablePVM4(void);
elmot 1:d0dfbce63a89 828 HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM);
elmot 1:d0dfbce63a89 829
elmot 1:d0dfbce63a89 830
elmot 1:d0dfbce63a89 831 /* Low Power modes configuration functions ************************************/
elmot 1:d0dfbce63a89 832 void HAL_PWREx_EnableLowPowerRunMode(void);
elmot 1:d0dfbce63a89 833 HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void);
elmot 1:d0dfbce63a89 834 void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry);
elmot 1:d0dfbce63a89 835 void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry);
elmot 1:d0dfbce63a89 836 void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry);
elmot 1:d0dfbce63a89 837 void HAL_PWREx_EnterSHUTDOWNMode(void);
elmot 1:d0dfbce63a89 838
elmot 1:d0dfbce63a89 839 void HAL_PWREx_PVD_PVM_IRQHandler(void);
elmot 1:d0dfbce63a89 840 #if defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 841 void HAL_PWREx_PVM1Callback(void);
elmot 1:d0dfbce63a89 842 #endif /* defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 843 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
elmot 1:d0dfbce63a89 844 void HAL_PWREx_PVM2Callback(void);
elmot 1:d0dfbce63a89 845 #endif /* defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
elmot 1:d0dfbce63a89 846 void HAL_PWREx_PVM3Callback(void);
elmot 1:d0dfbce63a89 847 void HAL_PWREx_PVM4Callback(void);
elmot 1:d0dfbce63a89 848
elmot 1:d0dfbce63a89 849
elmot 1:d0dfbce63a89 850 /**
elmot 1:d0dfbce63a89 851 * @}
elmot 1:d0dfbce63a89 852 */
elmot 1:d0dfbce63a89 853
elmot 1:d0dfbce63a89 854 /**
elmot 1:d0dfbce63a89 855 * @}
elmot 1:d0dfbce63a89 856 */
elmot 1:d0dfbce63a89 857
elmot 1:d0dfbce63a89 858 /**
elmot 1:d0dfbce63a89 859 * @}
elmot 1:d0dfbce63a89 860 */
elmot 1:d0dfbce63a89 861
elmot 1:d0dfbce63a89 862 /**
elmot 1:d0dfbce63a89 863 * @}
elmot 1:d0dfbce63a89 864 */
elmot 1:d0dfbce63a89 865
elmot 1:d0dfbce63a89 866 #ifdef __cplusplus
elmot 1:d0dfbce63a89 867 }
elmot 1:d0dfbce63a89 868 #endif
elmot 1:d0dfbce63a89 869
elmot 1:d0dfbce63a89 870
elmot 1:d0dfbce63a89 871 #endif /* __STM32L4xx_HAL_PWR_EX_H */
elmot 1:d0dfbce63a89 872
elmot 1:d0dfbce63a89 873 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/