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HAL_L476/stm32l4xx_ll_sdmmc.c@3:b69e098b4613, 2017-02-25 (annotated)

Committer:
elmot
Date:
Sat Feb 25 09:03:15 2017 +0000
Revision:
3:b69e098b4613
Parent:
1:d0dfbce63a89 
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Who changed what in which revision?

UserRevisionLine numberNew contents of line
elmot 1:d0dfbce63a89 1 /**
elmot 1:d0dfbce63a89 2 ******************************************************************************
elmot 1:d0dfbce63a89 3 * @file stm32l4xx_ll_sdmmc.c
elmot 1:d0dfbce63a89 4 * @author MCD Application Team
elmot 1:d0dfbce63a89 5 * @version V1.5.1
elmot 1:d0dfbce63a89 6 * @date 31-May-2016
elmot 1:d0dfbce63a89 7 * @brief SDMMC Low Layer HAL module driver.
elmot 1:d0dfbce63a89 8 * This file provides firmware functions to manage the following
elmot 1:d0dfbce63a89 9 * functionalities of the SDMMC peripheral:
elmot 1:d0dfbce63a89 10 * + Initialization/de-initialization functions
elmot 1:d0dfbce63a89 11 * + I/O operation functions
elmot 1:d0dfbce63a89 12 * + Peripheral Control functions
elmot 1:d0dfbce63a89 13 * + Peripheral State functions
elmot 1:d0dfbce63a89 14 *
elmot 1:d0dfbce63a89 15 @verbatim
elmot 1:d0dfbce63a89 16 ==============================================================================
elmot 1:d0dfbce63a89 17 ##### SDMMC peripheral features #####
elmot 1:d0dfbce63a89 18 ==============================================================================
elmot 1:d0dfbce63a89 19 [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2
elmot 1:d0dfbce63a89 20 peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
elmot 1:d0dfbce63a89 21 devices.
elmot 1:d0dfbce63a89 22
elmot 1:d0dfbce63a89 23 [..] The SDMMC features include the following:
elmot 1:d0dfbce63a89 24 (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
elmot 1:d0dfbce63a89 25 for three different data bus modes: 1-bit (default), 4-bit and 8-bit
elmot 1:d0dfbce63a89 26 (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
elmot 1:d0dfbce63a89 27 (+) Full compliance with SD Memory Card Specifications Version 2.0
elmot 1:d0dfbce63a89 28 (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
elmot 1:d0dfbce63a89 29 different data bus modes: 1-bit (default) and 4-bit
elmot 1:d0dfbce63a89 30 (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
elmot 1:d0dfbce63a89 31 Rev1.1)
elmot 1:d0dfbce63a89 32 (+) Data transfer up to 48 MHz for the 8 bit mode
elmot 1:d0dfbce63a89 33 (+) Data and command output enable signals to control external bidirectional drivers.
elmot 1:d0dfbce63a89 34
elmot 1:d0dfbce63a89 35
elmot 1:d0dfbce63a89 36 ##### How to use this driver #####
elmot 1:d0dfbce63a89 37 ==============================================================================
elmot 1:d0dfbce63a89 38 [..]
elmot 1:d0dfbce63a89 39 This driver is a considered as a driver of service for external devices drivers
elmot 1:d0dfbce63a89 40 that interfaces with the SDMMC peripheral.
elmot 1:d0dfbce63a89 41 According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
elmot 1:d0dfbce63a89 42 is used in the device's driver to perform SDMMC operations and functionalities.
elmot 1:d0dfbce63a89 43
elmot 1:d0dfbce63a89 44 This driver is almost transparent for the final user, it is only used to implement other
elmot 1:d0dfbce63a89 45 functionalities of the external device.
elmot 1:d0dfbce63a89 46
elmot 1:d0dfbce63a89 47 [..]
elmot 1:d0dfbce63a89 48 (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output (MSI, PLLUSB1CLK,
elmot 1:d0dfbce63a89 49 PLLUSB2CLK). Before start working with SDMMC peripheral make sure that the
elmot 1:d0dfbce63a89 50 PLL is well configured.
elmot 1:d0dfbce63a89 51 The SDMMC peripheral uses two clock signals:
elmot 1:d0dfbce63a89 52 (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
elmot 1:d0dfbce63a89 53 (++) APB2 bus clock (PCLK2)
elmot 1:d0dfbce63a89 54
elmot 1:d0dfbce63a89 55 -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
elmot 1:d0dfbce63a89 56 Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
elmot 1:d0dfbce63a89 57
elmot 1:d0dfbce63a89 58 (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
elmot 1:d0dfbce63a89 59 peripheral.
elmot 1:d0dfbce63a89 60
elmot 1:d0dfbce63a89 61 (+) Enable the Power ON State using the SDMMC_PowerState_ON(SDMMCx)
elmot 1:d0dfbce63a89 62 function and disable it using the function SDMMC_PowerState_OFF(SDMMCx).
elmot 1:d0dfbce63a89 63
elmot 1:d0dfbce63a89 64 (+) Enable/Disable the clock using the __SDMMC_ENABLE()/__SDMMC_DISABLE() macros.
elmot 1:d0dfbce63a89 65
elmot 1:d0dfbce63a89 66 (+) Enable/Disable the peripheral interrupts using the macros __SDMMC_ENABLE_IT(hSDMMC, IT)
elmot 1:d0dfbce63a89 67 and __SDMMC_DISABLE_IT(hSDMMC, IT) if you need to use interrupt mode.
elmot 1:d0dfbce63a89 68
elmot 1:d0dfbce63a89 69 (+) When using the DMA mode
elmot 1:d0dfbce63a89 70 (++) Configure the DMA in the MSP layer of the external device
elmot 1:d0dfbce63a89 71 (++) Active the needed channel Request
elmot 1:d0dfbce63a89 72 (++) Enable the DMA using __SDMMC_DMA_ENABLE() macro or Disable it using the macro
elmot 1:d0dfbce63a89 73 __SDMMC_DMA_DISABLE().
elmot 1:d0dfbce63a89 74
elmot 1:d0dfbce63a89 75 (+) To control the CPSM (Command Path State Machine) and send
elmot 1:d0dfbce63a89 76 commands to the card use the SDMMC_SendCommand(SDMMCx),
elmot 1:d0dfbce63a89 77 SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has
elmot 1:d0dfbce63a89 78 to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according
elmot 1:d0dfbce63a89 79 to the selected command to be sent.
elmot 1:d0dfbce63a89 80 The parameters that should be filled are:
elmot 1:d0dfbce63a89 81 (++) Command Argument
elmot 1:d0dfbce63a89 82 (++) Command Index
elmot 1:d0dfbce63a89 83 (++) Command Response type
elmot 1:d0dfbce63a89 84 (++) Command Wait
elmot 1:d0dfbce63a89 85 (++) CPSM Status (Enable or Disable).
elmot 1:d0dfbce63a89 86
elmot 1:d0dfbce63a89 87 -@@- To check if the command is well received, read the SDMMC_CMDRESP
elmot 1:d0dfbce63a89 88 register using the SDMMC_GetCommandResponse().
elmot 1:d0dfbce63a89 89 The SDMMC responses registers (SDMMC_RESP1 to SDMMC_RESP2), use the
elmot 1:d0dfbce63a89 90 SDMMC_GetResponse() function.
elmot 1:d0dfbce63a89 91
elmot 1:d0dfbce63a89 92 (+) To control the DPSM (Data Path State Machine) and send/receive
elmot 1:d0dfbce63a89 93 data to/from the card use the SDMMC_DataConfig(), SDMMC_GetDataCounter(),
elmot 1:d0dfbce63a89 94 SDMMC_ReadFIFO(), SDMMC_WriteFIFO() and SDMMC_GetFIFOCount() functions.
elmot 1:d0dfbce63a89 95
elmot 1:d0dfbce63a89 96 *** Read Operations ***
elmot 1:d0dfbce63a89 97 =======================
elmot 1:d0dfbce63a89 98 [..]
elmot 1:d0dfbce63a89 99 (#) First, user has to fill the data structure (pointer to
elmot 1:d0dfbce63a89 100 SDMMC_DataInitTypeDef) according to the selected data type to be received.
elmot 1:d0dfbce63a89 101 The parameters that should be filled are:
elmot 1:d0dfbce63a89 102 (++) Data TimeOut
elmot 1:d0dfbce63a89 103 (++) Data Length
elmot 1:d0dfbce63a89 104 (++) Data Block size
elmot 1:d0dfbce63a89 105 (++) Data Transfer direction: should be from card (To SDMMC)
elmot 1:d0dfbce63a89 106 (++) Data Transfer mode
elmot 1:d0dfbce63a89 107 (++) DPSM Status (Enable or Disable)
elmot 1:d0dfbce63a89 108
elmot 1:d0dfbce63a89 109 (#) Configure the SDMMC resources to receive the data from the card
elmot 1:d0dfbce63a89 110 according to selected transfer mode (Refer to Step 8, 9 and 10).
elmot 1:d0dfbce63a89 111
elmot 1:d0dfbce63a89 112 (#) Send the selected Read command (refer to step 11).
elmot 1:d0dfbce63a89 113
elmot 1:d0dfbce63a89 114 (#) Use the SDMMC flags/interrupts to check the transfer status.
elmot 1:d0dfbce63a89 115
elmot 1:d0dfbce63a89 116 *** Write Operations ***
elmot 1:d0dfbce63a89 117 ========================
elmot 1:d0dfbce63a89 118 [..]
elmot 1:d0dfbce63a89 119 (#) First, user has to fill the data structure (pointer to
elmot 1:d0dfbce63a89 120 SDMMC_DataInitTypeDef) according to the selected data type to be received.
elmot 1:d0dfbce63a89 121 The parameters that should be filled are:
elmot 1:d0dfbce63a89 122 (++) Data TimeOut
elmot 1:d0dfbce63a89 123 (++) Data Length
elmot 1:d0dfbce63a89 124 (++) Data Block size
elmot 1:d0dfbce63a89 125 (++) Data Transfer direction: should be to card (To CARD)
elmot 1:d0dfbce63a89 126 (++) Data Transfer mode
elmot 1:d0dfbce63a89 127 (++) DPSM Status (Enable or Disable)
elmot 1:d0dfbce63a89 128
elmot 1:d0dfbce63a89 129 (#) Configure the SDMMC resources to send the data to the card according to
elmot 1:d0dfbce63a89 130 selected transfer mode.
elmot 1:d0dfbce63a89 131
elmot 1:d0dfbce63a89 132 (#) Send the selected Write command.
elmot 1:d0dfbce63a89 133
elmot 1:d0dfbce63a89 134 (#) Use the SDMMC flags/interrupts to check the transfer status.
elmot 1:d0dfbce63a89 135
elmot 1:d0dfbce63a89 136 @endverbatim
elmot 1:d0dfbce63a89 137 ******************************************************************************
elmot 1:d0dfbce63a89 138 * @attention
elmot 1:d0dfbce63a89 139 *
elmot 1:d0dfbce63a89 140 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
elmot 1:d0dfbce63a89 141 *
elmot 1:d0dfbce63a89 142 * Redistribution and use in source and binary forms, with or without modification,
elmot 1:d0dfbce63a89 143 * are permitted provided that the following conditions are met:
elmot 1:d0dfbce63a89 144 * 1. Redistributions of source code must retain the above copyright notice,
elmot 1:d0dfbce63a89 145 * this list of conditions and the following disclaimer.
elmot 1:d0dfbce63a89 146 * 2. Redistributions in binary form must reproduce the above copyright notice,
elmot 1:d0dfbce63a89 147 * this list of conditions and the following disclaimer in the documentation
elmot 1:d0dfbce63a89 148 * and/or other materials provided with the distribution.
elmot 1:d0dfbce63a89 149 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elmot 1:d0dfbce63a89 150 * may be used to endorse or promote products derived from this software
elmot 1:d0dfbce63a89 151 * without specific prior written permission.
elmot 1:d0dfbce63a89 152 *
elmot 1:d0dfbce63a89 153 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elmot 1:d0dfbce63a89 154 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elmot 1:d0dfbce63a89 155 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elmot 1:d0dfbce63a89 156 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elmot 1:d0dfbce63a89 157 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elmot 1:d0dfbce63a89 158 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elmot 1:d0dfbce63a89 159 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elmot 1:d0dfbce63a89 160 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elmot 1:d0dfbce63a89 161 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elmot 1:d0dfbce63a89 162 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elmot 1:d0dfbce63a89 163 *
elmot 1:d0dfbce63a89 164 ******************************************************************************
elmot 1:d0dfbce63a89 165 */
elmot 1:d0dfbce63a89 166
elmot 1:d0dfbce63a89 167 /* Includes ------------------------------------------------------------------*/
elmot 1:d0dfbce63a89 168 #include "stm32l4xx_hal.h"
elmot 1:d0dfbce63a89 169
elmot 1:d0dfbce63a89 170 #if defined(SDMMC1)
elmot 1:d0dfbce63a89 171
elmot 1:d0dfbce63a89 172 /** @addtogroup STM32L4xx_HAL_Driver
elmot 1:d0dfbce63a89 173 * @{
elmot 1:d0dfbce63a89 174 */
elmot 1:d0dfbce63a89 175
elmot 1:d0dfbce63a89 176 /** @defgroup SDMMC_LL SDMMC Low Layer
elmot 1:d0dfbce63a89 177 * @brief Low layer module for SD
elmot 1:d0dfbce63a89 178 * @{
elmot 1:d0dfbce63a89 179 */
elmot 1:d0dfbce63a89 180
elmot 1:d0dfbce63a89 181 #if defined (HAL_SD_MODULE_ENABLED)
elmot 1:d0dfbce63a89 182
elmot 1:d0dfbce63a89 183 /* Private typedef -----------------------------------------------------------*/
elmot 1:d0dfbce63a89 184 /* Private define ------------------------------------------------------------*/
elmot 1:d0dfbce63a89 185 /* Private macro -------------------------------------------------------------*/
elmot 1:d0dfbce63a89 186 /* Private variables ---------------------------------------------------------*/
elmot 1:d0dfbce63a89 187 /* Private function prototypes -----------------------------------------------*/
elmot 1:d0dfbce63a89 188 /* Exported functions --------------------------------------------------------*/
elmot 1:d0dfbce63a89 189
elmot 1:d0dfbce63a89 190 /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
elmot 1:d0dfbce63a89 191 * @{
elmot 1:d0dfbce63a89 192 */
elmot 1:d0dfbce63a89 193
elmot 1:d0dfbce63a89 194 /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
elmot 1:d0dfbce63a89 195 * @brief Initialization and Configuration functions
elmot 1:d0dfbce63a89 196 *
elmot 1:d0dfbce63a89 197 @verbatim
elmot 1:d0dfbce63a89 198 ===============================================================================
elmot 1:d0dfbce63a89 199 ##### Initialization/de-initialization functions #####
elmot 1:d0dfbce63a89 200 ===============================================================================
elmot 1:d0dfbce63a89 201 [..] This section provides functions allowing to:
elmot 1:d0dfbce63a89 202
elmot 1:d0dfbce63a89 203 @endverbatim
elmot 1:d0dfbce63a89 204 * @{
elmot 1:d0dfbce63a89 205 */
elmot 1:d0dfbce63a89 206
elmot 1:d0dfbce63a89 207 /**
elmot 1:d0dfbce63a89 208 * @brief Initializes the SDMMC according to the specified
elmot 1:d0dfbce63a89 209 * parameters in the SDMMC_InitTypeDef and initialize the associated handle.
elmot 1:d0dfbce63a89 210 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 211 * @param Init: SDMMC initialization structure
elmot 1:d0dfbce63a89 212 * @retval HAL status
elmot 1:d0dfbce63a89 213 */
elmot 1:d0dfbce63a89 214 HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
elmot 1:d0dfbce63a89 215 {
elmot 1:d0dfbce63a89 216 /* Check the parameters */
elmot 1:d0dfbce63a89 217 assert_param(IS_SDMMC_ALL_INSTANCE(SDMMCx));
elmot 1:d0dfbce63a89 218 assert_param(IS_SDMMC_CLOCK_EDGE(Init.ClockEdge));
elmot 1:d0dfbce63a89 219 assert_param(IS_SDMMC_CLOCK_BYPASS(Init.ClockBypass));
elmot 1:d0dfbce63a89 220 assert_param(IS_SDMMC_CLOCK_POWER_SAVE(Init.ClockPowerSave));
elmot 1:d0dfbce63a89 221 assert_param(IS_SDMMC_BUS_WIDE(Init.BusWide));
elmot 1:d0dfbce63a89 222 assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
elmot 1:d0dfbce63a89 223 assert_param(IS_SDMMC_CLKDIV(Init.ClockDiv));
elmot 1:d0dfbce63a89 224
elmot 1:d0dfbce63a89 225 /* Set SDMMC configuration parameters */
elmot 1:d0dfbce63a89 226 /* Write to SDMMC CLKCR */
elmot 1:d0dfbce63a89 227 MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, Init.ClockEdge |\
elmot 1:d0dfbce63a89 228 Init.ClockBypass |\
elmot 1:d0dfbce63a89 229 Init.ClockPowerSave |\
elmot 1:d0dfbce63a89 230 Init.BusWide |\
elmot 1:d0dfbce63a89 231 Init.HardwareFlowControl |\
elmot 1:d0dfbce63a89 232 Init.ClockDiv);
elmot 1:d0dfbce63a89 233
elmot 1:d0dfbce63a89 234 return HAL_OK;
elmot 1:d0dfbce63a89 235 }
elmot 1:d0dfbce63a89 236
elmot 1:d0dfbce63a89 237
elmot 1:d0dfbce63a89 238
elmot 1:d0dfbce63a89 239 /**
elmot 1:d0dfbce63a89 240 * @}
elmot 1:d0dfbce63a89 241 */
elmot 1:d0dfbce63a89 242
elmot 1:d0dfbce63a89 243 /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
elmot 1:d0dfbce63a89 244 * @brief Data transfers functions
elmot 1:d0dfbce63a89 245 *
elmot 1:d0dfbce63a89 246 @verbatim
elmot 1:d0dfbce63a89 247 ===============================================================================
elmot 1:d0dfbce63a89 248 ##### I/O operation functions #####
elmot 1:d0dfbce63a89 249 ===============================================================================
elmot 1:d0dfbce63a89 250 [..]
elmot 1:d0dfbce63a89 251 This subsection provides a set of functions allowing to manage the SDMMC data
elmot 1:d0dfbce63a89 252 transfers.
elmot 1:d0dfbce63a89 253
elmot 1:d0dfbce63a89 254 @endverbatim
elmot 1:d0dfbce63a89 255 * @{
elmot 1:d0dfbce63a89 256 */
elmot 1:d0dfbce63a89 257
elmot 1:d0dfbce63a89 258 /**
elmot 1:d0dfbce63a89 259 * @brief Read data (word) from Rx FIFO in blocking mode (polling)
elmot 1:d0dfbce63a89 260 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 261 * @retval HAL status
elmot 1:d0dfbce63a89 262 */
elmot 1:d0dfbce63a89 263 uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
elmot 1:d0dfbce63a89 264 {
elmot 1:d0dfbce63a89 265 /* Read data from Rx FIFO */
elmot 1:d0dfbce63a89 266 return (SDMMCx->FIFO);
elmot 1:d0dfbce63a89 267 }
elmot 1:d0dfbce63a89 268
elmot 1:d0dfbce63a89 269 /**
elmot 1:d0dfbce63a89 270 * @brief Write data (word) to Tx FIFO in blocking mode (polling)
elmot 1:d0dfbce63a89 271 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 272 * @param pWriteData: pointer to data to write
elmot 1:d0dfbce63a89 273 * @retval HAL status
elmot 1:d0dfbce63a89 274 */
elmot 1:d0dfbce63a89 275 HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
elmot 1:d0dfbce63a89 276 {
elmot 1:d0dfbce63a89 277 /* Write data to FIFO */
elmot 1:d0dfbce63a89 278 SDMMCx->FIFO = *pWriteData;
elmot 1:d0dfbce63a89 279
elmot 1:d0dfbce63a89 280 return HAL_OK;
elmot 1:d0dfbce63a89 281 }
elmot 1:d0dfbce63a89 282
elmot 1:d0dfbce63a89 283 /**
elmot 1:d0dfbce63a89 284 * @}
elmot 1:d0dfbce63a89 285 */
elmot 1:d0dfbce63a89 286
elmot 1:d0dfbce63a89 287 /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
elmot 1:d0dfbce63a89 288 * @brief management functions
elmot 1:d0dfbce63a89 289 *
elmot 1:d0dfbce63a89 290 @verbatim
elmot 1:d0dfbce63a89 291 ===============================================================================
elmot 1:d0dfbce63a89 292 ##### Peripheral Control functions #####
elmot 1:d0dfbce63a89 293 ===============================================================================
elmot 1:d0dfbce63a89 294 [..]
elmot 1:d0dfbce63a89 295 This subsection provides a set of functions allowing to control the SDMMC data
elmot 1:d0dfbce63a89 296 transfers.
elmot 1:d0dfbce63a89 297
elmot 1:d0dfbce63a89 298 @endverbatim
elmot 1:d0dfbce63a89 299 * @{
elmot 1:d0dfbce63a89 300 */
elmot 1:d0dfbce63a89 301
elmot 1:d0dfbce63a89 302 /**
elmot 1:d0dfbce63a89 303 * @brief Set SDMMC Power state to ON.
elmot 1:d0dfbce63a89 304 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 305 * @retval HAL status
elmot 1:d0dfbce63a89 306 */
elmot 1:d0dfbce63a89 307 HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx)
elmot 1:d0dfbce63a89 308 {
elmot 1:d0dfbce63a89 309 /* Set power state to ON */
elmot 1:d0dfbce63a89 310 SDMMCx->POWER = SDMMC_POWER_PWRCTRL;
elmot 1:d0dfbce63a89 311
elmot 1:d0dfbce63a89 312 return HAL_OK;
elmot 1:d0dfbce63a89 313 }
elmot 1:d0dfbce63a89 314
elmot 1:d0dfbce63a89 315 /**
elmot 1:d0dfbce63a89 316 * @brief Set SDMMC Power state to OFF.
elmot 1:d0dfbce63a89 317 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 318 * @retval HAL status
elmot 1:d0dfbce63a89 319 */
elmot 1:d0dfbce63a89 320 HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx)
elmot 1:d0dfbce63a89 321 {
elmot 1:d0dfbce63a89 322 /* Set power state to OFF */
elmot 1:d0dfbce63a89 323 SDMMCx->POWER = (uint32_t)0x00000000;
elmot 1:d0dfbce63a89 324
elmot 1:d0dfbce63a89 325 return HAL_OK;
elmot 1:d0dfbce63a89 326 }
elmot 1:d0dfbce63a89 327
elmot 1:d0dfbce63a89 328 /**
elmot 1:d0dfbce63a89 329 * @brief Get SDMMC Power state.
elmot 1:d0dfbce63a89 330 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 331 * @retval Power status of the controller. The returned value can be one of the
elmot 1:d0dfbce63a89 332 * following values:
elmot 1:d0dfbce63a89 333 * - 0x00: Power OFF
elmot 1:d0dfbce63a89 334 * - 0x02: Power UP
elmot 1:d0dfbce63a89 335 * - 0x03: Power ON
elmot 1:d0dfbce63a89 336 */
elmot 1:d0dfbce63a89 337 uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx)
elmot 1:d0dfbce63a89 338 {
elmot 1:d0dfbce63a89 339 return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL);
elmot 1:d0dfbce63a89 340 }
elmot 1:d0dfbce63a89 341
elmot 1:d0dfbce63a89 342 /**
elmot 1:d0dfbce63a89 343 * @brief Configure the SDMMC command path according to the specified parameters in
elmot 1:d0dfbce63a89 344 * SDMMC_CmdInitTypeDef structure and send the command
elmot 1:d0dfbce63a89 345 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 346 * @param Command: pointer to a SDMMC_CmdInitTypeDef structure that contains
elmot 1:d0dfbce63a89 347 * the configuration information for the SDMMC command
elmot 1:d0dfbce63a89 348 * @retval HAL status
elmot 1:d0dfbce63a89 349 */
elmot 1:d0dfbce63a89 350 HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
elmot 1:d0dfbce63a89 351 {
elmot 1:d0dfbce63a89 352 /* Check the parameters */
elmot 1:d0dfbce63a89 353 assert_param(IS_SDMMC_CMD_INDEX(Command->CmdIndex));
elmot 1:d0dfbce63a89 354 assert_param(IS_SDMMC_RESPONSE(Command->Response));
elmot 1:d0dfbce63a89 355 assert_param(IS_SDMMC_WAIT(Command->WaitForInterrupt));
elmot 1:d0dfbce63a89 356 assert_param(IS_SDMMC_CPSM(Command->CPSM));
elmot 1:d0dfbce63a89 357
elmot 1:d0dfbce63a89 358 /* Set the SDMMC Argument value */
elmot 1:d0dfbce63a89 359 SDMMCx->ARG = Command->Argument;
elmot 1:d0dfbce63a89 360
elmot 1:d0dfbce63a89 361 /* Set SDMMC command parameters */
elmot 1:d0dfbce63a89 362 /* Write to SDMMC CMD register */
elmot 1:d0dfbce63a89 363 MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, Command->CmdIndex |\
elmot 1:d0dfbce63a89 364 Command->Response |\
elmot 1:d0dfbce63a89 365 Command->WaitForInterrupt |\
elmot 1:d0dfbce63a89 366 Command->CPSM);
elmot 1:d0dfbce63a89 367
elmot 1:d0dfbce63a89 368 return HAL_OK;
elmot 1:d0dfbce63a89 369 }
elmot 1:d0dfbce63a89 370
elmot 1:d0dfbce63a89 371 /**
elmot 1:d0dfbce63a89 372 * @brief Return the command index of last command for which response received
elmot 1:d0dfbce63a89 373 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 374 * @retval Command index of the last command response received
elmot 1:d0dfbce63a89 375 */
elmot 1:d0dfbce63a89 376 uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx)
elmot 1:d0dfbce63a89 377 {
elmot 1:d0dfbce63a89 378 return (uint8_t)(SDMMCx->RESPCMD);
elmot 1:d0dfbce63a89 379 }
elmot 1:d0dfbce63a89 380
elmot 1:d0dfbce63a89 381
elmot 1:d0dfbce63a89 382 /**
elmot 1:d0dfbce63a89 383 * @brief Return the response received from the card for the last command
elmot 1:d0dfbce63a89 384 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 385 * @param Response: Specifies the SDMMC response register.
elmot 1:d0dfbce63a89 386 * This parameter can be one of the following values:
elmot 1:d0dfbce63a89 387 * @arg SDMMC_RESP1: Response Register 1
elmot 1:d0dfbce63a89 388 * @arg SDMMC_RESP2: Response Register 2
elmot 1:d0dfbce63a89 389 * @arg SDMMC_RESP3: Response Register 3
elmot 1:d0dfbce63a89 390 * @arg SDMMC_RESP4: Response Register 4
elmot 1:d0dfbce63a89 391 * @retval The Corresponding response register value
elmot 1:d0dfbce63a89 392 */
elmot 1:d0dfbce63a89 393 uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response)
elmot 1:d0dfbce63a89 394 {
elmot 1:d0dfbce63a89 395 __IO uint32_t tmp = 0;
elmot 1:d0dfbce63a89 396
elmot 1:d0dfbce63a89 397 /* Check the parameters */
elmot 1:d0dfbce63a89 398 assert_param(IS_SDMMC_RESP(Response));
elmot 1:d0dfbce63a89 399
elmot 1:d0dfbce63a89 400 /* Get the response */
elmot 1:d0dfbce63a89 401 tmp = (uint32_t)&(SDMMCx->RESP1) + Response;
elmot 1:d0dfbce63a89 402
elmot 1:d0dfbce63a89 403 return (*(__IO uint32_t *) tmp);
elmot 1:d0dfbce63a89 404 }
elmot 1:d0dfbce63a89 405
elmot 1:d0dfbce63a89 406 /**
elmot 1:d0dfbce63a89 407 * @brief Configure the SDMMC data path according to the specified
elmot 1:d0dfbce63a89 408 * parameters in the SDMMC_DataInitTypeDef.
elmot 1:d0dfbce63a89 409 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 410 * @param Data : pointer to a SDMMC_DataInitTypeDef structure
elmot 1:d0dfbce63a89 411 * that contains the configuration information for the SDMMC data.
elmot 1:d0dfbce63a89 412 * @retval HAL status
elmot 1:d0dfbce63a89 413 */
elmot 1:d0dfbce63a89 414 HAL_StatusTypeDef SDMMC_DataConfig(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef* Data)
elmot 1:d0dfbce63a89 415 {
elmot 1:d0dfbce63a89 416 /* Check the parameters */
elmot 1:d0dfbce63a89 417 assert_param(IS_SDMMC_DATA_LENGTH(Data->DataLength));
elmot 1:d0dfbce63a89 418 assert_param(IS_SDMMC_BLOCK_SIZE(Data->DataBlockSize));
elmot 1:d0dfbce63a89 419 assert_param(IS_SDMMC_TRANSFER_DIR(Data->TransferDir));
elmot 1:d0dfbce63a89 420 assert_param(IS_SDMMC_TRANSFER_MODE(Data->TransferMode));
elmot 1:d0dfbce63a89 421 assert_param(IS_SDMMC_DPSM(Data->DPSM));
elmot 1:d0dfbce63a89 422
elmot 1:d0dfbce63a89 423 /* Set the SDMMC Data TimeOut value */
elmot 1:d0dfbce63a89 424 SDMMCx->DTIMER = Data->DataTimeOut;
elmot 1:d0dfbce63a89 425
elmot 1:d0dfbce63a89 426 /* Set the SDMMC DataLength value */
elmot 1:d0dfbce63a89 427 SDMMCx->DLEN = Data->DataLength;
elmot 1:d0dfbce63a89 428
elmot 1:d0dfbce63a89 429 /* Set the SDMMC data configuration parameters */
elmot 1:d0dfbce63a89 430 /* Write to SDMMC DCTRL */
elmot 1:d0dfbce63a89 431 MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, Data->DataBlockSize |\
elmot 1:d0dfbce63a89 432 Data->TransferDir |\
elmot 1:d0dfbce63a89 433 Data->TransferMode |\
elmot 1:d0dfbce63a89 434 Data->DPSM);
elmot 1:d0dfbce63a89 435
elmot 1:d0dfbce63a89 436 return HAL_OK;
elmot 1:d0dfbce63a89 437
elmot 1:d0dfbce63a89 438 }
elmot 1:d0dfbce63a89 439
elmot 1:d0dfbce63a89 440 /**
elmot 1:d0dfbce63a89 441 * @brief Returns number of remaining data bytes to be transferred.
elmot 1:d0dfbce63a89 442 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 443 * @retval Number of remaining data bytes to be transferred
elmot 1:d0dfbce63a89 444 */
elmot 1:d0dfbce63a89 445 uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx)
elmot 1:d0dfbce63a89 446 {
elmot 1:d0dfbce63a89 447 return (SDMMCx->DCOUNT);
elmot 1:d0dfbce63a89 448 }
elmot 1:d0dfbce63a89 449
elmot 1:d0dfbce63a89 450 /**
elmot 1:d0dfbce63a89 451 * @brief Get the FIFO data
elmot 1:d0dfbce63a89 452 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 453 * @retval Data received
elmot 1:d0dfbce63a89 454 */
elmot 1:d0dfbce63a89 455 uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx)
elmot 1:d0dfbce63a89 456 {
elmot 1:d0dfbce63a89 457 return (SDMMCx->FIFO);
elmot 1:d0dfbce63a89 458 }
elmot 1:d0dfbce63a89 459
elmot 1:d0dfbce63a89 460
elmot 1:d0dfbce63a89 461 /**
elmot 1:d0dfbce63a89 462 * @brief Sets one of the two options of inserting read wait interval.
elmot 1:d0dfbce63a89 463 * @param SDMMCx: Pointer to SDMMC register base
elmot 1:d0dfbce63a89 464 * @param SDMMC_ReadWaitMode: SDMMC Read Wait operation mode.
elmot 1:d0dfbce63a89 465 * This parameter can be:
elmot 1:d0dfbce63a89 466 * @arg SDMMC_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
elmot 1:d0dfbce63a89 467 * @arg SDMMC_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
elmot 1:d0dfbce63a89 468 * @retval None
elmot 1:d0dfbce63a89 469 */
elmot 1:d0dfbce63a89 470 HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
elmot 1:d0dfbce63a89 471 {
elmot 1:d0dfbce63a89 472 /* Check the parameters */
elmot 1:d0dfbce63a89 473 assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode));
elmot 1:d0dfbce63a89 474
elmot 1:d0dfbce63a89 475 /* Set SDMMC read wait mode */
elmot 1:d0dfbce63a89 476 MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode);
elmot 1:d0dfbce63a89 477
elmot 1:d0dfbce63a89 478 return HAL_OK;
elmot 1:d0dfbce63a89 479 }
elmot 1:d0dfbce63a89 480
elmot 1:d0dfbce63a89 481 /**
elmot 1:d0dfbce63a89 482 * @}
elmot 1:d0dfbce63a89 483 */
elmot 1:d0dfbce63a89 484
elmot 1:d0dfbce63a89 485 /**
elmot 1:d0dfbce63a89 486 * @}
elmot 1:d0dfbce63a89 487 */
elmot 1:d0dfbce63a89 488
elmot 1:d0dfbce63a89 489 #endif /* (HAL_SD_MODULE_ENABLED) */
elmot 1:d0dfbce63a89 490 /**
elmot 1:d0dfbce63a89 491 * @}
elmot 1:d0dfbce63a89 492 */
elmot 1:d0dfbce63a89 493
elmot 1:d0dfbce63a89 494 /**
elmot 1:d0dfbce63a89 495 * @}
elmot 1:d0dfbce63a89 496 */
elmot 1:d0dfbce63a89 497
elmot 1:d0dfbce63a89 498 #endif /* SDMMC1 */
elmot 1:d0dfbce63a89 499
elmot 1:d0dfbce63a89 500 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/