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stm32l4xx_ll_wwdg.h
00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_ll_wwdg.h 00004 * @author MCD Application Team 00005 * @version V1.5.1 00006 * @date 31-May-2016 00007 * @brief Header file of WWDG LL module. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 00012 * 00013 * Redistribution and use in source and binary forms, with or without modification, 00014 * are permitted provided that the following conditions are met: 00015 * 1. Redistributions of source code must retain the above copyright notice, 00016 * this list of conditions and the following disclaimer. 00017 * 2. Redistributions in binary form must reproduce the above copyright notice, 00018 * this list of conditions and the following disclaimer in the documentation 00019 * and/or other materials provided with the distribution. 00020 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00021 * may be used to endorse or promote products derived from this software 00022 * without specific prior written permission. 00023 * 00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00027 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00028 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00029 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00030 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00031 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00032 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00034 * 00035 ****************************************************************************** 00036 */ 00037 00038 /* Define to prevent recursive inclusion -------------------------------------*/ 00039 #ifndef __STM32L4xx_LL_WWDG_H 00040 #define __STM32L4xx_LL_WWDG_H 00041 00042 #ifdef __cplusplus 00043 extern "C" { 00044 #endif 00045 00046 /* Includes ------------------------------------------------------------------*/ 00047 #include "stm32l4xx.h" 00048 00049 /** @addtogroup STM32L4xx_LL_Driver 00050 * @{ 00051 */ 00052 00053 #if defined (WWDG) 00054 00055 /** @defgroup WWDG_LL WWDG 00056 * @{ 00057 */ 00058 00059 /* Private types -------------------------------------------------------------*/ 00060 /* Private variables ---------------------------------------------------------*/ 00061 00062 /* Private constants ---------------------------------------------------------*/ 00063 00064 /* Private macros ------------------------------------------------------------*/ 00065 00066 /* Exported types ------------------------------------------------------------*/ 00067 /* Exported constants --------------------------------------------------------*/ 00068 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants 00069 * @{ 00070 */ 00071 00072 00073 /** @defgroup WWDG_LL_EC_IT IT Defines 00074 * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions 00075 * @{ 00076 */ 00077 #define LL_WWDG_CFR_EWI WWDG_CFR_EWI 00078 /** 00079 * @} 00080 */ 00081 00082 /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER 00083 * @{ 00084 */ 00085 #define LL_WWDG_PRESCALER_1 (uint32_t)0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */ 00086 #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ 00087 #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ 00088 #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */ 00089 /** 00090 * @} 00091 */ 00092 00093 /** 00094 * @} 00095 */ 00096 00097 /* Exported macro ------------------------------------------------------------*/ 00098 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros 00099 * @{ 00100 */ 00101 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros 00102 * @{ 00103 */ 00104 /** 00105 * @brief Write a value in WWDG register 00106 * @param __INSTANCE__ WWDG Instance 00107 * @param __REG__ Register to be written 00108 * @param __VALUE__ Value to be written in the register 00109 * @retval None 00110 */ 00111 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 00112 00113 /** 00114 * @brief Read a value in WWDG register 00115 * @param __INSTANCE__ WWDG Instance 00116 * @param __REG__ Register to be read 00117 * @retval Register value 00118 */ 00119 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 00120 /** 00121 * @} 00122 */ 00123 00124 00125 /** 00126 * @} 00127 */ 00128 00129 /* Exported functions --------------------------------------------------------*/ 00130 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions 00131 * @{ 00132 */ 00133 00134 /** @defgroup WWDG_LL_EF_Configuration Configuration 00135 * @{ 00136 */ 00137 /** 00138 * @brief Enable Window Watchdog. The watchdog is always disabled after a reset. 00139 * @note It is enabled by setting the WDGA bit in the WWDG_CR register, 00140 * then it cannot be disabled again except by a reset. 00141 * This bit is set by software and only cleared by hardware after a reset. 00142 * When WDGA = 1, the watchdog can generate a reset. 00143 * @rmtoll CR WDGA LL_WWDG_Enable 00144 * @param WWDGx WWDG Instance 00145 * @retval None 00146 */ 00147 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) 00148 { 00149 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); 00150 } 00151 00152 /** 00153 * @brief Checks if Window Watchdog is enabled 00154 * @rmtoll CR WDGA LL_WWDG_IsEnabled 00155 * @param WWDGx WWDG Instance 00156 * @retval State of bit (1 or 0). 00157 */ 00158 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx) 00159 { 00160 return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)); 00161 } 00162 00163 /** 00164 * @brief Set the Watchdog counter value to provided value (7-bits T[6:0]) 00165 * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset 00166 * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles 00167 * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared) 00168 * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled) 00169 * @rmtoll CR T LL_WWDG_SetCounter 00170 * @param WWDGx WWDG Instance 00171 * @param Counter 0..0x7F (7 bit counter value) 00172 * @retval None 00173 */ 00174 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) 00175 { 00176 MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter); 00177 } 00178 00179 /** 00180 * @brief Return current Watchdog Counter Value (7 bits counter value) 00181 * @rmtoll CR T LL_WWDG_GetCounter 00182 * @param WWDGx WWDG Instance 00183 * @retval 7 bit Watchdog Counter value 00184 */ 00185 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx) 00186 { 00187 return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T)); 00188 } 00189 00190 /** 00191 * @brief Set the time base of the prescaler (WDGTB). 00192 * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter 00193 * is decremented every (4096 x 2expWDGTB) PCLK cycles 00194 * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler 00195 * @param WWDGx WWDG Instance 00196 * @param Prescaler This parameter can be one of the following values: 00197 * @arg @ref LL_WWDG_PRESCALER_1 00198 * @arg @ref LL_WWDG_PRESCALER_2 00199 * @arg @ref LL_WWDG_PRESCALER_4 00200 * @arg @ref LL_WWDG_PRESCALER_8 00201 * @retval None 00202 */ 00203 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler) 00204 { 00205 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); 00206 } 00207 00208 /** 00209 * @brief Return current Watchdog Prescaler Value 00210 * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler 00211 * @param WWDGx WWDG Instance 00212 * @retval Returned value can be one of the following values: 00213 * @arg @ref LL_WWDG_PRESCALER_1 00214 * @arg @ref LL_WWDG_PRESCALER_2 00215 * @arg @ref LL_WWDG_PRESCALER_4 00216 * @arg @ref LL_WWDG_PRESCALER_8 00217 */ 00218 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx) 00219 { 00220 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); 00221 } 00222 00223 /** 00224 * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]). 00225 * @note This window value defines when write in the WWDG_CR register 00226 * to program Watchdog counter is allowed. 00227 * Watchdog counter value update must occur only when the counter value 00228 * is lower than the Watchdog window register value. 00229 * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value 00230 * (in the control register) is refreshed before the downcounter has reached 00231 * the watchdog window register value. 00232 * Physically is possible to set the Window lower then 0x40 but it is not recommended. 00233 * To generate an immediate reset, it is possible to set the Counter lower than 0x40. 00234 * @rmtoll CFR W LL_WWDG_SetWindow 00235 * @param WWDGx WWDG Instance 00236 * @param Window 0x00..0x7F (7 bit Window value) 00237 * @retval None 00238 */ 00239 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) 00240 { 00241 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); 00242 } 00243 00244 /** 00245 * @brief Return current Watchdog Window Value (7 bits value) 00246 * @rmtoll CFR W LL_WWDG_GetWindow 00247 * @param WWDGx WWDG Instance 00248 * @retval 7 bit Watchdog Window value 00249 */ 00250 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) 00251 { 00252 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W)); 00253 } 00254 00255 /** 00256 * @} 00257 */ 00258 00259 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management 00260 * @{ 00261 */ 00262 /** 00263 * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not. 00264 * @note This bit is set by hardware when the counter has reached the value 0x40. 00265 * It must be cleared by software by writing 0. 00266 * A write of 1 has no effect. This bit is also set if the interrupt is not enabled. 00267 * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP 00268 * @param WWDGx WWDG Instance 00269 * @retval State of bit (1 or 0). 00270 */ 00271 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx) 00272 { 00273 return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)); 00274 } 00275 00276 /** 00277 * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF) 00278 * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP 00279 * @param WWDGx WWDG Instance 00280 * @retval None 00281 */ 00282 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx) 00283 { 00284 WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF); 00285 } 00286 00287 /** 00288 * @} 00289 */ 00290 00291 /** @defgroup WWDG_LL_EF_IT_Management IT_Management 00292 * @{ 00293 */ 00294 /** 00295 * @brief Enable the Early Wakeup Interrupt. 00296 * @note When set, an interrupt occurs whenever the counter reaches value 0x40. 00297 * This interrupt is only cleared by hardware after a reset 00298 * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP 00299 * @param WWDGx WWDG Instance 00300 * @retval None 00301 */ 00302 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) 00303 { 00304 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); 00305 } 00306 00307 /** 00308 * @brief Check if Early Wakeup Interrupt is enabled 00309 * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP 00310 * @param WWDGx WWDG Instance 00311 * @retval State of bit (1 or 0). 00312 */ 00313 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx) 00314 { 00315 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)); 00316 } 00317 00318 /** 00319 * @} 00320 */ 00321 00322 /** 00323 * @} 00324 */ 00325 00326 /** 00327 * @} 00328 */ 00329 00330 #endif /* WWDG */ 00331 00332 /** 00333 * @} 00334 */ 00335 00336 #ifdef __cplusplus 00337 } 00338 #endif 00339 00340 #endif /* __STM32L4xx_LL_WWDG_H */ 00341 00342 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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