stm32l4xx_ll_usart.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_ll_usart.c
00004   * @author  MCD Application Team
00005   * @version V1.5.1
00006   * @date    31-May-2016
00007   * @brief   USART LL module driver.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */
00037 #if defined(USE_FULL_LL_DRIVER)
00038 
00039 /* Includes ------------------------------------------------------------------*/
00040 #include "stm32l4xx_ll_usart.h"
00041 #include "stm32l4xx_ll_rcc.h"
00042 #include "stm32l4xx_ll_bus.h"
00043 #ifdef  USE_FULL_ASSERT
00044 #include "stm32_assert.h"
00045 #else
00046 #define assert_param(expr) ((void)0U)
00047 #endif
00048 
00049 /** @addtogroup STM32L4xx_LL_Driver
00050   * @{
00051   */
00052 
00053 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
00054 
00055 /** @addtogroup USART_LL
00056   * @{
00057   */
00058 
00059 /* Private types -------------------------------------------------------------*/
00060 /* Private variables ---------------------------------------------------------*/
00061 /* Private constants ---------------------------------------------------------*/
00062 /** @addtogroup USART_LL_Private_Constants
00063   * @{
00064   */
00065 
00066 /**
00067   * @}
00068   */
00069 
00070 
00071 /* Private macros ------------------------------------------------------------*/
00072 /** @addtogroup USART_LL_Private_Macros
00073   * @{
00074   */
00075 
00076 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
00077  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
00078 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 10000000U)
00079 
00080 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
00081                                        || ((__VALUE__) == LL_USART_DIRECTION_RX) \
00082                                        || ((__VALUE__) == LL_USART_DIRECTION_TX) \
00083                                        || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
00084 
00085 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
00086                                     || ((__VALUE__) == LL_USART_PARITY_EVEN) \
00087                                     || ((__VALUE__) == LL_USART_PARITY_ODD))
00088 
00089 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
00090                                        || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
00091                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
00092 
00093 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
00094                                           || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
00095 
00096 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
00097                                               || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
00098 
00099 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
00100                                         || ((__VALUE__) == LL_USART_PHASE_2EDGE))
00101 
00102 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
00103                                            || ((__VALUE__) == LL_USART_POLARITY_HIGH))
00104 
00105 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
00106                                          || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
00107 
00108 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
00109                                       || ((__VALUE__) == LL_USART_STOPBITS_1) \
00110                                       || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
00111                                       || ((__VALUE__) == LL_USART_STOPBITS_2))
00112 
00113 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
00114                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
00115                                        || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
00116                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
00117 
00118 /**
00119   * @}
00120   */
00121 
00122 /* Private function prototypes -----------------------------------------------*/
00123 
00124 /* Exported functions --------------------------------------------------------*/
00125 /** @addtogroup USART_LL_Exported_Functions
00126   * @{
00127   */
00128 
00129 /** @addtogroup USART_LL_EF_Init
00130   * @{
00131   */
00132 
00133 /**
00134   * @brief  De-initialize USART registers (Registers restored to their default values).
00135   * @param  USARTx USART Instance
00136   * @retval An ErrorStatus enumeration value:
00137   *          - SUCCESS: USART registers are de-initialized
00138   *          - ERROR: USART registers are not de-initialized
00139   */
00140 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
00141 {
00142   ErrorStatus status = SUCCESS;
00143 
00144   /* Check the parameters */
00145   assert_param(IS_UART_INSTANCE(USARTx));
00146 
00147   if (USARTx == USART1)
00148   {
00149     /* Force reset of USART clock */
00150     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
00151 
00152     /* Release reset of USART clock */
00153     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
00154   }
00155   else if (USARTx == USART2)
00156   {
00157     /* Force reset of USART clock */
00158     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
00159 
00160     /* Release reset of USART clock */
00161     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
00162   }
00163 #if defined(USART3)
00164   else if (USARTx == USART3)
00165   {
00166     /* Force reset of USART clock */
00167     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
00168 
00169     /* Release reset of USART clock */
00170     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
00171   }
00172 #endif /* USART3 */
00173 #if defined(UART4)
00174   else if (USARTx == UART4)
00175   {
00176     /* Force reset of UART clock */
00177     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
00178 
00179     /* Release reset of UART clock */
00180     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
00181   }
00182 #endif /* UART4 */
00183 #if defined(UART5)
00184   else if (USARTx == UART5)
00185   {
00186     /* Force reset of UART clock */
00187     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
00188 
00189     /* Release reset of UART clock */
00190     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
00191   }
00192 #endif /* UART5 */
00193   else
00194   {
00195     status = ERROR;
00196   }
00197 
00198   return (status);
00199 }
00200 
00201 /**
00202   * @brief  Initialize USART registers according to the specified
00203   *         parameters in USART_InitStruct.
00204   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
00205   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
00206   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
00207   * @param  USARTx USART Instance
00208   * @param  USART_InitStruct: pointer to a LL_USART_InitTypeDef structure
00209   *         that contains the configuration information for the specified USART peripheral.
00210   * @retval An ErrorStatus enumeration value:
00211   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
00212   *          - ERROR: Problem occurred during USART Registers initialization
00213   */
00214 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
00215 {
00216   ErrorStatus status = ERROR;
00217   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
00218 
00219   /* Check the parameters */
00220   assert_param(IS_UART_INSTANCE(USARTx));
00221   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate ));
00222   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth ));
00223   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits ));
00224   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity ));
00225   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection ));
00226   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl ));
00227   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling ));
00228 
00229   /* USART needs to be in disabled state, in order to be able to configure some bits in
00230      CRx registers */
00231   if (LL_USART_IsEnabled(USARTx) == 0U)
00232   {
00233     /*---------------------------- USART CR1 Configuration -----------------------
00234      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
00235      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
00236      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
00237      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
00238      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
00239      */
00240     MODIFY_REG(USARTx->CR1,
00241                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
00242                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
00243                (USART_InitStruct->DataWidth  | USART_InitStruct->Parity  |
00244                 USART_InitStruct->TransferDirection  | USART_InitStruct->OverSampling ));
00245 
00246     /*---------------------------- USART CR2 Configuration -----------------------
00247      * Configure USARTx CR2 (Stop bits) with parameters:
00248      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
00249      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
00250      */
00251     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits );
00252 
00253     /*---------------------------- USART CR3 Configuration -----------------------
00254      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
00255      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
00256      */
00257     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl );
00258 
00259     /*---------------------------- USART BRR Configuration -----------------------
00260      * Retrieve Clock frequency used for USART Peripheral
00261      */
00262     if (USARTx == USART1)
00263     {
00264       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
00265     }
00266     else if (USARTx == USART2)
00267     {
00268       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
00269     }
00270 #if defined(USART3)
00271     else if (USARTx == USART3)
00272     {
00273       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
00274     }
00275 #endif /* USART3 */
00276 #if defined(UART4)
00277     else if (USARTx == UART4)
00278     {
00279       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
00280     }
00281 #endif /* UART4 */
00282 #if defined(UART5)
00283     else if (USARTx == UART5)
00284     {
00285       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
00286     }
00287 #endif /* UART5 */
00288     else
00289     {
00290       /* Nothing to do, as error code is already assigned to ERROR value */
00291     }
00292 
00293     /* Configure the USART Baud Rate :
00294        - valid baud rate value (different from 0) is required
00295        - Peripheral clock as returned by RCC service, should be valid (different from 0).
00296     */
00297     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
00298         && (USART_InitStruct->BaudRate  != 0U))
00299     {
00300       status = SUCCESS;
00301       LL_USART_SetBaudRate(USARTx,
00302                            periphclk,
00303                            USART_InitStruct->OverSampling ,
00304                            USART_InitStruct->BaudRate );
00305     }
00306   }
00307   /* Endif (=> USART not in Disabled state => return ERROR) */
00308 
00309   return (status);
00310 }
00311 
00312 /**
00313   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
00314   * @param USART_InitStruct: pointer to a @ref LL_USART_InitTypeDef structure
00315   *                          whose fields will be set to default values.
00316   * @retval None
00317   */
00318 
00319 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
00320 {
00321   /* Set USART_InitStruct fields to default values */
00322   USART_InitStruct->BaudRate             = 9600U;
00323   USART_InitStruct->DataWidth            = LL_USART_DATAWIDTH_8B;
00324   USART_InitStruct->StopBits             = LL_USART_STOPBITS_1;
00325   USART_InitStruct->Parity               = LL_USART_PARITY_NONE ;
00326   USART_InitStruct->TransferDirection    = LL_USART_DIRECTION_TX_RX;
00327   USART_InitStruct->HardwareFlowControl  = LL_USART_HWCONTROL_NONE;
00328   USART_InitStruct->OverSampling         = LL_USART_OVERSAMPLING_16;
00329 }
00330 
00331 /**
00332   * @brief  Initialize USART Clock related settings according to the
00333   *         specified parameters in the USART_ClockInitStruct.
00334   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
00335   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
00336   * @param  USARTx USART Instance
00337   * @param  USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
00338   *         that contains the Clock configuration information for the specified USART peripheral.
00339   * @retval An ErrorStatus enumeration value:
00340   *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
00341   *          - ERROR: Problem occurred during USART Registers initialization
00342   */
00343 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
00344 {
00345   ErrorStatus status = SUCCESS;
00346 
00347   /* Check USART Instance and Clock signal output parameters */
00348   assert_param(IS_UART_INSTANCE(USARTx));
00349   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput ));
00350 
00351   /* USART needs to be in disabled state, in order to be able to configure some bits in
00352      CRx registers */
00353   if (LL_USART_IsEnabled(USARTx) == 0U)
00354   {
00355     /*---------------------------- USART CR2 Configuration -----------------------*/
00356     /* If Clock signal has to be output */
00357     if (USART_ClockInitStruct->ClockOutput  == LL_USART_CLOCK_DISABLE)
00358     {
00359       /* Deactivate Clock signal delivery :
00360        * - Disable Clock Output:        USART_CR2_CLKEN cleared
00361        */
00362       LL_USART_DisableSCLKOutput(USARTx);
00363     }
00364     else
00365     {
00366       /* Ensure USART instance is USART capable */
00367       assert_param(IS_USART_INSTANCE(USARTx));
00368 
00369       /* Check clock related parameters */
00370       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity ));
00371       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase ));
00372       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse ));
00373 
00374       /*---------------------------- USART CR2 Configuration -----------------------
00375        * Configure USARTx CR2 (Clock signal related bits) with parameters:
00376        * - Enable Clock Output:         USART_CR2_CLKEN set
00377        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
00378        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
00379        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
00380        */
00381       MODIFY_REG(USARTx->CR2,
00382                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
00383                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity  |
00384                  USART_ClockInitStruct->ClockPhase  | USART_ClockInitStruct->LastBitClockPulse );
00385     }
00386   }
00387   /* Else (USART not in Disabled state => return ERROR */
00388   else
00389   {
00390     status = ERROR;
00391   }
00392 
00393   return (status);
00394 }
00395 
00396 /**
00397   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
00398   * @param USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
00399   *                               whose fields will be set to default values.
00400   * @retval None
00401   */
00402 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
00403 {
00404   /* Set LL_USART_ClockInitStruct fields with default values */
00405   USART_ClockInitStruct->ClockOutput        = LL_USART_CLOCK_DISABLE;
00406   USART_ClockInitStruct->ClockPolarity      = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
00407   USART_ClockInitStruct->ClockPhase         = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
00408   USART_ClockInitStruct->LastBitClockPulse  = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
00409 }
00410 
00411 /**
00412   * @}
00413   */
00414 
00415 /**
00416   * @}
00417   */
00418 
00419 /**
00420   * @}
00421   */
00422 
00423 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
00424 
00425 /**
00426   * @}
00427   */
00428 
00429 #endif /* USE_FULL_LL_DRIVER */
00430 
00431 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00432