stm32l4xx_ll_lptim.h

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_ll_lptim.h
00004   * @author  MCD Application Team
00005   * @version V1.5.1
00006   * @date    31-May-2016
00007   * @brief   Header file of LPTIM LL module.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */
00037 
00038 /* Define to prevent recursive inclusion -------------------------------------*/
00039 #ifndef __STM32L4xx_LL_LPTIM_H
00040 #define __STM32L4xx_LL_LPTIM_H
00041 
00042 #ifdef __cplusplus
00043 extern "C" {
00044 #endif
00045 
00046 /* Includes ------------------------------------------------------------------*/
00047 #include "stm32l4xx.h"
00048 
00049 /** @addtogroup STM32L4xx_LL_Driver
00050   * @{
00051   */
00052 #if defined (LPTIM1) || defined (LPTIM2)
00053     
00054 /** @defgroup LPTIM_LL LPTIM
00055   * @{
00056   */
00057 
00058 /* Private types -------------------------------------------------------------*/
00059 /* Private variables ---------------------------------------------------------*/
00060 
00061 /* Private constants ---------------------------------------------------------*/
00062 
00063 /* Private macros ------------------------------------------------------------*/
00064 /* Private macros ------------------------------------------------------------*/
00065 #if defined(USE_FULL_LL_DRIVER)
00066 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
00067   * @{
00068   */
00069 /**
00070   * @}
00071   */
00072 #endif /*USE_FULL_LL_DRIVER*/
00073 
00074 /* Exported types ------------------------------------------------------------*/
00075 #if defined(USE_FULL_LL_DRIVER)
00076 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
00077   * @{
00078   */
00079 
00080 /**
00081   * @brief  LPTIM Init structure definition
00082   */
00083 typedef struct
00084 {
00085   uint32_t ClockSource;    /*!< Specifies the source of the clock used by the LPTIM instance.
00086                                 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
00087 
00088                                 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
00089 
00090   uint32_t Prescaler;      /*!< Specifies the prescaler division ratio.
00091                                 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
00092 
00093                                 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
00094 
00095   uint32_t Waveform;       /*!< Specifies the waveform shape.
00096                                 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
00097 
00098                                 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
00099 
00100   uint32_t Polarity;       /*!< Specifies waveform polarity.
00101                                 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
00102 
00103                                 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
00104 } LL_LPTIM_InitTypeDef;
00105 
00106 /**
00107   * @}
00108   */
00109 #endif /* USE_FULL_LL_DRIVER */
00110 
00111 /* Exported constants --------------------------------------------------------*/
00112 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
00113   * @{
00114   */
00115 
00116 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
00117   * @brief    Flags defines which can be used with LL_LPTIM_ReadReg function
00118   * @{
00119   */
00120 #define LL_LPTIM_ISR_CMPM                     LPTIM_ISR_CMPM     /*!< Compare match */
00121 #define LL_LPTIM_ISR_ARRM                     LPTIM_ISR_ARRM     /*!< Autoreload match */
00122 #define LL_LPTIM_ISR_EXTTRIG                  LPTIM_ISR_EXTTRIG  /*!< External trigger edge event */
00123 #define LL_LPTIM_ISR_CMPOK                    LPTIM_ISR_CMPOK    /*!< Compare register update OK */
00124 #define LL_LPTIM_ISR_ARROK                    LPTIM_ISR_ARROK    /*!< Autoreload register update OK */
00125 #define LL_LPTIM_ISR_UP                       LPTIM_ISR_UP       /*!< Counter direction change down to up */
00126 #define LL_LPTIM_ISR_DOWN                     LPTIM_ISR_DOWN     /*!< Counter direction change up to down */
00127 /**
00128   * @}
00129   */
00130 
00131 /** @defgroup LPTIM_LL_EC_IT IT Defines
00132   * @brief    IT defines which can be used with LL_LPTIM_ReadReg and  LL_LPTIM_WriteReg functions
00133   * @{
00134   */
00135 #define LL_LPTIM_IER_CMPMIE                   LPTIM_IER_CMPMIE       /*!< Compare match Interrupt Enable */
00136 #define LL_LPTIM_IER_ARRMIE                   LPTIM_IER_ARRMIE       /*!< Autoreload match Interrupt Enable */
00137 #define LL_LPTIM_IER_EXTTRIGIE                LPTIM_IER_EXTTRIGIE    /*!< External trigger valid edge Interrupt Enable */
00138 #define LL_LPTIM_IER_CMPOKIE                  LPTIM_IER_CMPOKIE      /*!< Compare register update OK Interrupt Enable */
00139 #define LL_LPTIM_IER_ARROKIE                  LPTIM_IER_ARROKIE      /*!< Autoreload register update OK Interrupt Enable */
00140 #define LL_LPTIM_IER_UPIE                     LPTIM_IER_UPIE         /*!< Direction change to UP Interrupt Enable */
00141 #define LL_LPTIM_IER_DOWNIE                   LPTIM_IER_DOWNIE       /*!< Direction change to down Interrupt Enable */
00142 /**
00143   * @}
00144   */
00145 
00146 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
00147   * @{
00148   */
00149 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS    LPTIM_CR_CNTSTRT       /*!<LP Timer starts in continuous mode*/
00150 #define LL_LPTIM_OPERATING_MODE_ONESHOT       LPTIM_CR_SNGSTRT       /*!<LP Tilmer starts in single mode*/
00151 /**
00152   * @}
00153   */
00154 
00155 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
00156   * @{
00157   */
00158 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE        ((uint32_t)0x00000000U) /*!<Preload is disabled: registers are updated after each APB bus write access*/
00159 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD      LPTIM_CFGR_PRELOAD      /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
00160 /**
00161   * @}
00162   */
00163 
00164 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
00165   * @{
00166   */
00167 #define LL_LPTIM_COUNTER_MODE_INTERNAL        ((uint32_t)0x00000000U) /*!<The counter is incremented following each internal clock pulse*/
00168 #define LL_LPTIM_COUNTER_MODE_EXTERNAL        LPTIM_CFGR_COUNTMODE    /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
00169 /**
00170   * @}
00171   */
00172 
00173 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
00174   * @{
00175   */
00176 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM          ((uint32_t)0x00000000U) /*!<LPTIM  generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
00177 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE      LPTIM_CFGR_WAVE         /*!<LPTIM  generates a Set Once waveform*/
00178 /**
00179   * @}
00180   */
00181 
00182 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
00183   * @{
00184   */
00185 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR      ((uint32_t) 0x00000000U) /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
00186 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE      LPTIM_CFGR_WAVPOL        /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
00187 /**
00188   * @}
00189   */
00190 
00191 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
00192   * @{
00193   */
00194 #define LL_LPTIM_PRESCALER_DIV1               ((uint32_t)0x000000U)                     /*!<Prescaler division factor is set to 1*/
00195 #define LL_LPTIM_PRESCALER_DIV2               LPTIM_CFGR_PRESC_0                        /*!<Prescaler division factor is set to 2*/
00196 #define LL_LPTIM_PRESCALER_DIV4               LPTIM_CFGR_PRESC_1                        /*!<Prescaler division factor is set to 4*/
00197 #define LL_LPTIM_PRESCALER_DIV8               (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
00198 #define LL_LPTIM_PRESCALER_DIV16              LPTIM_CFGR_PRESC_2                        /*!<Prescaler division factor is set to 16*/
00199 #define LL_LPTIM_PRESCALER_DIV32              (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
00200 #define LL_LPTIM_PRESCALER_DIV64              (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
00201 #define LL_LPTIM_PRESCALER_DIV128             LPTIM_CFGR_PRESC                          /*!<Prescaler division factor is set to 128*/
00202 /**
00203   * @}
00204   */
00205 
00206 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
00207   * @{
00208   */
00209 #define LL_LPTIM_TRIG_SOURCE_GPIO             ((uint32_t)0x00000000U)                       /*!<External input trigger is connected to TIMx_ETR input*/
00210 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA        LPTIM_CFGR_TRIGSEL_0                          /*!<External input trigger is connected to RTC Alarm A*/
00211 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB        LPTIM_CFGR_TRIGSEL_1                          /*!<External input trigger is connected to RTC Alarm B*/
00212 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1         (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
00213 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2         LPTIM_CFGR_TRIGSEL_2                          /*!<External input trigger is connected to RTC Tamper 2*/
00214 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3         (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
00215 #define LL_LPTIM_TRIG_SOURCE_COMP1            (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
00216 #define LL_LPTIM_TRIG_SOURCE_COMP2            LPTIM_CFGR_TRIGSEL                            /*!<External input trigger is connected to COMP2 output*/
00217 /**
00218   * @}
00219   */
00220 
00221 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
00222   * @{
00223   */
00224 #define LL_LPTIM_TRIG_FILTER_NONE             ((uint32_t)0x00000000U) /*!<Any trigger active level change is considered as a valid trigger*/
00225 #define LL_LPTIM_TRIG_FILTER_2                LPTIM_CFGR_TRGFLT_0     /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
00226 #define LL_LPTIM_TRIG_FILTER_4                LPTIM_CFGR_TRGFLT_1     /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
00227 #define LL_LPTIM_TRIG_FILTER_8                LPTIM_CFGR_TRGFLT       /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
00228 /**
00229   * @}
00230   */
00231 
00232 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
00233   * @{
00234   */
00235 #define LL_LPTIM_TRIG_POLARITY_RISING         LPTIM_CFGR_TRIGEN_0    /*!<LPTIM counter starts when a rising edge is detected*/
00236 #define LL_LPTIM_TRIG_POLARITY_FALLING        LPTIM_CFGR_TRIGEN_1    /*!<LPTIM counter starts when a falling edge is detected*/
00237 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN      /*!<LPTIM counter starts when a rising or a falling edge is detected*/
00238 /**
00239   * @}
00240   */
00241 
00242 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
00243   * @{
00244   */
00245 #define LL_LPTIM_CLK_SOURCE_INTERNAL          ((uint32_t)0x00000000U) /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
00246 #define LL_LPTIM_CLK_SOURCE_EXTERNAL          LPTIM_CFGR_CKSEL        /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
00247 /**
00248   * @}
00249   */
00250 
00251 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
00252   * @{
00253   */
00254 #define LL_LPTIM_CLK_FILTER_NONE              ((uint32_t)0x00000000U) /*!<Any external clock signal level change is considered as a valid transition*/
00255 #define LL_LPTIM_CLK_FILTER_2                 LPTIM_CFGR_CKFLT_0      /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
00256 #define LL_LPTIM_CLK_FILTER_4                 LPTIM_CFGR_CKFLT_1      /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
00257 #define LL_LPTIM_CLK_FILTER_8                 LPTIM_CFGR_CKFLT        /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
00258 /**
00259   * @}
00260   */
00261 
00262 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
00263   * @{
00264   */
00265 #define LL_LPTIM_CLK_POLARITY_RISING          ((uint32_t)0x00000000U) /*!< The rising edge is the active edge used for counting*/
00266 #define LL_LPTIM_CLK_POLARITY_FALLING         LPTIM_CFGR_CKPOL_0      /*!< The falling edge is the active edge used for counting*/
00267 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING  LPTIM_CFGR_CKPOL_1      /*!< Both edges are active edges*/
00268 /**
00269   * @}
00270   */
00271 
00272 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
00273   * @{
00274   */
00275 #define LL_LPTIM_ENCODER_MODE_RISING          ((uint32_t)0x00000000U) /*!< The rising edge is the active edge used for counting*/
00276 #define LL_LPTIM_ENCODER_MODE_FALLING         LPTIM_CFGR_CKPOL_0      /*!< The falling edge is the active edge used for counting*/
00277 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING  LPTIM_CFGR_CKPOL_1      /*!< Both edges are active edges*/
00278 /**
00279   * @}
00280   */
00281 
00282 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
00283   * @{
00284   */
00285 
00286 #define LL_LPTIM_INPUT1_SRC_GPIO         ((uint32_t)0x00000000U) /*!< For LPTIM1 and LPTIM2 */
00287 #define LL_LPTIM_INPUT1_SRC_COMP1        LPTIM_OR_OR_0           /*!< For LPTIM1 and LPTIM2 */
00288 #define LL_LPTIM_INPUT1_SRC_COMP2        LPTIM_OR_OR_1           /*!< For LPTIM2 */
00289 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2  LPTIM_OR_OR             /*!< For LPTIM2 */
00290 /**
00291   * @}
00292   */
00293 
00294 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
00295   * @{
00296   */
00297 
00298 #define LL_LPTIM_INPUT2_SRC_GPIO         ((uint32_t)0x00000000U) /*!< For LPTIM1 */
00299 #define LL_LPTIM_INPUT2_SRC_COMP2        LPTIM_OR_OR_1           /*!< For LPTIM1 */
00300 /**
00301   * @}
00302   */
00303   
00304 /**
00305   * @}
00306   */
00307 
00308 /* Exported macro ------------------------------------------------------------*/
00309 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
00310   * @{
00311   */
00312 
00313 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
00314   * @{
00315   */
00316 
00317 /**
00318   * @brief  Write a value in LPTIM register
00319   * @param  __INSTANCE__ LPTIM Instance
00320   * @param  __REG__ Register to be written
00321   * @param  __VALUE__ Value to be written in the register
00322   * @retval None
00323   */
00324 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
00325 
00326 /**
00327   * @brief  Read a value in LPTIM register
00328   * @param  __INSTANCE__ LPTIM Instance
00329   * @param  __REG__ Register to be read
00330   * @retval Register value
00331   */
00332 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
00333 /**
00334   * @}
00335   */
00336 
00337 /**
00338   * @}
00339   */
00340 
00341 
00342 /* Exported functions --------------------------------------------------------*/
00343 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
00344   * @{
00345   */
00346 
00347 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
00348   * @{
00349   */
00350 
00351 /**
00352   * @brief  Enable the LPTIM instance
00353   * @note After setting the ENABLE bit, a delay of two counter clock is needed
00354   *       before the LPTIM instance is actually enabled.
00355   * @rmtoll CR           ENABLE        LL_LPTIM_Enable
00356   * @param  LPTIMx Low-Power Timer instance
00357   * @retval None
00358   */
00359 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
00360 {
00361   SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
00362 }
00363 
00364 /**
00365   * @brief  Disable the LPTIM instance
00366   * @rmtoll CR           ENABLE        LL_LPTIM_Disable
00367   * @param  LPTIMx Low-Power Timer instance
00368   * @retval None
00369   */
00370 __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
00371 {
00372   CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
00373 }
00374 
00375 /**
00376   * @brief  Indicates whether the LPTIM instance is enabled.
00377   * @rmtoll CR           ENABLE        LL_LPTIM_IsEnabled
00378   * @param  LPTIMx Low-Power Timer instance
00379   * @retval State of bit (1 or 0).
00380   */
00381 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
00382 {
00383   return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
00384 }
00385 
00386 /**
00387   * @brief  Starts the LPTIM counter in the desired mode.
00388   * @note LPTIM instance must be enabled before starting the counter.
00389   * @note It is possible to change on the fly from One Shot mode to
00390   *       Continuous mode.
00391   * @rmtoll CR           CNTSTRT       LL_LPTIM_StartCounter\n
00392   *         CR           SNGSTRT       LL_LPTIM_StartCounter
00393   * @param  LPTIMx Low-Power Timer instance
00394   * @param  OperatingMode This parameter can be one of the following values:
00395   *         @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
00396   *         @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
00397   * @retval None
00398   */
00399 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
00400 {
00401   MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
00402 }
00403 
00404 /**
00405   * @brief  Set the LPTIM registers update mode (enable/disable register preload)
00406   * @note This function must be called when the LPTIM instance is disabled.
00407   * @rmtoll CFGR         PRELOAD       LL_LPTIM_SetUpdateMode
00408   * @param  LPTIMx Low-Power Timer instance
00409   * @param  UpdateMode This parameter can be one of the following values:
00410   *         @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
00411   *         @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
00412   * @retval None
00413   */
00414 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
00415 {
00416   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
00417 }
00418 
00419 /**
00420   * @brief  Get the LPTIM registers update mode
00421   * @rmtoll CFGR         PRELOAD       LL_LPTIM_GetUpdateMode
00422   * @param  LPTIMx Low-Power Timer instance
00423   * @retval Returned value can be one of the following values:
00424   *         @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
00425   *         @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
00426   */
00427 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
00428 {
00429   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
00430 }
00431 
00432 /**
00433   * @brief  Set the auto reload value
00434   * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
00435   * @note After a write to the LPTIMx_ARR register a new write operation to the
00436   *       same register can only be performed when the previous write operation
00437   *       is completed. Any successive write before  the ARROK flag be set, will
00438   *       lead to unpredictable results.
00439   * @note autoreload value be strictly greater than the compare value.
00440   * @rmtoll ARR          ARR           LL_LPTIM_SetAutoReload
00441   * @param  LPTIMx Low-Power Timer instance
00442   * @param  AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
00443   * @retval None
00444   */
00445 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
00446 {
00447   MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
00448 }
00449 
00450 /**
00451   * @brief  Get actual auto reload value
00452   * @rmtoll ARR          ARR           LL_LPTIM_GetAutoReload
00453   * @param  LPTIMx Low-Power Timer instance
00454   * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
00455   */
00456 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
00457 {
00458   return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
00459 }
00460 
00461 /**
00462   * @brief  Set the compare value
00463   * @note After a write to the LPTIMx_CMP register a new write operation to the
00464   *       same register can only be performed when the previous write operation
00465   *       is completed. Any successive write before the CMPOK flag be set, will
00466   *       lead to unpredictable results.
00467   * @rmtoll CMP          CMP           LL_LPTIM_SetCompare
00468   * @param  LPTIMx Low-Power Timer instance
00469   * @param  CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
00470   * @retval None
00471   */
00472 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
00473 {
00474   MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
00475 }
00476 
00477 /**
00478   * @brief  Get actual compare value
00479   * @rmtoll CMP          CMP           LL_LPTIM_GetCompare
00480   * @param  LPTIMx Low-Power Timer instance
00481   * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
00482   */
00483 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
00484 {
00485   return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
00486 }
00487 
00488 /**
00489   * @brief  Get actual counter value
00490   * @note When the LPTIM instance is running with an asynchronous clock, reading
00491   *       the LPTIMx_CNT register may return unreliable values. So in this case
00492   *       it is necessary to perform two consecutive read accesses and verify
00493   *       that the two returned values are identical.
00494   * @rmtoll CNT          CNT           LL_LPTIM_GetCounter
00495   * @param  LPTIMx Low-Power Timer instance
00496   * @retval Counter value
00497   */
00498 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
00499 {
00500   return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
00501 }
00502 
00503 /**
00504   * @brief  Set the counter mode (selection of the LPTIM counter clock source).
00505   * @note The counter mode can be set only when the LPTIM instance is disabled.
00506   * @rmtoll CFGR         COUNTMODE     LL_LPTIM_SetCounterMode
00507   * @param  LPTIMx Low-Power Timer instance
00508   * @param  CounterMode This parameter can be one of the following values:
00509   *         @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
00510   *         @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
00511   * @retval None
00512   */
00513 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
00514 {
00515   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
00516 }
00517 
00518 /**
00519   * @brief  Get the counter mode
00520   * @rmtoll CFGR         COUNTMODE     LL_LPTIM_GetCounterMode
00521   * @param  LPTIMx Low-Power Timer instance
00522   * @retval Returned value can be one of the following values:
00523   *         @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
00524   *         @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
00525   */
00526 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
00527 {
00528   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
00529 }
00530 
00531 /**
00532   * @brief  Configure the LPTIM instance output (LPTIMx_OUT)
00533   * @note This function must be called when the LPTIM instance is disabled.
00534   * @note Regarding the LPTIM output polarity the change takes effect
00535   *       immediately, so the output default value will change immediately after
00536   *       the polarity is re-configured, even before the timer is enabled.
00537   * @rmtoll CFGR         WAVE          LL_LPTIM_ConfigOutput\n
00538   *         CFGR         WAVPOL        LL_LPTIM_ConfigOutput
00539   * @param  LPTIMx Low-Power Timer instance
00540   * @param  Waveform This parameter can be one of the following values:
00541   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
00542   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
00543   * @param  Polarity This parameter can be one of the following values:
00544   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
00545   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
00546   * @retval None
00547   */
00548 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
00549 {
00550   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
00551 }
00552 
00553 /**
00554   * @brief  Set  waveform shape
00555   * @rmtoll CFGR         WAVE          LL_LPTIM_SetWaveform
00556   * @param  LPTIMx Low-Power Timer instance
00557   * @param  Waveform This parameter can be one of the following values:
00558   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
00559   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
00560   * @retval None
00561   */
00562 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
00563 {
00564   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
00565 }
00566 
00567 /**
00568   * @brief  Get actual waveform shape
00569   * @rmtoll CFGR         WAVE          LL_LPTIM_GetWaveform
00570   * @param  LPTIMx Low-Power Timer instance
00571   * @retval Returned value can be one of the following values:
00572   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
00573   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
00574   */
00575 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
00576 {
00577   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
00578 }
00579 
00580 /**
00581   * @brief  Set  output polarity
00582   * @rmtoll CFGR         WAVPOL        LL_LPTIM_SetPolarity
00583   * @param  LPTIMx Low-Power Timer instance
00584   * @param  Polarity This parameter can be one of the following values:
00585   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
00586   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
00587   * @retval None
00588   */
00589 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
00590 {
00591   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
00592 }
00593 
00594 /**
00595   * @brief  Get actual output polarity
00596   * @rmtoll CFGR         WAVPOL        LL_LPTIM_GetPolarity
00597   * @param  LPTIMx Low-Power Timer instance
00598   * @retval Returned value can be one of the following values:
00599   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
00600   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
00601   */
00602 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
00603 {
00604   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
00605 }
00606 
00607 /**
00608   * @brief  Set actual prescaler division ratio.
00609   * @note This function must be called when the LPTIM instance is disabled.
00610   * @note When the LPTIM is configured to be clocked by an internal clock source
00611   *       and the LPTIM counter is configured to be updated by active edges
00612   *       detected on the LPTIM external Input1, the internal clock provided to
00613   *       the LPTIM must be not be prescaled.
00614   * @rmtoll CFGR         PRESC         LL_LPTIM_SetPrescaler
00615   * @param  LPTIMx Low-Power Timer instance
00616   * @param  Prescaler This parameter can be one of the following values:
00617   *         @arg @ref LL_LPTIM_PRESCALER_DIV1
00618   *         @arg @ref LL_LPTIM_PRESCALER_DIV2
00619   *         @arg @ref LL_LPTIM_PRESCALER_DIV4
00620   *         @arg @ref LL_LPTIM_PRESCALER_DIV8
00621   *         @arg @ref LL_LPTIM_PRESCALER_DIV16
00622   *         @arg @ref LL_LPTIM_PRESCALER_DIV32
00623   *         @arg @ref LL_LPTIM_PRESCALER_DIV64
00624   *         @arg @ref LL_LPTIM_PRESCALER_DIV128
00625   * @retval None
00626   */
00627 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
00628 {
00629   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
00630 }
00631 
00632 /**
00633   * @brief  Get actual prescaler division ratio.
00634   * @rmtoll CFGR         PRESC         LL_LPTIM_GetPrescaler
00635   * @param  LPTIMx Low-Power Timer instance
00636   * @retval Returned value can be one of the following values:
00637   *         @arg @ref LL_LPTIM_PRESCALER_DIV1
00638   *         @arg @ref LL_LPTIM_PRESCALER_DIV2
00639   *         @arg @ref LL_LPTIM_PRESCALER_DIV4
00640   *         @arg @ref LL_LPTIM_PRESCALER_DIV8
00641   *         @arg @ref LL_LPTIM_PRESCALER_DIV16
00642   *         @arg @ref LL_LPTIM_PRESCALER_DIV32
00643   *         @arg @ref LL_LPTIM_PRESCALER_DIV64
00644   *         @arg @ref LL_LPTIM_PRESCALER_DIV128
00645   */
00646 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
00647 {
00648   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
00649 }
00650 
00651 /**
00652   * @brief  Set LPTIM input 1 source (default GPIO).
00653   * @rmtoll OR         OR_0         LL_LPTIM_SetInput1Src
00654   * @rmtoll OR         OR_1         LL_LPTIM_SetInput1Src
00655   * @param  LPTIMx Low-Power Timer instance
00656   * @param  Src This parameter can be one of the following values:
00657   *         @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
00658   *         @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
00659   *         @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
00660   *         @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
00661   * @retval None
00662   */
00663 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
00664 {
00665   WRITE_REG(LPTIMx->OR, Src);
00666 }
00667 
00668 /**
00669   * @brief  Set LPTIM input 2 source (default GPIO).
00670   * @rmtoll OR         OR_0         LL_LPTIM_SetInput2Src
00671   * @param  LPTIMx Low-Power Timer instance
00672   * @param  Src This parameter can be one of the following values:
00673   *         @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
00674   *         @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
00675   * @retval None
00676   */
00677 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
00678 {
00679   WRITE_REG(LPTIMx->OR, Src);
00680 }
00681 
00682 /**
00683   * @}
00684   */
00685 
00686 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
00687   * @{
00688   */
00689 
00690 /**
00691   * @brief  Enable the timeout function
00692   * @note This function must be called when the LPTIM instance is disabled.
00693   * @note The first trigger event will start the timer, any successive trigger
00694   *       event will reset the counter and the timer will restart.
00695   * @note The timeout value corresponds to the compare value; if no trigger
00696   *       occurs within the expected time frame, the MCU is waked-up by the
00697   *       compare match event.
00698   * @rmtoll CFGR         TIMOUT        LL_LPTIM_EnableTimeout
00699   * @param  LPTIMx Low-Power Timer instance
00700   * @retval None
00701   */
00702 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
00703 {
00704   SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
00705 }
00706 
00707 /**
00708   * @brief  Disable the timeout function
00709   * @note This function must be called when the LPTIM instance is disabled.
00710   * @note A trigger event arriving when the timer is already started will be
00711   *       ignored.
00712   * @rmtoll CFGR         TIMOUT        LL_LPTIM_DisableTimeout
00713   * @param  LPTIMx Low-Power Timer instance
00714   * @retval None
00715   */
00716 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
00717 {
00718   CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
00719 }
00720 
00721 /**
00722   * @brief  Indicate whether the timeout function is enabled.
00723   * @rmtoll CFGR         TIMOUT        LL_LPTIM_IsEnabledTimeout
00724   * @param  LPTIMx Low-Power Timer instance
00725   * @retval State of bit (1 or 0).
00726   */
00727 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
00728 {
00729   return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
00730 }
00731 
00732 /**
00733   * @brief  Start the LPTIM counter
00734   * @note This function must be called when the LPTIM instance is disabled.
00735   * @rmtoll CFGR         TRIGEN        LL_LPTIM_TrigSw
00736   * @param  LPTIMx Low-Power Timer instance
00737   * @retval None
00738   */
00739 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
00740 {
00741   CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
00742 }
00743 
00744 /**
00745   * @brief  Configure the external trigger used as a trigger event for the LPTIM.
00746   * @note This function must be called when the LPTIM instance is disabled.
00747   * @note An internal clock source must be present when a digital filter is
00748   *       required for the trigger.
00749   * @rmtoll CFGR         TRIGSEL       LL_LPTIM_ConfigTrigger\n
00750   *         CFGR         TRGFLT        LL_LPTIM_ConfigTrigger\n
00751   *         CFGR         TRIGEN        LL_LPTIM_ConfigTrigger
00752   * @param  LPTIMx Low-Power Timer instance
00753   * @param  Source This parameter can be one of the following values:
00754   *         @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
00755   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
00756   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
00757   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
00758   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
00759   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
00760   *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
00761   *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
00762   * @param  Filter This parameter can be one of the following values:
00763   *         @arg @ref LL_LPTIM_TRIG_FILTER_NONE
00764   *         @arg @ref LL_LPTIM_TRIG_FILTER_2
00765   *         @arg @ref LL_LPTIM_TRIG_FILTER_4
00766   *         @arg @ref LL_LPTIM_TRIG_FILTER_8
00767   * @param  Polarity This parameter can be one of the following values:
00768   *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
00769   *         @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
00770   *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
00771   * @retval None
00772   */
00773 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
00774 {
00775   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
00776 }
00777 
00778 /**
00779   * @brief  Get actual external trigger source.
00780   * @rmtoll CFGR         TRIGSEL       LL_LPTIM_GetTriggerSource
00781   * @param  LPTIMx Low-Power Timer instance
00782   * @retval Returned value can be one of the following values:
00783   *         @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
00784   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
00785   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
00786   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
00787   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
00788   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
00789   *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
00790   *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
00791   */
00792 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
00793 {
00794   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
00795 }
00796 
00797 /**
00798   * @brief  Get actual external trigger filter.
00799   * @rmtoll CFGR         TRGFLT        LL_LPTIM_GetTriggerFilter
00800   * @param  LPTIMx Low-Power Timer instance
00801   * @retval Returned value can be one of the following values:
00802   *         @arg @ref LL_LPTIM_TRIG_FILTER_NONE
00803   *         @arg @ref LL_LPTIM_TRIG_FILTER_2
00804   *         @arg @ref LL_LPTIM_TRIG_FILTER_4
00805   *         @arg @ref LL_LPTIM_TRIG_FILTER_8
00806   */
00807 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
00808 {
00809   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
00810 }
00811 
00812 /**
00813   * @brief  Get actual external trigger polarity.
00814   * @rmtoll CFGR         TRIGEN        LL_LPTIM_GetTriggerPolarity
00815   * @param  LPTIMx Low-Power Timer instance
00816   * @retval Returned value can be one of the following values:
00817   *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
00818   *         @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
00819   *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
00820   */
00821 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
00822 {
00823   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
00824 }
00825 
00826 /**
00827   * @}
00828   */
00829 
00830 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
00831   * @{
00832   */
00833 
00834 /**
00835   * @brief  Set the source of the clock used by the LPTIM instance.
00836   * @note This function must be called when the LPTIM instance is disabled.
00837   * @rmtoll CFGR         CKSEL         LL_LPTIM_SetClockSource
00838   * @param  LPTIMx Low-Power Timer instance
00839   * @param  ClockSource This parameter can be one of the following values:
00840   *         @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
00841   *         @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
00842   * @retval None
00843   */
00844 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
00845 {
00846   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
00847 }
00848 
00849 /**
00850   * @brief  Get actual LPTIM instance clock source.
00851   * @rmtoll CFGR         CKSEL         LL_LPTIM_GetClockSource
00852   * @param  LPTIMx Low-Power Timer instance
00853   * @retval Returned value can be one of the following values:
00854   *         @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
00855   *         @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
00856   */
00857 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
00858 {
00859   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
00860 }
00861 
00862 /**
00863   * @brief  Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
00864   * @note This function must be called when the LPTIM instance is disabled.
00865   * @note When both external clock signal edges are considered active ones,
00866   *       the LPTIM must also be clocked by an internal clock source with a
00867   *       frequency equal to at least four times the external clock frequency.
00868   * @note An internal clock source must be present when a digital filter is
00869   *       required for external clock.
00870   * @rmtoll CFGR         CKFLT         LL_LPTIM_ConfigClock\n
00871   *         CFGR         CKPOL         LL_LPTIM_ConfigClock
00872   * @param  LPTIMx Low-Power Timer instance
00873   * @param  ClockFilter This parameter can be one of the following values:
00874   *         @arg @ref LL_LPTIM_CLK_FILTER_NONE
00875   *         @arg @ref LL_LPTIM_CLK_FILTER_2
00876   *         @arg @ref LL_LPTIM_CLK_FILTER_4
00877   *         @arg @ref LL_LPTIM_CLK_FILTER_8
00878   * @param  ClockPolarity This parameter can be one of the following values:
00879   *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING
00880   *         @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
00881   *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
00882   * @retval None
00883   */
00884 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
00885 {
00886   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
00887 }
00888 
00889 /**
00890   * @brief  Get actual clock polarity
00891   * @rmtoll CFGR         CKPOL         LL_LPTIM_GetClockPolarity
00892   * @param  LPTIMx Low-Power Timer instance
00893   * @retval Returned value can be one of the following values:
00894   *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING
00895   *         @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
00896   *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
00897   */
00898 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
00899 {
00900   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
00901 }
00902 
00903 /**
00904   * @brief  Get actual clock digital filter
00905   * @rmtoll CFGR         CKFLT         LL_LPTIM_GetClockFilter
00906   * @param  LPTIMx Low-Power Timer instance
00907   * @retval Returned value can be one of the following values:
00908   *         @arg @ref LL_LPTIM_CLK_FILTER_NONE
00909   *         @arg @ref LL_LPTIM_CLK_FILTER_2
00910   *         @arg @ref LL_LPTIM_CLK_FILTER_4
00911   *         @arg @ref LL_LPTIM_CLK_FILTER_8
00912   */
00913 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
00914 {
00915   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
00916 }
00917 
00918 /**
00919   * @}
00920   */
00921 
00922 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
00923   * @{
00924   */
00925 
00926 /**
00927   * @brief  Configure the encoder mode.
00928   * @note This function must be called when the LPTIM instance is disabled.
00929   * @rmtoll CFGR         CKPOL         LL_LPTIM_SetEncoderMode
00930   * @param  LPTIMx Low-Power Timer instance
00931   * @param  EncoderMode This parameter can be one of the following values:
00932   *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING
00933   *         @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
00934   *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
00935   * @retval None
00936   */
00937 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
00938 {
00939   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
00940 }
00941 
00942 /**
00943   * @brief  Get actual encoder mode.
00944   * @rmtoll CFGR         CKPOL         LL_LPTIM_GetEncoderMode
00945   * @param  LPTIMx Low-Power Timer instance
00946   * @retval Returned value can be one of the following values:
00947   *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING
00948   *         @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
00949   *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
00950   */
00951 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
00952 {
00953   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
00954 }
00955 
00956 /**
00957   * @brief  Enable the encoder mode
00958   * @note This function must be called when the LPTIM instance is disabled.
00959   * @note In this mode the LPTIM instance must be clocked by an internal clock
00960   *       source. Also, the prescaler division ratio must be equal to 1.
00961   * @note LPTIM instance must be configured in continuous mode prior enabling
00962   *       the encoder mode.
00963   * @rmtoll CFGR         ENC           LL_LPTIM_EnableEncoderMode
00964   * @param  LPTIMx Low-Power Timer instance
00965   * @retval None
00966   */
00967 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
00968 {
00969   SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
00970 }
00971 
00972 /**
00973   * @brief  Disable the encoder mode
00974   * @note This function must be called when the LPTIM instance is disabled.
00975   * @rmtoll CFGR         ENC           LL_LPTIM_DisableEncoderMode
00976   * @param  LPTIMx Low-Power Timer instance
00977   * @retval None
00978   */
00979 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
00980 {
00981   CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
00982 }
00983 
00984 /**
00985   * @brief  Indicates whether the LPTIM operates in encoder mode.
00986   * @rmtoll CFGR         ENC           LL_LPTIM_IsEnabledEncoderMode
00987   * @param  LPTIMx Low-Power Timer instance
00988   * @retval State of bit (1 or 0).
00989   */
00990 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
00991 {
00992   return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
00993 }
00994 
00995 /**
00996   * @}
00997   */
00998 
00999 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
01000   * @{
01001   */
01002 
01003 /**
01004   * @brief  Clear the compare match flag (CMPMCF)
01005   * @rmtoll ICR          CMPMCF        LL_LPTIM_ClearFLAG_CMPM
01006   * @param  LPTIMx Low-Power Timer instance
01007   * @retval None
01008   */
01009 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
01010 {
01011   SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
01012 }
01013 
01014 /**
01015   * @brief  Inform application whether a compare match interrupt has occurred.
01016   * @rmtoll ISR          CMPM          LL_LPTIM_IsActiveFlag_CMPM
01017   * @param  LPTIMx Low-Power Timer instance
01018   * @retval State of bit (1 or 0).
01019   */
01020 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
01021 {
01022   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
01023 }
01024 
01025 /**
01026   * @brief  Clear the autoreload match flag (ARRMCF)
01027   * @rmtoll ICR          ARRMCF        LL_LPTIM_ClearFLAG_ARRM
01028   * @param  LPTIMx Low-Power Timer instance
01029   * @retval None
01030   */
01031 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
01032 {
01033   SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
01034 }
01035 
01036 /**
01037   * @brief  Inform application whether a autoreload match interrupt has occured.
01038   * @rmtoll ISR          ARRM          LL_LPTIM_IsActiveFlag_ARRM
01039   * @param  LPTIMx Low-Power Timer instance
01040   * @retval State of bit (1 or 0).
01041   */
01042 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
01043 {
01044   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
01045 }
01046 
01047 /**
01048   * @brief  Clear the external trigger valid edge flag(EXTTRIGCF).
01049   * @rmtoll ICR          EXTTRIGCF     LL_LPTIM_ClearFlag_EXTTRIG
01050   * @param  LPTIMx Low-Power Timer instance
01051   * @retval None
01052   */
01053 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01054 {
01055   SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
01056 }
01057 
01058 /**
01059   * @brief  Inform application whether a valid edge on the selected external trigger input has occurred.
01060   * @rmtoll ISR          EXTTRIG       LL_LPTIM_IsActiveFlag_EXTTRIG
01061   * @param  LPTIMx Low-Power Timer instance
01062   * @retval State of bit (1 or 0).
01063   */
01064 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01065 {
01066   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
01067 }
01068 
01069 /**
01070   * @brief  Clear the compare register update interrupt flag (CMPOKCF).
01071   * @rmtoll ICR          CMPOKCF       LL_LPTIM_ClearFlag_CMPOK
01072   * @param  LPTIMx Low-Power Timer instance
01073   * @retval None
01074   */
01075 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
01076 {
01077   SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
01078 }
01079 
01080 /**
01081   * @brief  Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
01082   * @rmtoll ISR          CMPOK         LL_LPTIM_IsActiveFlag_CMPOK
01083   * @param  LPTIMx Low-Power Timer instance
01084   * @retval State of bit (1 or 0).
01085   */
01086 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
01087 {
01088   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
01089 }
01090 
01091 /**
01092   * @brief  Clear the autoreload register update interrupt flag (ARROKCF).
01093   * @rmtoll ICR          ARROKCF       LL_LPTIM_ClearFlag_ARROK
01094   * @param  LPTIMx Low-Power Timer instance
01095   * @retval None
01096   */
01097 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
01098 {
01099   SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
01100 }
01101 
01102 /**
01103   * @brief  Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
01104   * @rmtoll ISR          ARROK         LL_LPTIM_IsActiveFlag_ARROK
01105   * @param  LPTIMx Low-Power Timer instance
01106   * @retval State of bit (1 or 0).
01107   */
01108 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
01109 {
01110   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
01111 }
01112 
01113 /**
01114   * @brief  Clear the counter direction change to up interrupt flag (UPCF).
01115   * @rmtoll ICR          UPCF          LL_LPTIM_ClearFlag_UP
01116   * @param  LPTIMx Low-Power Timer instance
01117   * @retval None
01118   */
01119 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
01120 {
01121   SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
01122 }
01123 
01124 /**
01125   * @brief  Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
01126   * @rmtoll ISR          UP            LL_LPTIM_IsActiveFlag_UP
01127   * @param  LPTIMx Low-Power Timer instance
01128   * @retval State of bit (1 or 0).
01129   */
01130 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
01131 {
01132   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
01133 }
01134 
01135 /**
01136   * @brief  Clear the counter direction change to down interrupt flag (DOWNCF).
01137   * @rmtoll ICR          DOWNCF        LL_LPTIM_ClearFlag_DOWN
01138   * @param  LPTIMx Low-Power Timer instance
01139   * @retval None
01140   */
01141 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
01142 {
01143   SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
01144 }
01145 
01146 /**
01147   * @brief  Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
01148   * @rmtoll ISR          DOWN          LL_LPTIM_IsActiveFlag_DOWN
01149   * @param  LPTIMx Low-Power Timer instance
01150   * @retval State of bit (1 or 0).
01151   */
01152 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
01153 {
01154   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
01155 }
01156 
01157 /**
01158   * @}
01159   */
01160 
01161 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
01162   * @{
01163   */
01164 
01165 /**
01166   * @brief  Enable compare match interrupt (CMPMIE).
01167   * @rmtoll IER          CMPMIE        LL_LPTIM_EnableIT_CMPM
01168   * @param  LPTIMx Low-Power Timer instance
01169   * @retval None
01170   */
01171 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
01172 {
01173   SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
01174 }
01175 
01176 /**
01177   * @brief  Disable compare match interrupt (CMPMIE).
01178   * @rmtoll IER          CMPMIE        LL_LPTIM_DisableIT_CMPM
01179   * @param  LPTIMx Low-Power Timer instance
01180   * @retval None
01181   */
01182 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
01183 {
01184   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
01185 }
01186 
01187 /**
01188   * @brief  Indicates whether the compare match interrupt (CMPMIE) is enabled.
01189   * @rmtoll IER          CMPMIE        LL_LPTIM_IsEnabledIT_CMPM
01190   * @param  LPTIMx Low-Power Timer instance
01191   * @retval State of bit (1 or 0).
01192   */
01193 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
01194 {
01195   return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
01196 }
01197 
01198 /**
01199   * @brief  Enable autoreload match interrupt (ARRMIE).
01200   * @rmtoll IER          ARRMIE        LL_LPTIM_EnableIT_ARRM
01201   * @param  LPTIMx Low-Power Timer instance
01202   * @retval None
01203   */
01204 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
01205 {
01206   SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
01207 }
01208 
01209 /**
01210   * @brief  Disable autoreload match interrupt (ARRMIE).
01211   * @rmtoll IER          ARRMIE        LL_LPTIM_DisableIT_ARRM
01212   * @param  LPTIMx Low-Power Timer instance
01213   * @retval None
01214   */
01215 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
01216 {
01217   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
01218 }
01219 
01220 /**
01221   * @brief  Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
01222   * @rmtoll IER          ARRMIE        LL_LPTIM_IsEnabledIT_ARRM
01223   * @param  LPTIMx Low-Power Timer instance
01224   * @retval State of bit (1 or 0).
01225   */
01226 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
01227 {
01228   return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
01229 }
01230 
01231 /**
01232   * @brief  Enable external trigger valid edge interrupt (EXTTRIGIE).
01233   * @rmtoll IER          EXTTRIGIE     LL_LPTIM_EnableIT_EXTTRIG
01234   * @param  LPTIMx Low-Power Timer instance
01235   * @retval None
01236   */
01237 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01238 {
01239   SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
01240 }
01241 
01242 /**
01243   * @brief  Disable external trigger valid edge interrupt (EXTTRIGIE).
01244   * @rmtoll IER          EXTTRIGIE     LL_LPTIM_DisableIT_EXTTRIG
01245   * @param  LPTIMx Low-Power Timer instance
01246   * @retval None
01247   */
01248 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01249 {
01250   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
01251 }
01252 
01253 /**
01254   * @brief  Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
01255   * @rmtoll IER          EXTTRIGIE     LL_LPTIM_IsEnabledIT_EXTTRIG
01256   * @param  LPTIMx Low-Power Timer instance
01257   * @retval State of bit (1 or 0).
01258   */
01259 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01260 {
01261   return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
01262 }
01263 
01264 /**
01265   * @brief  Enable compare register write completed interrupt (CMPOKIE).
01266   * @rmtoll IER          CMPOKIE       LL_LPTIM_EnableIT_CMPOK
01267   * @param  LPTIMx Low-Power Timer instance
01268   * @retval None
01269   */
01270 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
01271 {
01272   SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
01273 }
01274 
01275 /**
01276   * @brief  Disable compare register write completed interrupt (CMPOKIE).
01277   * @rmtoll IER          CMPOKIE       LL_LPTIM_DisableIT_CMPOK
01278   * @param  LPTIMx Low-Power Timer instance
01279   * @retval None
01280   */
01281 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
01282 {
01283   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
01284 }
01285 
01286 /**
01287   * @brief  Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
01288   * @rmtoll IER          CMPOKIE       LL_LPTIM_IsEnabledIT_CMPOK
01289   * @param  LPTIMx Low-Power Timer instance
01290   * @retval State of bit (1 or 0).
01291   */
01292 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
01293 {
01294   return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
01295 }
01296 
01297 /**
01298   * @brief  Enable autoreload register write completed interrupt (ARROKIE).
01299   * @rmtoll IER          ARROKIE       LL_LPTIM_EnableIT_ARROK
01300   * @param  LPTIMx Low-Power Timer instance
01301   * @retval None
01302   */
01303 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
01304 {
01305   SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
01306 }
01307 
01308 /**
01309   * @brief  Disable autoreload register write completed interrupt (ARROKIE).
01310   * @rmtoll IER          ARROKIE       LL_LPTIM_DisableIT_ARROK
01311   * @param  LPTIMx Low-Power Timer instance
01312   * @retval None
01313   */
01314 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
01315 {
01316   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
01317 }
01318 
01319 /**
01320   * @brief  Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
01321   * @rmtoll IER          ARROKIE       LL_LPTIM_IsEnabledIT_ARROK
01322   * @param  LPTIMx Low-Power Timer instance
01323   * @retval State of bit (1 or 0).
01324   */
01325 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
01326 {
01327   return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
01328 }
01329 
01330 /**
01331   * @brief  Enable direction change to up interrupt (UPIE).
01332   * @rmtoll IER          UPIE          LL_LPTIM_EnableIT_UP
01333   * @param  LPTIMx Low-Power Timer instance
01334   * @retval None
01335   */
01336 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
01337 {
01338   SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
01339 }
01340 
01341 /**
01342   * @brief  Disable direction change to up interrupt (UPIE).
01343   * @rmtoll IER          UPIE          LL_LPTIM_DisableIT_UP
01344   * @param  LPTIMx Low-Power Timer instance
01345   * @retval None
01346   */
01347 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
01348 {
01349   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
01350 }
01351 
01352 /**
01353   * @brief  Indicates whether the direction change to up interrupt (UPIE) is enabled.
01354   * @rmtoll IER          UPIE          LL_LPTIM_IsEnabledIT_UP
01355   * @param  LPTIMx Low-Power Timer instance
01356   * @retval State of bit (1 or 0).
01357   */
01358 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
01359 {
01360   return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
01361 }
01362 
01363 /**
01364   * @brief  Enable direction change to down interrupt (DOWNIE).
01365   * @rmtoll IER          DOWNIE        LL_LPTIM_EnableIT_DOWN
01366   * @param  LPTIMx Low-Power Timer instance
01367   * @retval None
01368   */
01369 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
01370 {
01371   SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
01372 }
01373 
01374 /**
01375   * @brief  Disable direction change to down interrupt (DOWNIE).
01376   * @rmtoll IER          DOWNIE        LL_LPTIM_DisableIT_DOWN
01377   * @param  LPTIMx Low-Power Timer instance
01378   * @retval None
01379   */
01380 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
01381 {
01382   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
01383 }
01384 
01385 /**
01386   * @brief  Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
01387   * @rmtoll IER          DOWNIE        LL_LPTIM_IsEnabledIT_DOWN
01388   * @param  LPTIMx Low-Power Timer instance
01389   * @retval State of bit (1 or 0).
01390   */
01391 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
01392 {
01393   return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
01394 }
01395 
01396 /**
01397   * @}
01398   */
01399 
01400 #if defined(USE_FULL_LL_DRIVER)
01401 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
01402   * @{
01403   */
01404 
01405 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
01406 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
01407 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
01408 /**
01409   * @}
01410   */
01411 #endif /* USE_FULL_LL_DRIVER */
01412 
01413 /**
01414   * @}
01415   */
01416 
01417 /**
01418   * @}
01419   */
01420 
01421 #endif /* LPTIM1 || LPTIM2 */
01422 
01423 /**
01424   * @}
01425   */
01426 
01427 #ifdef __cplusplus
01428 }
01429 #endif
01430 
01431 #endif /* __STM32L4xx_LL_LPTIM_H */
01432 
01433 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/