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stm32l4xx_ll_exti.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_ll_exti.h 00004 * @author MCD Application Team 00005 * @version V1.5.1 00006 * @date 31-May-2016 00007 * @brief Header file of EXTI LL module. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 00012 * 00013 * Redistribution and use in source and binary forms, with or without modification, 00014 * are permitted provided that the following conditions are met: 00015 * 1. Redistributions of source code must retain the above copyright notice, 00016 * this list of conditions and the following disclaimer. 00017 * 2. Redistributions in binary form must reproduce the above copyright notice, 00018 * this list of conditions and the following disclaimer in the documentation 00019 * and/or other materials provided with the distribution. 00020 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00021 * may be used to endorse or promote products derived from this software 00022 * without specific prior written permission. 00023 * 00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00027 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00028 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00029 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00030 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00031 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00032 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00034 * 00035 ****************************************************************************** 00036 */ 00037 00038 /* Define to prevent recursive inclusion -------------------------------------*/ 00039 #ifndef __STM32L4xx_LL_EXTI_H 00040 #define __STM32L4xx_LL_EXTI_H 00041 00042 #ifdef __cplusplus 00043 extern "C" { 00044 #endif 00045 00046 /* Includes ------------------------------------------------------------------*/ 00047 #include "stm32l4xx.h" 00048 00049 /** @addtogroup STM32L4xx_LL_Driver 00050 * @{ 00051 */ 00052 00053 #if defined (EXTI) 00054 00055 /** @defgroup EXTI_LL EXTI 00056 * @{ 00057 */ 00058 00059 /* Private types -------------------------------------------------------------*/ 00060 /* Private variables ---------------------------------------------------------*/ 00061 /* Private constants ---------------------------------------------------------*/ 00062 /* Private Macros ------------------------------------------------------------*/ 00063 #if defined(USE_FULL_LL_DRIVER) 00064 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros 00065 * @{ 00066 */ 00067 /** 00068 * @} 00069 */ 00070 #endif /*USE_FULL_LL_DRIVER*/ 00071 /* Exported types ------------------------------------------------------------*/ 00072 #if defined(USE_FULL_LL_DRIVER) 00073 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure 00074 * @{ 00075 */ 00076 typedef struct 00077 { 00078 00079 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 00080 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 00081 00082 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63 00083 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 00084 00085 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. 00086 This parameter can be set either to ENABLE or DISABLE */ 00087 00088 uint8_t Mode; /*!< Specifies the mode for the EXTI lines. 00089 This parameter can be a value of @ref EXTI_LL_EC_MODE. */ 00090 00091 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 00092 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ 00093 } LL_EXTI_InitTypeDef; 00094 00095 /** 00096 * @} 00097 */ 00098 #endif /*USE_FULL_LL_DRIVER*/ 00099 00100 /* Exported constants --------------------------------------------------------*/ 00101 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants 00102 * @{ 00103 */ 00104 00105 /** @defgroup EXTI_LL_EC_LINE LINE 00106 * @{ 00107 */ 00108 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */ 00109 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */ 00110 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */ 00111 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */ 00112 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */ 00113 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */ 00114 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */ 00115 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */ 00116 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */ 00117 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */ 00118 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */ 00119 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */ 00120 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */ 00121 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */ 00122 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */ 00123 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */ 00124 #if defined(EXTI_IMR1_IM16) 00125 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */ 00126 #endif 00127 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */ 00128 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */ 00129 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */ 00130 #if defined(EXTI_IMR1_IM20) 00131 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */ 00132 #endif 00133 #if defined(EXTI_IMR1_IM21) 00134 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */ 00135 #endif 00136 #if defined(EXTI_IMR1_IM22) 00137 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */ 00138 #endif 00139 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */ 00140 #if defined(EXTI_IMR1_IM24) 00141 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */ 00142 #endif 00143 #if defined(EXTI_IMR1_IM25) 00144 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */ 00145 #endif 00146 #if defined(EXTI_IMR1_IM26) 00147 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */ 00148 #endif 00149 #if defined(EXTI_IMR1_IM27) 00150 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */ 00151 #endif 00152 #if defined(EXTI_IMR1_IM28) 00153 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */ 00154 #endif 00155 #if defined(EXTI_IMR1_IM29) 00156 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */ 00157 #endif 00158 #if defined(EXTI_IMR1_IM30) 00159 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */ 00160 #endif 00161 #if defined(EXTI_IMR1_IM31) 00162 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */ 00163 #endif 00164 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/ 00165 00166 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */ 00167 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */ 00168 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */ 00169 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */ 00170 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */ 00171 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */ 00172 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */ 00173 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */ 00174 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/ 00175 00176 #define LL_EXTI_LINE_ALL ((uint32_t)0xFFFFFFFFU) /*!< All Extended line */ 00177 00178 #if defined(USE_FULL_LL_DRIVER) 00179 #define LL_EXTI_LINE_NONE ((uint32_t)0x00000000U) /*!< None Extended line */ 00180 #endif /*USE_FULL_LL_DRIVER*/ 00181 00182 /** 00183 * @} 00184 */ 00185 #if defined(USE_FULL_LL_DRIVER) 00186 00187 /** @defgroup EXTI_LL_EC_MODE Mode 00188 * @{ 00189 */ 00190 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */ 00191 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */ 00192 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */ 00193 /** 00194 * @} 00195 */ 00196 00197 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger 00198 * @{ 00199 */ 00200 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */ 00201 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */ 00202 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */ 00203 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */ 00204 00205 /** 00206 * @} 00207 */ 00208 00209 00210 #endif /*USE_FULL_LL_DRIVER*/ 00211 00212 00213 /** 00214 * @} 00215 */ 00216 00217 /* Exported macro ------------------------------------------------------------*/ 00218 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros 00219 * @{ 00220 */ 00221 00222 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros 00223 * @{ 00224 */ 00225 00226 /** 00227 * @brief Write a value in EXTI register 00228 * @param __REG__ Register to be written 00229 * @param __VALUE__ Value to be written in the register 00230 * @retval None 00231 */ 00232 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) 00233 00234 /** 00235 * @brief Read a value in EXTI register 00236 * @param __REG__ Register to be read 00237 * @retval Register value 00238 */ 00239 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) 00240 /** 00241 * @} 00242 */ 00243 00244 00245 /** 00246 * @} 00247 */ 00248 00249 00250 00251 /* Exported functions --------------------------------------------------------*/ 00252 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions 00253 * @{ 00254 */ 00255 /** @defgroup EXTI_LL_EF_IT_Management IT_Management 00256 * @{ 00257 */ 00258 00259 /** 00260 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 00261 * @note The reset value for the direct or internal lines (see RM) 00262 * is set to 1 in order to enable the interrupt by default. 00263 * Bits are set automatically at Power on. 00264 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31 00265 * @param ExtiLine This parameter can be one of the following values: 00266 * @arg @ref LL_EXTI_LINE_0 00267 * @arg @ref LL_EXTI_LINE_1 00268 * @arg @ref LL_EXTI_LINE_2 00269 * @arg @ref LL_EXTI_LINE_3 00270 * @arg @ref LL_EXTI_LINE_4 00271 * @arg @ref LL_EXTI_LINE_5 00272 * @arg @ref LL_EXTI_LINE_6 00273 * @arg @ref LL_EXTI_LINE_7 00274 * @arg @ref LL_EXTI_LINE_8 00275 * @arg @ref LL_EXTI_LINE_9 00276 * @arg @ref LL_EXTI_LINE_10 00277 * @arg @ref LL_EXTI_LINE_11 00278 * @arg @ref LL_EXTI_LINE_12 00279 * @arg @ref LL_EXTI_LINE_13 00280 * @arg @ref LL_EXTI_LINE_14 00281 * @arg @ref LL_EXTI_LINE_15 00282 * @arg @ref LL_EXTI_LINE_16 00283 * @arg @ref LL_EXTI_LINE_17 00284 * @arg @ref LL_EXTI_LINE_18 00285 * @arg @ref LL_EXTI_LINE_19 00286 * @arg @ref LL_EXTI_LINE_20 00287 * @arg @ref LL_EXTI_LINE_21 00288 * @arg @ref LL_EXTI_LINE_22 00289 * @arg @ref LL_EXTI_LINE_23 00290 * @arg @ref LL_EXTI_LINE_24 00291 * @arg @ref LL_EXTI_LINE_25 00292 * @arg @ref LL_EXTI_LINE_26 00293 * @arg @ref LL_EXTI_LINE_27 00294 * @arg @ref LL_EXTI_LINE_28 00295 * @arg @ref LL_EXTI_LINE_29 00296 * @arg @ref LL_EXTI_LINE_30 00297 * @arg @ref LL_EXTI_LINE_31 00298 * @arg @ref LL_EXTI_LINE_ALL_0_31 00299 * @note Please check each device line mapping for EXTI Line availability 00300 * @retval None 00301 */ 00302 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) 00303 { 00304 SET_BIT(EXTI->IMR1, ExtiLine); 00305 } 00306 /** 00307 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 00308 * @note The reset value for the direct lines (lines from 32 to 34, line 00309 * 39) is set to 1 in order to enable the interrupt by default. 00310 * Bits are set automatically at Power on. 00311 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63 00312 * @param ExtiLine This parameter can be one of the following values: 00313 * @arg @ref LL_EXTI_LINE_32 00314 * @arg @ref LL_EXTI_LINE_33 00315 * @arg @ref LL_EXTI_LINE_34 00316 * @arg @ref LL_EXTI_LINE_35 00317 * @arg @ref LL_EXTI_LINE_36 00318 * @arg @ref LL_EXTI_LINE_37 00319 * @arg @ref LL_EXTI_LINE_38 00320 * @arg @ref LL_EXTI_LINE_39 00321 * @arg @ref LL_EXTI_LINE_ALL_32_63 00322 * @retval None 00323 */ 00324 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine) 00325 { 00326 SET_BIT(EXTI->IMR2, ExtiLine); 00327 } 00328 00329 /** 00330 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 00331 * @note The reset value for the direct or internal lines (see RM) 00332 * is set to 1 in order to enable the interrupt by default. 00333 * Bits are set automatically at Power on. 00334 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31 00335 * @param ExtiLine This parameter can be one of the following values: 00336 * @arg @ref LL_EXTI_LINE_0 00337 * @arg @ref LL_EXTI_LINE_1 00338 * @arg @ref LL_EXTI_LINE_2 00339 * @arg @ref LL_EXTI_LINE_3 00340 * @arg @ref LL_EXTI_LINE_4 00341 * @arg @ref LL_EXTI_LINE_5 00342 * @arg @ref LL_EXTI_LINE_6 00343 * @arg @ref LL_EXTI_LINE_7 00344 * @arg @ref LL_EXTI_LINE_8 00345 * @arg @ref LL_EXTI_LINE_9 00346 * @arg @ref LL_EXTI_LINE_10 00347 * @arg @ref LL_EXTI_LINE_11 00348 * @arg @ref LL_EXTI_LINE_12 00349 * @arg @ref LL_EXTI_LINE_13 00350 * @arg @ref LL_EXTI_LINE_14 00351 * @arg @ref LL_EXTI_LINE_15 00352 * @arg @ref LL_EXTI_LINE_16 00353 * @arg @ref LL_EXTI_LINE_17 00354 * @arg @ref LL_EXTI_LINE_18 00355 * @arg @ref LL_EXTI_LINE_19 00356 * @arg @ref LL_EXTI_LINE_20 00357 * @arg @ref LL_EXTI_LINE_21 00358 * @arg @ref LL_EXTI_LINE_22 00359 * @arg @ref LL_EXTI_LINE_23 00360 * @arg @ref LL_EXTI_LINE_24 00361 * @arg @ref LL_EXTI_LINE_25 00362 * @arg @ref LL_EXTI_LINE_26 00363 * @arg @ref LL_EXTI_LINE_27 00364 * @arg @ref LL_EXTI_LINE_28 00365 * @arg @ref LL_EXTI_LINE_29 00366 * @arg @ref LL_EXTI_LINE_30 00367 * @arg @ref LL_EXTI_LINE_31 00368 * @arg @ref LL_EXTI_LINE_ALL_0_31 00369 * @note Please check each device line mapping for EXTI Line availability 00370 * @retval None 00371 */ 00372 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) 00373 { 00374 CLEAR_BIT(EXTI->IMR1, ExtiLine); 00375 } 00376 00377 /** 00378 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 00379 * @note The reset value for the direct lines (lines from 32 to 34, line 00380 * 39) is set to 1 in order to enable the interrupt by default. 00381 * Bits are set automatically at Power on. 00382 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63 00383 * @param ExtiLine This parameter can be one of the following values: 00384 * @arg @ref LL_EXTI_LINE_32 00385 * @arg @ref LL_EXTI_LINE_33 00386 * @arg @ref LL_EXTI_LINE_34 00387 * @arg @ref LL_EXTI_LINE_35 00388 * @arg @ref LL_EXTI_LINE_36 00389 * @arg @ref LL_EXTI_LINE_37 00390 * @arg @ref LL_EXTI_LINE_38 00391 * @arg @ref LL_EXTI_LINE_39 00392 * @arg @ref LL_EXTI_LINE_ALL_32_63 00393 * @retval None 00394 */ 00395 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine) 00396 { 00397 CLEAR_BIT(EXTI->IMR2, ExtiLine); 00398 } 00399 00400 /** 00401 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 00402 * @note The reset value for the direct or internal lines (see RM) 00403 * is set to 1 in order to enable the interrupt by default. 00404 * Bits are set automatically at Power on. 00405 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31 00406 * @param ExtiLine This parameter can be one of the following values: 00407 * @arg @ref LL_EXTI_LINE_0 00408 * @arg @ref LL_EXTI_LINE_1 00409 * @arg @ref LL_EXTI_LINE_2 00410 * @arg @ref LL_EXTI_LINE_3 00411 * @arg @ref LL_EXTI_LINE_4 00412 * @arg @ref LL_EXTI_LINE_5 00413 * @arg @ref LL_EXTI_LINE_6 00414 * @arg @ref LL_EXTI_LINE_7 00415 * @arg @ref LL_EXTI_LINE_8 00416 * @arg @ref LL_EXTI_LINE_9 00417 * @arg @ref LL_EXTI_LINE_10 00418 * @arg @ref LL_EXTI_LINE_11 00419 * @arg @ref LL_EXTI_LINE_12 00420 * @arg @ref LL_EXTI_LINE_13 00421 * @arg @ref LL_EXTI_LINE_14 00422 * @arg @ref LL_EXTI_LINE_15 00423 * @arg @ref LL_EXTI_LINE_16 00424 * @arg @ref LL_EXTI_LINE_17 00425 * @arg @ref LL_EXTI_LINE_18 00426 * @arg @ref LL_EXTI_LINE_19 00427 * @arg @ref LL_EXTI_LINE_20 00428 * @arg @ref LL_EXTI_LINE_21 00429 * @arg @ref LL_EXTI_LINE_22 00430 * @arg @ref LL_EXTI_LINE_23 00431 * @arg @ref LL_EXTI_LINE_24 00432 * @arg @ref LL_EXTI_LINE_25 00433 * @arg @ref LL_EXTI_LINE_26 00434 * @arg @ref LL_EXTI_LINE_27 00435 * @arg @ref LL_EXTI_LINE_28 00436 * @arg @ref LL_EXTI_LINE_29 00437 * @arg @ref LL_EXTI_LINE_30 00438 * @arg @ref LL_EXTI_LINE_31 00439 * @arg @ref LL_EXTI_LINE_ALL_0_31 00440 * @note Please check each device line mapping for EXTI Line availability 00441 * @retval State of bit (1 or 0). 00442 */ 00443 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) 00444 { 00445 return (READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)); 00446 } 00447 00448 /** 00449 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 00450 * @note The reset value for the direct lines (lines from 32 to 34, line 00451 * 39) is set to 1 in order to enable the interrupt by default. 00452 * Bits are set automatically at Power on. 00453 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63 00454 * @param ExtiLine This parameter can be one of the following values: 00455 * @arg @ref LL_EXTI_LINE_32 00456 * @arg @ref LL_EXTI_LINE_33 00457 * @arg @ref LL_EXTI_LINE_34 00458 * @arg @ref LL_EXTI_LINE_35 00459 * @arg @ref LL_EXTI_LINE_36 00460 * @arg @ref LL_EXTI_LINE_37 00461 * @arg @ref LL_EXTI_LINE_38 00462 * @arg @ref LL_EXTI_LINE_39 00463 * @arg @ref LL_EXTI_LINE_ALL_32_63 00464 * @retval State of bit (1 or 0). 00465 */ 00466 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine) 00467 { 00468 return (READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)); 00469 } 00470 00471 /** 00472 * @} 00473 */ 00474 00475 /** @defgroup EXTI_LL_EF_Event_Management Event_Management 00476 * @{ 00477 */ 00478 00479 /** 00480 * @brief Enable ExtiLine Event request for Lines in range 0 to 31 00481 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31 00482 * @param ExtiLine This parameter can be one of the following values: 00483 * @arg @ref LL_EXTI_LINE_0 00484 * @arg @ref LL_EXTI_LINE_1 00485 * @arg @ref LL_EXTI_LINE_2 00486 * @arg @ref LL_EXTI_LINE_3 00487 * @arg @ref LL_EXTI_LINE_4 00488 * @arg @ref LL_EXTI_LINE_5 00489 * @arg @ref LL_EXTI_LINE_6 00490 * @arg @ref LL_EXTI_LINE_7 00491 * @arg @ref LL_EXTI_LINE_8 00492 * @arg @ref LL_EXTI_LINE_9 00493 * @arg @ref LL_EXTI_LINE_10 00494 * @arg @ref LL_EXTI_LINE_11 00495 * @arg @ref LL_EXTI_LINE_12 00496 * @arg @ref LL_EXTI_LINE_13 00497 * @arg @ref LL_EXTI_LINE_14 00498 * @arg @ref LL_EXTI_LINE_15 00499 * @arg @ref LL_EXTI_LINE_16 00500 * @arg @ref LL_EXTI_LINE_17 00501 * @arg @ref LL_EXTI_LINE_18 00502 * @arg @ref LL_EXTI_LINE_19 00503 * @arg @ref LL_EXTI_LINE_20 00504 * @arg @ref LL_EXTI_LINE_21 00505 * @arg @ref LL_EXTI_LINE_22 00506 * @arg @ref LL_EXTI_LINE_23 00507 * @arg @ref LL_EXTI_LINE_24 00508 * @arg @ref LL_EXTI_LINE_25 00509 * @arg @ref LL_EXTI_LINE_26 00510 * @arg @ref LL_EXTI_LINE_27 00511 * @arg @ref LL_EXTI_LINE_28 00512 * @arg @ref LL_EXTI_LINE_29 00513 * @arg @ref LL_EXTI_LINE_30 00514 * @arg @ref LL_EXTI_LINE_31 00515 * @arg @ref LL_EXTI_LINE_ALL_0_31 00516 * @note Please check each device line mapping for EXTI Line availability 00517 * @retval None 00518 */ 00519 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) 00520 { 00521 SET_BIT(EXTI->EMR1, ExtiLine); 00522 00523 } 00524 00525 /** 00526 * @brief Enable ExtiLine Event request for Lines in range 32 to 63 00527 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63 00528 * @param ExtiLine This parameter can be a combination of the following values: 00529 * @arg @ref LL_EXTI_LINE_32 00530 * @arg @ref LL_EXTI_LINE_33 00531 * @arg @ref LL_EXTI_LINE_34 00532 * @arg @ref LL_EXTI_LINE_35 00533 * @arg @ref LL_EXTI_LINE_36 00534 * @arg @ref LL_EXTI_LINE_37 00535 * @arg @ref LL_EXTI_LINE_38 00536 * @arg @ref LL_EXTI_LINE_39 00537 * @arg @ref LL_EXTI_LINE_ALL_32_63 00538 * @retval None 00539 */ 00540 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine) 00541 { 00542 SET_BIT(EXTI->EMR2, ExtiLine); 00543 } 00544 00545 /** 00546 * @brief Disable ExtiLine Event request for Lines in range 0 to 31 00547 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31 00548 * @param ExtiLine This parameter can be one of the following values: 00549 * @arg @ref LL_EXTI_LINE_0 00550 * @arg @ref LL_EXTI_LINE_1 00551 * @arg @ref LL_EXTI_LINE_2 00552 * @arg @ref LL_EXTI_LINE_3 00553 * @arg @ref LL_EXTI_LINE_4 00554 * @arg @ref LL_EXTI_LINE_5 00555 * @arg @ref LL_EXTI_LINE_6 00556 * @arg @ref LL_EXTI_LINE_7 00557 * @arg @ref LL_EXTI_LINE_8 00558 * @arg @ref LL_EXTI_LINE_9 00559 * @arg @ref LL_EXTI_LINE_10 00560 * @arg @ref LL_EXTI_LINE_11 00561 * @arg @ref LL_EXTI_LINE_12 00562 * @arg @ref LL_EXTI_LINE_13 00563 * @arg @ref LL_EXTI_LINE_14 00564 * @arg @ref LL_EXTI_LINE_15 00565 * @arg @ref LL_EXTI_LINE_16 00566 * @arg @ref LL_EXTI_LINE_17 00567 * @arg @ref LL_EXTI_LINE_18 00568 * @arg @ref LL_EXTI_LINE_19 00569 * @arg @ref LL_EXTI_LINE_20 00570 * @arg @ref LL_EXTI_LINE_21 00571 * @arg @ref LL_EXTI_LINE_22 00572 * @arg @ref LL_EXTI_LINE_23 00573 * @arg @ref LL_EXTI_LINE_24 00574 * @arg @ref LL_EXTI_LINE_25 00575 * @arg @ref LL_EXTI_LINE_26 00576 * @arg @ref LL_EXTI_LINE_27 00577 * @arg @ref LL_EXTI_LINE_28 00578 * @arg @ref LL_EXTI_LINE_29 00579 * @arg @ref LL_EXTI_LINE_30 00580 * @arg @ref LL_EXTI_LINE_31 00581 * @arg @ref LL_EXTI_LINE_ALL_0_31 00582 * @note Please check each device line mapping for EXTI Line availability 00583 * @retval None 00584 */ 00585 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) 00586 { 00587 CLEAR_BIT(EXTI->EMR1, ExtiLine); 00588 } 00589 00590 /** 00591 * @brief Disable ExtiLine Event request for Lines in range 32 to 63 00592 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63 00593 * @param ExtiLine This parameter can be a combination of the following values: 00594 * @arg @ref LL_EXTI_LINE_32 00595 * @arg @ref LL_EXTI_LINE_33 00596 * @arg @ref LL_EXTI_LINE_34 00597 * @arg @ref LL_EXTI_LINE_35 00598 * @arg @ref LL_EXTI_LINE_36 00599 * @arg @ref LL_EXTI_LINE_37 00600 * @arg @ref LL_EXTI_LINE_38 00601 * @arg @ref LL_EXTI_LINE_39 00602 * @arg @ref LL_EXTI_LINE_ALL_32_63 00603 * @retval None 00604 */ 00605 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine) 00606 { 00607 CLEAR_BIT(EXTI->EMR2, ExtiLine); 00608 } 00609 00610 /** 00611 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 00612 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31 00613 * @param ExtiLine This parameter can be one of the following values: 00614 * @arg @ref LL_EXTI_LINE_0 00615 * @arg @ref LL_EXTI_LINE_1 00616 * @arg @ref LL_EXTI_LINE_2 00617 * @arg @ref LL_EXTI_LINE_3 00618 * @arg @ref LL_EXTI_LINE_4 00619 * @arg @ref LL_EXTI_LINE_5 00620 * @arg @ref LL_EXTI_LINE_6 00621 * @arg @ref LL_EXTI_LINE_7 00622 * @arg @ref LL_EXTI_LINE_8 00623 * @arg @ref LL_EXTI_LINE_9 00624 * @arg @ref LL_EXTI_LINE_10 00625 * @arg @ref LL_EXTI_LINE_11 00626 * @arg @ref LL_EXTI_LINE_12 00627 * @arg @ref LL_EXTI_LINE_13 00628 * @arg @ref LL_EXTI_LINE_14 00629 * @arg @ref LL_EXTI_LINE_15 00630 * @arg @ref LL_EXTI_LINE_16 00631 * @arg @ref LL_EXTI_LINE_17 00632 * @arg @ref LL_EXTI_LINE_18 00633 * @arg @ref LL_EXTI_LINE_19 00634 * @arg @ref LL_EXTI_LINE_20 00635 * @arg @ref LL_EXTI_LINE_21 00636 * @arg @ref LL_EXTI_LINE_22 00637 * @arg @ref LL_EXTI_LINE_23 00638 * @arg @ref LL_EXTI_LINE_24 00639 * @arg @ref LL_EXTI_LINE_25 00640 * @arg @ref LL_EXTI_LINE_26 00641 * @arg @ref LL_EXTI_LINE_27 00642 * @arg @ref LL_EXTI_LINE_28 00643 * @arg @ref LL_EXTI_LINE_29 00644 * @arg @ref LL_EXTI_LINE_30 00645 * @arg @ref LL_EXTI_LINE_31 00646 * @arg @ref LL_EXTI_LINE_ALL_0_31 00647 * @note Please check each device line mapping for EXTI Line availability 00648 * @retval State of bit (1 or 0). 00649 */ 00650 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) 00651 { 00652 return (READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)); 00653 00654 } 00655 00656 /** 00657 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 00658 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63 00659 * @param ExtiLine This parameter can be a combination of the following values: 00660 * @arg @ref LL_EXTI_LINE_32 00661 * @arg @ref LL_EXTI_LINE_33 00662 * @arg @ref LL_EXTI_LINE_34 00663 * @arg @ref LL_EXTI_LINE_35 00664 * @arg @ref LL_EXTI_LINE_36 00665 * @arg @ref LL_EXTI_LINE_37 00666 * @arg @ref LL_EXTI_LINE_38 00667 * @arg @ref LL_EXTI_LINE_39 00668 * @arg @ref LL_EXTI_LINE_ALL_32_63 00669 * @retval State of bit (1 or 0). 00670 */ 00671 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine) 00672 { 00673 return (READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)); 00674 } 00675 00676 /** 00677 * @} 00678 */ 00679 00680 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management 00681 * @{ 00682 */ 00683 00684 /** 00685 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 00686 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00687 * generated on these lines. If a rising edge on a configurable interrupt 00688 * line occurs during a write operation in the EXTI_RTSR register, the 00689 * pending bit is not set. 00690 * Rising and falling edge triggers can be set for 00691 * the same interrupt line. In this case, both generate a trigger 00692 * condition. 00693 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31 00694 * @param ExtiLine This parameter can be a combination of the following values: 00695 * @arg @ref LL_EXTI_LINE_0 00696 * @arg @ref LL_EXTI_LINE_1 00697 * @arg @ref LL_EXTI_LINE_2 00698 * @arg @ref LL_EXTI_LINE_3 00699 * @arg @ref LL_EXTI_LINE_4 00700 * @arg @ref LL_EXTI_LINE_5 00701 * @arg @ref LL_EXTI_LINE_6 00702 * @arg @ref LL_EXTI_LINE_7 00703 * @arg @ref LL_EXTI_LINE_8 00704 * @arg @ref LL_EXTI_LINE_9 00705 * @arg @ref LL_EXTI_LINE_10 00706 * @arg @ref LL_EXTI_LINE_11 00707 * @arg @ref LL_EXTI_LINE_12 00708 * @arg @ref LL_EXTI_LINE_13 00709 * @arg @ref LL_EXTI_LINE_14 00710 * @arg @ref LL_EXTI_LINE_15 00711 * @arg @ref LL_EXTI_LINE_16 00712 * @arg @ref LL_EXTI_LINE_18 00713 * @arg @ref LL_EXTI_LINE_19 00714 * @arg @ref LL_EXTI_LINE_20 00715 * @arg @ref LL_EXTI_LINE_21 00716 * @arg @ref LL_EXTI_LINE_22 00717 * @arg @ref LL_EXTI_LINE_29 00718 * @arg @ref LL_EXTI_LINE_30 00719 * @arg @ref LL_EXTI_LINE_31 00720 * @note Please check each device line mapping for EXTI Line availability 00721 * @retval None 00722 */ 00723 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) 00724 { 00725 SET_BIT(EXTI->RTSR1, ExtiLine); 00726 00727 } 00728 00729 /** 00730 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 00731 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00732 * generated on these lines. If a rising edge on a configurable interrupt 00733 * line occurs during a write operation in the EXTI_RTSR register, the 00734 * pending bit is not set.Rising and falling edge triggers can be set for 00735 * the same interrupt line. In this case, both generate a trigger 00736 * condition. 00737 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63 00738 * @param ExtiLine This parameter can be a combination of the following values: 00739 * @arg @ref LL_EXTI_LINE_35 00740 * @arg @ref LL_EXTI_LINE_36 00741 * @arg @ref LL_EXTI_LINE_37 00742 * @arg @ref LL_EXTI_LINE_38 00743 * @retval None 00744 */ 00745 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine) 00746 { 00747 SET_BIT(EXTI->RTSR2, ExtiLine); 00748 } 00749 00750 /** 00751 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 00752 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00753 * generated on these lines. If a rising edge on a configurable interrupt 00754 * line occurs during a write operation in the EXTI_RTSR register, the 00755 * pending bit is not set. 00756 * Rising and falling edge triggers can be set for 00757 * the same interrupt line. In this case, both generate a trigger 00758 * condition. 00759 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31 00760 * @param ExtiLine This parameter can be a combination of the following values: 00761 * @arg @ref LL_EXTI_LINE_0 00762 * @arg @ref LL_EXTI_LINE_1 00763 * @arg @ref LL_EXTI_LINE_2 00764 * @arg @ref LL_EXTI_LINE_3 00765 * @arg @ref LL_EXTI_LINE_4 00766 * @arg @ref LL_EXTI_LINE_5 00767 * @arg @ref LL_EXTI_LINE_6 00768 * @arg @ref LL_EXTI_LINE_7 00769 * @arg @ref LL_EXTI_LINE_8 00770 * @arg @ref LL_EXTI_LINE_9 00771 * @arg @ref LL_EXTI_LINE_10 00772 * @arg @ref LL_EXTI_LINE_11 00773 * @arg @ref LL_EXTI_LINE_12 00774 * @arg @ref LL_EXTI_LINE_13 00775 * @arg @ref LL_EXTI_LINE_14 00776 * @arg @ref LL_EXTI_LINE_15 00777 * @arg @ref LL_EXTI_LINE_16 00778 * @arg @ref LL_EXTI_LINE_18 00779 * @arg @ref LL_EXTI_LINE_19 00780 * @arg @ref LL_EXTI_LINE_20 00781 * @arg @ref LL_EXTI_LINE_21 00782 * @arg @ref LL_EXTI_LINE_22 00783 * @arg @ref LL_EXTI_LINE_29 00784 * @arg @ref LL_EXTI_LINE_30 00785 * @arg @ref LL_EXTI_LINE_31 00786 * @note Please check each device line mapping for EXTI Line availability 00787 * @retval None 00788 */ 00789 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) 00790 { 00791 CLEAR_BIT(EXTI->RTSR1, ExtiLine); 00792 00793 } 00794 00795 /** 00796 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 00797 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00798 * generated on these lines. If a rising edge on a configurable interrupt 00799 * line occurs during a write operation in the EXTI_RTSR register, the 00800 * pending bit is not set. 00801 * Rising and falling edge triggers can be set for 00802 * the same interrupt line. In this case, both generate a trigger 00803 * condition. 00804 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63 00805 * @param ExtiLine This parameter can be a combination of the following values: 00806 * @arg @ref LL_EXTI_LINE_35 00807 * @arg @ref LL_EXTI_LINE_36 00808 * @arg @ref LL_EXTI_LINE_37 00809 * @arg @ref LL_EXTI_LINE_38 00810 * @retval None 00811 */ 00812 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine) 00813 { 00814 CLEAR_BIT(EXTI->RTSR2, ExtiLine); 00815 } 00816 00817 /** 00818 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 00819 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31 00820 * @param ExtiLine This parameter can be a combination of the following values: 00821 * @arg @ref LL_EXTI_LINE_0 00822 * @arg @ref LL_EXTI_LINE_1 00823 * @arg @ref LL_EXTI_LINE_2 00824 * @arg @ref LL_EXTI_LINE_3 00825 * @arg @ref LL_EXTI_LINE_4 00826 * @arg @ref LL_EXTI_LINE_5 00827 * @arg @ref LL_EXTI_LINE_6 00828 * @arg @ref LL_EXTI_LINE_7 00829 * @arg @ref LL_EXTI_LINE_8 00830 * @arg @ref LL_EXTI_LINE_9 00831 * @arg @ref LL_EXTI_LINE_10 00832 * @arg @ref LL_EXTI_LINE_11 00833 * @arg @ref LL_EXTI_LINE_12 00834 * @arg @ref LL_EXTI_LINE_13 00835 * @arg @ref LL_EXTI_LINE_14 00836 * @arg @ref LL_EXTI_LINE_15 00837 * @arg @ref LL_EXTI_LINE_16 00838 * @arg @ref LL_EXTI_LINE_18 00839 * @arg @ref LL_EXTI_LINE_19 00840 * @arg @ref LL_EXTI_LINE_20 00841 * @arg @ref LL_EXTI_LINE_21 00842 * @arg @ref LL_EXTI_LINE_22 00843 * @arg @ref LL_EXTI_LINE_29 00844 * @arg @ref LL_EXTI_LINE_30 00845 * @arg @ref LL_EXTI_LINE_31 00846 * @note Please check each device line mapping for EXTI Line availability 00847 * @retval State of bit (1 or 0). 00848 */ 00849 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) 00850 { 00851 return (READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)); 00852 } 00853 00854 /** 00855 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63 00856 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63 00857 * @param ExtiLine This parameter can be a combination of the following values: 00858 * @arg @ref LL_EXTI_LINE_35 00859 * @arg @ref LL_EXTI_LINE_36 00860 * @arg @ref LL_EXTI_LINE_37 00861 * @arg @ref LL_EXTI_LINE_38 00862 * @retval State of bit (1 or 0). 00863 */ 00864 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine) 00865 { 00866 return (READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)); 00867 } 00868 00869 /** 00870 * @} 00871 */ 00872 00873 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management 00874 * @{ 00875 */ 00876 00877 /** 00878 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 00879 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00880 * generated on these lines. If a falling edge on a configurable interrupt 00881 * line occurs during a write operation in the EXTI_FTSR register, the 00882 * pending bit is not set. 00883 * Rising and falling edge triggers can be set for 00884 * the same interrupt line. In this case, both generate a trigger 00885 * condition. 00886 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31 00887 * @param ExtiLine This parameter can be a combination of the following values: 00888 * @arg @ref LL_EXTI_LINE_0 00889 * @arg @ref LL_EXTI_LINE_1 00890 * @arg @ref LL_EXTI_LINE_2 00891 * @arg @ref LL_EXTI_LINE_3 00892 * @arg @ref LL_EXTI_LINE_4 00893 * @arg @ref LL_EXTI_LINE_5 00894 * @arg @ref LL_EXTI_LINE_6 00895 * @arg @ref LL_EXTI_LINE_7 00896 * @arg @ref LL_EXTI_LINE_8 00897 * @arg @ref LL_EXTI_LINE_9 00898 * @arg @ref LL_EXTI_LINE_10 00899 * @arg @ref LL_EXTI_LINE_11 00900 * @arg @ref LL_EXTI_LINE_12 00901 * @arg @ref LL_EXTI_LINE_13 00902 * @arg @ref LL_EXTI_LINE_14 00903 * @arg @ref LL_EXTI_LINE_15 00904 * @arg @ref LL_EXTI_LINE_16 00905 * @arg @ref LL_EXTI_LINE_18 00906 * @arg @ref LL_EXTI_LINE_19 00907 * @arg @ref LL_EXTI_LINE_20 00908 * @arg @ref LL_EXTI_LINE_21 00909 * @arg @ref LL_EXTI_LINE_22 00910 * @arg @ref LL_EXTI_LINE_29 00911 * @arg @ref LL_EXTI_LINE_30 00912 * @arg @ref LL_EXTI_LINE_31 00913 * @note Please check each device line mapping for EXTI Line availability 00914 * @retval None 00915 */ 00916 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) 00917 { 00918 SET_BIT(EXTI->FTSR1, ExtiLine); 00919 } 00920 00921 /** 00922 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 00923 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00924 * generated on these lines. If a Falling edge on a configurable interrupt 00925 * line occurs during a write operation in the EXTI_FTSR register, the 00926 * pending bit is not set. 00927 * Rising and falling edge triggers can be set for 00928 * the same interrupt line. In this case, both generate a trigger 00929 * condition. 00930 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63 00931 * @param ExtiLine This parameter can be a combination of the following values: 00932 * @arg @ref LL_EXTI_LINE_35 00933 * @arg @ref LL_EXTI_LINE_36 00934 * @arg @ref LL_EXTI_LINE_37 00935 * @arg @ref LL_EXTI_LINE_38 00936 * @retval None 00937 */ 00938 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine) 00939 { 00940 SET_BIT(EXTI->FTSR2, ExtiLine); 00941 } 00942 00943 /** 00944 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 00945 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00946 * generated on these lines. If a Falling edge on a configurable interrupt 00947 * line occurs during a write operation in the EXTI_FTSR register, the 00948 * pending bit is not set. 00949 * Rising and falling edge triggers can be set for the same interrupt line. 00950 * In this case, both generate a trigger condition. 00951 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31 00952 * @param ExtiLine This parameter can be a combination of the following values: 00953 * @arg @ref LL_EXTI_LINE_0 00954 * @arg @ref LL_EXTI_LINE_1 00955 * @arg @ref LL_EXTI_LINE_2 00956 * @arg @ref LL_EXTI_LINE_3 00957 * @arg @ref LL_EXTI_LINE_4 00958 * @arg @ref LL_EXTI_LINE_5 00959 * @arg @ref LL_EXTI_LINE_6 00960 * @arg @ref LL_EXTI_LINE_7 00961 * @arg @ref LL_EXTI_LINE_8 00962 * @arg @ref LL_EXTI_LINE_9 00963 * @arg @ref LL_EXTI_LINE_10 00964 * @arg @ref LL_EXTI_LINE_11 00965 * @arg @ref LL_EXTI_LINE_12 00966 * @arg @ref LL_EXTI_LINE_13 00967 * @arg @ref LL_EXTI_LINE_14 00968 * @arg @ref LL_EXTI_LINE_15 00969 * @arg @ref LL_EXTI_LINE_16 00970 * @arg @ref LL_EXTI_LINE_18 00971 * @arg @ref LL_EXTI_LINE_19 00972 * @arg @ref LL_EXTI_LINE_20 00973 * @arg @ref LL_EXTI_LINE_21 00974 * @arg @ref LL_EXTI_LINE_22 00975 * @arg @ref LL_EXTI_LINE_29 00976 * @arg @ref LL_EXTI_LINE_30 00977 * @arg @ref LL_EXTI_LINE_31 00978 * @note Please check each device line mapping for EXTI Line availability 00979 * @retval None 00980 */ 00981 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) 00982 { 00983 CLEAR_BIT(EXTI->FTSR1, ExtiLine); 00984 } 00985 00986 /** 00987 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 00988 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00989 * generated on these lines. If a Falling edge on a configurable interrupt 00990 * line occurs during a write operation in the EXTI_FTSR register, the 00991 * pending bit is not set. 00992 * Rising and falling edge triggers can be set for the same interrupt line. 00993 * In this case, both generate a trigger condition. 00994 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63 00995 * @param ExtiLine This parameter can be a combination of the following values: 00996 * @arg @ref LL_EXTI_LINE_35 00997 * @arg @ref LL_EXTI_LINE_36 00998 * @arg @ref LL_EXTI_LINE_37 00999 * @arg @ref LL_EXTI_LINE_38 01000 * @retval None 01001 */ 01002 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine) 01003 { 01004 CLEAR_BIT(EXTI->FTSR2, ExtiLine); 01005 } 01006 01007 /** 01008 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 01009 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31 01010 * @param ExtiLine This parameter can be a combination of the following values: 01011 * @arg @ref LL_EXTI_LINE_0 01012 * @arg @ref LL_EXTI_LINE_1 01013 * @arg @ref LL_EXTI_LINE_2 01014 * @arg @ref LL_EXTI_LINE_3 01015 * @arg @ref LL_EXTI_LINE_4 01016 * @arg @ref LL_EXTI_LINE_5 01017 * @arg @ref LL_EXTI_LINE_6 01018 * @arg @ref LL_EXTI_LINE_7 01019 * @arg @ref LL_EXTI_LINE_8 01020 * @arg @ref LL_EXTI_LINE_9 01021 * @arg @ref LL_EXTI_LINE_10 01022 * @arg @ref LL_EXTI_LINE_11 01023 * @arg @ref LL_EXTI_LINE_12 01024 * @arg @ref LL_EXTI_LINE_13 01025 * @arg @ref LL_EXTI_LINE_14 01026 * @arg @ref LL_EXTI_LINE_15 01027 * @arg @ref LL_EXTI_LINE_16 01028 * @arg @ref LL_EXTI_LINE_18 01029 * @arg @ref LL_EXTI_LINE_19 01030 * @arg @ref LL_EXTI_LINE_20 01031 * @arg @ref LL_EXTI_LINE_21 01032 * @arg @ref LL_EXTI_LINE_22 01033 * @arg @ref LL_EXTI_LINE_29 01034 * @arg @ref LL_EXTI_LINE_30 01035 * @arg @ref LL_EXTI_LINE_31 01036 * @note Please check each device line mapping for EXTI Line availability 01037 * @retval State of bit (1 or 0). 01038 */ 01039 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) 01040 { 01041 return (READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)); 01042 } 01043 01044 /** 01045 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63 01046 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63 01047 * @param ExtiLine This parameter can be a combination of the following values: 01048 * @arg @ref LL_EXTI_LINE_35 01049 * @arg @ref LL_EXTI_LINE_36 01050 * @arg @ref LL_EXTI_LINE_37 01051 * @arg @ref LL_EXTI_LINE_38 01052 * @retval State of bit (1 or 0). 01053 */ 01054 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine) 01055 { 01056 return (READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)); 01057 } 01058 01059 /** 01060 * @} 01061 */ 01062 01063 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management 01064 * @{ 01065 */ 01066 01067 /** 01068 * @brief Generate a software Interrupt Event for Lines in range 0 to 31 01069 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to 01070 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR 01071 * resulting in an interrupt request generation. 01072 * This bit is cleared by clearing the corresponding bit in the EXTI_PR 01073 * register (by writing a 1 into the bit) 01074 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31 01075 * @param ExtiLine This parameter can be a combination of the following values: 01076 * @arg @ref LL_EXTI_LINE_0 01077 * @arg @ref LL_EXTI_LINE_1 01078 * @arg @ref LL_EXTI_LINE_2 01079 * @arg @ref LL_EXTI_LINE_3 01080 * @arg @ref LL_EXTI_LINE_4 01081 * @arg @ref LL_EXTI_LINE_5 01082 * @arg @ref LL_EXTI_LINE_6 01083 * @arg @ref LL_EXTI_LINE_7 01084 * @arg @ref LL_EXTI_LINE_8 01085 * @arg @ref LL_EXTI_LINE_9 01086 * @arg @ref LL_EXTI_LINE_10 01087 * @arg @ref LL_EXTI_LINE_11 01088 * @arg @ref LL_EXTI_LINE_12 01089 * @arg @ref LL_EXTI_LINE_13 01090 * @arg @ref LL_EXTI_LINE_14 01091 * @arg @ref LL_EXTI_LINE_15 01092 * @arg @ref LL_EXTI_LINE_16 01093 * @arg @ref LL_EXTI_LINE_18 01094 * @arg @ref LL_EXTI_LINE_19 01095 * @arg @ref LL_EXTI_LINE_20 01096 * @arg @ref LL_EXTI_LINE_21 01097 * @arg @ref LL_EXTI_LINE_22 01098 * @arg @ref LL_EXTI_LINE_29 01099 * @arg @ref LL_EXTI_LINE_30 01100 * @arg @ref LL_EXTI_LINE_31 01101 * @note Please check each device line mapping for EXTI Line availability 01102 * @retval None 01103 */ 01104 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) 01105 { 01106 SET_BIT(EXTI->SWIER1, ExtiLine); 01107 } 01108 01109 /** 01110 * @brief Generate a software Interrupt Event for Lines in range 32 to 63 01111 * @note If the interrupt is enabled on this line inthe EXTI_IMR, writing a 1 to 01112 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR 01113 * resulting in an interrupt request generation. 01114 * This bit is cleared by clearing the corresponding bit in the EXTI_PR 01115 * register (by writing a 1 into the bit) 01116 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63 01117 * @param ExtiLine This parameter can be a combination of the following values: 01118 * @arg @ref LL_EXTI_LINE_35 01119 * @arg @ref LL_EXTI_LINE_36 01120 * @arg @ref LL_EXTI_LINE_37 01121 * @arg @ref LL_EXTI_LINE_38 01122 * @retval None 01123 */ 01124 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine) 01125 { 01126 SET_BIT(EXTI->SWIER2, ExtiLine); 01127 } 01128 01129 /** 01130 * @} 01131 */ 01132 01133 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management 01134 * @{ 01135 */ 01136 01137 /** 01138 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 01139 * @note This bit is set when the selected edge event arrives on the interrupt 01140 * line. This bit is cleared by writing a 1 to the bit. 01141 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31 01142 * @param ExtiLine This parameter can be a combination of the following values: 01143 * @arg @ref LL_EXTI_LINE_0 01144 * @arg @ref LL_EXTI_LINE_1 01145 * @arg @ref LL_EXTI_LINE_2 01146 * @arg @ref LL_EXTI_LINE_3 01147 * @arg @ref LL_EXTI_LINE_4 01148 * @arg @ref LL_EXTI_LINE_5 01149 * @arg @ref LL_EXTI_LINE_6 01150 * @arg @ref LL_EXTI_LINE_7 01151 * @arg @ref LL_EXTI_LINE_8 01152 * @arg @ref LL_EXTI_LINE_9 01153 * @arg @ref LL_EXTI_LINE_10 01154 * @arg @ref LL_EXTI_LINE_11 01155 * @arg @ref LL_EXTI_LINE_12 01156 * @arg @ref LL_EXTI_LINE_13 01157 * @arg @ref LL_EXTI_LINE_14 01158 * @arg @ref LL_EXTI_LINE_15 01159 * @arg @ref LL_EXTI_LINE_16 01160 * @arg @ref LL_EXTI_LINE_18 01161 * @arg @ref LL_EXTI_LINE_19 01162 * @arg @ref LL_EXTI_LINE_20 01163 * @arg @ref LL_EXTI_LINE_21 01164 * @arg @ref LL_EXTI_LINE_22 01165 * @arg @ref LL_EXTI_LINE_29 01166 * @arg @ref LL_EXTI_LINE_30 01167 * @arg @ref LL_EXTI_LINE_31 01168 * @note Please check each device line mapping for EXTI Line availability 01169 * @retval State of bit (1 or 0). 01170 */ 01171 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) 01172 { 01173 return (READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)); 01174 } 01175 01176 /** 01177 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63 01178 * @note This bit is set when the selected edge event arrives on the interrupt 01179 * line. This bit is cleared by writing a 1 to the bit. 01180 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63 01181 * @param ExtiLine This parameter can be a combination of the following values: 01182 * @arg @ref LL_EXTI_LINE_35 01183 * @arg @ref LL_EXTI_LINE_36 01184 * @arg @ref LL_EXTI_LINE_37 01185 * @arg @ref LL_EXTI_LINE_38 01186 * @retval State of bit (1 or 0). 01187 */ 01188 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine) 01189 { 01190 return (READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)); 01191 } 01192 01193 /** 01194 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 01195 * @note This bit is set when the selected edge event arrives on the interrupt 01196 * line. This bit is cleared by writing a 1 to the bit. 01197 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31 01198 * @param ExtiLine This parameter can be a combination of the following values: 01199 * @arg @ref LL_EXTI_LINE_0 01200 * @arg @ref LL_EXTI_LINE_1 01201 * @arg @ref LL_EXTI_LINE_2 01202 * @arg @ref LL_EXTI_LINE_3 01203 * @arg @ref LL_EXTI_LINE_4 01204 * @arg @ref LL_EXTI_LINE_5 01205 * @arg @ref LL_EXTI_LINE_6 01206 * @arg @ref LL_EXTI_LINE_7 01207 * @arg @ref LL_EXTI_LINE_8 01208 * @arg @ref LL_EXTI_LINE_9 01209 * @arg @ref LL_EXTI_LINE_10 01210 * @arg @ref LL_EXTI_LINE_11 01211 * @arg @ref LL_EXTI_LINE_12 01212 * @arg @ref LL_EXTI_LINE_13 01213 * @arg @ref LL_EXTI_LINE_14 01214 * @arg @ref LL_EXTI_LINE_15 01215 * @arg @ref LL_EXTI_LINE_16 01216 * @arg @ref LL_EXTI_LINE_18 01217 * @arg @ref LL_EXTI_LINE_19 01218 * @arg @ref LL_EXTI_LINE_20 01219 * @arg @ref LL_EXTI_LINE_21 01220 * @arg @ref LL_EXTI_LINE_22 01221 * @arg @ref LL_EXTI_LINE_29 01222 * @arg @ref LL_EXTI_LINE_30 01223 * @arg @ref LL_EXTI_LINE_31 01224 * @note Please check each device line mapping for EXTI Line availability 01225 * @retval @note This bit is set when the selected edge event arrives on the interrupt 01226 */ 01227 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) 01228 { 01229 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine)); 01230 } 01231 01232 01233 /** 01234 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63 01235 * @note This bit is set when the selected edge event arrives on the interrupt 01236 * line. This bit is cleared by writing a 1 to the bit. 01237 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63 01238 * @param ExtiLine This parameter can be a combination of the following values: 01239 * @arg @ref LL_EXTI_LINE_35 01240 * @arg @ref LL_EXTI_LINE_36 01241 * @arg @ref LL_EXTI_LINE_37 01242 * @arg @ref LL_EXTI_LINE_38 01243 * @retval @note This bit is set when the selected edge event arrives on the interrupt 01244 */ 01245 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine) 01246 { 01247 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine)); 01248 } 01249 01250 /** 01251 * @brief Clear ExtLine Flags for Lines in range 0 to 31 01252 * @note This bit is set when the selected edge event arrives on the interrupt 01253 * line. This bit is cleared by writing a 1 to the bit. 01254 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31 01255 * @param ExtiLine This parameter can be a combination of the following values: 01256 * @arg @ref LL_EXTI_LINE_0 01257 * @arg @ref LL_EXTI_LINE_1 01258 * @arg @ref LL_EXTI_LINE_2 01259 * @arg @ref LL_EXTI_LINE_3 01260 * @arg @ref LL_EXTI_LINE_4 01261 * @arg @ref LL_EXTI_LINE_5 01262 * @arg @ref LL_EXTI_LINE_6 01263 * @arg @ref LL_EXTI_LINE_7 01264 * @arg @ref LL_EXTI_LINE_8 01265 * @arg @ref LL_EXTI_LINE_9 01266 * @arg @ref LL_EXTI_LINE_10 01267 * @arg @ref LL_EXTI_LINE_11 01268 * @arg @ref LL_EXTI_LINE_12 01269 * @arg @ref LL_EXTI_LINE_13 01270 * @arg @ref LL_EXTI_LINE_14 01271 * @arg @ref LL_EXTI_LINE_15 01272 * @arg @ref LL_EXTI_LINE_16 01273 * @arg @ref LL_EXTI_LINE_18 01274 * @arg @ref LL_EXTI_LINE_19 01275 * @arg @ref LL_EXTI_LINE_20 01276 * @arg @ref LL_EXTI_LINE_21 01277 * @arg @ref LL_EXTI_LINE_22 01278 * @arg @ref LL_EXTI_LINE_29 01279 * @arg @ref LL_EXTI_LINE_30 01280 * @arg @ref LL_EXTI_LINE_31 01281 * @note Please check each device line mapping for EXTI Line availability 01282 * @retval None 01283 */ 01284 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) 01285 { 01286 WRITE_REG(EXTI->PR1, ExtiLine); 01287 } 01288 01289 /** 01290 * @brief Clear ExtLine Flags for Lines in range 32 to 63 01291 * @note This bit is set when the selected edge event arrives on the interrupt 01292 * line. This bit is cleared by writing a 1 to the bit. 01293 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63 01294 * @param ExtiLine This parameter can be a combination of the following values: 01295 * @arg @ref LL_EXTI_LINE_35 01296 * @arg @ref LL_EXTI_LINE_36 01297 * @arg @ref LL_EXTI_LINE_37 01298 * @arg @ref LL_EXTI_LINE_38 01299 * @retval None 01300 */ 01301 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine) 01302 { 01303 WRITE_REG(EXTI->PR2, ExtiLine); 01304 } 01305 01306 /** 01307 * @} 01308 */ 01309 01310 #if defined(USE_FULL_LL_DRIVER) 01311 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions 01312 * @{ 01313 */ 01314 01315 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); 01316 uint32_t LL_EXTI_DeInit(void); 01317 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); 01318 01319 01320 /** 01321 * @} 01322 */ 01323 #endif /* USE_FULL_LL_DRIVER */ 01324 01325 /** 01326 * @} 01327 */ 01328 01329 /** 01330 * @} 01331 */ 01332 01333 #endif /* EXTI */ 01334 01335 /** 01336 * @} 01337 */ 01338 01339 #ifdef __cplusplus 01340 } 01341 #endif 01342 01343 #endif /* __STM32L4xx_LL_EXTI_H */ 01344 01345 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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