stm32l4xx_hal_dfsdm.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_dfsdm.c
00004   * @author  MCD Application Team
00005   * @version V1.5.1
00006   * @date    31-May-2016
00007   * @brief   This file provides firmware functions to manage the following 
00008   *          functionalities of the Digital Filter for Sigma-Delta Modulators
00009   *          (DFSDM) peripherals:
00010   *           + Initialization and configuration of channels and filters
00011   *           + Regular channels configuration
00012   *           + Injected channels configuration
00013   *           + Regular/Injected Channels DMA Configuration
00014   *           + Interrupts and flags management
00015   *           + Analog watchdog feature
00016   *           + Short-circuit detector feature
00017   *           + Extremes detector feature
00018   *           + Clock absence detector feature
00019   *           + Break generation on analog watchdog or short-circuit event
00020   *         
00021   @verbatim
00022   ==============================================================================
00023                      ##### How to use this driver #####
00024   ==============================================================================
00025   [..]
00026     *** Channel initialization ***
00027     ==============================
00028     [..]
00029       (#) User has first to initialize channels (before filters initialization).
00030       (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
00031         (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
00032         (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
00033         (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
00034         (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
00035             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
00036       (#) Configure the output clock, input, serial interface, analog watchdog,
00037           offset and data right bit shift parameters for this channel using the 
00038           HAL_DFSDM_ChannelInit() function.
00039 
00040     *** Channel clock absence detector ***
00041     ======================================
00042     [..]
00043       (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
00044           HAL_DFSDM_ChannelCkabStart_IT().
00045       (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
00046           absence.
00047       (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
00048           clock absence is detected.
00049       (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
00050           HAL_DFSDM_ChannelCkabStop_IT().
00051       (#) Please note that the same mode (polling or interrupt) has to be used 
00052           for all channels because the channels are sharing the same interrupt.
00053       (#) Please note also that in interrupt mode, if clock absence detector is
00054           stopped for one channel, interrupt will be disabled for all channels.
00055 
00056     *** Channel short circuit detector ***
00057     ======================================
00058     [..]    
00059       (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
00060           or HAL_DFSDM_ChannelScdStart_IT().
00061       (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
00062           circuit.
00063       (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if 
00064           short circuit is detected.
00065       (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
00066           or HAL_DFSDM_ChannelScdStop_IT().
00067       (#) Please note that the same mode (polling or interrupt) has to be used 
00068           for all channels because the channels are sharing the same interrupt.
00069       (#) Please note also that in interrupt mode, if short circuit detector is
00070           stopped for one channel, interrupt will be disabled for all channels.
00071 
00072     *** Channel analog watchdog value ***
00073     =====================================
00074     [..]    
00075       (#) Get analog watchdog filter value of a channel using
00076           HAL_DFSDM_ChannelGetAwdValue().
00077 
00078     *** Channel offset value ***
00079     =====================================
00080     [..]    
00081       (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
00082 
00083     *** Filter initialization ***
00084     =============================
00085     [..]
00086       (#) After channel initialization, user has to init filters.
00087       (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
00088         (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
00089             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
00090             Please note that DFSDMz_FLT0 global interrupt could be already
00091             enabled if interrupt is used for channel.
00092         (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
00093             with DFSDMz filter handle using __HAL_LINKDMA().
00094       (#) Configure the regular conversion, injected conversion and filter
00095           parameters for this filter using the HAL_DFSDM_FilterInit() function.
00096 
00097     *** Filter regular channel conversion ***
00098     =========================================
00099     [..]    
00100       (#) Select regular channel and enable/disable continuous mode using
00101           HAL_DFSDM_FilterConfigRegChannel().
00102       (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
00103           HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
00104           HAL_DFSDM_FilterRegularMsbStart_DMA().
00105       (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect 
00106           the end of regular conversion.
00107       (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
00108           at the end of regular conversion.
00109       (#) Get value of regular conversion and corresponding channel using 
00110           HAL_DFSDM_FilterGetRegularValue().
00111       (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and 
00112           HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
00113           half transfer and at the transfer complete. Please note that 
00114           HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
00115           circular mode.
00116       (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
00117           HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
00118 
00119     *** Filter injected channels conversion ***
00120     ===========================================
00121     [..]
00122       (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
00123       (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
00124           HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
00125           HAL_DFSDM_FilterInjectedMsbStart_DMA().
00126       (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect 
00127           the end of injected conversion.
00128       (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
00129           at the end of injected conversion.
00130       (#) Get value of injected conversion and corresponding channel using 
00131           HAL_DFSDM_FilterGetInjectedValue().
00132       (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and 
00133           HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
00134           half transfer and at the transfer complete. Please note that 
00135           HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
00136           circular mode.
00137       (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
00138           HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
00139 
00140     *** Filter analog watchdog ***
00141     ==============================
00142     [..]
00143       (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
00144       (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
00145       (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
00146 
00147     *** Filter extreme detector ***
00148     ===============================
00149     [..]
00150       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
00151       (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
00152       (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
00153       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
00154 
00155     *** Filter conversion time ***
00156     ==============================
00157     [..]
00158       (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
00159 
00160     @endverbatim
00161   ******************************************************************************
00162   * @attention
00163   *
00164   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00165   *
00166   * Redistribution and use in source and binary forms, with or without modification,
00167   * are permitted provided that the following conditions are met:
00168   *   1. Redistributions of source code must retain the above copyright notice,
00169   *      this list of conditions and the following disclaimer.
00170   *   2. Redistributions in binary form must reproduce the above copyright notice,
00171   *      this list of conditions and the following disclaimer in the documentation
00172   *      and/or other materials provided with the distribution.
00173   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00174   *      may be used to endorse or promote products derived from this software
00175   *      without specific prior written permission.
00176   *
00177   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00178   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00179   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00180   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00181   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00182   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00183   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00184   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00185   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00186   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00187   *
00188   ******************************************************************************
00189   */
00190 
00191 /* Includes ------------------------------------------------------------------*/
00192 #include "stm32l4xx_hal.h"
00193 
00194 /** @addtogroup STM32L4xx_HAL_Driver
00195   * @{
00196   */
00197 #ifdef HAL_DFSDM_MODULE_ENABLED
00198 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
00199 /** @defgroup DFSDM DFSDM
00200   * @brief DFSDM HAL driver module
00201   * @{
00202   */ 
00203 
00204 /* Private typedef -----------------------------------------------------------*/
00205 /* Private define ------------------------------------------------------------*/
00206 /** @defgroup DFSDM_Private_Define DFSDM Private Define
00207  * @{
00208  */
00209 #define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
00210 #define DFSDM_CHAWSCDR_BKSCD_OFFSET     POSITION_VAL(DFSDM_CHAWSCDR_BKSCD)
00211 #define DFSDM_CHAWSCDR_FOSR_OFFSET      POSITION_VAL(DFSDM_CHAWSCDR_AWFOSR)
00212 #define DFSDM_CHCFGR2_OFFSET_OFFSET  POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
00213 #define DFSDM_CHCFGR2_DTRBS_OFFSET   POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
00214 #define DFSDM_FLTFCR_FOSR_OFFSET        POSITION_VAL(DFSDM_FLTFCR_FOSR)
00215 #define DFSDM_FLTCR1_MSB_RCH_OFFSET     8
00216 #define DFSDM_FLTCR2_EXCH_OFFSET        POSITION_VAL(DFSDM_FLTCR2_EXCH)
00217 #define DFSDM_FLTCR2_AWDCH_OFFSET       POSITION_VAL(DFSDM_FLTCR2_AWDCH)
00218 #define DFSDM_FLTISR_CKABF_OFFSET       POSITION_VAL(DFSDM_FLTISR_CKABF)
00219 #define DFSDM_FLTISR_SCDF_OFFSET        POSITION_VAL(DFSDM_FLTISR_SCDF)
00220 #define DFSDM_FLTICR_CLRCKABF_OFFSET    POSITION_VAL(DFSDM_FLTICR_CLRCKABF)
00221 #define DFSDM_FLTICR_CLRSCDF_OFFSET     POSITION_VAL(DFSDM_FLTICR_CLRSCSDF)
00222 #define DFSDM_FLTRDATAR_DATA_OFFSET     POSITION_VAL(DFSDM_FLTRDATAR_RDATA)
00223 #define DFSDM_FLTJDATAR_DATA_OFFSET     POSITION_VAL(DFSDM_FLTJDATAR_JDATA)
00224 #define DFSDM_FLTAWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWHTR_AWHT)
00225 #define DFSDM_FLTAWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWLTR_AWLT)
00226 #define DFSDM_FLTEXMAX_DATA_OFFSET      POSITION_VAL(DFSDM_FLTEXMAX_EXMAX)
00227 #define DFSDM_FLTEXMIN_DATA_OFFSET      POSITION_VAL(DFSDM_FLTEXMIN_EXMIN)
00228 #define DFSDM_FLTCNVTIMR_DATA_OFFSET    POSITION_VAL(DFSDM_FLTCNVTIMR_CNVCNT)
00229 #define DFSDM_FLTAWSR_HIGH_OFFSET       POSITION_VAL(DFSDM_FLTAWSR_AWHTF)
00230 #define DFSDM_MSB_MASK               0xFFFF0000U
00231 #define DFSDM_LSB_MASK               0x0000FFFFU
00232 #define DFSDM_CKAB_TIMEOUT           5000U
00233 #define DFSDM1_CHANNEL_NUMBER           8U
00234 /**
00235   * @}
00236   */
00237 
00238 /* Private macro -------------------------------------------------------------*/
00239 /* Private variables ---------------------------------------------------------*/
00240 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
00241   * @{
00242   */
00243 __IO uint32_t                v_dfsdm1ChannelCounter = 0;
00244 DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
00245 /**
00246   * @}
00247   */
00248 
00249 /* Private function prototypes -----------------------------------------------*/
00250 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
00251   * @{
00252   */
00253 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
00254 static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
00255 static void     DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
00256 static void     DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
00257 static void     DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
00258 static void     DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
00259 static void     DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
00260 static void     DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
00261 static void     DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
00262 static void     DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
00263 static void     DFSDM_DMAError(DMA_HandleTypeDef *hdma);
00264 /**
00265   * @}
00266   */
00267 
00268 /* Exported functions --------------------------------------------------------*/
00269 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
00270   * @{
00271   */
00272 
00273 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
00274  *  @brief    Channel initialization and de-initialization functions 
00275  *
00276 @verbatim
00277   ==============================================================================
00278         ##### Channel initialization and de-initialization functions #####
00279   ==============================================================================
00280     [..]  This section provides functions allowing to:
00281       (+) Initialize the DFSDM channel.
00282       (+) De-initialize the DFSDM channel.
00283 @endverbatim
00284   * @{
00285   */
00286 
00287 /**
00288   * @brief  Initialize the DFSDM channel according to the specified parameters
00289   *         in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
00290   * @param  hdfsdm_channel : DFSDM channel handle.
00291   * @retval HAL status.
00292   */
00293 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00294 {
00295   /* Check DFSDM Channel handle */
00296   if(hdfsdm_channel == NULL)
00297   {
00298     return HAL_ERROR;
00299   }
00300 
00301   /* Check parameters */
00302   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00303   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
00304   assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
00305   assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
00306   assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
00307   assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
00308   assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
00309   assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
00310   assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
00311   assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
00312   assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
00313   
00314   /* Check that channel has not been already initialized */
00315   if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
00316   {
00317     return HAL_ERROR;
00318   }
00319   
00320   /* Call MSP init function */
00321   HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
00322   
00323   /* Update the channel counter */
00324   v_dfsdm1ChannelCounter++;
00325   
00326   /* Configure output serial clock and enable global DFSDM interface only for first channel */
00327   if(v_dfsdm1ChannelCounter == 1)
00328   {
00329     assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
00330     /* Set the output serial clock source */
00331     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
00332     DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
00333     
00334     /* Reset clock divider */
00335     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
00336     if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
00337     {
00338       assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
00339       /* Set the output clock divider */
00340       DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) << 
00341                                              DFSDM_CHCFGR1_CLK_DIV_OFFSET);
00342     }
00343     
00344     /* enable the DFSDM global interface */
00345     DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
00346   }
00347   
00348   /* Set channel input parameters */
00349   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX | 
00350                                          DFSDM_CHCFGR1_CHINSEL);
00351   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer | 
00352                                         hdfsdm_channel->Init.Input.DataPacking | 
00353                                         hdfsdm_channel->Init.Input.Pins);
00354   
00355   /* Set serial interface parameters */
00356   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
00357   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type | 
00358                                         hdfsdm_channel->Init.SerialInterface.SpiClock);
00359   
00360   /* Set analog watchdog parameters */
00361   hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
00362   hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder | 
00363                                        ((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_FOSR_OFFSET));
00364 
00365   /* Set channel offset and right bit shift */
00366   hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
00367   hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) | 
00368                                         (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
00369 
00370   /* Enable DFSDM channel */
00371   hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
00372   
00373   /* Set DFSDM Channel to ready state */
00374   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
00375 
00376   /* Store channel handle in DFSDM channel handle table */
00377   a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
00378   
00379   return HAL_OK;
00380 }
00381 
00382 /**
00383   * @brief  De-initialize the DFSDM channel.
00384   * @param  hdfsdm_channel : DFSDM channel handle.
00385   * @retval HAL status.
00386   */
00387 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00388 {
00389   /* Check DFSDM Channel handle */
00390   if(hdfsdm_channel == NULL)
00391   {
00392     return HAL_ERROR;
00393   }
00394 
00395   /* Check parameters */
00396   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00397   
00398   /* Check that channel has not been already deinitialized */
00399   if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
00400   {
00401     return HAL_ERROR;
00402   }
00403 
00404   /* Disable the DFSDM channel */
00405   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
00406   
00407   /* Update the channel counter */
00408   v_dfsdm1ChannelCounter--;
00409   
00410   /* Disable global DFSDM at deinit of last channel */
00411   if(v_dfsdm1ChannelCounter == 0)
00412   {
00413     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
00414   }
00415 
00416   /* Call MSP deinit function */
00417   HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
00418 
00419   /* Set DFSDM Channel in reset state */
00420   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
00421 
00422   /* Reset channel handle in DFSDM channel handle table */
00423   a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
00424 
00425   return HAL_OK;
00426 }
00427 
00428 /**
00429   * @brief  Initialize the DFSDM channel MSP.
00430   * @param  hdfsdm_channel : DFSDM channel handle.
00431   * @retval None
00432   */
00433 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00434 {
00435   /* Prevent unused argument(s) compilation warning */
00436   UNUSED(hdfsdm_channel);
00437   
00438   /* NOTE : This function should not be modified, when the function is needed,
00439             the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
00440    */
00441 }
00442 
00443 /**
00444   * @brief  De-initialize the DFSDM channel MSP.
00445   * @param  hdfsdm_channel : DFSDM channel handle.
00446   * @retval None
00447   */
00448 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00449 {
00450   /* Prevent unused argument(s) compilation warning */
00451   UNUSED(hdfsdm_channel);
00452   
00453   /* NOTE : This function should not be modified, when the function is needed,
00454             the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
00455    */
00456 }
00457 
00458 /**
00459   * @}
00460   */
00461 
00462 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
00463  *  @brief    Channel operation functions
00464  *
00465 @verbatim
00466   ==============================================================================
00467                    ##### Channel operation functions #####
00468   ==============================================================================
00469     [..]  This section provides functions allowing to:
00470       (+) Manage clock absence detector feature.
00471       (+) Manage short circuit detector feature.
00472       (+) Get analog watchdog value.
00473       (+) Modify offset value.
00474 @endverbatim
00475   * @{
00476   */
00477 
00478 /**
00479   * @brief  This function allows to start clock absence detection in polling mode.
00480   * @note   Same mode has to be used for all channels.
00481   * @note   If clock is not available on this channel during 5 seconds,
00482   *         clock absence detection will not be activated and function
00483   *         will return HAL_TIMEOUT error.
00484   * @param  hdfsdm_channel : DFSDM channel handle.
00485   * @retval HAL status
00486   */
00487 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00488 {
00489   HAL_StatusTypeDef status = HAL_OK;
00490   uint32_t channel;
00491   uint32_t tickstart;
00492 
00493   /* Check parameters */
00494   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00495   
00496   /* Check DFSDM channel state */
00497   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00498   {
00499     /* Return error status */
00500     status = HAL_ERROR;
00501   }
00502   else
00503   {
00504     /* Get channel number from channel instance */
00505     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
00506 
00507     /* Get timeout */
00508     tickstart = HAL_GetTick();
00509 
00510     /* Clear clock absence flag */
00511     while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
00512     {
00513       DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
00514 
00515       /* Check the Timeout */
00516       if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
00517       {
00518         /* Set timeout status */
00519         status = HAL_TIMEOUT;
00520         break;
00521       }
00522     }
00523 
00524     if(status == HAL_OK)
00525     {
00526       /* Start clock absence detection */
00527       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
00528     }
00529   }
00530   /* Return function status */
00531   return status;
00532 }
00533 
00534 /**
00535   * @brief  This function allows to poll for the clock absence detection.
00536   * @param  hdfsdm_channel : DFSDM channel handle.
00537   * @param  Timeout : Timeout value in milliseconds.
00538   * @retval HAL status
00539   */
00540 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 
00541                                                uint32_t Timeout)
00542 {
00543   uint32_t tickstart;
00544   uint32_t channel;
00545   
00546   /* Check parameters */
00547   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00548 
00549   /* Check DFSDM channel state */
00550   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00551   {
00552     /* Return error status */
00553     return HAL_ERROR;
00554   }
00555   else
00556   {
00557     /* Get channel number from channel instance */
00558     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
00559     
00560     /* Get timeout */
00561     tickstart = HAL_GetTick();
00562 
00563     /* Wait clock absence detection */
00564     while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) == 0)
00565     {
00566       /* Check the Timeout */
00567       if(Timeout != HAL_MAX_DELAY)
00568       {
00569         if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
00570         {
00571           /* Return timeout status */
00572           return HAL_TIMEOUT;
00573         }
00574       }
00575     }
00576     
00577     /* Clear clock absence detection flag */
00578     DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
00579     
00580     /* Return function status */
00581     return HAL_OK;
00582   }
00583 }
00584 
00585 /**
00586   * @brief  This function allows to stop clock absence detection in polling mode.
00587   * @param  hdfsdm_channel : DFSDM channel handle.
00588   * @retval HAL status
00589   */
00590 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00591 {
00592   HAL_StatusTypeDef status = HAL_OK;
00593   uint32_t channel;
00594 
00595   /* Check parameters */
00596   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00597   
00598   /* Check DFSDM channel state */
00599   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00600   {
00601     /* Return error status */
00602     status = HAL_ERROR;
00603   }
00604   else
00605   {
00606     /* Stop clock absence detection */
00607     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
00608     
00609     /* Clear clock absence flag */
00610     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
00611     DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
00612   }
00613   /* Return function status */
00614   return status;
00615 }
00616 
00617 /**
00618   * @brief  This function allows to start clock absence detection in interrupt mode.
00619   * @note   Same mode has to be used for all channels.
00620   * @note   If clock is not available on this channel during 5 seconds,
00621   *         clock absence detection will not be activated and function
00622   *         will return HAL_TIMEOUT error.
00623   * @param  hdfsdm_channel : DFSDM channel handle.
00624   * @retval HAL status
00625   */
00626 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00627 {
00628   HAL_StatusTypeDef status = HAL_OK;
00629   uint32_t channel;
00630   uint32_t tickstart;
00631 
00632   /* Check parameters */
00633   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00634   
00635   /* Check DFSDM channel state */
00636   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00637   {
00638     /* Return error status */
00639     status = HAL_ERROR;
00640   }
00641   else
00642   {
00643     /* Get channel number from channel instance */
00644     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
00645 
00646     /* Get timeout */
00647     tickstart = HAL_GetTick();
00648 
00649     /* Clear clock absence flag */
00650     while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
00651     {
00652       DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
00653 
00654       /* Check the Timeout */
00655       if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
00656       {
00657         /* Set timeout status */
00658         status = HAL_TIMEOUT;
00659         break;
00660       }
00661     }
00662 
00663     if(status == HAL_OK)
00664     {
00665       /* Activate clock absence detection interrupt */
00666       DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
00667 
00668       /* Start clock absence detection */
00669       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
00670     }
00671   }
00672   /* Return function status */
00673   return status;
00674 }
00675 
00676 /**
00677   * @brief  Clock absence detection callback. 
00678   * @param  hdfsdm_channel : DFSDM channel handle.
00679   * @retval None
00680   */
00681 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00682 {
00683   /* Prevent unused argument(s) compilation warning */
00684   UNUSED(hdfsdm_channel);
00685   
00686   /* NOTE : This function should not be modified, when the callback is needed,
00687             the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
00688    */
00689 }
00690 
00691 /**
00692   * @brief  This function allows to stop clock absence detection in interrupt mode.
00693   * @note   Interrupt will be disabled for all channels
00694   * @param  hdfsdm_channel : DFSDM channel handle.
00695   * @retval HAL status
00696   */
00697 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00698 {
00699   HAL_StatusTypeDef status = HAL_OK;
00700   uint32_t channel;
00701 
00702   /* Check parameters */
00703   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00704   
00705   /* Check DFSDM channel state */
00706   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00707   {
00708     /* Return error status */
00709     status = HAL_ERROR;
00710   }
00711   else
00712   {
00713     /* Stop clock absence detection */
00714     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
00715     
00716     /* Clear clock absence flag */
00717     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
00718     DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
00719 
00720     /* Disable clock absence detection interrupt */
00721     DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
00722   }
00723   /* Return function status */
00724   return status;
00725 }
00726 
00727 /**
00728   * @brief  This function allows to start short circuit detection in polling mode.
00729   * @note   Same mode has to be used for all channels
00730   * @param  hdfsdm_channel : DFSDM channel handle.
00731   * @param  Threshold : Short circuit detector threshold.
00732   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.
00733   * @param  BreakSignal : Break signals assigned to short circuit event.
00734   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.
00735   * @retval HAL status
00736   */
00737 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
00738                                             uint32_t Threshold,
00739                                             uint32_t BreakSignal)
00740 {
00741   HAL_StatusTypeDef status = HAL_OK;
00742 
00743   /* Check parameters */
00744   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00745   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
00746   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
00747   
00748   /* Check DFSDM channel state */
00749   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00750   {
00751     /* Return error status */
00752     status = HAL_ERROR;
00753   }
00754   else
00755   {
00756     /* Configure threshold and break signals */
00757     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
00758     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
00759                                          Threshold);
00760     
00761     /* Start short circuit detection */
00762     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
00763   }
00764   /* Return function status */
00765   return status;
00766 }
00767 
00768 /**
00769   * @brief  This function allows to poll for the short circuit detection.
00770   * @param  hdfsdm_channel : DFSDM channel handle.
00771   * @param  Timeout : Timeout value in milliseconds.
00772   * @retval HAL status
00773   */
00774 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 
00775                                               uint32_t Timeout)
00776 {
00777   uint32_t tickstart;
00778   uint32_t channel;
00779   
00780   /* Check parameters */
00781   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00782 
00783   /* Check DFSDM channel state */
00784   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00785   {
00786     /* Return error status */
00787     return HAL_ERROR;
00788   }
00789   else
00790   {
00791     /* Get channel number from channel instance */
00792     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
00793     
00794     /* Get timeout */
00795     tickstart = HAL_GetTick();
00796 
00797     /* Wait short circuit detection */
00798     while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0)
00799     {
00800       /* Check the Timeout */
00801       if(Timeout != HAL_MAX_DELAY)
00802       {
00803         if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
00804         {
00805           /* Return timeout status */
00806           return HAL_TIMEOUT;
00807         }
00808       }
00809     }
00810     
00811     /* Clear short circuit detection flag */
00812     DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
00813     
00814     /* Return function status */
00815     return HAL_OK;
00816   }
00817 }
00818 
00819 /**
00820   * @brief  This function allows to stop short circuit detection in polling mode.
00821   * @param  hdfsdm_channel : DFSDM channel handle.
00822   * @retval HAL status
00823   */
00824 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00825 {
00826   HAL_StatusTypeDef status = HAL_OK;
00827   uint32_t channel;
00828 
00829   /* Check parameters */
00830   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00831   
00832   /* Check DFSDM channel state */
00833   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00834   {
00835     /* Return error status */
00836     status = HAL_ERROR;
00837   }
00838   else
00839   {
00840     /* Stop short circuit detection */
00841     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
00842     
00843     /* Clear short circuit detection flag */
00844     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
00845     DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
00846   }
00847   /* Return function status */
00848   return status;
00849 }
00850 
00851 /**
00852   * @brief  This function allows to start short circuit detection in interrupt mode.
00853   * @note   Same mode has to be used for all channels
00854   * @param  hdfsdm_channel : DFSDM channel handle.
00855   * @param  Threshold : Short circuit detector threshold.
00856   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.
00857   * @param  BreakSignal : Break signals assigned to short circuit event.
00858   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.
00859   * @retval HAL status
00860   */
00861 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
00862                                                uint32_t Threshold,
00863                                                uint32_t BreakSignal)
00864 {
00865   HAL_StatusTypeDef status = HAL_OK;
00866 
00867   /* Check parameters */
00868   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00869   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
00870   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
00871   
00872   /* Check DFSDM channel state */
00873   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00874   {
00875     /* Return error status */
00876     status = HAL_ERROR;
00877   }
00878   else
00879   {
00880     /* Activate short circuit detection interrupt */
00881     DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
00882 
00883     /* Configure threshold and break signals */
00884     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
00885     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
00886                                          Threshold);
00887     
00888     /* Start short circuit detection */
00889     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
00890   }
00891   /* Return function status */
00892   return status;
00893 }
00894 
00895 /**
00896   * @brief  Short circuit detection callback. 
00897   * @param  hdfsdm_channel : DFSDM channel handle.
00898   * @retval None
00899   */
00900 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00901 {
00902   /* Prevent unused argument(s) compilation warning */
00903   UNUSED(hdfsdm_channel);
00904   
00905   /* NOTE : This function should not be modified, when the callback is needed,
00906             the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
00907    */
00908 }
00909 
00910 /**
00911   * @brief  This function allows to stop short circuit detection in interrupt mode.
00912   * @note   Interrupt will be disabled for all channels
00913   * @param  hdfsdm_channel : DFSDM channel handle.
00914   * @retval HAL status
00915   */
00916 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00917 {
00918   HAL_StatusTypeDef status = HAL_OK;
00919   uint32_t channel;
00920 
00921   /* Check parameters */
00922   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00923   
00924   /* Check DFSDM channel state */
00925   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00926   {
00927     /* Return error status */
00928     status = HAL_ERROR;
00929   }
00930   else
00931   {
00932     /* Stop short circuit detection */
00933     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
00934     
00935     /* Clear short circuit detection flag */
00936     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
00937     DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
00938 
00939     /* Disable short circuit detection interrupt */
00940     DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
00941   }
00942   /* Return function status */
00943   return status;
00944 }
00945 
00946 /**
00947   * @brief  This function allows to get channel analog watchdog value.
00948   * @param  hdfsdm_channel : DFSDM channel handle.
00949   * @retval Channel analog watchdog value.
00950   */
00951 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
00952 {
00953   return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
00954 }
00955 
00956 /**
00957   * @brief  This function allows to modify channel offset value.
00958   * @param  hdfsdm_channel : DFSDM channel handle.
00959   * @param  Offset : DFSDM channel offset.
00960   *         This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
00961   * @retval HAL status.
00962   */
00963 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
00964                                                 int32_t Offset)
00965 {
00966   HAL_StatusTypeDef status = HAL_OK;
00967 
00968   /* Check parameters */
00969   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
00970   assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
00971   
00972   /* Check DFSDM channel state */
00973   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
00974   {
00975     /* Return error status */
00976     status = HAL_ERROR;
00977   }
00978   else
00979   {
00980     /* Modify channel offset */
00981     hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
00982     hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
00983   }
00984   /* Return function status */
00985   return status;
00986 }
00987 
00988 /**
00989   * @}
00990   */
00991 
00992 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
00993  *  @brief    Channel state function
00994  *
00995 @verbatim
00996   ==============================================================================
00997                    ##### Channel state function #####
00998   ==============================================================================
00999     [..]  This section provides function allowing to:
01000       (+) Get channel handle state.
01001 @endverbatim
01002   * @{
01003   */
01004 
01005 /**
01006   * @brief  This function allows to get the current DFSDM channel handle state.
01007   * @param  hdfsdm_channel : DFSDM channel handle.
01008   * @retval DFSDM channel state.
01009   */
01010 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
01011 {
01012   /* Return DFSDM channel handle state */
01013   return hdfsdm_channel->State;
01014 }
01015 
01016 /**
01017   * @}
01018   */
01019 
01020 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
01021  *  @brief    Filter initialization and de-initialization functions 
01022  *
01023 @verbatim
01024   ==============================================================================
01025         ##### Filter initialization and de-initialization functions #####
01026   ==============================================================================
01027     [..]  This section provides functions allowing to:
01028       (+) Initialize the DFSDM filter.
01029       (+) De-initialize the DFSDM filter.
01030 @endverbatim
01031   * @{
01032   */
01033 
01034 /**
01035   * @brief  Initialize the DFSDM filter according to the specified parameters
01036   *         in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
01037   * @param  hdfsdm_filter : DFSDM filter handle.
01038   * @retval HAL status.
01039   */
01040 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01041 {
01042   /* Check DFSDM Channel handle */
01043   if(hdfsdm_filter == NULL)
01044   {
01045     return HAL_ERROR;
01046   }
01047 
01048   /* Check parameters */
01049   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01050   assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
01051   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
01052   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
01053   assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
01054   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
01055   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
01056   assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
01057   assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
01058   assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
01059 
01060   /* Check parameters compatibility */
01061   if((hdfsdm_filter->Instance == DFSDM1_Filter0) && 
01062     ((hdfsdm_filter->Init.RegularParam.Trigger  == DFSDM_FILTER_SYNC_TRIGGER) || 
01063      (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
01064   {
01065     return HAL_ERROR;
01066   }
01067 
01068   /* Initialize DFSDM filter variables with default values */
01069   hdfsdm_filter->RegularContMode     = DFSDM_CONTINUOUS_CONV_OFF;
01070   hdfsdm_filter->InjectedChannelsNbr = 1;
01071   hdfsdm_filter->InjConvRemaining    = 1;
01072   hdfsdm_filter->ErrorCode           = DFSDM_FILTER_ERROR_NONE;
01073   
01074   /* Call MSP init function */
01075   HAL_DFSDM_FilterMspInit(hdfsdm_filter);
01076 
01077   /* Set regular parameters */
01078   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
01079   if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
01080   {
01081     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
01082   }
01083   else
01084   {
01085     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
01086   }
01087 
01088   if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
01089   {
01090     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
01091   }
01092   else
01093   {
01094     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
01095   }
01096 
01097   /* Set injected parameters */
01098   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
01099   if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
01100   {
01101     assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
01102     assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
01103     hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
01104   }
01105 
01106   if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
01107   {
01108     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
01109   }
01110   else
01111   {
01112     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
01113   }
01114 
01115   if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
01116   {
01117     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
01118   }
01119   else
01120   {
01121     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
01122   }
01123   
01124   /* Set filter parameters */
01125   hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
01126   hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
01127                                     ((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_OFFSET) |
01128                                   (hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
01129 
01130   /* Store regular and injected triggers and injected scan mode*/
01131   hdfsdm_filter->RegularTrigger   = hdfsdm_filter->Init.RegularParam.Trigger;
01132   hdfsdm_filter->InjectedTrigger  = hdfsdm_filter->Init.InjectedParam.Trigger;
01133   hdfsdm_filter->ExtTriggerEdge   = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
01134   hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
01135   
01136   /* Enable DFSDM filter */
01137   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
01138 
01139   /* Set DFSDM filter to ready state */
01140   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
01141   
01142   return HAL_OK;
01143 }
01144 
01145 /**
01146   * @brief  De-initializes the DFSDM filter.
01147   * @param  hdfsdm_filter : DFSDM filter handle.
01148   * @retval HAL status.
01149   */
01150 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01151 {
01152   /* Check DFSDM filter handle */
01153   if(hdfsdm_filter == NULL)
01154   {
01155     return HAL_ERROR;
01156   }
01157 
01158   /* Check parameters */
01159   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01160   
01161   /* Disable the DFSDM filter */
01162   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
01163   
01164   /* Call MSP deinit function */
01165   HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
01166 
01167   /* Set DFSDM filter in reset state */
01168   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
01169 
01170   return HAL_OK;
01171 }
01172 
01173 /**
01174   * @brief  Initializes the DFSDM filter MSP.
01175   * @param  hdfsdm_filter : DFSDM filter handle.
01176   * @retval None
01177   */
01178 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01179 {
01180   /* Prevent unused argument(s) compilation warning */
01181   UNUSED(hdfsdm_filter);
01182   
01183   /* NOTE : This function should not be modified, when the function is needed,
01184             the HAL_DFSDM_FilterMspInit could be implemented in the user file.
01185    */
01186 }
01187 
01188 /**
01189   * @brief  De-initializes the DFSDM filter MSP.
01190   * @param  hdfsdm_filter : DFSDM filter handle.
01191   * @retval None
01192   */
01193 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01194 {
01195   /* Prevent unused argument(s) compilation warning */
01196   UNUSED(hdfsdm_filter);
01197   
01198   /* NOTE : This function should not be modified, when the function is needed,
01199             the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
01200    */
01201 }
01202 
01203 /**
01204   * @}
01205   */
01206 
01207 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
01208  *  @brief    Filter control functions
01209  *
01210 @verbatim
01211   ==============================================================================
01212                     ##### Filter control functions #####
01213   ==============================================================================
01214     [..]  This section provides functions allowing to:
01215       (+) Select channel and enable/disable continuous mode for regular conversion.
01216       (+) Select channels for injected conversion.
01217 @endverbatim
01218   * @{
01219   */
01220 
01221 /**
01222   * @brief  This function allows to select channel and to enable/disable
01223   *         continuous mode for regular conversion.
01224   * @param  hdfsdm_filter : DFSDM filter handle.
01225   * @param  Channel : Channel for regular conversion.
01226   *         This parameter can be a value of @ref DFSDM_Channel_Selection.
01227   * @param  ContinuousMode : Enable/disable continuous mode for regular conversion.
01228   *         This parameter can be a value of @ref DFSDM_ContinuousMode.
01229   * @retval HAL status
01230   */
01231 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
01232                                                    uint32_t                    Channel,
01233                                                    uint32_t                    ContinuousMode)
01234 {
01235   HAL_StatusTypeDef status = HAL_OK;
01236   
01237   /* Check parameters */
01238   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01239   assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
01240   assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
01241   
01242   /* Check DFSDM filter state */
01243   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) && 
01244      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
01245   {
01246     /* Configure channel and continuous mode for regular conversion */
01247     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
01248     if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
01249     {
01250       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
01251                                                      DFSDM_FLTCR1_RCONT);
01252     }
01253     else
01254     {
01255       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
01256     }
01257     /* Store continuous mode information */
01258     hdfsdm_filter->RegularContMode = ContinuousMode;
01259   }  
01260   else
01261   {
01262     status = HAL_ERROR;
01263   }
01264 
01265   /* Return function status */
01266   return status;
01267 }
01268 
01269 /**
01270   * @brief  This function allows to select channels for injected conversion.
01271   * @param  hdfsdm_filter : DFSDM filter handle.
01272   * @param  Channel : Channels for injected conversion.
01273   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.
01274   * @retval HAL status
01275   */
01276 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
01277                                                    uint32_t                    Channel)
01278 {
01279   HAL_StatusTypeDef status = HAL_OK;
01280 
01281   /* Check parameters */
01282   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01283   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
01284   
01285   /* Check DFSDM filter state */
01286   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) && 
01287      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
01288   {
01289     /* Configure channel for injected conversion */
01290     hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
01291     /* Store number of injected channels */
01292     hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
01293     /* Update number of injected channels remaining */
01294     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
01295                                       hdfsdm_filter->InjectedChannelsNbr : 1;
01296   }
01297   else
01298   {
01299     status = HAL_ERROR;
01300   }
01301   /* Return function status */
01302   return status;
01303 }
01304 
01305 /**
01306   * @}
01307   */
01308 
01309 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
01310  *  @brief    Filter operation functions
01311  *
01312 @verbatim
01313   ==============================================================================
01314                     ##### Filter operation functions #####
01315   ==============================================================================
01316     [..]  This section provides functions allowing to:
01317       (+) Start conversion of regular/injected channel.
01318       (+) Poll for the end of regular/injected conversion.
01319       (+) Stop conversion of regular/injected channel.
01320       (+) Start conversion of regular/injected channel and enable interrupt.
01321       (+) Call the callback functions at the end of regular/injected conversions.
01322       (+) Stop conversion of regular/injected channel and disable interrupt.
01323       (+) Start conversion of regular/injected channel and enable DMA transfer.
01324       (+) Stop conversion of regular/injected channel and disable DMA transfer.
01325       (+) Start analog watchdog and enable interrupt.
01326       (+) Call the callback function when analog watchdog occurs.
01327       (+) Stop analog watchdog and disable interrupt.
01328       (+) Start extreme detector.
01329       (+) Stop extreme detector.
01330       (+) Get result of regular channel conversion.
01331       (+) Get result of injected channel conversion.
01332       (+) Get extreme detector maximum and minimum values.
01333       (+) Get conversion time.
01334       (+) Handle DFSDM interrupt request.
01335 @endverbatim
01336   * @{
01337   */
01338 
01339 /**
01340   * @brief  This function allows to start regular conversion in polling mode.
01341   * @note   This function should be called only when DFSDM filter instance is 
01342   *         in idle state or if injected conversion is ongoing.
01343   * @param  hdfsdm_filter : DFSDM filter handle.
01344   * @retval HAL status
01345   */
01346 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01347 {
01348   HAL_StatusTypeDef status = HAL_OK;
01349 
01350   /* Check parameters */
01351   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01352 
01353   /* Check DFSDM filter state */
01354   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
01355      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
01356   {
01357     /* Start regular conversion */
01358     DFSDM_RegConvStart(hdfsdm_filter);
01359   }
01360   else
01361   {
01362     status = HAL_ERROR;
01363   }
01364   /* Return function status */
01365   return status;
01366 }
01367 
01368 /**
01369   * @brief  This function allows to poll for the end of regular conversion.
01370   * @note   This function should be called only if regular conversion is ongoing.
01371   * @param  hdfsdm_filter : DFSDM filter handle.
01372   * @param  Timeout : Timeout value in milliseconds.
01373   * @retval HAL status
01374   */
01375 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
01376                                                        uint32_t                    Timeout)
01377 {
01378   uint32_t tickstart;
01379 
01380   /* Check parameters */
01381   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01382 
01383   /* Check DFSDM filter state */
01384   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
01385      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
01386   {
01387     /* Return error status */
01388     return HAL_ERROR;
01389   }
01390   else
01391   {
01392     /* Get timeout */
01393     tickstart = HAL_GetTick();  
01394 
01395     /* Wait end of regular conversion */
01396     while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
01397     {
01398       /* Check the Timeout */
01399       if(Timeout != HAL_MAX_DELAY)
01400       {
01401         if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
01402         {
01403           /* Return timeout status */
01404           return HAL_TIMEOUT;
01405         }
01406       }
01407     }
01408     /* Check if overrun occurs */
01409     if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
01410     {
01411       /* Update error code and call error callback */
01412       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
01413       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
01414 
01415       /* Clear regular overrun flag */
01416       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
01417     }
01418     /* Update DFSDM filter state only if not continuous conversion and SW trigger */
01419     if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
01420        (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
01421     {
01422       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
01423                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
01424     }
01425     /* Return function status */
01426     return HAL_OK;
01427   }
01428 }
01429 
01430 /**
01431   * @brief  This function allows to stop regular conversion in polling mode.
01432   * @note   This function should be called only if regular conversion is ongoing.
01433   * @param  hdfsdm_filter : DFSDM filter handle.
01434   * @retval HAL status
01435   */
01436 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01437 {
01438   HAL_StatusTypeDef status = HAL_OK;
01439 
01440   /* Check parameters */
01441   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01442 
01443   /* Check DFSDM filter state */
01444   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
01445      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
01446   {
01447     /* Return error status */
01448     status = HAL_ERROR;
01449   }
01450   else
01451   {
01452     /* Stop regular conversion */
01453     DFSDM_RegConvStop(hdfsdm_filter);
01454   }
01455   /* Return function status */
01456   return status;
01457 }
01458 
01459 /**
01460   * @brief  This function allows to start regular conversion in interrupt mode.
01461   * @note   This function should be called only when DFSDM filter instance is 
01462   *         in idle state or if injected conversion is ongoing.
01463   * @param  hdfsdm_filter : DFSDM filter handle.
01464   * @retval HAL status
01465   */
01466 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01467 {
01468   HAL_StatusTypeDef status = HAL_OK;
01469 
01470   /* Check parameters */
01471   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01472 
01473   /* Check DFSDM filter state */
01474   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
01475      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
01476   {
01477     /* Enable interrupts for regular conversions */
01478     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
01479     
01480     /* Start regular conversion */
01481     DFSDM_RegConvStart(hdfsdm_filter);
01482   }
01483   else
01484   {
01485     status = HAL_ERROR;
01486   }
01487   /* Return function status */
01488   return status;
01489 }
01490 
01491 /**
01492   * @brief  This function allows to stop regular conversion in interrupt mode.
01493   * @note   This function should be called only if regular conversion is ongoing.
01494   * @param  hdfsdm_filter : DFSDM filter handle.
01495   * @retval HAL status
01496   */
01497 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01498 {
01499   HAL_StatusTypeDef status = HAL_OK;
01500 
01501   /* Check parameters */
01502   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01503 
01504   /* Check DFSDM filter state */
01505   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
01506      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
01507   {
01508     /* Return error status */
01509     status = HAL_ERROR;
01510   }
01511   else
01512   {
01513     /* Disable interrupts for regular conversions */
01514     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
01515     
01516     /* Stop regular conversion */
01517     DFSDM_RegConvStop(hdfsdm_filter);
01518   }
01519   /* Return function status */
01520   return status;
01521 }
01522 
01523 /**
01524   * @brief  This function allows to start regular conversion in DMA mode.
01525   * @note   This function should be called only when DFSDM filter instance is 
01526   *         in idle state or if injected conversion is ongoing.
01527   *         Please note that data on buffer will contain signed regular conversion
01528   *         value on 24 most significant bits and corresponding channel on 3 least
01529   *         significant bits.
01530   * @param  hdfsdm_filter : DFSDM filter handle.
01531   * @param  pData : The destination buffer address.
01532   * @param  Length : The length of data to be transferred from DFSDM filter to memory.
01533   * @retval HAL status
01534   */
01535 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
01536                                                    int32_t                    *pData,
01537                                                    uint32_t                    Length)
01538 {
01539   HAL_StatusTypeDef status = HAL_OK;
01540 
01541   /* Check parameters */
01542   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01543 
01544   /* Check destination address and length */
01545   if((pData == NULL) || (Length == 0))
01546   {
01547     status = HAL_ERROR;
01548   }
01549   /* Check that DMA is enabled for regular conversion */
01550   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
01551   {
01552     status = HAL_ERROR;
01553   }
01554   /* Check parameters compatibility */
01555   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
01556           (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
01557           (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
01558           (Length != 1))
01559   {
01560     status = HAL_ERROR;
01561   }
01562   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
01563           (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
01564           (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
01565   {
01566     status = HAL_ERROR;
01567   }
01568   /* Check DFSDM filter state */
01569   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
01570           (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
01571   {
01572     /* Set callbacks on DMA handler */
01573     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
01574     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
01575     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
01576                                                    DFSDM_DMARegularHalfConvCplt : NULL;
01577     
01578     /* Start DMA in interrupt mode */
01579     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
01580                         (uint32_t) pData, Length) != HAL_OK)
01581     {
01582       /* Set DFSDM filter in error state */
01583       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
01584       status = HAL_ERROR;
01585     }
01586     else
01587     {
01588       /* Start regular conversion */
01589       DFSDM_RegConvStart(hdfsdm_filter);
01590     }
01591   }
01592   else
01593   {
01594     status = HAL_ERROR;
01595   }
01596   /* Return function status */
01597   return status;
01598 }
01599 
01600 /**
01601   * @brief  This function allows to start regular conversion in DMA mode and to get
01602   *         only the 16 most significant bits of conversion.
01603   * @note   This function should be called only when DFSDM filter instance is 
01604   *         in idle state or if injected conversion is ongoing.
01605   *         Please note that data on buffer will contain signed 16 most significant
01606   *         bits of regular conversion.
01607   * @param  hdfsdm_filter : DFSDM filter handle.
01608   * @param  pData : The destination buffer address.
01609   * @param  Length : The length of data to be transferred from DFSDM filter to memory.
01610   * @retval HAL status
01611   */
01612 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
01613                                                       int16_t                    *pData,
01614                                                       uint32_t                    Length)
01615 {
01616   HAL_StatusTypeDef status = HAL_OK;
01617 
01618   /* Check parameters */
01619   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01620 
01621   /* Check destination address and length */
01622   if((pData == NULL) || (Length == 0))
01623   {
01624     status = HAL_ERROR;
01625   }
01626   /* Check that DMA is enabled for regular conversion */
01627   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
01628   {
01629     status = HAL_ERROR;
01630   }
01631   /* Check parameters compatibility */
01632   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
01633           (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
01634           (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
01635           (Length != 1))
01636   {
01637     status = HAL_ERROR;
01638   }
01639   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
01640           (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
01641           (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
01642   {
01643     status = HAL_ERROR;
01644   }
01645   /* Check DFSDM filter state */
01646   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
01647           (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
01648   {
01649     /* Set callbacks on DMA handler */
01650     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
01651     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
01652     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
01653                                                    DFSDM_DMARegularHalfConvCplt : NULL;
01654     
01655     /* Start DMA in interrupt mode */
01656     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2, \
01657                         (uint32_t) pData, Length) != HAL_OK)
01658     {
01659       /* Set DFSDM filter in error state */
01660       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
01661       status = HAL_ERROR;
01662     }
01663     else
01664     {
01665       /* Start regular conversion */
01666       DFSDM_RegConvStart(hdfsdm_filter);
01667     }
01668   }
01669   else
01670   {
01671     status = HAL_ERROR;
01672   }
01673   /* Return function status */
01674   return status;
01675 }
01676 
01677 /**
01678   * @brief  This function allows to stop regular conversion in DMA mode.
01679   * @note   This function should be called only if regular conversion is ongoing.
01680   * @param  hdfsdm_filter : DFSDM filter handle.
01681   * @retval HAL status
01682   */
01683 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01684 {
01685   HAL_StatusTypeDef status = HAL_OK;
01686 
01687   /* Check parameters */
01688   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01689 
01690   /* Check DFSDM filter state */
01691   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
01692      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
01693   {
01694     /* Return error status */
01695     status = HAL_ERROR;
01696   }
01697   else
01698   {
01699     /* Stop current DMA transfer */
01700     if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
01701     {
01702       /* Set DFSDM filter in error state */
01703       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
01704       status = HAL_ERROR;
01705     }
01706     else
01707     {
01708       /* Stop regular conversion */
01709       DFSDM_RegConvStop(hdfsdm_filter);
01710     }
01711   }
01712   /* Return function status */
01713   return status;
01714 }
01715 
01716 /**
01717   * @brief  This function allows to get regular conversion value.
01718   * @param  hdfsdm_filter : DFSDM filter handle.
01719   * @param  Channel : Corresponding channel of regular conversion.
01720   * @retval Regular conversion value
01721   */
01722 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
01723                                         uint32_t                   *Channel)
01724 {
01725   uint32_t reg = 0;
01726   int32_t  value = 0;
01727   
01728   /* Check parameters */
01729   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01730   assert_param(Channel != NULL);
01731 
01732   /* Get value of data register for regular channel */
01733   reg = hdfsdm_filter->Instance->FLTRDATAR;
01734   
01735   /* Extract channel and regular conversion value */
01736   *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
01737   value = ((reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_DATA_OFFSET);
01738 
01739   /* return regular conversion value */
01740   return value;
01741 }
01742 
01743 /**
01744   * @brief  This function allows to start injected conversion in polling mode.
01745   * @note   This function should be called only when DFSDM filter instance is 
01746   *         in idle state or if regular conversion is ongoing.
01747   * @param  hdfsdm_filter : DFSDM filter handle.
01748   * @retval HAL status
01749   */
01750 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01751 {
01752   HAL_StatusTypeDef status = HAL_OK;
01753 
01754   /* Check parameters */
01755   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01756 
01757   /* Check DFSDM filter state */
01758   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
01759      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
01760   {
01761     /* Start injected conversion */
01762     DFSDM_InjConvStart(hdfsdm_filter);
01763   }
01764   else
01765   {
01766     status = HAL_ERROR;
01767   }
01768   /* Return function status */
01769   return status;
01770 }
01771 
01772 /**
01773   * @brief  This function allows to poll for the end of injected conversion.
01774   * @note   This function should be called only if injected conversion is ongoing.
01775   * @param  hdfsdm_filter : DFSDM filter handle.
01776   * @param  Timeout : Timeout value in milliseconds.
01777   * @retval HAL status
01778   */
01779 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
01780                                                        uint32_t                    Timeout)
01781 {
01782   uint32_t tickstart;
01783 
01784   /* Check parameters */
01785   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01786 
01787   /* Check DFSDM filter state */
01788   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
01789      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
01790   {
01791     /* Return error status */
01792     return HAL_ERROR;
01793   }
01794   else
01795   {
01796     /* Get timeout */
01797     tickstart = HAL_GetTick();  
01798 
01799     /* Wait end of injected conversions */
01800     while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
01801     {
01802       /* Check the Timeout */
01803       if(Timeout != HAL_MAX_DELAY)
01804       {
01805         if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
01806         {
01807           /* Return timeout status */
01808           return HAL_TIMEOUT;
01809         }
01810       }
01811     }
01812     /* Check if overrun occurs */
01813     if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
01814     {
01815       /* Update error code and call error callback */
01816       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
01817       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
01818 
01819       /* Clear injected overrun flag */
01820       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
01821     }
01822 
01823     /* Update remaining injected conversions */
01824     hdfsdm_filter->InjConvRemaining--;
01825     if(hdfsdm_filter->InjConvRemaining == 0)
01826     {
01827       /* Update DFSDM filter state only if trigger is software */
01828       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
01829       {
01830         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
01831                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
01832       }
01833       
01834       /* end of injected sequence, reset the value */
01835       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
01836                                          hdfsdm_filter->InjectedChannelsNbr : 1;
01837     }
01838 
01839     /* Return function status */
01840     return HAL_OK;
01841   }
01842 }
01843 
01844 /**
01845   * @brief  This function allows to stop injected conversion in polling mode.
01846   * @note   This function should be called only if injected conversion is ongoing.
01847   * @param  hdfsdm_filter : DFSDM filter handle.
01848   * @retval HAL status
01849   */
01850 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01851 {
01852   HAL_StatusTypeDef status = HAL_OK;
01853 
01854   /* Check parameters */
01855   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01856 
01857   /* Check DFSDM filter state */
01858   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
01859      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
01860   {
01861     /* Return error status */
01862     status = HAL_ERROR;
01863   }
01864   else
01865   {
01866     /* Stop injected conversion */
01867     DFSDM_InjConvStop(hdfsdm_filter);
01868   }
01869   /* Return function status */
01870   return status;
01871 }
01872 
01873 /**
01874   * @brief  This function allows to start injected conversion in interrupt mode.
01875   * @note   This function should be called only when DFSDM filter instance is 
01876   *         in idle state or if regular conversion is ongoing.
01877   * @param  hdfsdm_filter : DFSDM filter handle.
01878   * @retval HAL status
01879   */
01880 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01881 {
01882   HAL_StatusTypeDef status = HAL_OK;
01883 
01884   /* Check parameters */
01885   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01886 
01887   /* Check DFSDM filter state */
01888   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
01889      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
01890   {
01891     /* Enable interrupts for injected conversions */
01892     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
01893     
01894     /* Start injected conversion */
01895     DFSDM_InjConvStart(hdfsdm_filter);
01896   }
01897   else
01898   {
01899     status = HAL_ERROR;
01900   }
01901   /* Return function status */
01902   return status;
01903 }
01904 
01905 /**
01906   * @brief  This function allows to stop injected conversion in interrupt mode.
01907   * @note   This function should be called only if injected conversion is ongoing.
01908   * @param  hdfsdm_filter : DFSDM filter handle.
01909   * @retval HAL status
01910   */
01911 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
01912 {
01913   HAL_StatusTypeDef status = HAL_OK;
01914 
01915   /* Check parameters */
01916   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01917 
01918   /* Check DFSDM filter state */
01919   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
01920      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
01921   {
01922     /* Return error status */
01923     status = HAL_ERROR;
01924   }
01925   else
01926   {
01927     /* Disable interrupts for injected conversions */
01928     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
01929     
01930     /* Stop injected conversion */
01931     DFSDM_InjConvStop(hdfsdm_filter);
01932   }
01933   /* Return function status */
01934   return status;
01935 }
01936 
01937 /**
01938   * @brief  This function allows to start injected conversion in DMA mode.
01939   * @note   This function should be called only when DFSDM filter instance is 
01940   *         in idle state or if regular conversion is ongoing.
01941   *         Please note that data on buffer will contain signed injected conversion
01942   *         value on 24 most significant bits and corresponding channel on 3 least
01943   *         significant bits.
01944   * @param  hdfsdm_filter : DFSDM filter handle.
01945   * @param  pData : The destination buffer address.
01946   * @param  Length : The length of data to be transferred from DFSDM filter to memory.
01947   * @retval HAL status
01948   */
01949 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
01950                                                     int32_t                    *pData,
01951                                                     uint32_t                    Length)
01952 {
01953   HAL_StatusTypeDef status = HAL_OK;
01954 
01955   /* Check parameters */
01956   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
01957 
01958   /* Check destination address and length */
01959   if((pData == NULL) || (Length == 0))
01960   {
01961     status = HAL_ERROR;
01962   }
01963   /* Check that DMA is enabled for injected conversion */
01964   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
01965   {
01966     status = HAL_ERROR;
01967   }
01968   /* Check parameters compatibility */
01969   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
01970           (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
01971           (Length > hdfsdm_filter->InjConvRemaining))
01972   {
01973     status = HAL_ERROR;
01974   }
01975   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
01976           (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
01977   {
01978     status = HAL_ERROR;
01979   }
01980   /* Check DFSDM filter state */
01981   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
01982           (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
01983   {
01984     /* Set callbacks on DMA handler */
01985     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
01986     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
01987     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
01988                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;
01989     
01990     /* Start DMA in interrupt mode */
01991     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
01992                         (uint32_t) pData, Length) != HAL_OK)
01993     {
01994       /* Set DFSDM filter in error state */
01995       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
01996       status = HAL_ERROR;
01997     }
01998     else
01999     {
02000       /* Start injected conversion */
02001       DFSDM_InjConvStart(hdfsdm_filter);
02002     }
02003   }
02004   else
02005   {
02006     status = HAL_ERROR;
02007   }
02008   /* Return function status */
02009   return status;
02010 }
02011 
02012 /**
02013   * @brief  This function allows to start injected conversion in DMA mode and to get
02014   *         only the 16 most significant bits of conversion.
02015   * @note   This function should be called only when DFSDM filter instance is 
02016   *         in idle state or if regular conversion is ongoing.
02017   *         Please note that data on buffer will contain signed 16 most significant
02018   *         bits of injected conversion.
02019   * @param  hdfsdm_filter : DFSDM filter handle.
02020   * @param  pData : The destination buffer address.
02021   * @param  Length : The length of data to be transferred from DFSDM filter to memory.
02022   * @retval HAL status
02023   */
02024 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
02025                                                        int16_t                    *pData,
02026                                                        uint32_t                    Length)
02027 {
02028   HAL_StatusTypeDef status = HAL_OK;
02029 
02030   /* Check parameters */
02031   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02032 
02033   /* Check destination address and length */
02034   if((pData == NULL) || (Length == 0))
02035   {
02036     status = HAL_ERROR;
02037   }
02038   /* Check that DMA is enabled for injected conversion */
02039   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
02040   {
02041     status = HAL_ERROR;
02042   }
02043   /* Check parameters compatibility */
02044   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
02045           (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
02046           (Length > hdfsdm_filter->InjConvRemaining))
02047   {
02048     status = HAL_ERROR;
02049   }
02050   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
02051           (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
02052   {
02053     status = HAL_ERROR;
02054   }
02055   /* Check DFSDM filter state */
02056   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
02057           (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
02058   {
02059     /* Set callbacks on DMA handler */
02060     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
02061     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
02062     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
02063                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;
02064     
02065     /* Start DMA in interrupt mode */
02066     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2, \
02067                         (uint32_t) pData, Length) != HAL_OK)
02068     {
02069       /* Set DFSDM filter in error state */
02070       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
02071       status = HAL_ERROR;
02072     }
02073     else
02074     {
02075       /* Start injected conversion */
02076       DFSDM_InjConvStart(hdfsdm_filter);
02077     }
02078   }
02079   else
02080   {
02081     status = HAL_ERROR;
02082   }
02083   /* Return function status */
02084   return status;
02085 }
02086 
02087 /**
02088   * @brief  This function allows to stop injected conversion in DMA mode.
02089   * @note   This function should be called only if injected conversion is ongoing.
02090   * @param  hdfsdm_filter : DFSDM filter handle.
02091   * @retval HAL status
02092   */
02093 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02094 {
02095   HAL_StatusTypeDef status = HAL_OK;
02096 
02097   /* Check parameters */
02098   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02099 
02100   /* Check DFSDM filter state */
02101   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
02102      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
02103   {
02104     /* Return error status */
02105     status = HAL_ERROR;
02106   }
02107   else
02108   {
02109     /* Stop current DMA transfer */
02110     if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
02111     {
02112       /* Set DFSDM filter in error state */
02113       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
02114       status = HAL_ERROR;
02115     }
02116     else
02117     {
02118       /* Stop regular conversion */
02119       DFSDM_InjConvStop(hdfsdm_filter);
02120     }
02121   }
02122   /* Return function status */
02123   return status;
02124 }
02125 
02126 /**
02127   * @brief  This function allows to get injected conversion value.
02128   * @param  hdfsdm_filter : DFSDM filter handle.
02129   * @param  Channel : Corresponding channel of injected conversion.
02130   * @retval Injected conversion value
02131   */
02132 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 
02133                                          uint32_t                   *Channel)
02134 {
02135   uint32_t reg = 0;
02136   int32_t  value = 0;
02137   
02138   /* Check parameters */
02139   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02140   assert_param(Channel != NULL);
02141 
02142   /* Get value of data register for injected channel */
02143   reg = hdfsdm_filter->Instance->FLTJDATAR;
02144   
02145   /* Extract channel and injected conversion value */
02146   *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
02147   value = ((reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_DATA_OFFSET);
02148 
02149   /* return regular conversion value */
02150   return value;
02151 }
02152 
02153 /**
02154   * @brief  This function allows to start filter analog watchdog in interrupt mode.
02155   * @param  hdfsdm_filter : DFSDM filter handle.
02156   * @param  awdParam : DFSDM filter analog watchdog parameters.
02157   * @retval HAL status
02158   */
02159 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef   *hdfsdm_filter,
02160                                               DFSDM_Filter_AwdParamTypeDef *awdParam)
02161 {
02162   HAL_StatusTypeDef status = HAL_OK;
02163 
02164   /* Check parameters */
02165   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02166   assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
02167   assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
02168   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
02169   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
02170   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
02171   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
02172   
02173   /* Check DFSDM filter state */
02174   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
02175      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
02176   {
02177     /* Return error status */
02178     status = HAL_ERROR;
02179   }
02180   else
02181   {
02182     /* Set analog watchdog data source */
02183     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
02184     hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
02185 
02186     /* Set thresholds and break signals */
02187     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
02188     hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_THRESHOLD_OFFSET) | \
02189                                         awdParam->HighBreakSignal);
02190     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
02191     hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_THRESHOLD_OFFSET) | \
02192                                         awdParam->LowBreakSignal);
02193 
02194     /* Set channels and interrupt for analog watchdog */
02195     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
02196     hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_OFFSET) | \
02197                                         DFSDM_FLTCR2_AWDIE);
02198   }
02199   /* Return function status */
02200   return status;
02201 }
02202 
02203 /**
02204   * @brief  This function allows to stop filter analog watchdog in interrupt mode.
02205   * @param  hdfsdm_filter : DFSDM filter handle.
02206   * @retval HAL status
02207   */
02208 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02209 {
02210   HAL_StatusTypeDef status = HAL_OK;
02211 
02212   /* Check parameters */
02213   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02214   
02215   /* Check DFSDM filter state */
02216   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
02217      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
02218   {
02219     /* Return error status */
02220     status = HAL_ERROR;
02221   }
02222   else
02223   {
02224     /* Reset channels for analog watchdog and deactivate interrupt */
02225     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
02226 
02227     /* Clear all analog watchdog flags */
02228     hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
02229     
02230     /* Reset thresholds and break signals */
02231     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
02232     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
02233 
02234     /* Reset analog watchdog data source */
02235     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
02236   }
02237   /* Return function status */
02238   return status;
02239 }
02240 
02241 /**
02242   * @brief  This function allows to start extreme detector feature.
02243   * @param  hdfsdm_filter : DFSDM filter handle.
02244   * @param  Channel : Channels where extreme detector is enabled.
02245   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.
02246   * @retval HAL status
02247   */
02248 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
02249                                            uint32_t                    Channel)
02250 {
02251   HAL_StatusTypeDef status = HAL_OK;
02252 
02253   /* Check parameters */
02254   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02255   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
02256   
02257   /* Check DFSDM filter state */
02258   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
02259      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
02260   {
02261     /* Return error status */
02262     status = HAL_ERROR;
02263   }
02264   else
02265   {
02266     /* Set channels for extreme detector */
02267     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
02268     hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_OFFSET);    
02269   }
02270   /* Return function status */
02271   return status;
02272 }
02273 
02274 /**
02275   * @brief  This function allows to stop extreme detector feature.
02276   * @param  hdfsdm_filter : DFSDM filter handle.
02277   * @retval HAL status
02278   */
02279 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02280 {
02281   HAL_StatusTypeDef status = HAL_OK;
02282   __IO uint32_t     reg1;
02283   __IO uint32_t     reg2;
02284 
02285   /* Check parameters */
02286   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02287   
02288   /* Check DFSDM filter state */
02289   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
02290      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
02291   {
02292     /* Return error status */
02293     status = HAL_ERROR;
02294   }
02295   else
02296   {
02297     /* Reset channels for extreme detector */
02298     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
02299 
02300     /* Clear extreme detector values */
02301     reg1 = hdfsdm_filter->Instance->FLTEXMAX;
02302     reg2 = hdfsdm_filter->Instance->FLTEXMIN;    
02303     UNUSED(reg1); /* To avoid GCC warning */
02304     UNUSED(reg2); /* To avoid GCC warning */
02305   }
02306   /* Return function status */
02307   return status;
02308 }
02309 
02310 /**
02311   * @brief  This function allows to get extreme detector maximum value.
02312   * @param  hdfsdm_filter : DFSDM filter handle.
02313   * @param  Channel : Corresponding channel.
02314   * @retval Extreme detector maximum value
02315   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.
02316   */
02317 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
02318                                        uint32_t                   *Channel)
02319 {
02320   uint32_t reg = 0;
02321   int32_t  value = 0;
02322   
02323   /* Check parameters */
02324   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02325   assert_param(Channel != NULL);
02326 
02327   /* Get value of extreme detector maximum register */
02328   reg = hdfsdm_filter->Instance->FLTEXMAX;
02329   
02330   /* Extract channel and extreme detector maximum value */
02331   *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
02332   value = ((reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_DATA_OFFSET);
02333 
02334   /* return extreme detector maximum value */
02335   return value;
02336 }
02337 
02338 /**
02339   * @brief  This function allows to get extreme detector minimum value.
02340   * @param  hdfsdm_filter : DFSDM filter handle.
02341   * @param  Channel : Corresponding channel.
02342   * @retval Extreme detector minimum value
02343   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.
02344   */
02345 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
02346                                        uint32_t                   *Channel)
02347 {
02348   uint32_t reg = 0;
02349   int32_t  value = 0;
02350   
02351   /* Check parameters */
02352   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02353   assert_param(Channel != NULL);
02354 
02355   /* Get value of extreme detector minimum register */
02356   reg = hdfsdm_filter->Instance->FLTEXMIN;
02357   
02358   /* Extract channel and extreme detector minimum value */
02359   *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
02360   value = ((reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_DATA_OFFSET);
02361 
02362   /* return extreme detector minimum value */
02363   return value;
02364 }
02365 
02366 /**
02367   * @brief  This function allows to get conversion time value.
02368   * @param  hdfsdm_filter : DFSDM filter handle.
02369   * @retval Conversion time value
02370   * @note   To get time in second, this value has to be divided by DFSDM clock frequency.
02371   */
02372 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02373 {
02374   uint32_t reg = 0;
02375   uint32_t value = 0;
02376   
02377   /* Check parameters */
02378   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
02379 
02380   /* Get value of conversion timer register */
02381   reg = hdfsdm_filter->Instance->FLTCNVTIMR;
02382   
02383   /* Extract conversion time value */
02384   value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_DATA_OFFSET);
02385 
02386   /* return extreme detector minimum value */
02387   return value;
02388 }
02389 
02390 /**
02391   * @brief  This function handles the DFSDM interrupts.
02392   * @param  hdfsdm_filter : DFSDM filter handle.
02393   * @retval None
02394   */
02395 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02396 {
02397   /* Check if overrun occurs during regular conversion */
02398   if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0) && \
02399      ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0))
02400   {
02401     /* Clear regular overrun flag */
02402     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
02403 
02404     /* Update error code */
02405     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
02406 
02407     /* Call error callback */
02408     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
02409   }
02410   /* Check if overrun occurs during injected conversion */
02411   else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0) && \
02412           ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0))
02413   {
02414     /* Clear injected overrun flag */
02415     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
02416 
02417     /* Update error code */
02418     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
02419 
02420     /* Call error callback */
02421     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
02422   }
02423   /* Check if end of regular conversion */
02424   else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0) && \
02425           ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0))
02426   {
02427     /* Call regular conversion complete callback */
02428     HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
02429 
02430     /* End of conversion if mode is not continuous and software trigger */
02431     if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
02432        (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
02433     {
02434       /* Disable interrupts for regular conversions */
02435       hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
02436 
02437       /* Update DFSDM filter state */
02438       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
02439                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
02440     }
02441   }
02442   /* Check if end of injected conversion */
02443   else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0) && \
02444           ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0))
02445   {
02446     /* Call injected conversion complete callback */
02447     HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
02448 
02449     /* Update remaining injected conversions */
02450     hdfsdm_filter->InjConvRemaining--;
02451     if(hdfsdm_filter->InjConvRemaining == 0)
02452     {
02453       /* End of conversion if trigger is software */
02454       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
02455       {
02456         /* Disable interrupts for injected conversions */
02457         hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
02458 
02459         /* Update DFSDM filter state */
02460         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
02461                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
02462       }
02463       /* end of injected sequence, reset the value */
02464       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
02465                                          hdfsdm_filter->InjectedChannelsNbr : 1;
02466     }
02467   }
02468   /* Check if analog watchdog occurs */
02469   else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0) && \
02470           ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0))
02471   {
02472     uint32_t reg = 0;
02473     uint32_t threshold = 0;
02474     uint32_t channel = 0;
02475     
02476     /* Get channel and threshold */
02477     reg = hdfsdm_filter->Instance->FLTAWSR;
02478     threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
02479     if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
02480     {
02481       reg = reg >> DFSDM_FLTAWSR_HIGH_OFFSET;
02482     }
02483     while((reg & 1) == 0)
02484     {
02485       channel++;
02486       reg = reg >> 1;
02487     }
02488     /* Clear analog watchdog flag */
02489     hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
02490                                         (1 << (DFSDM_FLTAWSR_HIGH_OFFSET + channel)) : \
02491                                      (1 << channel);
02492 
02493     /* Call analog watchdog callback */
02494     HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
02495   }
02496   /* Check if clock absence occurs */
02497   else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
02498          ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0) && \
02499          ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0))
02500   {
02501     uint32_t reg = 0;
02502     uint32_t channel = 0;
02503     
02504     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
02505 
02506     while(channel < DFSDM1_CHANNEL_NUMBER)
02507     {
02508       /* Check if flag is set and corresponding channel is enabled */
02509       if(((reg & 1) != 0) && (a_dfsdm1ChannelHandle[channel] != NULL))
02510       {
02511         /* Check clock absence has been enabled for this channel */
02512         if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
02513         {
02514           /* Clear clock absence flag */
02515           hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
02516 
02517           /* Call clock absence callback */
02518           HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
02519         }
02520       }
02521       channel++;
02522       reg = reg >> 1;
02523     }
02524   }
02525   /* Check if short circuit detection occurs */
02526   else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
02527          ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0) && \
02528          ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0))
02529   {
02530     uint32_t reg = 0;
02531     uint32_t channel = 0;
02532     
02533     /* Get channel */
02534     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
02535     while((reg & 1) == 0)
02536     {
02537       channel++;
02538       reg = reg >> 1;
02539     }
02540     
02541     /* Clear short circuit detection flag */
02542     hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
02543 
02544     /* Call short circuit detection callback */
02545     HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
02546   }
02547 }
02548 
02549 /**
02550   * @brief  Regular conversion complete callback. 
02551   * @note   In interrupt mode, user has to read conversion value in this function
02552   *         using HAL_DFSDM_FilterGetRegularValue.
02553   * @param  hdfsdm_filter : DFSDM filter handle.
02554   * @retval None
02555   */
02556 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02557 {
02558   /* Prevent unused argument(s) compilation warning */
02559   UNUSED(hdfsdm_filter);
02560   
02561   /* NOTE : This function should not be modified, when the callback is needed,
02562             the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
02563    */
02564 }
02565 
02566 /**
02567   * @brief  Half regular conversion complete callback. 
02568   * @param  hdfsdm_filter : DFSDM filter handle.
02569   * @retval None
02570   */
02571 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02572 {
02573   /* Prevent unused argument(s) compilation warning */
02574   UNUSED(hdfsdm_filter);
02575   
02576   /* NOTE : This function should not be modified, when the callback is needed,
02577             the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
02578    */
02579 }
02580 
02581 /**
02582   * @brief  Injected conversion complete callback. 
02583   * @note   In interrupt mode, user has to read conversion value in this function
02584   *         using HAL_DFSDM_FilterGetInjectedValue.
02585   * @param  hdfsdm_filter : DFSDM filter handle.
02586   * @retval None
02587   */
02588 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02589 {
02590   /* Prevent unused argument(s) compilation warning */
02591   UNUSED(hdfsdm_filter);
02592   
02593   /* NOTE : This function should not be modified, when the callback is needed,
02594             the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
02595    */
02596 }
02597 
02598 /**
02599   * @brief  Half injected conversion complete callback. 
02600   * @param  hdfsdm_filter : DFSDM filter handle.
02601   * @retval None
02602   */
02603 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02604 {
02605   /* Prevent unused argument(s) compilation warning */
02606   UNUSED(hdfsdm_filter);
02607   
02608   /* NOTE : This function should not be modified, when the callback is needed,
02609             the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
02610    */
02611 }
02612 
02613 /**
02614   * @brief  Filter analog watchdog callback. 
02615   * @param  hdfsdm_filter : DFSDM filter handle.
02616   * @param  Channel : Corresponding channel.
02617   * @param  Threshold : Low or high threshold has been reached.
02618   * @retval None
02619   */
02620 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
02621                                         uint32_t Channel, uint32_t Threshold)
02622 {
02623   /* Prevent unused argument(s) compilation warning */
02624   UNUSED(hdfsdm_filter);
02625   UNUSED(Channel);
02626   UNUSED(Threshold);
02627   
02628   /* NOTE : This function should not be modified, when the callback is needed,
02629             the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
02630    */
02631 }
02632 
02633 /**
02634   * @brief  Error callback. 
02635   * @param  hdfsdm_filter : DFSDM filter handle.
02636   * @retval None
02637   */
02638 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02639 {
02640   /* Prevent unused argument(s) compilation warning */
02641   UNUSED(hdfsdm_filter);
02642   
02643   /* NOTE : This function should not be modified, when the callback is needed,
02644             the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
02645    */
02646 }
02647 
02648 /**
02649   * @}
02650   */
02651 
02652 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
02653  *  @brief    Filter state functions
02654  *
02655 @verbatim
02656   ==============================================================================
02657                      ##### Filter state functions #####
02658   ==============================================================================
02659     [..]  This section provides functions allowing to:
02660       (+) Get the DFSDM filter state.
02661       (+) Get the DFSDM filter error.
02662 @endverbatim
02663   * @{
02664   */
02665 
02666 /**
02667   * @brief  This function allows to get the current DFSDM filter handle state.
02668   * @param  hdfsdm_filter : DFSDM filter handle.
02669   * @retval DFSDM filter state.
02670   */
02671 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02672 {
02673   /* Return DFSDM filter handle state */
02674   return hdfsdm_filter->State;
02675 }
02676 
02677 /**
02678   * @brief  This function allows to get the current DFSDM filter error.
02679   * @param  hdfsdm_filter : DFSDM filter handle.
02680   * @retval DFSDM filter error code.
02681   */
02682 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
02683 {
02684   return hdfsdm_filter->ErrorCode;
02685 }
02686 
02687 /**
02688   * @}
02689   */
02690 
02691 /**
02692   * @}
02693   */
02694 /* End of exported functions -------------------------------------------------*/
02695 
02696 /* Private functions ---------------------------------------------------------*/
02697 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
02698   * @{
02699   */
02700 
02701 /**
02702   * @brief  DMA half transfer complete callback for regular conversion. 
02703   * @param  hdma : DMA handle.
02704   * @retval None
02705   */
02706 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)   
02707 {
02708   /* Get DFSDM filter handle */
02709   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
02710 
02711   /* Call regular half conversion complete callback */
02712   HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
02713 }
02714 
02715 /**
02716   * @brief  DMA transfer complete callback for regular conversion. 
02717   * @param  hdma : DMA handle.
02718   * @retval None
02719   */
02720 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)   
02721 {
02722   /* Get DFSDM filter handle */
02723   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
02724 
02725   /* Call regular conversion complete callback */
02726   HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
02727 }
02728 
02729 /**
02730   * @brief  DMA half transfer complete callback for injected conversion. 
02731   * @param  hdma : DMA handle.
02732   * @retval None
02733   */
02734 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)   
02735 {
02736   /* Get DFSDM filter handle */
02737   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
02738 
02739   /* Call injected half conversion complete callback */
02740   HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
02741 }
02742 
02743 /**
02744   * @brief  DMA transfer complete callback for injected conversion. 
02745   * @param  hdma : DMA handle.
02746   * @retval None
02747   */
02748 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)   
02749 {
02750   /* Get DFSDM filter handle */
02751   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
02752 
02753   /* Call injected conversion complete callback */
02754   HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
02755 }
02756 
02757 /**
02758   * @brief  DMA error callback. 
02759   * @param  hdma : DMA handle.
02760   * @retval None
02761   */
02762 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)   
02763 {
02764   /* Get DFSDM filter handle */
02765   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
02766 
02767   /* Update error code */
02768   hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
02769 
02770   /* Call error callback */
02771   HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
02772 }
02773 
02774 /**
02775   * @brief  This function allows to get the number of injected channels.
02776   * @param  Channels : bitfield of injected channels.
02777   * @retval Number of injected channels.
02778   */
02779 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
02780 {
02781   uint32_t nbChannels = 0;
02782   uint32_t tmp;
02783   
02784   /* Get the number of channels from bitfield */
02785   tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
02786   while(tmp != 0)
02787   {
02788     if((tmp & 1) != 0)
02789     {
02790       nbChannels++;
02791     }
02792     tmp = (uint32_t) (tmp >> 1);
02793   }
02794   return nbChannels;
02795 }
02796 
02797 /**
02798   * @brief  This function allows to get the channel number from channel instance.
02799   * @param  Instance : DFSDM channel instance.
02800   * @retval Channel number.
02801   */
02802 static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
02803 {
02804   uint32_t channel = 0xFF;
02805   
02806   /* Get channel from instance */
02807   if(Instance == DFSDM1_Channel0)
02808   {
02809     channel = 0;
02810   }
02811   else if(Instance == DFSDM1_Channel1)
02812   {
02813     channel = 1;
02814   }
02815   else if(Instance == DFSDM1_Channel2)
02816   {
02817     channel = 2;
02818   }
02819   else if(Instance == DFSDM1_Channel3)
02820   {
02821     channel = 3;
02822   }
02823   else if(Instance == DFSDM1_Channel4)
02824   {
02825     channel = 4;
02826   }
02827   else if(Instance == DFSDM1_Channel5)
02828   {
02829     channel = 5;
02830   }
02831   else if(Instance == DFSDM1_Channel6)
02832   {
02833     channel = 6;
02834   }
02835   else if(Instance == DFSDM1_Channel7)
02836   {
02837     channel = 7;
02838   }
02839 
02840   return channel;
02841 }
02842 
02843 /**
02844   * @brief  This function allows to really start regular conversion.
02845   * @param  hdfsdm_filter : DFSDM filter handle.
02846   * @retval None
02847   */
02848 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
02849 {
02850   /* Check regular trigger */
02851   if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
02852   {
02853     /* Software start of regular conversion */
02854     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
02855   }
02856   else /* synchronous trigger */
02857   {
02858     /* Disable DFSDM filter */
02859     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
02860     
02861     /* Set RSYNC bit in DFSDM_FLTCR1 register */
02862     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
02863 
02864     /* Enable DFSDM  filter */
02865     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
02866     
02867     /* If injected conversion was in progress, restart it */
02868     if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
02869     {
02870       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
02871       {
02872         hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
02873       }
02874       /* Update remaining injected conversions */
02875       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
02876                                          hdfsdm_filter->InjectedChannelsNbr : 1;
02877     }
02878   }
02879   /* Update DFSDM filter state */
02880   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
02881                           HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
02882 }
02883 
02884 /**
02885   * @brief  This function allows to really stop regular conversion.
02886   * @param  hdfsdm_filter : DFSDM filter handle.
02887   * @retval None
02888   */
02889 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
02890 {
02891   /* Disable DFSDM filter */
02892   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
02893 
02894   /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
02895   if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
02896   {
02897     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
02898   }
02899 
02900   /* Enable DFSDM filter */
02901   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
02902   
02903   /* If injected conversion was in progress, restart it */
02904   if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
02905   {
02906     if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
02907     {
02908       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
02909     }
02910     /* Update remaining injected conversions */
02911     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
02912                                        hdfsdm_filter->InjectedChannelsNbr : 1;
02913   }
02914   
02915   /* Update DFSDM filter state */
02916   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
02917                           HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
02918 }
02919 
02920 /**
02921   * @brief  This function allows to really start injected conversion.
02922   * @param  hdfsdm_filter : DFSDM filter handle.
02923   * @retval None
02924   */
02925 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
02926 {
02927   /* Check injected trigger */
02928   if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
02929   {
02930     /* Software start of injected conversion */
02931     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
02932   }
02933   else /* external or synchronous trigger */
02934   {
02935     /* Disable DFSDM filter */
02936     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
02937       
02938     if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
02939     {
02940       /* Set JSYNC bit in DFSDM_FLTCR1 register */
02941       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
02942     }
02943     else /* external trigger */
02944     {
02945       /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
02946       hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
02947     }
02948     
02949     /* Enable DFSDM filter */
02950     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
02951 
02952     /* If regular conversion was in progress, restart it */
02953     if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
02954        (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
02955     {
02956       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
02957     }
02958   }
02959   /* Update DFSDM filter state */
02960   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
02961                          HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
02962 }
02963 
02964 /**
02965   * @brief  This function allows to really stop injected conversion.
02966   * @param  hdfsdm_filter : DFSDM filter handle.
02967   * @retval None
02968   */
02969 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
02970 {
02971   /* Disable DFSDM filter */
02972   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
02973 
02974   /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
02975   if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
02976   {
02977     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
02978   }
02979   else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
02980   {
02981     /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
02982     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
02983   }
02984 
02985   /* Enable DFSDM filter */
02986   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
02987   
02988   /* If regular conversion was in progress, restart it */
02989   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
02990      (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
02991   {
02992     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
02993   }
02994 
02995   /* Update remaining injected conversions */
02996   hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
02997                                      hdfsdm_filter->InjectedChannelsNbr : 1;
02998 
02999   /* Update DFSDM filter state */
03000   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
03001                           HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
03002 }
03003 
03004 /**
03005   * @}
03006   */
03007 /* End of private functions --------------------------------------------------*/
03008 
03009 /**
03010   * @}
03011   */
03012 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
03013 #endif /* HAL_DFSDM_MODULE_ENABLED */
03014 /**
03015   * @}
03016   */
03017 
03018 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/