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stm32l4xx_hal_dac.h
00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_dac.h 00004 * @author MCD Application Team 00005 * @version V1.5.1 00006 * @date 31-May-2016 00007 * @brief Header file of DAC HAL module. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 00012 * 00013 * Redistribution and use in source and binary forms, with or without modification, 00014 * are permitted provided that the following conditions are met: 00015 * 1. Redistributions of source code must retain the above copyright notice, 00016 * this list of conditions and the following disclaimer. 00017 * 2. Redistributions in binary form must reproduce the above copyright notice, 00018 * this list of conditions and the following disclaimer in the documentation 00019 * and/or other materials provided with the distribution. 00020 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00021 * may be used to endorse or promote products derived from this software 00022 * without specific prior written permission. 00023 * 00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00027 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00028 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00029 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00030 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00031 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00032 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00034 * 00035 ****************************************************************************** 00036 */ 00037 00038 /* Define to prevent recursive inclusion -------------------------------------*/ 00039 #ifndef __STM32L4xx_HAL_DAC_H 00040 #define __STM32L4xx_HAL_DAC_H 00041 00042 #ifdef __cplusplus 00043 extern "C" { 00044 #endif 00045 00046 00047 /* Includes ------------------------------------------------------------------*/ 00048 #include "stm32l4xx_hal_def.h" 00049 00050 /** @addtogroup STM32L4xx_HAL_Driver 00051 * @{ 00052 */ 00053 00054 /** @addtogroup DAC 00055 * @{ 00056 */ 00057 00058 /* Exported types ------------------------------------------------------------*/ 00059 00060 /** @defgroup DAC_Exported_Types DAC Exported Types 00061 * @{ 00062 */ 00063 00064 /** 00065 * @brief HAL State structures definition 00066 */ 00067 typedef enum 00068 { 00069 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */ 00070 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */ 00071 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */ 00072 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */ 00073 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ 00074 00075 }HAL_DAC_StateTypeDef; 00076 00077 /** 00078 * @brief DAC handle Structure definition 00079 */ 00080 typedef struct 00081 { 00082 DAC_TypeDef *Instance; /*!< Register base address */ 00083 00084 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 00085 00086 HAL_LockTypeDef Lock; /*!< DAC locking object */ 00087 00088 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 00089 00090 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 00091 00092 __IO uint32_t ErrorCode; /*!< DAC Error code */ 00093 00094 }DAC_HandleTypeDef; 00095 00096 /** 00097 * @brief DAC Configuration sample and hold Channel structure definition 00098 */ 00099 typedef struct 00100 { 00101 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 00102 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 00103 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 00104 00105 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 00106 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 00107 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 00108 00109 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 00110 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 00111 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 00112 } 00113 DAC_SampleAndHoldConfTypeDef; 00114 00115 /** 00116 * @brief DAC Configuration regular Channel structure definition 00117 */ 00118 typedef struct 00119 { 00120 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 00121 This parameter can be a value of @ref DAC_SampleAndHold */ 00122 00123 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 00124 This parameter can be a value of @ref DAC_trigger_selection */ 00125 00126 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 00127 This parameter can be a value of @ref DAC_output_buffer */ 00128 00129 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . 00130 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 00131 00132 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 00133 This parameter must be a value of @ref DAC_UserTrimming 00134 DAC_UserTrimming is either factory or user trimming */ 00135 00136 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 00137 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 00138 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 00139 00140 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 00141 00142 }DAC_ChannelConfTypeDef; 00143 00144 /** 00145 * @} 00146 */ 00147 00148 /* Exported constants --------------------------------------------------------*/ 00149 00150 /** @defgroup DAC_Exported_Constants DAC Exported Constants 00151 * @{ 00152 */ 00153 00154 /** @defgroup DAC_Error_Code DAC Error Code 00155 * @{ 00156 */ 00157 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */ 00158 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */ 00159 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DMA underrun error */ 00160 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */ 00161 #define HAL_DAC_ERROR_TIMEOUT 0x08 /*!< Timeout error */ 00162 /** 00163 * @} 00164 */ 00165 00166 /** @defgroup DAC_trigger_selection DAC trigger selection 00167 * @{ 00168 */ 00169 00170 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) 00171 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register 00172 has been loaded, and not by external trigger */ 00173 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 00174 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 00175 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 00176 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 00177 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ 00178 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 00179 00180 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) 00181 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register 00182 has been loaded, and not by external trigger */ 00183 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 00184 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 |DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 00185 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 00186 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 00187 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 00188 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 00189 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 00190 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ 00191 #endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx */ 00192 00193 /** 00194 * @} 00195 */ 00196 00197 /** @defgroup DAC_output_buffer DAC output buffer 00198 * @{ 00199 */ 00200 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000) 00201 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_MCR_MODE1_1) 00202 00203 /** 00204 * @} 00205 */ 00206 00207 /** @defgroup DAC_Channel_selection DAC Channel selection 00208 * @{ 00209 */ 00210 #define DAC_CHANNEL_1 ((uint32_t)0x00000000) 00211 #define DAC_CHANNEL_2 ((uint32_t)0x00000010) 00212 00213 /** 00214 * @} 00215 */ 00216 00217 /** @defgroup DAC_data_alignment DAC data alignment 00218 * @{ 00219 */ 00220 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000) 00221 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004) 00222 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008) 00223 00224 /** 00225 * @} 00226 */ 00227 00228 /** @defgroup DAC_flags_definition DAC flags definition 00229 * @{ 00230 */ 00231 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 00232 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 00233 00234 /** 00235 * @} 00236 */ 00237 00238 /** @defgroup DAC_IT_definition DAC IT definition 00239 * @{ 00240 */ 00241 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 00242 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 00243 00244 /** 00245 * @} 00246 */ 00247 00248 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 00249 * @{ 00250 */ 00251 #define DAC_CHIPCONNECT_DISABLE ((uint32_t)0x00000000) 00252 #define DAC_CHIPCONNECT_ENABLE ((uint32_t)DAC_MCR_MODE1_0) 00253 00254 /** 00255 * @} 00256 */ 00257 00258 /** @defgroup DAC_UserTrimming DAC User Trimming 00259 * @{ 00260 */ 00261 00262 #define DAC_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */ 00263 #define DAC_TRIMMING_USER ((uint32_t)0x00000001) /*!< User trimming */ 00264 00265 /** 00266 * @} 00267 */ 00268 00269 /** @defgroup DAC_SampleAndHold DAC power mode 00270 * @{ 00271 */ 00272 #define DAC_SAMPLEANDHOLD_DISABLE ((uint32_t)0x00000000) 00273 #define DAC_SAMPLEANDHOLD_ENABLE ((uint32_t)DAC_MCR_MODE1_2) 00274 00275 /** 00276 * @} 00277 */ 00278 00279 /** 00280 * @} 00281 */ 00282 00283 /* Exported macro ------------------------------------------------------------*/ 00284 00285 /** @defgroup DAC_Exported_Macros DAC Exported Macros 00286 * @{ 00287 */ 00288 00289 /** @brief Reset DAC handle state. 00290 * @param __HANDLE__: specifies the DAC handle. 00291 * @retval None 00292 */ 00293 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 00294 00295 /** @brief Enable the DAC channel. 00296 * @param __HANDLE__: specifies the DAC handle. 00297 * @param __DAC_Channel__: specifies the DAC channel 00298 * @retval None 00299 */ 00300 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 00301 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) 00302 00303 /** @brief Disable the DAC channel. 00304 * @param __HANDLE__: specifies the DAC handle 00305 * @param __DAC_Channel__: specifies the DAC channel. 00306 * @retval None 00307 */ 00308 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 00309 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) 00310 00311 /** @brief Set DHR12R1 alignment. 00312 * @param __ALIGNMENT__: specifies the DAC alignment 00313 * @retval None 00314 */ 00315 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__)) 00316 00317 /** @brief Set DHR12R2 alignment. 00318 * @param __ALIGNMENT__: specifies the DAC alignment 00319 * @retval None 00320 */ 00321 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__)) 00322 00323 /** @brief Set DHR12RD alignment. 00324 * @param __ALIGNMENT__: specifies the DAC alignment 00325 * @retval None 00326 */ 00327 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__)) 00328 00329 /** @brief Enable the DAC interrupt. 00330 * @param __HANDLE__: specifies the DAC handle 00331 * @param __INTERRUPT__: specifies the DAC interrupt. 00332 * This parameter can be any combination of the following values: 00333 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 00334 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 00335 * @retval None 00336 */ 00337 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 00338 00339 /** @brief Disable the DAC interrupt. 00340 * @param __HANDLE__: specifies the DAC handle 00341 * @param __INTERRUPT__: specifies the DAC interrupt. 00342 * This parameter can be any combination of the following values: 00343 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 00344 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 00345 * @retval None 00346 */ 00347 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 00348 00349 /** @brief Check whether the specified DAC interrupt source is enabled or not. 00350 * @param __HANDLE__: DAC handle 00351 * @param __INTERRUPT__: DAC interrupt source to check 00352 * This parameter can be any combination of the following values: 00353 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 00354 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 00355 * @retval State of interruption (SET or RESET) 00356 */ 00357 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 00358 00359 /** @brief Get the selected DAC's flag status. 00360 * @param __HANDLE__: specifies the DAC handle. 00361 * @param __FLAG__: specifies the DAC flag to get. 00362 * This parameter can be any combination of the following values: 00363 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 00364 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 00365 * @retval None 00366 */ 00367 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00368 00369 /** @brief Clear the DAC's flag. 00370 * @param __HANDLE__: specifies the DAC handle. 00371 * @param __FLAG__: specifies the DAC flag to clear. 00372 * This parameter can be any combination of the following values: 00373 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 00374 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 00375 * @retval None 00376 */ 00377 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 00378 00379 /** 00380 * @} 00381 */ 00382 00383 /* Private macro -------------------------------------------------------------*/ 00384 00385 /** @defgroup DAC_Private_Macros DAC Private Macros 00386 * @{ 00387 */ 00388 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 00389 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 00390 00391 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 00392 ((CHANNEL) == DAC_CHANNEL_2)) 00393 00394 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 00395 ((ALIGN) == DAC_ALIGN_12B_L) || \ 00396 ((ALIGN) == DAC_ALIGN_8B_R)) 00397 00398 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) 00399 00400 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x0000000FF) 00401 00402 /** 00403 * @} 00404 */ 00405 00406 /* Include DAC HAL Extended module */ 00407 #include "stm32l4xx_hal_dac_ex.h" 00408 00409 /* Exported functions --------------------------------------------------------*/ 00410 00411 /** @addtogroup DAC_Exported_Functions 00412 * @{ 00413 */ 00414 00415 /** @addtogroup DAC_Exported_Functions_Group1 00416 * @{ 00417 */ 00418 /* Initialization and de-initialization functions *****************************/ 00419 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); 00420 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); 00421 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); 00422 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); 00423 00424 /** 00425 * @} 00426 */ 00427 00428 /** @addtogroup DAC_Exported_Functions_Group2 00429 * @{ 00430 */ 00431 /* IO operation functions *****************************************************/ 00432 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); 00433 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); 00434 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); 00435 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); 00436 00437 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); 00438 00439 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 00440 00441 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); 00442 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); 00443 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 00444 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 00445 /** 00446 * @} 00447 */ 00448 00449 /** @addtogroup DAC_Exported_Functions_Group3 00450 * @{ 00451 */ 00452 /* Peripheral Control functions ***********************************************/ 00453 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); 00454 00455 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); 00456 /** 00457 * @} 00458 */ 00459 00460 /** @addtogroup DAC_Exported_Functions_Group4 00461 * @{ 00462 */ 00463 /* Peripheral State and Error functions ***************************************/ 00464 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); 00465 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 00466 00467 /** 00468 * @} 00469 */ 00470 00471 /** 00472 * @} 00473 */ 00474 00475 /** 00476 * @} 00477 */ 00478 00479 /** 00480 * @} 00481 */ 00482 00483 #ifdef __cplusplus 00484 } 00485 #endif 00486 00487 00488 #endif /*__STM32L4xx_HAL_DAC_H */ 00489 00490 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 00491
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