stm32l4xx_hal_dac.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_dac.c
00004   * @author  MCD Application Team
00005   * @version V1.5.1
00006   * @date    31-May-2016
00007   * @brief   DAC HAL module driver.
00008   *         This file provides firmware functions to manage the following 
00009   *         functionalities of the Digital to Analog Converter (DAC) peripheral:
00010   *           + Initialization and de-initialization functions
00011   *           + IO operation functions
00012   *           + Peripheral Control functions
00013   *           + Peripheral State and Errors functions      
00014   *     
00015   *
00016   @verbatim      
00017   ==============================================================================
00018                       ##### DAC Peripheral features #####
00019   ==============================================================================
00020     [..]        
00021       *** DAC Channels ***
00022       ====================  
00023     [..]  
00024     STM32L4 devices integrate two 12-bit Digital Analog Converters
00025 
00026     The 2 converters (i.e. channel1 & channel2)
00027     can be used independently or simultaneously (dual mode):
00028       (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip 
00029           peripherals (ex. OPAMPs, comparators).
00030       (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip 
00031           peripherals (ex. OPAMPs, comparators).
00032       
00033       *** DAC Triggers ***
00034       ====================
00035     [..]
00036     Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
00037     and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. 
00038     [..] 
00039     Digital to Analog conversion can be triggered by:
00040       (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
00041           The used pin (GPIOx_PIN_9) must be configured in input mode.
00042   
00043       (#) Timers TRGO: TIM2, TIM3, TIM4, TIM5, TIM6 and TIM7 
00044           (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
00045   
00046       (#) Software using DAC_TRIGGER_SOFTWARE
00047   
00048       *** DAC Buffer mode feature ***
00049       =============================== 
00050       [..] 
00051       Each DAC channel integrates an output buffer that can be used to 
00052       reduce the output impedance, and to drive external loads directly
00053       without having to add an external operational amplifier.
00054       To enable, the output buffer use  
00055       sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
00056       [..]           
00057       (@) Refer to the device datasheet for more details about output 
00058           impedance value with and without output buffer.
00059 
00060       *** DAC connect feature ***
00061       =============================== 
00062       [..] 
00063       Each DAC channel can be connected internally. 
00064       To connect, use
00065       sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
00066                                                
00067       *** GPIO configurations guidelines ***
00068       =====================
00069       [..] 
00070       When a DAC channel is used (ex channel1 on PA4) and the other is not 
00071       (ex channel2 on PA5 is configured in Analog and disabled).
00072       Channel1 may disturb channel2 as coupling effect.
00073       Note that there is no coupling on channel2 as soon as channel2 is turned on.
00074       Coupling on adjacent channel could be avoided as follows:
00075       when unused PA5 is configured as INPUT PULL-UP or DOWN. 
00076       PA5 is configured in ANALOG just before it is turned on.     
00077                                                
00078       *** DAC Sample and Hold feature ***
00079       ========================
00080       [..] 
00081       For each converter, 2 modes are supported: normal mode and 
00082       "sample and hold" mode (i.e. low power mode).
00083       In the sample and hold mode, the DAC core converts data, then holds the 
00084       converted voltage on a capacitor. When not converting, the DAC cores and 
00085       buffer are completely turned off between samples and the DAC output is 
00086       tri-stated, therefore  reducing the overall power consumption. A new 
00087       stabilization period is needed before each new conversion.
00088 
00089       The sample and hold allow setting internal or external voltage @
00090       low power consumption cost (output value can be at any given rate either 
00091       by CPU or DMA).
00092 
00093       The Sample and hold block and registers uses either LSI & run in 
00094       several power modes: run mode, sleep mode, low power run, low power sleep 
00095       mode & stop1 mode.
00096           
00097       Low power stop1 mode allows only static conversion.
00098           
00099       To enable Sample and Hold mode 
00100       Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
00101       RCC_LSI_ON parameters.
00102 
00103       Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
00104          & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
00105            DAC_HoldTime & DAC_RefreshTime;
00106     
00107 
00108 
00109        *** DAC calibration feature ***
00110        =================================== 
00111       [..] 
00112        (#)  The 2 converters (channel1 & channel2) provide calibration capabilities.  
00113        (++) Calibration aims at correcting some offset of output buffer.
00114        (++) The DAC uses either factory calibration settings OR user defined 
00115            calibration (trimming) settings (i.e. trimming mode).
00116        (++) The user defined settings can be figured out using self calibration 
00117            handled by HAL_DACEx_SelfCalibrate.
00118        (++) HAL_DACEx_SelfCalibrate:
00119        (+++) Runs automatically the calibration.
00120        (+++) Enables the user trimming mode
00121        (+++) Updates a structure with trimming values with fresh calibration 
00122             results. 
00123             The user may store the calibration results for larger 
00124             (ex monitoring the trimming as a function of temperature 
00125             for instance)
00126 
00127        *** DAC wave generation feature ***
00128        =================================== 
00129        [..]     
00130        Both DAC channels can be used to generate
00131          (#) Noise wave 
00132          (#) Triangle wave
00133             
00134        *** DAC data format ***
00135        =======================
00136        [..]   
00137        The DAC data format can be:
00138          (#) 8-bit right alignment using DAC_ALIGN_8B_R
00139          (#) 12-bit left alignment using DAC_ALIGN_12B_L
00140          (#) 12-bit right alignment using DAC_ALIGN_12B_R
00141   
00142        *** DAC data value to voltage correspondence ***  
00143        ================================================ 
00144        [..] 
00145        The analog output voltage on each DAC channel pin is determined
00146        by the following equation:
00147        [..]
00148        DAC_OUTx = VREF+ * DOR / 4095
00149        (+) with  DOR is the Data Output Register
00150        [..]
00151           VEF+ is the input voltage reference (refer to the device datasheet)
00152        [..]
00153         e.g. To set DAC_OUT1 to 0.7V, use
00154        (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
00155   
00156        *** DMA requests ***
00157        =====================
00158        [..]
00159        A DMA1 request can be generated when an external trigger (but not a software trigger) 
00160        occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). 
00161        DMA requests are mapped as following:          
00162       (#) DAC channel1: mapped either on
00163       (++) DMA1 request 6 channel3 
00164       (++) or DMA2 request channel4 which must be already configured
00165       (#) DAC channel2: mapped either on
00166       (++) DMA1 request 5 channel4 
00167       (++) or DMA2 request 3 channel5 which must be already configured 
00168      [..]
00169     (@) For Dual mode and specific signal (Triangle and noise) generation please 
00170         refer to Extended Features Driver description        
00171       
00172                       ##### How to use this driver #####
00173   ==============================================================================
00174     [..]          
00175       (+) DAC APB clock must be enabled to get write access to DAC
00176           registers using HAL_DAC_Init()
00177       (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
00178       (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
00179       (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
00180 
00181      *** Calibration mode IO operation ***
00182      ======================================
00183      [..]    
00184        (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
00185        (+) Run the calibration using HAL_DACEx_SelfCalibrate() 
00186        (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
00187 
00188      *** Polling mode IO operation ***
00189      =================================
00190      [..]    
00191        (+) Start the DAC peripheral using HAL_DAC_Start() 
00192        (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
00193        (+) Stop the DAC peripheral using HAL_DAC_Stop()
00194        
00195      *** DMA mode IO operation ***    
00196      ==============================
00197      [..]    
00198        (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length 
00199            of data to be transferred at each end of conversion
00200        (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()  
00201            function is executed and user can add his own code by customization of function pointer 
00202            HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
00203        (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()  
00204            function is executed and user can add his own code by customization of function pointer 
00205            HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
00206        (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can 
00207             add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
00208        (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
00209            HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()  
00210            function is executed and user can add his own code by customization of function pointer 
00211            HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
00212            add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
00213        (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
00214                     
00215      *** DAC HAL driver macros list ***
00216      ============================================= 
00217      [..]
00218        Below the list of most used macros in DAC HAL driver.
00219        
00220       (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
00221       (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
00222       (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
00223       (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
00224       
00225      [..]
00226       (@) You can refer to the DAC HAL driver header file for more useful macros  
00227    
00228  @endverbatim    
00229   ******************************************************************************
00230   * @attention
00231   *
00232   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00233   *
00234   * Redistribution and use in source and binary forms, with or without modification,
00235   * are permitted provided that the following conditions are met:
00236   *   1. Redistributions of source code must retain the above copyright notice,
00237   *      this list of conditions and the following disclaimer.
00238   *   2. Redistributions in binary form must reproduce the above copyright notice,
00239   *      this list of conditions and the following disclaimer in the documentation
00240   *      and/or other materials provided with the distribution.
00241   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00242   *      may be used to endorse or promote products derived from this software
00243   *      without specific prior written permission.
00244   *
00245   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00246   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00247   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00248   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00249   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00250   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00251   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00252   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00253   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00254   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00255   *
00256   ******************************************************************************
00257   */ 
00258 
00259 
00260 /* Includes ------------------------------------------------------------------*/
00261 #include "stm32l4xx_hal.h"
00262 
00263 /** @addtogroup STM32L4xx_HAL_Driver
00264   * @{
00265   */
00266 
00267   /** @defgroup DAC DAC
00268   * @brief DAC driver modules  
00269   * @{
00270   */ 
00271 
00272 #ifdef HAL_DAC_MODULE_ENABLED
00273 
00274 /* Private typedef -----------------------------------------------------------*/
00275 /* Private define ------------------------------------------------------------*/
00276 /* Private constants ---------------------------------------------------------*/
00277 /** @addtogroup DAC_Private_Constants DAC Private Constants
00278   * @{
00279   */
00280 #define TIMEOUT_DAC_CALIBCONFIG    ((uint32_t)1)  /* 1ms                  */
00281 /**
00282   * @}
00283   */ 
00284 
00285 /* Private macro -------------------------------------------------------------*/
00286 /* Private macro -------------------------------------------------------------*/
00287 /* Private variables ---------------------------------------------------------*/
00288 /* Private function prototypes -----------------------------------------------*/
00289 /** @defgroup DAC_Private_Functions DAC Private Functions
00290   * @{
00291   */
00292 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
00293 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
00294 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); 
00295 /**
00296   * @}
00297   */
00298 /* Exported functions -------------------------------------------------------*/
00299 
00300 /** @defgroup DAC_Exported_Functions DAC Exported Functions
00301   * @{
00302   */
00303 
00304 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions 
00305  *  @brief    Initialization and Configuration functions 
00306  *
00307 @verbatim    
00308   ==============================================================================
00309               ##### Initialization and de-initialization functions #####
00310   ==============================================================================
00311     [..]  This section provides functions allowing to:
00312       (+) Initialize and configure the DAC. 
00313       (+) De-initialize the DAC. 
00314          
00315 @endverbatim
00316   * @{
00317   */
00318 
00319 /**
00320   * @brief  Initialize the DAC peripheral according to the specified parameters
00321   *         in the DAC_InitStruct and initialize the associated handle.
00322   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00323   *         the configuration information for the specified DAC.
00324   * @retval HAL status
00325   */
00326 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
00327 { 
00328   /* Check DAC handle */
00329   if(hdac == NULL)
00330   {
00331      return HAL_ERROR;
00332   }
00333   /* Check the parameters */
00334   assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
00335   
00336   if(hdac->State == HAL_DAC_STATE_RESET)
00337   {  
00338     /* Allocate lock resource and initialize it */
00339     hdac->Lock = HAL_UNLOCKED;
00340 
00341     /* Init the low level hardware */
00342     HAL_DAC_MspInit(hdac);
00343   }
00344   
00345   /* Initialize the DAC state*/
00346   hdac->State = HAL_DAC_STATE_BUSY;
00347   
00348   /* Set DAC error code to none */
00349   hdac->ErrorCode = HAL_DAC_ERROR_NONE;
00350   
00351   /* Initialize the DAC state*/
00352   hdac->State = HAL_DAC_STATE_READY;
00353   
00354   /* Return function status */
00355   return HAL_OK;
00356 }
00357 
00358 /**
00359   * @brief  Deinitialize the DAC peripheral registers to their default reset values.
00360   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00361   *         the configuration information for the specified DAC.
00362   * @retval HAL status
00363   */
00364 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
00365 {
00366   /* Check DAC handle */
00367   if(hdac == NULL)
00368   {
00369      return HAL_ERROR;
00370   }
00371 
00372   /* Check the parameters */
00373   assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
00374 
00375   /* Change DAC state */
00376   hdac->State = HAL_DAC_STATE_BUSY;
00377 
00378   /* DeInit the low level hardware */
00379   HAL_DAC_MspDeInit(hdac);
00380 
00381   /* Set DAC error code to none */
00382   hdac->ErrorCode = HAL_DAC_ERROR_NONE;
00383 
00384   /* Change DAC state */
00385   hdac->State = HAL_DAC_STATE_RESET;
00386 
00387   /* Release Lock */
00388   __HAL_UNLOCK(hdac);
00389 
00390   /* Return function status */
00391   return HAL_OK;
00392 }
00393 
00394 /**
00395   * @brief  Initialize the DAC MSP.
00396   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00397   *         the configuration information for the specified DAC.
00398   * @retval None
00399   */
00400 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
00401 { 
00402   /* Prevent unused argument(s) compilation warning */
00403   UNUSED(hdac);
00404 
00405   /* NOTE : This function should not be modified, when the callback is needed,
00406             the HAL_DAC_MspInit could be implemented in the user file
00407    */ 
00408 }
00409 
00410 /**
00411   * @brief  DeInitialize the DAC MSP.
00412   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00413   *         the configuration information for the specified DAC.  
00414   * @retval None
00415   */
00416 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
00417 {
00418   /* Prevent unused argument(s) compilation warning */
00419   UNUSED(hdac);
00420 
00421   /* NOTE : This function should not be modified, when the callback is needed,
00422             the HAL_DAC_MspDeInit could be implemented in the user file
00423    */ 
00424 }
00425 
00426 /**
00427   * @}
00428   */
00429 
00430 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
00431  *  @brief    IO operation functions 
00432  *
00433 @verbatim   
00434   ==============================================================================
00435              ##### IO operation functions #####
00436   ==============================================================================  
00437     [..]  This section provides functions allowing to:
00438       (+) Start conversion.
00439       (+) Stop conversion.
00440       (+) Start conversion and enable DMA transfer.
00441       (+) Stop conversion and disable DMA transfer.
00442       (+) Get result of conversion.
00443                      
00444 @endverbatim
00445   * @{
00446   */
00447 
00448 /**
00449   * @brief  Enables DAC and starts conversion of channel.
00450   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00451   *         the configuration information for the specified DAC.
00452   * @param  Channel: The selected DAC channel. 
00453   *          This parameter can be one of the following values:
00454   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
00455   *            @arg DAC_CHANNEL_2: DAC Channel2 selected
00456   * @retval HAL status
00457   */
00458 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
00459 {
00460   /* Check the parameters */
00461   assert_param(IS_DAC_CHANNEL(Channel));
00462   
00463   /* Process locked */
00464   __HAL_LOCK(hdac);
00465   
00466   /* Change DAC state */
00467   hdac->State = HAL_DAC_STATE_BUSY;
00468   
00469   /* Enable the Peripheral */
00470   __HAL_DAC_ENABLE(hdac, Channel);
00471 
00472   if(Channel == DAC_CHANNEL_1)
00473   {
00474     /* Check if software trigger enabled */
00475     if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
00476     {
00477       /* Enable the selected DAC software conversion */
00478       SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
00479     }
00480   }
00481   else
00482   {
00483     /* Check if software trigger enabled */
00484     if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
00485     {
00486       /* Enable the selected DAC software conversion*/
00487       SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
00488     }
00489   }
00490   
00491   /* Change DAC state */
00492   hdac->State = HAL_DAC_STATE_READY;
00493   
00494   /* Process unlocked */
00495   __HAL_UNLOCK(hdac);
00496     
00497   /* Return function status */
00498   return HAL_OK;
00499 }
00500   
00501 /**
00502   * @brief  Disables DAC and stop conversion of channel.
00503   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00504   *         the configuration information for the specified DAC.
00505   * @param  Channel: The selected DAC channel. 
00506   *          This parameter can be one of the following values:
00507   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
00508   *            @arg DAC_CHANNEL_2: DAC Channel2 selected  
00509   * @retval HAL status
00510   */
00511 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
00512 {
00513   /* Check the parameters */
00514   assert_param(IS_DAC_CHANNEL(Channel));
00515   
00516   /* Disable the Peripheral */
00517   __HAL_DAC_DISABLE(hdac, Channel);
00518   
00519   /* Change DAC state */
00520   hdac->State = HAL_DAC_STATE_READY;
00521   
00522   /* Return function status */
00523   return HAL_OK;
00524 }
00525 
00526 /**
00527   * @brief  Enables DAC and starts conversion of channel.
00528   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00529   *         the configuration information for the specified DAC.
00530   * @param  Channel: The selected DAC channel. 
00531   *          This parameter can be one of the following values:
00532   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
00533   *            @arg DAC_CHANNEL_2: DAC Channel2 selected
00534   * @param  pData: The destination peripheral Buffer address.
00535   * @param  Length: The length of data to be transferred from memory to DAC peripheral
00536   * @param  Alignment: Specifies the data alignment for DAC channel.
00537   *          This parameter can be one of the following values:
00538   *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
00539   *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
00540   *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
00541   * @retval HAL status
00542   */
00543 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
00544 {
00545   uint32_t tmpreg = 0;
00546     
00547   /* Check the parameters */
00548   assert_param(IS_DAC_CHANNEL(Channel));
00549   assert_param(IS_DAC_ALIGN(Alignment));
00550   
00551   /* Process locked */
00552   __HAL_LOCK(hdac);
00553   
00554   /* Change DAC state */
00555   hdac->State = HAL_DAC_STATE_BUSY;
00556   
00557   if(Channel == DAC_CHANNEL_1)
00558   {
00559     /* Set the DMA transfer complete callback for channel1 */
00560     hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
00561     
00562     /* Set the DMA half transfer complete callback for channel1 */
00563     hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
00564        
00565     /* Set the DMA error callback for channel1 */
00566     hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
00567     
00568     /* Enable the selected DAC channel1 DMA request */
00569     SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
00570     
00571     /* Case of use of channel 1 */
00572     switch(Alignment)
00573     {
00574       case DAC_ALIGN_12B_R:
00575         /* Get DHR12R1 address */
00576         tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
00577         break;
00578       case DAC_ALIGN_12B_L:
00579         /* Get DHR12L1 address */
00580         tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
00581         break;
00582       case DAC_ALIGN_8B_R:
00583         /* Get DHR8R1 address */
00584         tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
00585         break;
00586       default:
00587         break;
00588     }
00589   }
00590   else
00591   {
00592     /* Set the DMA transfer complete callback for channel2 */
00593     hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
00594     
00595     /* Set the DMA half transfer complete callback for channel2 */
00596     hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
00597        
00598     /* Set the DMA error callback for channel2 */
00599     hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
00600     
00601     /* Enable the selected DAC channel2 DMA request */
00602     SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
00603     
00604     /* Case of use of channel 2 */
00605     switch(Alignment)
00606     {
00607       case DAC_ALIGN_12B_R:
00608         /* Get DHR12R2 address */
00609         tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
00610         break;
00611       case DAC_ALIGN_12B_L:
00612         /* Get DHR12L2 address */
00613         tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
00614         break;
00615       case DAC_ALIGN_8B_R:
00616         /* Get DHR8R2 address */
00617         tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
00618         break;
00619       default:
00620         break;
00621     }
00622   }
00623   
00624   /* Enable the DMA channel */
00625   if(Channel == DAC_CHANNEL_1)
00626   {
00627     /* Enable the DAC DMA underrun interrupt */
00628     __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
00629     
00630     /* Enable the DMA channel */
00631     HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
00632   } 
00633   else
00634   {
00635     /* Enable the DAC DMA underrun interrupt */
00636     __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
00637     
00638     /* Enable the DMA channel */
00639     HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
00640   }
00641   
00642   /* Process Unlocked */
00643   __HAL_UNLOCK(hdac);
00644 
00645   /* Enable the Peripheral */
00646   __HAL_DAC_ENABLE(hdac, Channel);
00647   
00648   /* Return function status */
00649   return HAL_OK;
00650 }
00651  
00652 /**
00653   * @brief  Disables DAC and stop conversion of channel.
00654   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00655   *         the configuration information for the specified DAC.
00656   * @param  Channel: The selected DAC channel. 
00657   *          This parameter can be one of the following values:
00658   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
00659   *            @arg DAC_CHANNEL_2: DAC Channel2 selected   
00660   * @retval HAL status
00661   */
00662 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
00663 {
00664    HAL_StatusTypeDef status = HAL_OK;
00665     
00666   /* Check the parameters */
00667   assert_param(IS_DAC_CHANNEL(Channel));
00668   
00669   /* Disable the selected DAC channel DMA request */
00670     hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
00671     
00672   /* Disable the Peripheral */
00673   __HAL_DAC_DISABLE(hdac, Channel);
00674   
00675   /* Disable the DMA channel */
00676   /* Channel1 is used */
00677   if (Channel == DAC_CHANNEL_1)
00678   {
00679     /* Disable the DMA channel */
00680     status = HAL_DMA_Abort(hdac->DMA_Handle1);
00681     
00682     /* Disable the DAC DMA underrun interrupt */
00683     __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
00684   }
00685   else /* Channel2 is used for */
00686   {
00687     /* Disable the DMA channel */
00688     status = HAL_DMA_Abort(hdac->DMA_Handle2);
00689     
00690     /* Disable the DAC DMA underrun interrupt */
00691     __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
00692   }
00693   
00694   /* Check if DMA Channel effectively disabled */
00695   if (status != HAL_OK)
00696   {
00697     /* Update DAC state machine to error */
00698     hdac->State = HAL_DAC_STATE_ERROR;
00699   }
00700   else
00701   {
00702     /* Change DAC state */
00703     hdac->State = HAL_DAC_STATE_READY;
00704   }
00705   
00706   /* Return function status */
00707   return status;
00708 }
00709 
00710 /* DAC channel 2 is available on top of DAC channel 1 */
00711 
00712 /**
00713   * @brief  Handles DAC interrupt request
00714   *         This function uses the interruption of DMA
00715   *         underrun.  
00716   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00717   *         the configuration information for the specified DAC.
00718   * @retval None
00719   */
00720 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
00721 {
00722   if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
00723   { 
00724     /* Check underrun flag of DAC channel 1 */
00725     if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
00726     {
00727       /* Change DAC state to error state */
00728       hdac->State = HAL_DAC_STATE_ERROR;
00729       
00730       /* Set DAC error code to chanel1 DMA underrun error */
00731       SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
00732       
00733       /* Clear the underrun flag */
00734       __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
00735       
00736       /* Disable the selected DAC channel1 DMA request */
00737       CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
00738       
00739       /* Error callback */ 
00740       HAL_DAC_DMAUnderrunCallbackCh1(hdac);
00741     }
00742   }
00743   if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
00744   {
00745     /* Check underrun flag of DAC channel 1 */
00746     if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
00747     {
00748       /* Change DAC state to error state */
00749       hdac->State = HAL_DAC_STATE_ERROR;
00750       
00751       /* Set DAC error code to channel2 DMA underrun error */
00752       SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
00753       
00754       /* Clear the underrun flag */
00755       __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
00756       
00757       /* Disable the selected DAC channel1 DMA request */
00758       CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
00759       
00760       /* Error callback */ 
00761       HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
00762     }
00763   }
00764 }
00765 
00766 /**
00767   * @brief  Set the specified data holding register value for DAC channel.
00768   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00769   *         the configuration information for the specified DAC.
00770   * @param  Channel: The selected DAC channel. 
00771   *          This parameter can be one of the following values:
00772   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
00773   *            @arg DAC_CHANNEL_2: DAC Channel2 selected  
00774   * @param  Alignment: Specifies the data alignment.
00775   *          This parameter can be one of the following values:
00776   *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
00777   *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
00778   *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
00779   * @param  Data: Data to be loaded in the selected data holding register.
00780   * @retval HAL status
00781   */
00782 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
00783 {  
00784   __IO uint32_t tmp = 0;
00785   
00786   /* Check the parameters */
00787   assert_param(IS_DAC_CHANNEL(Channel));
00788   assert_param(IS_DAC_ALIGN(Alignment));
00789   assert_param(IS_DAC_DATA(Data));
00790   
00791   tmp = (uint32_t)hdac->Instance; 
00792   if(Channel == DAC_CHANNEL_1)
00793   {
00794     tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
00795   }
00796   else
00797   {
00798     tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
00799   }
00800 
00801   /* Set the DAC channel selected data holding register */
00802   *(__IO uint32_t *) tmp = Data;
00803   
00804   /* Return function status */
00805   return HAL_OK;
00806 }
00807 
00808 /**
00809   * @brief  Conversion complete callback in non-blocking mode for Channel1 
00810   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00811   *         the configuration information for the specified DAC.
00812   * @retval None
00813   */
00814 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
00815 {
00816   /* Prevent unused argument(s) compilation warning */
00817   UNUSED(hdac);
00818 
00819   /* NOTE : This function should not be modified, when the callback is needed,
00820             the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
00821    */
00822 }
00823 
00824 /**
00825   * @brief  Conversion half DMA transfer callback in non-blocking mode for Channel1 
00826   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00827   *         the configuration information for the specified DAC.
00828   * @retval None
00829   */
00830 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
00831 {
00832   /* Prevent unused argument(s) compilation warning */
00833   UNUSED(hdac);
00834 
00835   /* NOTE : This function should not be modified, when the callback is needed,
00836             the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
00837    */
00838 }
00839 
00840 /**
00841   * @brief  Error DAC callback for Channel1.
00842   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00843   *         the configuration information for the specified DAC.
00844   * @retval None
00845   */
00846 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
00847 {
00848   /* Prevent unused argument(s) compilation warning */
00849   UNUSED(hdac);
00850 
00851   /* NOTE : This function should not be modified, when the callback is needed,
00852             the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
00853    */
00854 }
00855 
00856 /**
00857   * @brief  DMA underrun DAC callback for channel1.
00858   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00859   *         the configuration information for the specified DAC.
00860   * @retval None
00861   */
00862 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
00863 {
00864   /* Prevent unused argument(s) compilation warning */
00865   UNUSED(hdac);
00866 
00867   /* NOTE : This function should not be modified, when the callback is needed,
00868             the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
00869    */
00870 }
00871 
00872 /**
00873   * @}
00874   */
00875   
00876 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
00877  *  @brief    Peripheral Control functions 
00878  *
00879 @verbatim   
00880   ==============================================================================
00881              ##### Peripheral Control functions #####
00882   ==============================================================================  
00883     [..]  This section provides functions allowing to:
00884       (+) Configure channels. 
00885       (+) Set the specified data holding register value for DAC channel.
00886       
00887 @endverbatim
00888   * @{
00889   */
00890 
00891 /**
00892   * @brief  Returns the last data output value of the selected DAC channel.
00893   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00894   *         the configuration information for the specified DAC.
00895   * @param  Channel: The selected DAC channel. 
00896   *          This parameter can be one of the following values:
00897   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
00898   *            @arg DAC_CHANNEL_2: DAC Channel2 selected
00899   * @retval The selected DAC channel data output value.
00900   */
00901 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
00902 {
00903   /* Check the parameters */
00904   assert_param(IS_DAC_CHANNEL(Channel));
00905   
00906   /* Returns the DAC channel data output register value */
00907   if(Channel == DAC_CHANNEL_1)
00908   {
00909     return hdac->Instance->DOR1;
00910   }
00911   else
00912   {
00913     return hdac->Instance->DOR2;
00914   }
00915 }
00916 
00917 /**
00918   * @brief  Configures the selected DAC channel.
00919   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
00920   *         the configuration information for the specified DAC.
00921   * @param  sConfig: DAC configuration structure.
00922   * @param  Channel: The selected DAC channel. 
00923   *          This parameter can be one of the following values:
00924   *            @arg DAC_CHANNEL_1: DAC Channel1 selected
00925   *            @arg DAC_CHANNEL_2: DAC Channel2 selected
00926   * @retval HAL status
00927   */
00928 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
00929 {
00930   uint32_t tmpreg1 = 0, tmpreg2 = 0;
00931   uint32_t tickstart = 0;
00932    
00933   /* Check the DAC parameters */
00934   assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
00935   assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
00936   assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
00937   assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
00938   if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
00939   {
00940     assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));               
00941   }
00942   assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
00943   if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
00944   {
00945     assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
00946     assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
00947     assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)); 
00948   }
00949   assert_param(IS_DAC_CHANNEL(Channel));
00950  
00951   /* Process locked */
00952   __HAL_LOCK(hdac);
00953   
00954   /* Change DAC state */
00955   hdac->State = HAL_DAC_STATE_BUSY;
00956   
00957   if(sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
00958   /* Sample on old configuration */ 
00959   {
00960     /* SampleTime */
00961     if (Channel == DAC_CHANNEL_1)
00962     {
00963       /* Get timeout */
00964       tickstart = HAL_GetTick();
00965       
00966       /* SHSR1 can be written when BWST1  equals RESET */
00967       while (((hdac->Instance->SR) & DAC_SR_BWST1)!= RESET)
00968       {
00969         /* Check for the Timeout */
00970         if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
00971         {
00972           /* Update error code */
00973           SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
00974 
00975           /* Change the DMA state */
00976           hdac->State = HAL_DAC_STATE_TIMEOUT;
00977 
00978           return HAL_TIMEOUT;
00979         }
00980       }
00981       HAL_Delay(1);
00982       hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
00983     }
00984     else /* Channel 2 */
00985     {
00986       /* SHSR2 can be written when BWST2 equals RESET */
00987 
00988       while (((hdac->Instance->SR) & DAC_SR_BWST2)!= RESET)
00989       {
00990         /* Check for the Timeout */
00991         if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
00992         {
00993           /* Update error code */
00994           SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
00995 
00996           /* Change the DMA state */
00997           hdac->State = HAL_DAC_STATE_TIMEOUT;
00998 
00999           return HAL_TIMEOUT;
01000         }
01001       }
01002       HAL_Delay(1);
01003       hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
01004     }
01005     /* HoldTime */
01006     hdac->Instance->SHHR = (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime)<<Channel;
01007     /* RefreshTime */
01008     hdac->Instance->SHRR = (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)<<Channel;
01009   }
01010     
01011   if(sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
01012   /* USER TRIMMING */
01013   {
01014   /* Get the DAC CCR value */
01015   tmpreg1 = hdac->Instance->CCR;
01016   /* Clear trimming value */
01017   tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << Channel);
01018   /* Configure for the selected trimming offset */
01019   tmpreg2 = sConfig->DAC_TrimmingValue;
01020   /* Calculate CCR register value depending on DAC_Channel */
01021   tmpreg1 |= tmpreg2 << Channel;
01022   /* Write to DAC CCR */
01023   hdac->Instance->CCR = tmpreg1;
01024   }
01025   /* else factory trimming is used (factory setting are available at reset)*/
01026   /* SW Nothing has nothing to do */
01027   
01028   /* Get the DAC MCR value */
01029   tmpreg1 = hdac->Instance->MCR;
01030   /* Clear DAC_MCR_MODE2_0, DAC_MCR_MODE2_1 and DAC_MCR_MODE2_2 bits */
01031   tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << Channel); 
01032   /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
01033   tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
01034   /* Calculate MCR register value depending on DAC_Channel */
01035   tmpreg1 |= tmpreg2 << Channel;
01036   /* Write to DAC MCR */
01037   hdac->Instance->MCR = tmpreg1;
01038   
01039   /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
01040   CLEAR_BIT (hdac->Instance->CR, DAC_CR_CEN1 << Channel);
01041   
01042   /* Get the DAC CR value */
01043   tmpreg1 = hdac->Instance->CR;
01044   /* Clear TENx, TSELx, WAVEx and MAMPx bits */
01045   tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << Channel); 
01046   /* Configure for the selected DAC channel: trigger */
01047   /* Set TSELx and TENx bits according to DAC_Trigger value */
01048   tmpreg2 = (sConfig->DAC_Trigger);
01049   /* Calculate CR register value depending on DAC_Channel */
01050   tmpreg1 |= tmpreg2 << Channel;
01051   /* Write to DAC CR */
01052   hdac->Instance->CR = tmpreg1;
01053       
01054   /* Disable wave generation */
01055   hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
01056   
01057   /* Change DAC state */
01058   hdac->State = HAL_DAC_STATE_READY;
01059   
01060   /* Process unlocked */
01061   __HAL_UNLOCK(hdac);
01062   
01063   /* Return function status */
01064   return HAL_OK;
01065 }
01066 
01067 /**
01068   * @}
01069   */
01070 
01071 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
01072  *  @brief   Peripheral State and Errors functions 
01073  *
01074 @verbatim   
01075   ==============================================================================
01076             ##### Peripheral State and Errors functions #####
01077   ==============================================================================  
01078     [..]
01079     This subsection provides functions allowing to
01080       (+) Check the DAC state.
01081       (+) Check the DAC Errors.
01082         
01083 @endverbatim
01084   * @{
01085   */
01086 
01087 /**
01088   * @brief  return the DAC handle state
01089   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
01090   *         the configuration information for the specified DAC.
01091   * @retval HAL state
01092   */
01093 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
01094 {
01095   /* Return DAC handle state */
01096   return hdac->State;
01097 }
01098 
01099 
01100 /**
01101   * @brief  Return the DAC error code
01102   * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
01103   *         the configuration information for the specified DAC.
01104   * @retval DAC Error Code
01105   */
01106 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
01107 {
01108   return hdac->ErrorCode;
01109 }
01110 
01111 /**
01112   * @}
01113   */
01114 
01115 /**
01116   * @}
01117   */
01118 
01119 /** @addtogroup DAC_Private_Functions
01120   * @{
01121   */
01122 
01123 /**
01124   * @brief  DMA conversion complete callback. 
01125   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
01126   *                the configuration information for the specified DMA module.
01127   * @retval None
01128   */
01129 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)   
01130 {
01131   DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01132   
01133   HAL_DAC_ConvCpltCallbackCh1(hdac); 
01134   
01135   hdac->State= HAL_DAC_STATE_READY;
01136 }
01137 
01138 /**
01139   * @brief  DMA half transfer complete callback. 
01140   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
01141   *                the configuration information for the specified DMA module.
01142   * @retval None
01143   */
01144 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)   
01145 {
01146     DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01147     /* Conversion complete callback */
01148     HAL_DAC_ConvHalfCpltCallbackCh1(hdac); 
01149 }
01150 
01151 /**
01152   * @brief  DMA error callback 
01153   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
01154   *                the configuration information for the specified DMA module.
01155   * @retval None
01156   */
01157 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)   
01158 {
01159   DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01160     
01161   /* Set DAC error code to DMA error */
01162   hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
01163     
01164   HAL_DAC_ErrorCallbackCh1(hdac); 
01165     
01166   hdac->State= HAL_DAC_STATE_READY;
01167 }
01168 
01169 /**
01170   * @}
01171   */
01172 
01173 #endif /* HAL_DAC_MODULE_ENABLED */
01174 
01175 /**
01176   * @}
01177   */
01178 
01179 /**
01180   * @}
01181   */
01182 
01183 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/