Šolski center Kranj / Mbed 2 deprecated 006-pwm

This program demonstrates the usage of the PWM. Program sets PWM0 chanel 1 and outputs it to the pin P1.2 where we get a PWM signal with a constantly changing working cycle.

Dependencies:   mbed

main.c@0:5942c938ad64, 2015-05-02 (annotated)

Committer:
71GA
Date:
Sat May 02 17:32:07 2015 +0000
Revision:
0:5942c938ad64
This is the first publish of the program.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
71GA 0:5942c938ad64 1 #include "LPC4088-ioconfig.h"
71GA 0:5942c938ad64 2 #include "LPC4088-system.h"
71GA 0:5942c938ad64 3 #include "LPC4088-pwm.h"
71GA 0:5942c938ad64 4
71GA 0:5942c938ad64 5
71GA 0:5942c938ad64 6 //prototipi funkcij
71GA 0:5942c938ad64 7 void delay(void);
71GA 0:5942c938ad64 8
71GA 0:5942c938ad64 9
71GA 0:5942c938ad64 10 int main(){
71GA 0:5942c938ad64 11
71GA 0:5942c938ad64 12 //omogocimo PWM0, ki ob zagonu ni prizgan
71GA 0:5942c938ad64 13 PCONP = PCONP | (0x1<<5);
71GA 0:5942c938ad64 14
71GA 0:5942c938ad64 15 //resetiranje PWM0
71GA 0:5942c938ad64 16 //RSTCON0 = RSTCON0 | (0x1<<5);
71GA 0:5942c938ad64 17
71GA 0:5942c938ad64 18 //nastavitev pina P1.2 kot izhoda PWM0_1 - v headerju zakomentiramo timer PWM1
71GA 0:5942c938ad64 19 IOCON_P1_2 = IOCON_P1_2 & !(0x67F);
71GA 0:5942c938ad64 20 IOCON_P1_2 = IOCON_P1_2 | 0x3;
71GA 0:5942c938ad64 21
71GA 0:5942c938ad64 22 //nastavitev pina P1.18 kot izhoda PWM1_1 - v headerju zakomentiramo timer PWM0
71GA 0:5942c938ad64 23 //IOCON_P1_18 = IOCON_P1_18 & !(0x67F);
71GA 0:5942c938ad64 24 //IOCON_P1_18 = IOCON_P1_18 | 0b010;
71GA 0:5942c938ad64 25
71GA 0:5942c938ad64 26 //pocistimo interrupte za PWM0
71GA 0:5942c938ad64 27 IR = IR | 0x73F;
71GA 0:5942c938ad64 28
71GA 0:5942c938ad64 29 //nastavimo "individual use"
71GA 0:5942c938ad64 30 TCR = TCR & !(1<<4);
71GA 0:5942c938ad64 31
71GA 0:5942c938ad64 32 //nastavimo "Timer mode"
71GA 0:5942c938ad64 33 CTCR = CTCR & !(0x3);
71GA 0:5942c938ad64 34
71GA 0:5942c938ad64 35 //omogočimo PWMx_1 kanal (izhod)
71GA 0:5942c938ad64 36 PCR = PCR | (1<<9);
71GA 0:5942c938ad64 37
71GA 0:5942c938ad64 38 //nastavimo match register MR0 tako, da ob TC == MR0 resetira
71GA 0:5942c938ad64 39 //celotni PWM0. Uporabili bomo kanal PWM0_1 in tega setamo in
71GA 0:5942c938ad64 40 //resetamo z MR0 in MR1 (UM, tabela 556). 1
71GA 0:5942c938ad64 41 MCR = MCR | (1<<1);
71GA 0:5942c938ad64 42 MR0 = 0x7FFFF;
71GA 0:5942c938ad64 43
71GA 0:5942c938ad64 44 //ko so vrednosti vpisane v MR0 in MR1, obe vrednosti omogočimo (istočasno)
71GA 0:5942c938ad64 45 LER = LER | 0x1;
71GA 0:5942c938ad64 46
71GA 0:5942c938ad64 47 //nastavimo "timer mode" in ne "PWM mode" (ne deluje)
71GA 0:5942c938ad64 48 //POZOR! Mora biti za nastavitvijo MR0/MR1
71GA 0:5942c938ad64 49 TCR = TCR & !(1<<3);
71GA 0:5942c938ad64 50
71GA 0:5942c938ad64 51 //vklopimo PWM0 - mora biti za nastavitvijo MR0/MR1
71GA 0:5942c938ad64 52 //POZOR! Mora biti za nastavitvijo MR0/MR1
71GA 0:5942c938ad64 53 TCR = TCR | (1<<0);
71GA 0:5942c938ad64 54
71GA 0:5942c938ad64 55 while(1){
71GA 0:5942c938ad64 56
71GA 0:5942c938ad64 57 int count = 0x7FFFF;
71GA 0:5942c938ad64 58
71GA 0:5942c938ad64 59 while(count){
71GA 0:5942c938ad64 60
71GA 0:5942c938ad64 61 count = count-1;
71GA 0:5942c938ad64 62 delay();
71GA 0:5942c938ad64 63 MR1 = count;
71GA 0:5942c938ad64 64 LER = LER | 0x2;
71GA 0:5942c938ad64 65
71GA 0:5942c938ad64 66 }
71GA 0:5942c938ad64 67
71GA 0:5942c938ad64 68
71GA 0:5942c938ad64 69 }
71GA 0:5942c938ad64 70
71GA 0:5942c938ad64 71 }
71GA 0:5942c938ad64 72
71GA 0:5942c938ad64 73 void delay(void){
71GA 0:5942c938ad64 74 volatile int stej = 100;
71GA 0:5942c938ad64 75 while(stej){
71GA 0:5942c938ad64 76 stej = stej - 1;
71GA 0:5942c938ad64 77 }
71GA 0:5942c938ad64 78 }