Šolski center Kranj / Mbed 2 deprecated 006-pwm

This program demonstrates the usage of the PWM. Program sets PWM0 chanel 1 and outputs it to the pin P1.2 where we get a PWM signal with a constantly changing working cycle.

Dependencies:   mbed

LPC4088-timer.h@0:5942c938ad64, 2015-05-02 (annotated)

Committer:
71GA
Date:
Sat May 02 17:32:07 2015 +0000
Revision:
0:5942c938ad64
This is the first publish of the program.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
71GA 0:5942c938ad64 1 //definicije registrov za periferijo TIMER
71GA 0:5942c938ad64 2
71GA 0:5942c938ad64 3 //timer 0
71GA 0:5942c938ad64 4 /*
71GA 0:5942c938ad64 5 #define IR (*((volatile unsigned int *) 0x40004000))
71GA 0:5942c938ad64 6 #define TCR (*((volatile unsigned int *) 0x40004004))
71GA 0:5942c938ad64 7 #define TC (*((volatile unsigned int *) 0x40004008))
71GA 0:5942c938ad64 8 #define PR (*((volatile unsigned int *) 0x4000400C))
71GA 0:5942c938ad64 9 #define PC (*((volatile unsigned int *) 0x40004010))
71GA 0:5942c938ad64 10 #define MCR (*((volatile unsigned int *) 0x40004014))
71GA 0:5942c938ad64 11 #define MR0 (*((volatile unsigned int *) 0x40004018))
71GA 0:5942c938ad64 12 #define MR1 (*((volatile unsigned int *) 0x4000401C))
71GA 0:5942c938ad64 13 #define MR2 (*((volatile unsigned int *) 0x40004020))
71GA 0:5942c938ad64 14 #define MR3 (*((volatile unsigned int *) 0x40004024))
71GA 0:5942c938ad64 15 #define CCR (*((volatile unsigned int *) 0x40004028))
71GA 0:5942c938ad64 16 #define CR0 (*((volatile unsigned int *) 0x4000402C))
71GA 0:5942c938ad64 17 #define CR1 (*((volatile unsigned int *) 0x40004030))
71GA 0:5942c938ad64 18 #define EMR (*((volatile unsigned int *) 0x4000403C))
71GA 0:5942c938ad64 19 #define CTCR (*((volatile unsigned int *) 0x40004070))
71GA 0:5942c938ad64 20 */
71GA 0:5942c938ad64 21
71GA 0:5942c938ad64 22 //timer 1
71GA 0:5942c938ad64 23 /*
71GA 0:5942c938ad64 24 #define IR (*((volatile unsigned int *) 0x40008000))
71GA 0:5942c938ad64 25 #define TCR (*((volatile unsigned int *) 0x40008004))
71GA 0:5942c938ad64 26 #define TC (*((volatile unsigned int *) 0x40008008))
71GA 0:5942c938ad64 27 #define PR (*((volatile unsigned int *) 0x4000800C))
71GA 0:5942c938ad64 28 #define PC (*((volatile unsigned int *) 0x40008010))
71GA 0:5942c938ad64 29 #define MCR (*((volatile unsigned int *) 0x40008014))
71GA 0:5942c938ad64 30 #define MR0 (*((volatile unsigned int *) 0x40008018))
71GA 0:5942c938ad64 31 #define MR1 (*((volatile unsigned int *) 0x4000801C))
71GA 0:5942c938ad64 32 #define MR2 (*((volatile unsigned int *) 0x40008020))
71GA 0:5942c938ad64 33 #define MR3 (*((volatile unsigned int *) 0x40008024))
71GA 0:5942c938ad64 34 #define CCR (*((volatile unsigned int *) 0x40008028))
71GA 0:5942c938ad64 35 #define CR0 (*((volatile unsigned int *) 0x4000802C))
71GA 0:5942c938ad64 36 #define CR1 (*((volatile unsigned int *) 0x40008030))
71GA 0:5942c938ad64 37 #define EMR (*((volatile unsigned int *) 0x4000803C))
71GA 0:5942c938ad64 38 #define CTCR (*((volatile unsigned int *) 0x40008070))
71GA 0:5942c938ad64 39 */
71GA 0:5942c938ad64 40
71GA 0:5942c938ad64 41 //timer 2
71GA 0:5942c938ad64 42 #define IR (*((volatile unsigned int *) 0x40090000))
71GA 0:5942c938ad64 43 #define TCR (*((volatile unsigned int *) 0x40090004))
71GA 0:5942c938ad64 44 #define TC (*((volatile unsigned int *) 0x40090008))
71GA 0:5942c938ad64 45 #define PR (*((volatile unsigned int *) 0x4009000C))
71GA 0:5942c938ad64 46 #define PC (*((volatile unsigned int *) 0x40090010))
71GA 0:5942c938ad64 47 #define MCR (*((volatile unsigned int *) 0x40090014))
71GA 0:5942c938ad64 48 #define MR0 (*((volatile unsigned int *) 0x40090018))
71GA 0:5942c938ad64 49 #define MR1 (*((volatile unsigned int *) 0x4009001C))
71GA 0:5942c938ad64 50 #define MR2 (*((volatile unsigned int *) 0x40090020))
71GA 0:5942c938ad64 51 #define MR3 (*((volatile unsigned int *) 0x40090024))
71GA 0:5942c938ad64 52 #define CCR (*((volatile unsigned int *) 0x40090028))
71GA 0:5942c938ad64 53 #define CR0 (*((volatile unsigned int *) 0x4009002C))
71GA 0:5942c938ad64 54 #define CR1 (*((volatile unsigned int *) 0x40090030))
71GA 0:5942c938ad64 55 #define EMR (*((volatile unsigned int *) 0x4009003C))
71GA 0:5942c938ad64 56 #define CTCR (*((volatile unsigned int *) 0x40090070))
71GA 0:5942c938ad64 57
71GA 0:5942c938ad64 58
71GA 0:5942c938ad64 59 //timer 3
71GA 0:5942c938ad64 60 /*
71GA 0:5942c938ad64 61 #define IR (*((volatile unsigned int *) 0x40094000))
71GA 0:5942c938ad64 62 #define TCR (*((volatile unsigned int *) 0x40094004))
71GA 0:5942c938ad64 63 #define TC (*((volatile unsigned int *) 0x40094008))
71GA 0:5942c938ad64 64 #define PR (*((volatile unsigned int *) 0x4009400C))
71GA 0:5942c938ad64 65 #define PC (*((volatile unsigned int *) 0x40094010))
71GA 0:5942c938ad64 66 #define MCR (*((volatile unsigned int *) 0x40094014))
71GA 0:5942c938ad64 67 #define MR0 (*((volatile unsigned int *) 0x40094018))
71GA 0:5942c938ad64 68 #define MR1 (*((volatile unsigned int *) 0x4009401C))
71GA 0:5942c938ad64 69 #define MR2 (*((volatile unsigned int *) 0x40094020))
71GA 0:5942c938ad64 70 #define MR3 (*((volatile unsigned int *) 0x40094024))
71GA 0:5942c938ad64 71 #define CCR (*((volatile unsigned int *) 0x40094028))
71GA 0:5942c938ad64 72 #define CR0 (*((volatile unsigned int *) 0x4009402C))
71GA 0:5942c938ad64 73 #define CR1 (*((volatile unsigned int *) 0x40094030))
71GA 0:5942c938ad64 74 #define EMR (*((volatile unsigned int *) 0x4009403C))
71GA 0:5942c938ad64 75 #define CTCR (*((volatile unsigned int *) 0x40094070))
71GA 0:5942c938ad64 76 */