Šolski center Kranj / Mbed 2 deprecated 004-timer

Program which demonstrates the usage of the TIMER peripheral. Program sets TIMER 2 to blink the LED on the pin P0.9. This is a more sophisticated way of blinking an LED.

Dependencies:   mbed

LPC4088-timer.h@0:e83c998e1cfd, 2015-05-02 (annotated)

Committer:
71GA
Date:
Sat May 02 17:25:32 2015 +0000
Revision:
0:e83c998e1cfd
First commit of this program.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
71GA 0:e83c998e1cfd 1 //definicije registrov za periferijo TIMER
71GA 0:e83c998e1cfd 2
71GA 0:e83c998e1cfd 3 //timer 0
71GA 0:e83c998e1cfd 4 /*
71GA 0:e83c998e1cfd 5 #define IR (*((volatile unsigned int *) 0x40004000))
71GA 0:e83c998e1cfd 6 #define TCR (*((volatile unsigned int *) 0x40004004))
71GA 0:e83c998e1cfd 7 #define TC (*((volatile unsigned int *) 0x40004008))
71GA 0:e83c998e1cfd 8 #define PR (*((volatile unsigned int *) 0x4000400C))
71GA 0:e83c998e1cfd 9 #define PC (*((volatile unsigned int *) 0x40004010))
71GA 0:e83c998e1cfd 10 #define MCR (*((volatile unsigned int *) 0x40004014))
71GA 0:e83c998e1cfd 11 #define MR0 (*((volatile unsigned int *) 0x40004018))
71GA 0:e83c998e1cfd 12 #define MR1 (*((volatile unsigned int *) 0x4000401C))
71GA 0:e83c998e1cfd 13 #define MR2 (*((volatile unsigned int *) 0x40004020))
71GA 0:e83c998e1cfd 14 #define MR3 (*((volatile unsigned int *) 0x40004024))
71GA 0:e83c998e1cfd 15 #define CCR (*((volatile unsigned int *) 0x40004028))
71GA 0:e83c998e1cfd 16 #define CR0 (*((volatile unsigned int *) 0x4000402C))
71GA 0:e83c998e1cfd 17 #define CR1 (*((volatile unsigned int *) 0x40004030))
71GA 0:e83c998e1cfd 18 #define EMR (*((volatile unsigned int *) 0x4000403C))
71GA 0:e83c998e1cfd 19 #define CTCR (*((volatile unsigned int *) 0x40004070))
71GA 0:e83c998e1cfd 20 */
71GA 0:e83c998e1cfd 21
71GA 0:e83c998e1cfd 22 //timer 1
71GA 0:e83c998e1cfd 23 /*
71GA 0:e83c998e1cfd 24 #define IR (*((volatile unsigned int *) 0x40008000))
71GA 0:e83c998e1cfd 25 #define TCR (*((volatile unsigned int *) 0x40008004))
71GA 0:e83c998e1cfd 26 #define TC (*((volatile unsigned int *) 0x40008008))
71GA 0:e83c998e1cfd 27 #define PR (*((volatile unsigned int *) 0x4000800C))
71GA 0:e83c998e1cfd 28 #define PC (*((volatile unsigned int *) 0x40008010))
71GA 0:e83c998e1cfd 29 #define MCR (*((volatile unsigned int *) 0x40008014))
71GA 0:e83c998e1cfd 30 #define MR0 (*((volatile unsigned int *) 0x40008018))
71GA 0:e83c998e1cfd 31 #define MR1 (*((volatile unsigned int *) 0x4000801C))
71GA 0:e83c998e1cfd 32 #define MR2 (*((volatile unsigned int *) 0x40008020))
71GA 0:e83c998e1cfd 33 #define MR3 (*((volatile unsigned int *) 0x40008024))
71GA 0:e83c998e1cfd 34 #define CCR (*((volatile unsigned int *) 0x40008028))
71GA 0:e83c998e1cfd 35 #define CR0 (*((volatile unsigned int *) 0x4000802C))
71GA 0:e83c998e1cfd 36 #define CR1 (*((volatile unsigned int *) 0x40008030))
71GA 0:e83c998e1cfd 37 #define EMR (*((volatile unsigned int *) 0x4000803C))
71GA 0:e83c998e1cfd 38 #define CTCR (*((volatile unsigned int *) 0x40008070))
71GA 0:e83c998e1cfd 39 */
71GA 0:e83c998e1cfd 40
71GA 0:e83c998e1cfd 41 //timer 2
71GA 0:e83c998e1cfd 42 #define IR (*((volatile unsigned int *) 0x40090000))
71GA 0:e83c998e1cfd 43 #define TCR (*((volatile unsigned int *) 0x40090004))
71GA 0:e83c998e1cfd 44 #define TC (*((volatile unsigned int *) 0x40090008))
71GA 0:e83c998e1cfd 45 #define PR (*((volatile unsigned int *) 0x4009000C))
71GA 0:e83c998e1cfd 46 #define PC (*((volatile unsigned int *) 0x40090010))
71GA 0:e83c998e1cfd 47 #define MCR (*((volatile unsigned int *) 0x40090014))
71GA 0:e83c998e1cfd 48 #define MR0 (*((volatile unsigned int *) 0x40090018))
71GA 0:e83c998e1cfd 49 #define MR1 (*((volatile unsigned int *) 0x4009001C))
71GA 0:e83c998e1cfd 50 #define MR2 (*((volatile unsigned int *) 0x40090020))
71GA 0:e83c998e1cfd 51 #define MR3 (*((volatile unsigned int *) 0x40090024))
71GA 0:e83c998e1cfd 52 #define CCR (*((volatile unsigned int *) 0x40090028))
71GA 0:e83c998e1cfd 53 #define CR0 (*((volatile unsigned int *) 0x4009002C))
71GA 0:e83c998e1cfd 54 #define CR1 (*((volatile unsigned int *) 0x40090030))
71GA 0:e83c998e1cfd 55 #define EMR (*((volatile unsigned int *) 0x4009003C))
71GA 0:e83c998e1cfd 56 #define CTCR (*((volatile unsigned int *) 0x40090070))
71GA 0:e83c998e1cfd 57
71GA 0:e83c998e1cfd 58
71GA 0:e83c998e1cfd 59 //timer 3
71GA 0:e83c998e1cfd 60 /*
71GA 0:e83c998e1cfd 61 #define IR (*((volatile unsigned int *) 0x40094000))
71GA 0:e83c998e1cfd 62 #define TCR (*((volatile unsigned int *) 0x40094004))
71GA 0:e83c998e1cfd 63 #define TC (*((volatile unsigned int *) 0x40094008))
71GA 0:e83c998e1cfd 64 #define PR (*((volatile unsigned int *) 0x4009400C))
71GA 0:e83c998e1cfd 65 #define PC (*((volatile unsigned int *) 0x40094010))
71GA 0:e83c998e1cfd 66 #define MCR (*((volatile unsigned int *) 0x40094014))
71GA 0:e83c998e1cfd 67 #define MR0 (*((volatile unsigned int *) 0x40094018))
71GA 0:e83c998e1cfd 68 #define MR1 (*((volatile unsigned int *) 0x4009401C))
71GA 0:e83c998e1cfd 69 #define MR2 (*((volatile unsigned int *) 0x40094020))
71GA 0:e83c998e1cfd 70 #define MR3 (*((volatile unsigned int *) 0x40094024))
71GA 0:e83c998e1cfd 71 #define CCR (*((volatile unsigned int *) 0x40094028))
71GA 0:e83c998e1cfd 72 #define CR0 (*((volatile unsigned int *) 0x4009402C))
71GA 0:e83c998e1cfd 73 #define CR1 (*((volatile unsigned int *) 0x40094030))
71GA 0:e83c998e1cfd 74 #define EMR (*((volatile unsigned int *) 0x4009403C))
71GA 0:e83c998e1cfd 75 #define CTCR (*((volatile unsigned int *) 0x40094070))
71GA 0:e83c998e1cfd 76 */