Program which demonstrates the usage of the IOCONFIG & GPIO peripherals. Program only blinks the LED based on the primitive delay function which only makes microprocessor busy for some time. Source code is split - we keep register definitions in header files away from the main source file.
Dependencies: mbed
LPC4088-gpio.h@0:2636b9dea739, 2015-05-02 (annotated)
- Committer:
- 71GA
- Date:
- Sat May 02 17:17:05 2015 +0000
- Revision:
- 0:2636b9dea739
First commit for this program.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
71GA | 0:2636b9dea739 | 1 | //definicija registrov za periferijo GPIO |
71GA | 0:2636b9dea739 | 2 | |
71GA | 0:2636b9dea739 | 3 | //GPIO |
71GA | 0:2636b9dea739 | 4 | #define DIR0 (*((volatile unsigned int *) 0x20098000)) //Port0 |
71GA | 0:2636b9dea739 | 5 | #define MASK0 (*((volatile unsigned int *) 0x20098010)) |
71GA | 0:2636b9dea739 | 6 | #define PIN0 (*((volatile unsigned int *) 0x20098014)) |
71GA | 0:2636b9dea739 | 7 | #define SET0 (*((volatile unsigned int *) 0x20098018)) |
71GA | 0:2636b9dea739 | 8 | #define CLR0 (*((volatile unsigned int *) 0x2009801C)) |
71GA | 0:2636b9dea739 | 9 | |
71GA | 0:2636b9dea739 | 10 | #define DIR1 (*((volatile unsigned int *) 0x20098020)) //Port1 |
71GA | 0:2636b9dea739 | 11 | #define MASK1 (*((volatile unsigned int *) 0x20098030)) |
71GA | 0:2636b9dea739 | 12 | #define PIN1 (*((volatile unsigned int *) 0x20098034)) |
71GA | 0:2636b9dea739 | 13 | #define SET1 (*((volatile unsigned int *) 0x20098038)) |
71GA | 0:2636b9dea739 | 14 | #define CLR1 (*((volatile unsigned int *) 0x2009803C)) |
71GA | 0:2636b9dea739 | 15 | |
71GA | 0:2636b9dea739 | 16 | #define DIR2 (*((volatile unsigned int *) 0x20098040)) //Port2 |
71GA | 0:2636b9dea739 | 17 | #define MASK2 (*((volatile unsigned int *) 0x20098050)) |
71GA | 0:2636b9dea739 | 18 | #define PIN2 (*((volatile unsigned int *) 0x20098054)) |
71GA | 0:2636b9dea739 | 19 | #define SET2 (*((volatile unsigned int *) 0x20098058)) |
71GA | 0:2636b9dea739 | 20 | #define CLR2 (*((volatile unsigned int *) 0x2009805C)) |
71GA | 0:2636b9dea739 | 21 | |
71GA | 0:2636b9dea739 | 22 | #define DIR3 (*((volatile unsigned int *) 0x20098060)) //Port3 |
71GA | 0:2636b9dea739 | 23 | #define MASK3 (*((volatile unsigned int *) 0x20098070)) |
71GA | 0:2636b9dea739 | 24 | #define PIN3 (*((volatile unsigned int *) 0x20098074)) |
71GA | 0:2636b9dea739 | 25 | #define SET3 (*((volatile unsigned int *) 0x20098078)) |
71GA | 0:2636b9dea739 | 26 | #define CLR3 (*((volatile unsigned int *) 0x2009807C)) |
71GA | 0:2636b9dea739 | 27 | |
71GA | 0:2636b9dea739 | 28 | #define DIR4 (*((volatile unsigned int *) 0x20098080)) //Port4 |
71GA | 0:2636b9dea739 | 29 | #define MASK4 (*((volatile unsigned int *) 0x20098090)) |
71GA | 0:2636b9dea739 | 30 | #define PIN4 (*((volatile unsigned int *) 0x20098094)) |
71GA | 0:2636b9dea739 | 31 | #define SET4 (*((volatile unsigned int *) 0x20098098)) |
71GA | 0:2636b9dea739 | 32 | #define CLR4 (*((volatile unsigned int *) 0x2009809C)) |
71GA | 0:2636b9dea739 | 33 | |
71GA | 0:2636b9dea739 | 34 | #define DIR5 (*((volatile unsigned int *) 0x200980A0)) //Port5 |
71GA | 0:2636b9dea739 | 35 | #define MASK5 (*((volatile unsigned int *) 0x200980B0)) |
71GA | 0:2636b9dea739 | 36 | #define PIN5 (*((volatile unsigned int *) 0x200980B4)) |
71GA | 0:2636b9dea739 | 37 | #define SET5 (*((volatile unsigned int *) 0x200980B8)) |
71GA | 0:2636b9dea739 | 38 | #define CLR5 (*((volatile unsigned int *) 0x200980BC)) |
71GA | 0:2636b9dea739 | 39 | |
71GA | 0:2636b9dea739 | 40 | |
71GA | 0:2636b9dea739 | 41 | //GPIO interrupts |
71GA | 0:2636b9dea739 | 42 | #define int_STATUS (*((volatile unsigned int *) 0x40028080)) |
71GA | 0:2636b9dea739 | 43 | #define int_STATR0 (*((volatile unsigned int *) 0x40028084)) |
71GA | 0:2636b9dea739 | 44 | #define int_STATF0 (*((volatile unsigned int *) 0x40028088)) |
71GA | 0:2636b9dea739 | 45 | #define int_CLR0 (*((volatile unsigned int *) 0x4002808C)) |
71GA | 0:2636b9dea739 | 46 | #define int_ENR0 (*((volatile unsigned int *) 0x40028090)) |
71GA | 0:2636b9dea739 | 47 | #define int_ENF0 (*((volatile unsigned int *) 0x40028094)) |
71GA | 0:2636b9dea739 | 48 | #define int_STATR2 (*((volatile unsigned int *) 0x400280A4)) |
71GA | 0:2636b9dea739 | 49 | #define int_STATF2 (*((volatile unsigned int *) 0x400280A8)) |
71GA | 0:2636b9dea739 | 50 | #define int_CLR2 (*((volatile unsigned int *) 0x400280AC)) |
71GA | 0:2636b9dea739 | 51 | #define int_ENR2 (*((volatile unsigned int *) 0x400280B0)) |
71GA | 0:2636b9dea739 | 52 | #define int_ENF2 (*((volatile unsigned int *) 0x400280B4)) |