transceiver.h

00001 /* Copyright (c) 2007 Axel Wachtler
00002    All rights reserved.
00003 
00004    Redistribution and use in source and binary forms, with or without
00005    modification, are permitted provided that the following conditions
00006    are met:
00007 
00008    * Redistributions of source code must retain the above copyright
00009      notice, this list of conditions and the following disclaimer.
00010    * Redistributions in binary form must reproduce the above copyright
00011      notice, this list of conditions and the following disclaimer in the
00012      documentation and/or other materials provided with the distribution.
00013    * Neither the name of the authors nor the names of its contributors
00014      may be used to endorse or promote products derived from this software
00015      without specific prior written permission.
00016 
00017    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00018    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00021    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00022    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00023    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00025    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00026    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00027    POSSIBILITY OF SUCH DAMAGE. */
00028 
00029 /* $Id$ */
00030 /**
00031  * @file
00032  * @brief Interface for @ref grpTrx.
00033  * @ingroup grpTrx
00034  */
00035 #ifndef TRANSCEIVER_H
00036 #define TRANSCEIVER_H
00037 
00038 /**
00039  *  @addtogroup grpTrx
00040  *  @{
00041  */
00042 
00043 /* === Includes ============================================================== */
00044 #include "board.h"
00045 
00046 #include <stdbool.h>
00047 
00048 /* === Externals ============================================================= */
00049 
00050 /* === Types ================================================================= */
00051 
00052 #if defined(DOXYGEN)
00053 
00054     /* this types are defined in at86rfXXX.{h,txt} in order
00055        to provide a radio abstraction */
00056 
00057     /** Data Type for Transceiver SRAM address
00058      */
00059     typedef uint8_t trx_ramaddr_t;
00060 
00061     /** Data Type for Transceiver register value
00062      */
00063     typedef uint8_t trx_regval_t;
00064 
00065     /** Data Type for Transceiver register address
00066      */
00067     typedef uint8_t trx_regaddr_t;
00068 
00069 #endif
00070 
00071 /** Data Type for Transceiver IRQ callback function
00072  */
00073 typedef void (*trx_irq_handler_t)(uint8_t cause);
00074 
00075 
00076 
00077 /* === Macros ================================================================ */
00078 /* error codes */
00079 /** trx function succeeded */
00080 #define TRX_OK        (0)
00081 /** trx init function failed (TRX_OFF not reached after reset) */
00082 #define TRX_INIT_FAIL (1)
00083 /** trx pll check function failed (PLL_LOCK coult not be observed in PLL_ON) */
00084 #define TRX_PLL_FAIL  (2)
00085 
00086 #define INVALID_PART_NUM (2)  /**< flag for invalid part number */
00087 #define INVALID_REV_NUM  (1)  /**< flag for invalid revision number */
00088 
00089 /* Data Rate macros, generated by python Tools/cmdhash.py  `cat rates.txt` */
00090 #define BPSK20 (0x52)
00091 #define BPSK20_STR "BPSK20"
00092 #define BPSK40 (0x92)
00093 #define BPSK40_STR "BPSK40"
00094 #define OQPSK100 (0x90)
00095 #define OQPSK100_STR "OQPSK100"
00096 #define OQPSK200 (0x93)
00097 #define OQPSK200_STR "OQPSK200"
00098 #define OQPSK250 (0x33)
00099 #define OQPSK250_STR "OQPSK250"
00100 #define OQPSK400 (0x95)
00101 #define OQPSK400_STR "OQPSK400"
00102 #define OQPSK500 (0x94)
00103 #define OQPSK500_STR "OQPSK500"
00104 #define OQPSK1000 (0x34)
00105 #define OQPSK1000_STR "OQPSK1000"
00106 #define OQPSK2000 (0x54)
00107 #define OQPSK2000_STR "OQPSK2000"
00108 
00109 #define RATE_NONE (0xFF)
00110 
00111 /** Maximum size in bytes of an IEEE 802.15.4 frame */
00112 #ifndef MAX_FRAME_SIZE
00113 # define MAX_FRAME_SIZE (127)
00114 #endif
00115 
00116 /* channel handling */
00117 #define TRX_NEXT_CHANNEL(x) ((channel_t)(x+1) > TRX_MAX_CHANNEL ? TRX_MAX_CHANNEL : x+1)
00118 #define TRX_PREV_CHANNEL(x) ((channel_t)(x-1) < TRX_MIN_CHANNEL ? TRX_MIN_CHANNEL : x-1)
00119 #define TRX_NEXT_CHANNEL_WRAP(x) ((channel_t)(x+1) > TRX_MAX_CHANNEL ? TRX_MIN_CHANNEL : x+1 )
00120 #define TRX_PREV_CHANNEL_WRAP(x) ((channel_t)(x-1) < TRX_MIN_CHANNEL ? TRX_MAX_CHANNEL : x-1 )
00121 
00122 
00123 #if defined (SR_MASK_AMI) || defined(DOXYGEN)
00124 /** @brief Enable AMI IRQ. */
00125 # define TRX_IRQ_AMI_EI() trx_bit_write(SR_MASK_AMI, 1);
00126 /** @brief Disable AMI IRQ. */
00127 # define TRX_IRQ_AMI_DI() trx_bit_write(SR_MASK_AMI, 0);
00128 #endif
00129 
00130 #if defined (SR_MASK_BAT_LOW) || defined(DOXYGEN)
00131 /** @brief Enable BAT_LOW IRQ. */
00132 # define TRX_IRQ_BAT_LOW_EI() trx_bit_write(SR_MASK_BAT_LOW, 1);
00133 /** @brief Disable BAT_LOW IRQ. */
00134 # define TRX_IRQ_BAT_LOW_DI() trx_bit_write(SR_MASK_BAT_LOW, 0);
00135 #endif
00136 
00137 #if defined (SR_MASK_CCA_ED_READY) || defined(DOXYGEN)
00138 /** @brief Enable CCA_ED_READY IRQ. */
00139 # define TRX_IRQ_CCA_ED_READY_EI() trx_bit_write(SR_MASK_CCA_ED_READY, 1);
00140 /** @brief Disable CCA_ED_READY IRQ. */
00141 # define TRX_IRQ_CCA_ED_READY_DI() trx_bit_write(SR_MASK_CCA_ED_READY, 0);
00142 #endif
00143 
00144 #if defined (SR_MASK_PLL_UNLOCK) || defined(DOXYGEN)
00145 /** @brief Enable PLL_UNLOCK IRQ. */
00146 # define TRX_IRQ_PLL_UNLOCK_EI() trx_bit_write(SR_MASK_PLL_UNLOCK, 1);
00147 /** @brief Disable PLL_UNLOCK IRQ. */
00148 # define TRX_IRQ_PLL_UNLOCK_DI() trx_bit_write(SR_MASK_PLL_UNLOCK, 0);
00149 #endif
00150 
00151 #if defined (SR_MASK_RX_START) || defined(DOXYGEN)
00152 /** @brief Enable RX_START IRQ. */
00153 # define TRX_IRQ_RX_START_EI() trx_bit_write(SR_MASK_RX_START, 1);
00154 /** @brief Disable RX_START IRQ. */
00155 # define TRX_IRQ_RX_START_DI() trx_bit_write(SR_MASK_RX_START, 0);
00156 #endif
00157 
00158 #if defined (SR_MASK_TRX_IRQ_END) || defined(DOXYGEN)
00159 /** @brief Enable TRX_IRQ_END IRQ. */
00160 # define TRX_IRQ_TRX_IRQ_END_EI() trx_bit_write(SR_MASK_TRX_IRQ_END, 1);
00161 /** @brief Disable TRX_IRQ_END IRQ. */
00162 # define TRX_IRQ_TRX_IRQ_END_DI() trx_bit_write(SR_MASK_TRX_IRQ_END, 0);
00163 #endif
00164 
00165 #if defined (SR_MASK_TRX_IRQ_START) || defined(DOXYGEN)
00166 /** @brief Enable TRX_IRQ_START IRQ. */
00167 # define TRX_IRQ_TRX_IRQ_START_EI() trx_bit_write(SR_MASK_TRX_IRQ_START, 1);
00168 /** @brief Disable TRX_IRQ_START IRQ. */
00169 # define TRX_IRQ_TRX_IRQ_START_DI() trx_bit_write(SR_MASK_TRX_IRQ_START, 0);
00170 #endif
00171 
00172 #if defined (SR_MASK_UR) || defined(DOXYGEN)
00173 /** @brief Enable TX/RX underun IRQ. */
00174 # define TRX_IRQ_UR_EI() trx_bit_write(SR_MASK_UR, 1);
00175 /** @brief Disable TX/RX underun IRQ. */
00176 # define TRX_IRQ_UR_DI() trx_bit_write(SR_MASK_UR, 0);
00177 #endif
00178 
00179 /**
00180  *  @}
00181  */
00182 #endif /* TRANSCEIVER_H */