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Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.c@188:60408c49b6d4, 2018-09-20 (annotated)

Committer:
WaleedElmughrabi
Date:
Thu Sep 20 16:11:23 2018 +0000
Revision:
188:60408c49b6d4
Parent:
182:a56a73fd2a6f 
Fork modified for BG96 error

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_rtc.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief RTC HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the Real Time Clock (RTC) peripheral:
<> 144:ef7eb2e8f9f7 8 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 9 * + RTC Time and Date functions
<> 144:ef7eb2e8f9f7 10 * + RTC Alarm functions
<> 144:ef7eb2e8f9f7 11 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 12 * + Peripheral State functions
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 @verbatim
<> 144:ef7eb2e8f9f7 15 ==============================================================================
<> 144:ef7eb2e8f9f7 16 ##### Backup Domain Operating Condition #####
<> 144:ef7eb2e8f9f7 17 ==============================================================================
<> 144:ef7eb2e8f9f7 18 [..] The real-time clock (RTC), the RTC backup registers, and the backup
<> 144:ef7eb2e8f9f7 19 SRAM (BKP SRAM) can be powered from the VBAT voltage when the main
<> 144:ef7eb2e8f9f7 20 VDD supply is powered off.
<> 144:ef7eb2e8f9f7 21 To retain the content of the RTC backup registers, backup SRAM, and supply
<> 144:ef7eb2e8f9f7 22 the RTC when VDD is turned off, VBAT pin can be connected to an optional
<> 144:ef7eb2e8f9f7 23 standby voltage supplied by a battery or by another source.
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 [..] To allow the RTC operating even when the main digital supply (VDD) is turned
<> 144:ef7eb2e8f9f7 26 off, the VBAT pin powers the following blocks:
<> 144:ef7eb2e8f9f7 27 (#) The RTC
<> 144:ef7eb2e8f9f7 28 (#) The LSE oscillator
<> 144:ef7eb2e8f9f7 29 (#) The backup SRAM when the low power backup regulator is enabled
<> 144:ef7eb2e8f9f7 30 (#) PC13 to PC15 I/Os, plus PI8 I/O (when available)
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 [..] When the backup domain is supplied by VDD (analog switch connected to VDD),
<> 144:ef7eb2e8f9f7 33 the following pins are available:
<> 144:ef7eb2e8f9f7 34 (#) PC14 and PC15 can be used as either GPIO or LSE pins
<> 144:ef7eb2e8f9f7 35 (#) PC13 can be used as a GPIO or as the RTC_AF1 pin
<> 144:ef7eb2e8f9f7 36 (#) PI8 can be used as a GPIO or as the RTC_AF2 pin
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 [..] When the backup domain is supplied by VBAT (analog switch connected to VBAT
<> 144:ef7eb2e8f9f7 39 because VDD is not present), the following pins are available:
<> 144:ef7eb2e8f9f7 40 (#) PC14 and PC15 can be used as LSE pins only
<> 144:ef7eb2e8f9f7 41 (#) PC13 can be used as the RTC_AF1 pin
<> 144:ef7eb2e8f9f7 42 (#) PI8 can be used as the RTC_AF2 pin
<> 144:ef7eb2e8f9f7 43 (#) PC1 can be used as the RTC_AF3 pin
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 ##### Backup Domain Reset #####
<> 144:ef7eb2e8f9f7 46 ==================================================================
<> 144:ef7eb2e8f9f7 47 [..] The backup domain reset sets all RTC registers and the RCC_BDCR register
<> 144:ef7eb2e8f9f7 48 to their reset values. The BKPSRAM is not affected by this reset. The only
<> 144:ef7eb2e8f9f7 49 way to reset the BKPSRAM is through the Flash interface by requesting
<> 144:ef7eb2e8f9f7 50 a protection level change from 1 to 0.
<> 144:ef7eb2e8f9f7 51 [..] A backup domain reset is generated when one of the following events occurs:
<> 144:ef7eb2e8f9f7 52 (#) Software reset, triggered by setting the BDRST bit in the
<> 144:ef7eb2e8f9f7 53 RCC Backup domain control register (RCC_BDCR).
<> 144:ef7eb2e8f9f7 54 (#) VDD or VBAT power on, if both supplies have previously been powered off.
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 ##### Backup Domain Access #####
<> 144:ef7eb2e8f9f7 57 ==================================================================
<> 144:ef7eb2e8f9f7 58 [..] After reset, the backup domain (RTC registers, RTC backup data
<> 144:ef7eb2e8f9f7 59 registers and backup SRAM) is protected against possible unwanted write
<> 144:ef7eb2e8f9f7 60 accesses.
<> 144:ef7eb2e8f9f7 61 [..] To enable access to the RTC Domain and RTC registers, proceed as follows:
<> 144:ef7eb2e8f9f7 62 (+) Enable the Power Controller (PWR) APB1 interface clock using the
<> 144:ef7eb2e8f9f7 63 __HAL_RCC_PWR_CLK_ENABLE() function.
<> 144:ef7eb2e8f9f7 64 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
<> 144:ef7eb2e8f9f7 65 (+) Select the RTC clock source using the __HAL_RCC_RTC_CONFIG() function.
<> 144:ef7eb2e8f9f7 66 (+) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() function.
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 70 ==================================================================
<> 144:ef7eb2e8f9f7 71 [..]
<> 144:ef7eb2e8f9f7 72 (+) Enable the RTC domain access (see description in the section above).
<> 144:ef7eb2e8f9f7 73 (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
<> 144:ef7eb2e8f9f7 74 format using the HAL_RTC_Init() function.
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 *** Time and Date configuration ***
<> 144:ef7eb2e8f9f7 77 ===================================
<> 144:ef7eb2e8f9f7 78 [..]
<> 144:ef7eb2e8f9f7 79 (+) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime()
<> 144:ef7eb2e8f9f7 80 and HAL_RTC_SetDate() functions.
<> 144:ef7eb2e8f9f7 81 (+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions.
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 *** Alarm configuration ***
<> 144:ef7eb2e8f9f7 84 ===========================
<> 144:ef7eb2e8f9f7 85 [..]
<> 144:ef7eb2e8f9f7 86 (+) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function.
<> 144:ef7eb2e8f9f7 87 You can also configure the RTC Alarm with interrupt mode using the HAL_RTC_SetAlarm_IT() function.
<> 144:ef7eb2e8f9f7 88 (+) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function.
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 ##### RTC and low power modes #####
<> 144:ef7eb2e8f9f7 91 ==================================================================
<> 144:ef7eb2e8f9f7 92 [..] The MCU can be woken up from a low power mode by an RTC alternate
<> 144:ef7eb2e8f9f7 93 function.
<> 144:ef7eb2e8f9f7 94 [..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B),
<> 144:ef7eb2e8f9f7 95 RTC wakeup, RTC tamper event detection and RTC time stamp event detection.
<> 144:ef7eb2e8f9f7 96 These RTC alternate functions can wake up the system from the Stop and
<> 144:ef7eb2e8f9f7 97 Standby low power modes.
<> 144:ef7eb2e8f9f7 98 [..] The system can also wake up from low power modes without depending
<> 144:ef7eb2e8f9f7 99 on an external interrupt (Auto-wakeup mode), by using the RTC alarm
<> 144:ef7eb2e8f9f7 100 or the RTC wakeup events.
<> 144:ef7eb2e8f9f7 101 [..] The RTC provides a programmable time base for waking up from the
<> 144:ef7eb2e8f9f7 102 Stop or Standby mode at regular intervals.
<> 144:ef7eb2e8f9f7 103 Wakeup from STOP and STANDBY modes is possible only when the RTC clock source
<> 144:ef7eb2e8f9f7 104 is LSE or LSI.
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 @endverbatim
<> 144:ef7eb2e8f9f7 107 ******************************************************************************
<> 144:ef7eb2e8f9f7 108 * @attention
<> 144:ef7eb2e8f9f7 109 *
AnnaBridge 168:9672193075cf 110 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 111 *
<> 144:ef7eb2e8f9f7 112 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 113 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 114 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 115 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 116 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 117 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 118 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 119 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 120 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 121 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 122 *
<> 144:ef7eb2e8f9f7 123 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 124 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 125 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 126 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 127 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 128 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 129 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 130 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 131 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 132 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 133 *
<> 144:ef7eb2e8f9f7 134 ******************************************************************************
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 138 #include "stm32f7xx_hal.h"
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 141 * @{
<> 144:ef7eb2e8f9f7 142 */
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 /** @defgroup RTC RTC
<> 144:ef7eb2e8f9f7 145 * @brief RTC HAL module driver
<> 144:ef7eb2e8f9f7 146 * @{
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 #ifdef HAL_RTC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 152 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 153 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 154 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 155 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 156 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 /** @defgroup RTC_Exported_Functions RTC Exported Functions
<> 144:ef7eb2e8f9f7 159 * @{
<> 144:ef7eb2e8f9f7 160 */
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /** @defgroup RTC_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 163 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 164 *
<> 144:ef7eb2e8f9f7 165 @verbatim
<> 144:ef7eb2e8f9f7 166 ===============================================================================
<> 144:ef7eb2e8f9f7 167 ##### Initialization and de-initialization functions #####
<> 144:ef7eb2e8f9f7 168 ===============================================================================
<> 144:ef7eb2e8f9f7 169 [..] This section provides functions allowing to initialize and configure the
<> 144:ef7eb2e8f9f7 170 RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable
<> 144:ef7eb2e8f9f7 171 RTC registers Write protection, enter and exit the RTC initialization mode,
<> 144:ef7eb2e8f9f7 172 RTC registers synchronization check and reference clock detection enable.
<> 144:ef7eb2e8f9f7 173 (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base.
<> 144:ef7eb2e8f9f7 174 It is split into 2 programmable prescalers to minimize power consumption.
<> 144:ef7eb2e8f9f7 175 (++) A 7-bit asynchronous prescaler and a 13-bit synchronous prescaler.
<> 144:ef7eb2e8f9f7 176 (++) When both prescalers are used, it is recommended to configure the
<> 144:ef7eb2e8f9f7 177 asynchronous prescaler to a high value to minimize power consumption.
<> 144:ef7eb2e8f9f7 178 (#) All RTC registers are Write protected. Writing to the RTC registers
<> 144:ef7eb2e8f9f7 179 is enabled by writing a key into the Write Protection register, RTC_WPR.
<> 144:ef7eb2e8f9f7 180 (#) To configure the RTC Calendar, user application should enter
<> 144:ef7eb2e8f9f7 181 initialization mode. In this mode, the calendar counter is stopped
<> 144:ef7eb2e8f9f7 182 and its value can be updated. When the initialization sequence is
<> 144:ef7eb2e8f9f7 183 complete, the calendar restarts counting after 4 RTCCLK cycles.
<> 144:ef7eb2e8f9f7 184 (#) To read the calendar through the shadow registers after Calendar
<> 144:ef7eb2e8f9f7 185 initialization, calendar update or after wakeup from low power modes
<> 144:ef7eb2e8f9f7 186 the software must first clear the RSF flag. The software must then
<> 144:ef7eb2e8f9f7 187 wait until it is set again before reading the calendar, which means
<> 144:ef7eb2e8f9f7 188 that the calendar registers have been correctly copied into the
<> 144:ef7eb2e8f9f7 189 RTC_TR and RTC_DR shadow registers.The HAL_RTC_WaitForSynchro() function
<> 144:ef7eb2e8f9f7 190 implements the above software sequence (RSF clear and RSF check).
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 @endverbatim
<> 144:ef7eb2e8f9f7 193 * @{
<> 144:ef7eb2e8f9f7 194 */
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /**
<> 144:ef7eb2e8f9f7 197 * @brief Initializes the RTC peripheral
AnnaBridge 182:a56a73fd2a6f 198 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 199 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 200 * @retval HAL status
<> 144:ef7eb2e8f9f7 201 */
<> 144:ef7eb2e8f9f7 202 HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 203 {
<> 144:ef7eb2e8f9f7 204 /* Check the RTC peripheral state */
<> 144:ef7eb2e8f9f7 205 if(hrtc == NULL)
<> 144:ef7eb2e8f9f7 206 {
<> 144:ef7eb2e8f9f7 207 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 208 }
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 /* Check the parameters */
<> 144:ef7eb2e8f9f7 211 assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance));
<> 144:ef7eb2e8f9f7 212 assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat));
<> 144:ef7eb2e8f9f7 213 assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv));
<> 144:ef7eb2e8f9f7 214 assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv));
<> 144:ef7eb2e8f9f7 215 assert_param (IS_RTC_OUTPUT(hrtc->Init.OutPut));
<> 144:ef7eb2e8f9f7 216 assert_param (IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity));
<> 144:ef7eb2e8f9f7 217 assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType));
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 if(hrtc->State == HAL_RTC_STATE_RESET)
<> 144:ef7eb2e8f9f7 220 {
<> 144:ef7eb2e8f9f7 221 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 222 hrtc->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 223 /* Initialize RTC MSP */
<> 144:ef7eb2e8f9f7 224 HAL_RTC_MspInit(hrtc);
<> 144:ef7eb2e8f9f7 225 }
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /* Set RTC state */
<> 144:ef7eb2e8f9f7 228 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 231 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 234 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 235 {
<> 144:ef7eb2e8f9f7 236 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 237 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /* Set RTC state */
<> 144:ef7eb2e8f9f7 240 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 243 }
<> 144:ef7eb2e8f9f7 244 else
<> 144:ef7eb2e8f9f7 245 {
<> 144:ef7eb2e8f9f7 246 /* Clear RTC_CR FMT, OSEL and POL Bits */
<> 144:ef7eb2e8f9f7 247 hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL));
<> 144:ef7eb2e8f9f7 248 /* Set RTC_CR register */
<> 144:ef7eb2e8f9f7 249 hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /* Configure the RTC PRER */
<> 144:ef7eb2e8f9f7 252 hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
<> 144:ef7eb2e8f9f7 253 hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16);
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 256 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMTYPE;
<> 144:ef7eb2e8f9f7 259 hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType);
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 262 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /* Set RTC state */
<> 144:ef7eb2e8f9f7 265 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 return HAL_OK;
<> 144:ef7eb2e8f9f7 268 }
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /**
<> 144:ef7eb2e8f9f7 272 * @brief DeInitializes the RTC peripheral
AnnaBridge 182:a56a73fd2a6f 273 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 274 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 275 * @note This function doesn't reset the RTC Backup Data registers.
<> 144:ef7eb2e8f9f7 276 * @retval HAL status
<> 144:ef7eb2e8f9f7 277 */
<> 144:ef7eb2e8f9f7 278 HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 279 {
<> 144:ef7eb2e8f9f7 280 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 /* Check the parameters */
<> 144:ef7eb2e8f9f7 283 assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance));
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 /* Set RTC state */
<> 144:ef7eb2e8f9f7 286 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 289 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 292 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 293 {
<> 144:ef7eb2e8f9f7 294 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 295 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 /* Set RTC state */
<> 144:ef7eb2e8f9f7 298 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 301 }
<> 144:ef7eb2e8f9f7 302 else
<> 144:ef7eb2e8f9f7 303 {
<> 144:ef7eb2e8f9f7 304 /* Reset TR, DR and CR registers */
<> 144:ef7eb2e8f9f7 305 hrtc->Instance->TR = (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 306 hrtc->Instance->DR = (uint32_t)0x00002101;
<> 144:ef7eb2e8f9f7 307 /* Reset All CR bits except CR[2:0] */
<> 144:ef7eb2e8f9f7 308 hrtc->Instance->CR &= (uint32_t)0x00000007;
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 /* Get tick */
<> 144:ef7eb2e8f9f7 311 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 /* Wait till WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 314 while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 315 {
<> 144:ef7eb2e8f9f7 316 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 317 {
<> 144:ef7eb2e8f9f7 318 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 319 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 /* Set RTC state */
<> 144:ef7eb2e8f9f7 322 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 325 }
<> 144:ef7eb2e8f9f7 326 }
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 /* Reset all RTC CR register bits */
<> 144:ef7eb2e8f9f7 329 hrtc->Instance->CR &= (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 330 hrtc->Instance->WUTR = (uint32_t)0x0000FFFF;
<> 144:ef7eb2e8f9f7 331 hrtc->Instance->PRER = (uint32_t)0x007F00FF;
<> 144:ef7eb2e8f9f7 332 hrtc->Instance->ALRMAR = (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 333 hrtc->Instance->ALRMBR = (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 334 hrtc->Instance->SHIFTR = (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 335 hrtc->Instance->CALR = (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 336 hrtc->Instance->ALRMASSR = (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 337 hrtc->Instance->ALRMBSSR = (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /* Reset ISR register and exit initialization mode */
<> 144:ef7eb2e8f9f7 340 hrtc->Instance->ISR = (uint32_t)0x00000000;
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 /* Reset Tamper and alternate functions configuration register */
<> 144:ef7eb2e8f9f7 343 hrtc->Instance->TAMPCR = 0x00000000;
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 /* Reset Option register */
<> 144:ef7eb2e8f9f7 346 hrtc->Instance->OR = 0x00000000;
<> 144:ef7eb2e8f9f7 347
<> 144:ef7eb2e8f9f7 348 /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 349 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 350 {
<> 144:ef7eb2e8f9f7 351 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 352 {
<> 144:ef7eb2e8f9f7 353 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 354 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 359 }
<> 144:ef7eb2e8f9f7 360 }
<> 144:ef7eb2e8f9f7 361 }
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 364 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 365
<> 144:ef7eb2e8f9f7 366 /* De-Initialize RTC MSP */
<> 144:ef7eb2e8f9f7 367 HAL_RTC_MspDeInit(hrtc);
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 hrtc->State = HAL_RTC_STATE_RESET;
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 /* Release Lock */
<> 144:ef7eb2e8f9f7 372 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 return HAL_OK;
<> 144:ef7eb2e8f9f7 375 }
<> 144:ef7eb2e8f9f7 376
<> 144:ef7eb2e8f9f7 377 /**
<> 144:ef7eb2e8f9f7 378 * @brief Initializes the RTC MSP.
AnnaBridge 182:a56a73fd2a6f 379 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 380 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 381 * @retval None
<> 144:ef7eb2e8f9f7 382 */
<> 144:ef7eb2e8f9f7 383 __weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 384 {
<> 144:ef7eb2e8f9f7 385 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 386 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 389 the HAL_RTC_MspInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 390 */
<> 144:ef7eb2e8f9f7 391 }
<> 144:ef7eb2e8f9f7 392
<> 144:ef7eb2e8f9f7 393 /**
<> 144:ef7eb2e8f9f7 394 * @brief DeInitializes the RTC MSP.
AnnaBridge 182:a56a73fd2a6f 395 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 396 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 397 * @retval None
<> 144:ef7eb2e8f9f7 398 */
<> 144:ef7eb2e8f9f7 399 __weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 400 {
<> 144:ef7eb2e8f9f7 401 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 402 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 405 the HAL_RTC_MspDeInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 406 */
<> 144:ef7eb2e8f9f7 407 }
<> 144:ef7eb2e8f9f7 408
<> 144:ef7eb2e8f9f7 409 /**
<> 144:ef7eb2e8f9f7 410 * @}
<> 144:ef7eb2e8f9f7 411 */
<> 144:ef7eb2e8f9f7 412
<> 144:ef7eb2e8f9f7 413 /** @defgroup RTC_Group2 RTC Time and Date functions
<> 144:ef7eb2e8f9f7 414 * @brief RTC Time and Date functions
<> 144:ef7eb2e8f9f7 415 *
<> 144:ef7eb2e8f9f7 416 @verbatim
<> 144:ef7eb2e8f9f7 417 ===============================================================================
<> 144:ef7eb2e8f9f7 418 ##### RTC Time and Date functions #####
<> 144:ef7eb2e8f9f7 419 ===============================================================================
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 [..] This section provides functions allowing to configure Time and Date features
<> 144:ef7eb2e8f9f7 422
<> 144:ef7eb2e8f9f7 423 @endverbatim
<> 144:ef7eb2e8f9f7 424 * @{
<> 144:ef7eb2e8f9f7 425 */
<> 144:ef7eb2e8f9f7 426
<> 144:ef7eb2e8f9f7 427 /**
<> 144:ef7eb2e8f9f7 428 * @brief Sets RTC current time.
AnnaBridge 182:a56a73fd2a6f 429 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 430 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 431 * @param sTime Pointer to Time structure
AnnaBridge 182:a56a73fd2a6f 432 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 433 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 434 * @arg FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 435 * @arg FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 436 * @retval HAL status
<> 144:ef7eb2e8f9f7 437 */
<> 144:ef7eb2e8f9f7 438 HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
<> 144:ef7eb2e8f9f7 439 {
<> 144:ef7eb2e8f9f7 440 uint32_t tmpreg = 0;
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 /* Check the parameters */
<> 144:ef7eb2e8f9f7 443 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 444 assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving));
<> 144:ef7eb2e8f9f7 445 assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation));
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 /* Process Locked */
<> 144:ef7eb2e8f9f7 448 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 449
<> 144:ef7eb2e8f9f7 450 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 451
<> 144:ef7eb2e8f9f7 452 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 453 {
<> 144:ef7eb2e8f9f7 454 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 455 {
<> 144:ef7eb2e8f9f7 456 assert_param(IS_RTC_HOUR12(sTime->Hours));
<> 144:ef7eb2e8f9f7 457 assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
<> 144:ef7eb2e8f9f7 458 }
<> 144:ef7eb2e8f9f7 459 else
<> 144:ef7eb2e8f9f7 460 {
<> 144:ef7eb2e8f9f7 461 sTime->TimeFormat = 0x00;
<> 144:ef7eb2e8f9f7 462 assert_param(IS_RTC_HOUR24(sTime->Hours));
<> 144:ef7eb2e8f9f7 463 }
<> 144:ef7eb2e8f9f7 464 assert_param(IS_RTC_MINUTES(sTime->Minutes));
<> 144:ef7eb2e8f9f7 465 assert_param(IS_RTC_SECONDS(sTime->Seconds));
<> 144:ef7eb2e8f9f7 466
<> 144:ef7eb2e8f9f7 467 tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \
<> 144:ef7eb2e8f9f7 468 ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8) | \
<> 144:ef7eb2e8f9f7 469 ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \
<> 144:ef7eb2e8f9f7 470 (((uint32_t)sTime->TimeFormat) << 16));
<> 144:ef7eb2e8f9f7 471 }
<> 144:ef7eb2e8f9f7 472 else
<> 144:ef7eb2e8f9f7 473 {
<> 144:ef7eb2e8f9f7 474 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 475 {
<> 144:ef7eb2e8f9f7 476 tmpreg = RTC_Bcd2ToByte(sTime->Hours);
<> 144:ef7eb2e8f9f7 477 assert_param(IS_RTC_HOUR12(tmpreg));
<> 144:ef7eb2e8f9f7 478 assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
<> 144:ef7eb2e8f9f7 479 }
<> 144:ef7eb2e8f9f7 480 else
<> 144:ef7eb2e8f9f7 481 {
<> 144:ef7eb2e8f9f7 482 sTime->TimeFormat = 0x00;
<> 144:ef7eb2e8f9f7 483 assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours)));
<> 144:ef7eb2e8f9f7 484 }
<> 144:ef7eb2e8f9f7 485 assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
<> 144:ef7eb2e8f9f7 486 assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
<> 144:ef7eb2e8f9f7 487 tmpreg = (((uint32_t)(sTime->Hours) << 16) | \
<> 144:ef7eb2e8f9f7 488 ((uint32_t)(sTime->Minutes) << 8) | \
<> 144:ef7eb2e8f9f7 489 ((uint32_t)sTime->Seconds) | \
<> 144:ef7eb2e8f9f7 490 ((uint32_t)(sTime->TimeFormat) << 16));
<> 144:ef7eb2e8f9f7 491 }
<> 144:ef7eb2e8f9f7 492
<> 144:ef7eb2e8f9f7 493 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 494 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 495
<> 144:ef7eb2e8f9f7 496 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 497 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 498 {
<> 144:ef7eb2e8f9f7 499 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 500 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /* Set RTC state */
<> 144:ef7eb2e8f9f7 503 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 506 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 507
<> 144:ef7eb2e8f9f7 508 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 509 }
<> 144:ef7eb2e8f9f7 510 else
<> 144:ef7eb2e8f9f7 511 {
<> 144:ef7eb2e8f9f7 512 /* Set the RTC_TR register */
<> 144:ef7eb2e8f9f7 513 hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 514
<> 144:ef7eb2e8f9f7 515 /* Clear the bits to be configured */
<> 157:ff67d9f36b67 516 hrtc->Instance->CR &= (uint32_t)~RTC_CR_BKP;
<> 144:ef7eb2e8f9f7 517
<> 144:ef7eb2e8f9f7 518 /* Configure the RTC_CR register */
<> 144:ef7eb2e8f9f7 519 hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation);
<> 144:ef7eb2e8f9f7 520
<> 144:ef7eb2e8f9f7 521 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 522 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 523
<> 144:ef7eb2e8f9f7 524 /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 525 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 526 {
<> 144:ef7eb2e8f9f7 527 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 528 {
<> 144:ef7eb2e8f9f7 529 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 530 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 531
<> 144:ef7eb2e8f9f7 532 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 533
<> 144:ef7eb2e8f9f7 534 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 535 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 538 }
<> 144:ef7eb2e8f9f7 539 }
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 542 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 543
<> 144:ef7eb2e8f9f7 544 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 547
<> 144:ef7eb2e8f9f7 548 return HAL_OK;
<> 144:ef7eb2e8f9f7 549 }
<> 144:ef7eb2e8f9f7 550 }
<> 144:ef7eb2e8f9f7 551
<> 144:ef7eb2e8f9f7 552 /**
<> 144:ef7eb2e8f9f7 553 * @brief Gets RTC current time.
AnnaBridge 182:a56a73fd2a6f 554 * @param hrtc RTC handle
AnnaBridge 182:a56a73fd2a6f 555 * @param sTime Pointer to Time structure with Hours, Minutes and Seconds fields returned
<> 144:ef7eb2e8f9f7 556 * with input format (BIN or BCD), also SubSeconds field returning the
<> 144:ef7eb2e8f9f7 557 * RTC_SSR register content and SecondFraction field the Synchronous pre-scaler
<> 144:ef7eb2e8f9f7 558 * factor to be used for second fraction ratio computation.
AnnaBridge 182:a56a73fd2a6f 559 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 560 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 561 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 562 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 563 * @note You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds
<> 144:ef7eb2e8f9f7 564 * value in second fraction ratio with time unit following generic formula:
<> 144:ef7eb2e8f9f7 565 * Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
<> 144:ef7eb2e8f9f7 566 * This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS
<> 144:ef7eb2e8f9f7 567 * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
<> 144:ef7eb2e8f9f7 568 * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
<> 144:ef7eb2e8f9f7 569 * Reading RTC current time locks the values in calendar shadow registers until Current date is read
<> 144:ef7eb2e8f9f7 570 * to ensure consistency between the time and date values.
<> 144:ef7eb2e8f9f7 571 * @retval HAL status
<> 144:ef7eb2e8f9f7 572 */
<> 144:ef7eb2e8f9f7 573 HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
<> 144:ef7eb2e8f9f7 574 {
<> 144:ef7eb2e8f9f7 575 uint32_t tmpreg = 0;
<> 144:ef7eb2e8f9f7 576
<> 144:ef7eb2e8f9f7 577 /* Check the parameters */
<> 144:ef7eb2e8f9f7 578 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 579
<> 144:ef7eb2e8f9f7 580 /* Get subseconds values from the correspondent registers*/
<> 144:ef7eb2e8f9f7 581 sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR);
<> 144:ef7eb2e8f9f7 582
<> 144:ef7eb2e8f9f7 583 /* Get SecondFraction structure field from the corresponding register field*/
<> 144:ef7eb2e8f9f7 584 sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S);
<> 144:ef7eb2e8f9f7 585
<> 144:ef7eb2e8f9f7 586 /* Get the TR register */
<> 144:ef7eb2e8f9f7 587 tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 588
<> 144:ef7eb2e8f9f7 589 /* Fill the structure fields with the read parameters */
<> 144:ef7eb2e8f9f7 590 sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16);
<> 144:ef7eb2e8f9f7 591 sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8);
<> 144:ef7eb2e8f9f7 592 sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU));
<> 144:ef7eb2e8f9f7 593 sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16);
<> 144:ef7eb2e8f9f7 594
<> 144:ef7eb2e8f9f7 595 /* Check the input parameters format */
<> 144:ef7eb2e8f9f7 596 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 597 {
<> 144:ef7eb2e8f9f7 598 /* Convert the time structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 599 sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours);
<> 144:ef7eb2e8f9f7 600 sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes);
<> 144:ef7eb2e8f9f7 601 sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds);
<> 144:ef7eb2e8f9f7 602 }
<> 144:ef7eb2e8f9f7 603
<> 144:ef7eb2e8f9f7 604 return HAL_OK;
<> 144:ef7eb2e8f9f7 605 }
<> 144:ef7eb2e8f9f7 606
<> 144:ef7eb2e8f9f7 607 /**
<> 144:ef7eb2e8f9f7 608 * @brief Sets RTC current date.
AnnaBridge 182:a56a73fd2a6f 609 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 610 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 611 * @param sDate Pointer to date structure
AnnaBridge 182:a56a73fd2a6f 612 * @param Format specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 613 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 614 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 615 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 616 * @retval HAL status
<> 144:ef7eb2e8f9f7 617 */
<> 144:ef7eb2e8f9f7 618 HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
<> 144:ef7eb2e8f9f7 619 {
<> 144:ef7eb2e8f9f7 620 uint32_t datetmpreg = 0;
<> 144:ef7eb2e8f9f7 621
<> 144:ef7eb2e8f9f7 622 /* Check the parameters */
<> 144:ef7eb2e8f9f7 623 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 624
<> 144:ef7eb2e8f9f7 625 /* Process Locked */
<> 144:ef7eb2e8f9f7 626 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 627
<> 144:ef7eb2e8f9f7 628 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 629
<> 144:ef7eb2e8f9f7 630 if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U))
<> 144:ef7eb2e8f9f7 631 {
<> 144:ef7eb2e8f9f7 632 sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU);
<> 144:ef7eb2e8f9f7 633 }
<> 144:ef7eb2e8f9f7 634
<> 144:ef7eb2e8f9f7 635 assert_param(IS_RTC_WEEKDAY(sDate->WeekDay));
<> 144:ef7eb2e8f9f7 636
<> 144:ef7eb2e8f9f7 637 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 638 {
<> 144:ef7eb2e8f9f7 639 assert_param(IS_RTC_YEAR(sDate->Year));
<> 144:ef7eb2e8f9f7 640 assert_param(IS_RTC_MONTH(sDate->Month));
<> 144:ef7eb2e8f9f7 641 assert_param(IS_RTC_DATE(sDate->Date));
<> 144:ef7eb2e8f9f7 642
<> 144:ef7eb2e8f9f7 643 datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \
<> 144:ef7eb2e8f9f7 644 ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8) | \
<> 144:ef7eb2e8f9f7 645 ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \
<> 144:ef7eb2e8f9f7 646 ((uint32_t)sDate->WeekDay << 13));
<> 144:ef7eb2e8f9f7 647 }
<> 144:ef7eb2e8f9f7 648 else
<> 144:ef7eb2e8f9f7 649 {
<> 144:ef7eb2e8f9f7 650 assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year)));
AnnaBridge 182:a56a73fd2a6f 651 assert_param(IS_RTC_MONTH(sDate->Month));
AnnaBridge 182:a56a73fd2a6f 652 assert_param(IS_RTC_DATE(sDate->Date));
<> 144:ef7eb2e8f9f7 653
<> 144:ef7eb2e8f9f7 654 datetmpreg = ((((uint32_t)sDate->Year) << 16) | \
<> 144:ef7eb2e8f9f7 655 (((uint32_t)sDate->Month) << 8) | \
<> 144:ef7eb2e8f9f7 656 ((uint32_t)sDate->Date) | \
<> 144:ef7eb2e8f9f7 657 (((uint32_t)sDate->WeekDay) << 13));
<> 144:ef7eb2e8f9f7 658 }
<> 144:ef7eb2e8f9f7 659
<> 144:ef7eb2e8f9f7 660 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 661 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 662
<> 144:ef7eb2e8f9f7 663 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 664 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 665 {
<> 144:ef7eb2e8f9f7 666 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 667 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 668
<> 144:ef7eb2e8f9f7 669 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 670 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 671
<> 144:ef7eb2e8f9f7 672 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 673 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 674
<> 144:ef7eb2e8f9f7 675 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 676 }
<> 144:ef7eb2e8f9f7 677 else
<> 144:ef7eb2e8f9f7 678 {
<> 144:ef7eb2e8f9f7 679 /* Set the RTC_DR register */
<> 144:ef7eb2e8f9f7 680 hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 683 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 684
<> 144:ef7eb2e8f9f7 685 /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 686 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 687 {
<> 144:ef7eb2e8f9f7 688 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 689 {
<> 144:ef7eb2e8f9f7 690 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 691 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 692
<> 144:ef7eb2e8f9f7 693 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 694
<> 144:ef7eb2e8f9f7 695 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 696 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 697
<> 144:ef7eb2e8f9f7 698 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 699 }
<> 144:ef7eb2e8f9f7 700 }
<> 144:ef7eb2e8f9f7 701
<> 144:ef7eb2e8f9f7 702 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 703 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 704
<> 144:ef7eb2e8f9f7 705 hrtc->State = HAL_RTC_STATE_READY ;
<> 144:ef7eb2e8f9f7 706
<> 144:ef7eb2e8f9f7 707 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 708 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 709
<> 144:ef7eb2e8f9f7 710 return HAL_OK;
<> 144:ef7eb2e8f9f7 711 }
<> 144:ef7eb2e8f9f7 712 }
<> 144:ef7eb2e8f9f7 713
<> 144:ef7eb2e8f9f7 714 /**
<> 144:ef7eb2e8f9f7 715 * @brief Gets RTC current date.
AnnaBridge 182:a56a73fd2a6f 716 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 717 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 718 * @param sDate Pointer to Date structure
AnnaBridge 182:a56a73fd2a6f 719 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 720 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 721 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 722 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 723 * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
<> 144:ef7eb2e8f9f7 724 * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
<> 144:ef7eb2e8f9f7 725 * Reading RTC current time locks the values in calendar shadow registers until Current date is read.
<> 144:ef7eb2e8f9f7 726 * @retval HAL status
<> 144:ef7eb2e8f9f7 727 */
<> 144:ef7eb2e8f9f7 728 HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
<> 144:ef7eb2e8f9f7 729 {
<> 144:ef7eb2e8f9f7 730 uint32_t datetmpreg = 0;
<> 144:ef7eb2e8f9f7 731
<> 144:ef7eb2e8f9f7 732 /* Check the parameters */
<> 144:ef7eb2e8f9f7 733 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 734
<> 144:ef7eb2e8f9f7 735 /* Get the DR register */
<> 144:ef7eb2e8f9f7 736 datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 737
<> 144:ef7eb2e8f9f7 738 /* Fill the structure fields with the read parameters */
<> 144:ef7eb2e8f9f7 739 sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16);
<> 144:ef7eb2e8f9f7 740 sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8);
<> 144:ef7eb2e8f9f7 741 sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU));
<> 144:ef7eb2e8f9f7 742 sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13);
<> 144:ef7eb2e8f9f7 743
<> 144:ef7eb2e8f9f7 744 /* Check the input parameters format */
<> 144:ef7eb2e8f9f7 745 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 746 {
<> 144:ef7eb2e8f9f7 747 /* Convert the date structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 748 sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year);
<> 144:ef7eb2e8f9f7 749 sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month);
<> 144:ef7eb2e8f9f7 750 sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date);
<> 144:ef7eb2e8f9f7 751 }
<> 144:ef7eb2e8f9f7 752 return HAL_OK;
<> 144:ef7eb2e8f9f7 753 }
<> 144:ef7eb2e8f9f7 754
<> 144:ef7eb2e8f9f7 755 /**
<> 144:ef7eb2e8f9f7 756 * @}
<> 144:ef7eb2e8f9f7 757 */
<> 144:ef7eb2e8f9f7 758
<> 144:ef7eb2e8f9f7 759 /** @defgroup RTC_Group3 RTC Alarm functions
<> 144:ef7eb2e8f9f7 760 * @brief RTC Alarm functions
<> 144:ef7eb2e8f9f7 761 *
<> 144:ef7eb2e8f9f7 762 @verbatim
<> 144:ef7eb2e8f9f7 763 ===============================================================================
<> 144:ef7eb2e8f9f7 764 ##### RTC Alarm functions #####
<> 144:ef7eb2e8f9f7 765 ===============================================================================
<> 144:ef7eb2e8f9f7 766
<> 144:ef7eb2e8f9f7 767 [..] This section provides functions allowing to configure Alarm feature
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 @endverbatim
<> 144:ef7eb2e8f9f7 770 * @{
<> 144:ef7eb2e8f9f7 771 */
<> 144:ef7eb2e8f9f7 772 /**
<> 144:ef7eb2e8f9f7 773 * @brief Sets the specified RTC Alarm.
AnnaBridge 182:a56a73fd2a6f 774 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 775 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 776 * @param sAlarm Pointer to Alarm structure
AnnaBridge 182:a56a73fd2a6f 777 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 778 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 779 * @arg FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 780 * @arg FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 781 * @retval HAL status
<> 144:ef7eb2e8f9f7 782 */
<> 144:ef7eb2e8f9f7 783 HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
<> 144:ef7eb2e8f9f7 784 {
<> 144:ef7eb2e8f9f7 785 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 786 uint32_t tmpreg = 0, subsecondtmpreg = 0;
<> 144:ef7eb2e8f9f7 787
<> 144:ef7eb2e8f9f7 788 /* Check the parameters */
<> 144:ef7eb2e8f9f7 789 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 790 assert_param(IS_RTC_ALARM(sAlarm->Alarm));
<> 144:ef7eb2e8f9f7 791 assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 792 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
<> 144:ef7eb2e8f9f7 793 assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
<> 144:ef7eb2e8f9f7 794 assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
<> 144:ef7eb2e8f9f7 795
<> 144:ef7eb2e8f9f7 796 /* Process Locked */
<> 144:ef7eb2e8f9f7 797 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 798
<> 144:ef7eb2e8f9f7 799 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 800
<> 144:ef7eb2e8f9f7 801 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 802 {
<> 144:ef7eb2e8f9f7 803 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 804 {
<> 144:ef7eb2e8f9f7 805 assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
<> 144:ef7eb2e8f9f7 806 assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<> 144:ef7eb2e8f9f7 807 }
<> 144:ef7eb2e8f9f7 808 else
<> 144:ef7eb2e8f9f7 809 {
<> 144:ef7eb2e8f9f7 810 sAlarm->AlarmTime.TimeFormat = 0x00;
<> 144:ef7eb2e8f9f7 811 assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
<> 144:ef7eb2e8f9f7 812 }
<> 144:ef7eb2e8f9f7 813 assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
<> 144:ef7eb2e8f9f7 814 assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
<> 144:ef7eb2e8f9f7 815
<> 144:ef7eb2e8f9f7 816 if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<> 144:ef7eb2e8f9f7 817 {
<> 144:ef7eb2e8f9f7 818 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
<> 144:ef7eb2e8f9f7 819 }
<> 144:ef7eb2e8f9f7 820 else
<> 144:ef7eb2e8f9f7 821 {
<> 144:ef7eb2e8f9f7 822 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
<> 144:ef7eb2e8f9f7 823 }
<> 144:ef7eb2e8f9f7 824
<> 144:ef7eb2e8f9f7 825 tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \
<> 144:ef7eb2e8f9f7 826 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \
<> 144:ef7eb2e8f9f7 827 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
<> 144:ef7eb2e8f9f7 828 ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
<> 144:ef7eb2e8f9f7 829 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \
<> 144:ef7eb2e8f9f7 830 ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
<> 144:ef7eb2e8f9f7 831 ((uint32_t)sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 832 }
<> 144:ef7eb2e8f9f7 833 else
<> 144:ef7eb2e8f9f7 834 {
<> 144:ef7eb2e8f9f7 835 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 836 {
<> 144:ef7eb2e8f9f7 837 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<> 144:ef7eb2e8f9f7 838 assert_param(IS_RTC_HOUR12(tmpreg));
<> 144:ef7eb2e8f9f7 839 assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<> 144:ef7eb2e8f9f7 840 }
<> 144:ef7eb2e8f9f7 841 else
<> 144:ef7eb2e8f9f7 842 {
<> 144:ef7eb2e8f9f7 843 sAlarm->AlarmTime.TimeFormat = 0x00;
<> 144:ef7eb2e8f9f7 844 assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
<> 144:ef7eb2e8f9f7 845 }
<> 144:ef7eb2e8f9f7 846
<> 144:ef7eb2e8f9f7 847 assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
<> 144:ef7eb2e8f9f7 848 assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
<> 144:ef7eb2e8f9f7 849
<> 144:ef7eb2e8f9f7 850 if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<> 144:ef7eb2e8f9f7 851 {
<> 144:ef7eb2e8f9f7 852 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 853 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
<> 144:ef7eb2e8f9f7 854 }
<> 144:ef7eb2e8f9f7 855 else
<> 144:ef7eb2e8f9f7 856 {
<> 144:ef7eb2e8f9f7 857 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 858 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
<> 144:ef7eb2e8f9f7 859 }
<> 144:ef7eb2e8f9f7 860
<> 144:ef7eb2e8f9f7 861 tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \
<> 144:ef7eb2e8f9f7 862 ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \
<> 144:ef7eb2e8f9f7 863 ((uint32_t) sAlarm->AlarmTime.Seconds) | \
<> 144:ef7eb2e8f9f7 864 ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
<> 144:ef7eb2e8f9f7 865 ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \
<> 144:ef7eb2e8f9f7 866 ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
<> 144:ef7eb2e8f9f7 867 ((uint32_t)sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 868 }
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 /* Configure the Alarm A or Alarm B Sub Second registers */
<> 144:ef7eb2e8f9f7 871 subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
<> 144:ef7eb2e8f9f7 872
<> 144:ef7eb2e8f9f7 873 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 874 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 875
<> 144:ef7eb2e8f9f7 876 /* Configure the Alarm register */
<> 144:ef7eb2e8f9f7 877 if(sAlarm->Alarm == RTC_ALARM_A)
<> 144:ef7eb2e8f9f7 878 {
<> 144:ef7eb2e8f9f7 879 /* Disable the Alarm A interrupt */
<> 144:ef7eb2e8f9f7 880 __HAL_RTC_ALARMA_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 881
<> 144:ef7eb2e8f9f7 882 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 883 __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
<> 144:ef7eb2e8f9f7 884
<> 144:ef7eb2e8f9f7 885 /* Get tick */
<> 144:ef7eb2e8f9f7 886 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 887
<> 144:ef7eb2e8f9f7 888 /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 889 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
<> 144:ef7eb2e8f9f7 890 {
<> 144:ef7eb2e8f9f7 891 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 892 {
<> 144:ef7eb2e8f9f7 893 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 894 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 895
<> 144:ef7eb2e8f9f7 896 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 897
<> 144:ef7eb2e8f9f7 898 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 899 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 900
<> 144:ef7eb2e8f9f7 901 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 902 }
<> 144:ef7eb2e8f9f7 903 }
<> 144:ef7eb2e8f9f7 904
<> 144:ef7eb2e8f9f7 905 hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 906 /* Configure the Alarm A Sub Second register */
<> 144:ef7eb2e8f9f7 907 hrtc->Instance->ALRMASSR = subsecondtmpreg;
<> 144:ef7eb2e8f9f7 908 /* Configure the Alarm state: Enable Alarm */
<> 144:ef7eb2e8f9f7 909 __HAL_RTC_ALARMA_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 910 }
<> 144:ef7eb2e8f9f7 911 else
<> 144:ef7eb2e8f9f7 912 {
<> 144:ef7eb2e8f9f7 913 /* Disable the Alarm B interrupt */
<> 144:ef7eb2e8f9f7 914 __HAL_RTC_ALARMB_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 915
<> 144:ef7eb2e8f9f7 916 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 917 __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
<> 144:ef7eb2e8f9f7 918
<> 144:ef7eb2e8f9f7 919 /* Get tick */
<> 144:ef7eb2e8f9f7 920 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 921
<> 144:ef7eb2e8f9f7 922 /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 923 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
<> 144:ef7eb2e8f9f7 924 {
<> 144:ef7eb2e8f9f7 925 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 926 {
<> 144:ef7eb2e8f9f7 927 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 928 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 929
<> 144:ef7eb2e8f9f7 930 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 931
<> 144:ef7eb2e8f9f7 932 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 933 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 934
<> 144:ef7eb2e8f9f7 935 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 936 }
<> 144:ef7eb2e8f9f7 937 }
<> 144:ef7eb2e8f9f7 938
<> 144:ef7eb2e8f9f7 939 hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 940 /* Configure the Alarm B Sub Second register */
<> 144:ef7eb2e8f9f7 941 hrtc->Instance->ALRMBSSR = subsecondtmpreg;
<> 144:ef7eb2e8f9f7 942 /* Configure the Alarm state: Enable Alarm */
<> 144:ef7eb2e8f9f7 943 __HAL_RTC_ALARMB_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 944 }
<> 144:ef7eb2e8f9f7 945
<> 144:ef7eb2e8f9f7 946 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 947 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 948
<> 144:ef7eb2e8f9f7 949 /* Change RTC state */
<> 144:ef7eb2e8f9f7 950 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 951
<> 144:ef7eb2e8f9f7 952 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 953 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 954
<> 144:ef7eb2e8f9f7 955 return HAL_OK;
<> 144:ef7eb2e8f9f7 956 }
<> 144:ef7eb2e8f9f7 957
<> 144:ef7eb2e8f9f7 958 /**
<> 144:ef7eb2e8f9f7 959 * @brief Sets the specified RTC Alarm with Interrupt
AnnaBridge 182:a56a73fd2a6f 960 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 961 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 962 * @param sAlarm Pointer to Alarm structure
AnnaBridge 182:a56a73fd2a6f 963 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 964 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 965 * @arg FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 966 * @arg FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 967 * @note The Alarm register can only be written when the corresponding Alarm
<> 144:ef7eb2e8f9f7 968 * is disabled (Use the HAL_RTC_DeactivateAlarm()).
<> 144:ef7eb2e8f9f7 969 * @note The HAL_RTC_SetTime() must be called before enabling the Alarm feature.
<> 144:ef7eb2e8f9f7 970 * @retval HAL status
<> 144:ef7eb2e8f9f7 971 */
<> 144:ef7eb2e8f9f7 972 HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
<> 144:ef7eb2e8f9f7 973 {
AnnaBridge 182:a56a73fd2a6f 974 uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
AnnaBridge 182:a56a73fd2a6f 975 __IO uint32_t count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U) ;
<> 144:ef7eb2e8f9f7 976
<> 144:ef7eb2e8f9f7 977 /* Check the parameters */
<> 144:ef7eb2e8f9f7 978 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 979 assert_param(IS_RTC_ALARM(sAlarm->Alarm));
<> 144:ef7eb2e8f9f7 980 assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 981 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
<> 144:ef7eb2e8f9f7 982 assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
<> 144:ef7eb2e8f9f7 983 assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
<> 144:ef7eb2e8f9f7 984
<> 144:ef7eb2e8f9f7 985 /* Process Locked */
<> 144:ef7eb2e8f9f7 986 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 987
<> 144:ef7eb2e8f9f7 988 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 989
<> 144:ef7eb2e8f9f7 990 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 991 {
<> 144:ef7eb2e8f9f7 992 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 993 {
<> 144:ef7eb2e8f9f7 994 assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
<> 144:ef7eb2e8f9f7 995 assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<> 144:ef7eb2e8f9f7 996 }
<> 144:ef7eb2e8f9f7 997 else
<> 144:ef7eb2e8f9f7 998 {
AnnaBridge 182:a56a73fd2a6f 999 sAlarm->AlarmTime.TimeFormat = 0x00U;
<> 144:ef7eb2e8f9f7 1000 assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
<> 144:ef7eb2e8f9f7 1001 }
<> 144:ef7eb2e8f9f7 1002 assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
<> 144:ef7eb2e8f9f7 1003 assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
<> 144:ef7eb2e8f9f7 1004
<> 144:ef7eb2e8f9f7 1005 if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<> 144:ef7eb2e8f9f7 1006 {
<> 144:ef7eb2e8f9f7 1007 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
<> 144:ef7eb2e8f9f7 1008 }
<> 144:ef7eb2e8f9f7 1009 else
<> 144:ef7eb2e8f9f7 1010 {
<> 144:ef7eb2e8f9f7 1011 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
<> 144:ef7eb2e8f9f7 1012 }
AnnaBridge 182:a56a73fd2a6f 1013 tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
AnnaBridge 182:a56a73fd2a6f 1014 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
<> 144:ef7eb2e8f9f7 1015 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
AnnaBridge 182:a56a73fd2a6f 1016 ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
AnnaBridge 182:a56a73fd2a6f 1017 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
<> 144:ef7eb2e8f9f7 1018 ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
<> 144:ef7eb2e8f9f7 1019 ((uint32_t)sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 1020 }
<> 144:ef7eb2e8f9f7 1021 else
<> 144:ef7eb2e8f9f7 1022 {
<> 144:ef7eb2e8f9f7 1023 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1024 {
<> 144:ef7eb2e8f9f7 1025 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<> 144:ef7eb2e8f9f7 1026 assert_param(IS_RTC_HOUR12(tmpreg));
<> 144:ef7eb2e8f9f7 1027 assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<> 144:ef7eb2e8f9f7 1028 }
<> 144:ef7eb2e8f9f7 1029 else
<> 144:ef7eb2e8f9f7 1030 {
AnnaBridge 182:a56a73fd2a6f 1031 sAlarm->AlarmTime.TimeFormat = 0x00U;
<> 144:ef7eb2e8f9f7 1032 assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
<> 144:ef7eb2e8f9f7 1033 }
<> 144:ef7eb2e8f9f7 1034
<> 144:ef7eb2e8f9f7 1035 assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
<> 144:ef7eb2e8f9f7 1036 assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
<> 144:ef7eb2e8f9f7 1037
<> 144:ef7eb2e8f9f7 1038 if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<> 144:ef7eb2e8f9f7 1039 {
<> 144:ef7eb2e8f9f7 1040 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 1041 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
<> 144:ef7eb2e8f9f7 1042 }
<> 144:ef7eb2e8f9f7 1043 else
<> 144:ef7eb2e8f9f7 1044 {
<> 144:ef7eb2e8f9f7 1045 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 1046 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
<> 144:ef7eb2e8f9f7 1047 }
AnnaBridge 182:a56a73fd2a6f 1048 tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
AnnaBridge 182:a56a73fd2a6f 1049 ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
<> 144:ef7eb2e8f9f7 1050 ((uint32_t) sAlarm->AlarmTime.Seconds) | \
AnnaBridge 182:a56a73fd2a6f 1051 ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
AnnaBridge 182:a56a73fd2a6f 1052 ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
<> 144:ef7eb2e8f9f7 1053 ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
<> 144:ef7eb2e8f9f7 1054 ((uint32_t)sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 1055 }
<> 144:ef7eb2e8f9f7 1056 /* Configure the Alarm A or Alarm B Sub Second registers */
<> 144:ef7eb2e8f9f7 1057 subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
<> 144:ef7eb2e8f9f7 1058
<> 144:ef7eb2e8f9f7 1059 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1060 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1061
<> 144:ef7eb2e8f9f7 1062 /* Configure the Alarm register */
<> 144:ef7eb2e8f9f7 1063 if(sAlarm->Alarm == RTC_ALARM_A)
<> 144:ef7eb2e8f9f7 1064 {
<> 144:ef7eb2e8f9f7 1065 /* Disable the Alarm A interrupt */
<> 144:ef7eb2e8f9f7 1066 __HAL_RTC_ALARMA_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1067
<> 144:ef7eb2e8f9f7 1068 /* Clear flag alarm A */
<> 144:ef7eb2e8f9f7 1069 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
<> 144:ef7eb2e8f9f7 1070
<> 144:ef7eb2e8f9f7 1071 /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
AnnaBridge 182:a56a73fd2a6f 1072 do
<> 144:ef7eb2e8f9f7 1073 {
AnnaBridge 182:a56a73fd2a6f 1074 if (count-- == 0U)
<> 144:ef7eb2e8f9f7 1075 {
<> 144:ef7eb2e8f9f7 1076 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1077 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
AnnaBridge 182:a56a73fd2a6f 1078
AnnaBridge 182:a56a73fd2a6f 1079 hrtc->State = HAL_RTC_STATE_TIMEOUT;
AnnaBridge 182:a56a73fd2a6f 1080
AnnaBridge 182:a56a73fd2a6f 1081 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1082 __HAL_UNLOCK(hrtc);
AnnaBridge 182:a56a73fd2a6f 1083
<> 144:ef7eb2e8f9f7 1084 return HAL_TIMEOUT;
AnnaBridge 182:a56a73fd2a6f 1085 }
AnnaBridge 182:a56a73fd2a6f 1086 }
AnnaBridge 182:a56a73fd2a6f 1087 while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET);
AnnaBridge 182:a56a73fd2a6f 1088
<> 144:ef7eb2e8f9f7 1089 hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 1090 /* Configure the Alarm A Sub Second register */
<> 144:ef7eb2e8f9f7 1091 hrtc->Instance->ALRMASSR = subsecondtmpreg;
<> 144:ef7eb2e8f9f7 1092 /* Configure the Alarm state: Enable Alarm */
<> 144:ef7eb2e8f9f7 1093 __HAL_RTC_ALARMA_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1094 /* Configure the Alarm interrupt */
<> 144:ef7eb2e8f9f7 1095 __HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA);
<> 144:ef7eb2e8f9f7 1096 }
<> 144:ef7eb2e8f9f7 1097 else
<> 144:ef7eb2e8f9f7 1098 {
<> 144:ef7eb2e8f9f7 1099 /* Disable the Alarm B interrupt */
<> 144:ef7eb2e8f9f7 1100 __HAL_RTC_ALARMB_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1101
<> 144:ef7eb2e8f9f7 1102 /* Clear flag alarm B */
<> 144:ef7eb2e8f9f7 1103 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
<> 144:ef7eb2e8f9f7 1104
<> 144:ef7eb2e8f9f7 1105 /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
AnnaBridge 182:a56a73fd2a6f 1106 do
<> 144:ef7eb2e8f9f7 1107 {
AnnaBridge 182:a56a73fd2a6f 1108 if (count-- == 0U)
<> 144:ef7eb2e8f9f7 1109 {
<> 144:ef7eb2e8f9f7 1110 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1111 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
AnnaBridge 182:a56a73fd2a6f 1112
AnnaBridge 182:a56a73fd2a6f 1113 hrtc->State = HAL_RTC_STATE_TIMEOUT;
AnnaBridge 182:a56a73fd2a6f 1114
AnnaBridge 182:a56a73fd2a6f 1115 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1116 __HAL_UNLOCK(hrtc);
AnnaBridge 182:a56a73fd2a6f 1117
<> 144:ef7eb2e8f9f7 1118 return HAL_TIMEOUT;
AnnaBridge 182:a56a73fd2a6f 1119 }
AnnaBridge 182:a56a73fd2a6f 1120 }
AnnaBridge 182:a56a73fd2a6f 1121 while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET);
AnnaBridge 182:a56a73fd2a6f 1122
<> 144:ef7eb2e8f9f7 1123 hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 1124 /* Configure the Alarm B Sub Second register */
<> 144:ef7eb2e8f9f7 1125 hrtc->Instance->ALRMBSSR = subsecondtmpreg;
<> 144:ef7eb2e8f9f7 1126 /* Configure the Alarm state: Enable Alarm */
<> 144:ef7eb2e8f9f7 1127 __HAL_RTC_ALARMB_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1128 /* Configure the Alarm interrupt */
<> 144:ef7eb2e8f9f7 1129 __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB);
<> 144:ef7eb2e8f9f7 1130 }
<> 144:ef7eb2e8f9f7 1131
<> 144:ef7eb2e8f9f7 1132 /* RTC Alarm Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 1133 __HAL_RTC_ALARM_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 1134
<> 144:ef7eb2e8f9f7 1135 EXTI->RTSR |= RTC_EXTI_LINE_ALARM_EVENT;
<> 144:ef7eb2e8f9f7 1136
<> 144:ef7eb2e8f9f7 1137 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1138 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1139
<> 144:ef7eb2e8f9f7 1140 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1141
<> 144:ef7eb2e8f9f7 1142 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1143 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1144
<> 144:ef7eb2e8f9f7 1145 return HAL_OK;
<> 144:ef7eb2e8f9f7 1146 }
<> 144:ef7eb2e8f9f7 1147
<> 144:ef7eb2e8f9f7 1148 /**
<> 144:ef7eb2e8f9f7 1149 * @brief Deactive the specified RTC Alarm
AnnaBridge 182:a56a73fd2a6f 1150 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1151 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1152 * @param Alarm Specifies the Alarm.
<> 144:ef7eb2e8f9f7 1153 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1154 * @arg RTC_ALARM_A: AlarmA
<> 144:ef7eb2e8f9f7 1155 * @arg RTC_ALARM_B: AlarmB
<> 144:ef7eb2e8f9f7 1156 * @retval HAL status
<> 144:ef7eb2e8f9f7 1157 */
<> 144:ef7eb2e8f9f7 1158 HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm)
<> 144:ef7eb2e8f9f7 1159 {
<> 144:ef7eb2e8f9f7 1160 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1161
<> 144:ef7eb2e8f9f7 1162 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1163 assert_param(IS_RTC_ALARM(Alarm));
<> 144:ef7eb2e8f9f7 1164
<> 144:ef7eb2e8f9f7 1165 /* Process Locked */
<> 144:ef7eb2e8f9f7 1166 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1167
<> 144:ef7eb2e8f9f7 1168 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1169
<> 144:ef7eb2e8f9f7 1170 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1171 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1172
<> 144:ef7eb2e8f9f7 1173 if(Alarm == RTC_ALARM_A)
<> 144:ef7eb2e8f9f7 1174 {
<> 144:ef7eb2e8f9f7 1175 /* AlarmA */
<> 144:ef7eb2e8f9f7 1176 __HAL_RTC_ALARMA_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1177
<> 144:ef7eb2e8f9f7 1178 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 1179 __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
<> 144:ef7eb2e8f9f7 1180
<> 144:ef7eb2e8f9f7 1181 /* Get tick */
<> 144:ef7eb2e8f9f7 1182 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1183
<> 144:ef7eb2e8f9f7 1184 /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1185 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
<> 144:ef7eb2e8f9f7 1186 {
<> 144:ef7eb2e8f9f7 1187 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1188 {
<> 144:ef7eb2e8f9f7 1189 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1190 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1191
<> 144:ef7eb2e8f9f7 1192 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1193
<> 144:ef7eb2e8f9f7 1194 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1195 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1196
<> 144:ef7eb2e8f9f7 1197 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1198 }
<> 144:ef7eb2e8f9f7 1199 }
<> 144:ef7eb2e8f9f7 1200 }
<> 144:ef7eb2e8f9f7 1201 else
<> 144:ef7eb2e8f9f7 1202 {
<> 144:ef7eb2e8f9f7 1203 /* AlarmB */
<> 144:ef7eb2e8f9f7 1204 __HAL_RTC_ALARMB_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1205
<> 144:ef7eb2e8f9f7 1206 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 1207 __HAL_RTC_ALARM_DISABLE_IT(hrtc,RTC_IT_ALRB);
<> 144:ef7eb2e8f9f7 1208
<> 144:ef7eb2e8f9f7 1209 /* Get tick */
<> 144:ef7eb2e8f9f7 1210 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1211
<> 144:ef7eb2e8f9f7 1212 /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1213 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
<> 144:ef7eb2e8f9f7 1214 {
<> 144:ef7eb2e8f9f7 1215 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1216 {
<> 144:ef7eb2e8f9f7 1217 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1218 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1219
<> 144:ef7eb2e8f9f7 1220 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1221
<> 144:ef7eb2e8f9f7 1222 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1223 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1224
<> 144:ef7eb2e8f9f7 1225 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1226 }
<> 144:ef7eb2e8f9f7 1227 }
<> 144:ef7eb2e8f9f7 1228 }
<> 144:ef7eb2e8f9f7 1229 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1230 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1231
<> 144:ef7eb2e8f9f7 1232 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1233
<> 144:ef7eb2e8f9f7 1234 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1235 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1236
<> 144:ef7eb2e8f9f7 1237 return HAL_OK;
<> 144:ef7eb2e8f9f7 1238 }
<> 144:ef7eb2e8f9f7 1239
<> 144:ef7eb2e8f9f7 1240 /**
<> 144:ef7eb2e8f9f7 1241 * @brief Gets the RTC Alarm value and masks.
AnnaBridge 182:a56a73fd2a6f 1242 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1243 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1244 * @param sAlarm Pointer to Date structure
AnnaBridge 182:a56a73fd2a6f 1245 * @param Alarm Specifies the Alarm.
<> 144:ef7eb2e8f9f7 1246 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1247 * @arg RTC_ALARM_A: AlarmA
<> 144:ef7eb2e8f9f7 1248 * @arg RTC_ALARM_B: AlarmB
AnnaBridge 182:a56a73fd2a6f 1249 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 1250 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1251 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 1252 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 1253 * @retval HAL status
<> 144:ef7eb2e8f9f7 1254 */
<> 144:ef7eb2e8f9f7 1255 HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format)
<> 144:ef7eb2e8f9f7 1256 {
<> 144:ef7eb2e8f9f7 1257 uint32_t tmpreg = 0, subsecondtmpreg = 0;
<> 144:ef7eb2e8f9f7 1258
<> 144:ef7eb2e8f9f7 1259 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1260 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 1261 assert_param(IS_RTC_ALARM(Alarm));
<> 144:ef7eb2e8f9f7 1262
<> 144:ef7eb2e8f9f7 1263 if(Alarm == RTC_ALARM_A)
<> 144:ef7eb2e8f9f7 1264 {
<> 144:ef7eb2e8f9f7 1265 /* AlarmA */
<> 144:ef7eb2e8f9f7 1266 sAlarm->Alarm = RTC_ALARM_A;
<> 144:ef7eb2e8f9f7 1267
<> 144:ef7eb2e8f9f7 1268 tmpreg = (uint32_t)(hrtc->Instance->ALRMAR);
<> 144:ef7eb2e8f9f7 1269 subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS);
<> 144:ef7eb2e8f9f7 1270 }
<> 144:ef7eb2e8f9f7 1271 else
<> 144:ef7eb2e8f9f7 1272 {
<> 144:ef7eb2e8f9f7 1273 sAlarm->Alarm = RTC_ALARM_B;
<> 144:ef7eb2e8f9f7 1274
<> 144:ef7eb2e8f9f7 1275 tmpreg = (uint32_t)(hrtc->Instance->ALRMBR);
<> 144:ef7eb2e8f9f7 1276 subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS);
<> 144:ef7eb2e8f9f7 1277 }
<> 144:ef7eb2e8f9f7 1278
<> 144:ef7eb2e8f9f7 1279 /* Fill the structure with the read parameters */
<> 144:ef7eb2e8f9f7 1280 sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16);
<> 144:ef7eb2e8f9f7 1281 sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8);
<> 144:ef7eb2e8f9f7 1282 sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU));
<> 144:ef7eb2e8f9f7 1283 sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16);
<> 144:ef7eb2e8f9f7 1284 sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg;
<> 144:ef7eb2e8f9f7 1285 sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24);
<> 144:ef7eb2e8f9f7 1286 sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL);
<> 144:ef7eb2e8f9f7 1287 sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL);
<> 144:ef7eb2e8f9f7 1288
<> 144:ef7eb2e8f9f7 1289 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 1290 {
<> 144:ef7eb2e8f9f7 1291 sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<> 144:ef7eb2e8f9f7 1292 sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes);
<> 144:ef7eb2e8f9f7 1293 sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds);
<> 144:ef7eb2e8f9f7 1294 sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 1295 }
<> 144:ef7eb2e8f9f7 1296
<> 144:ef7eb2e8f9f7 1297 return HAL_OK;
<> 144:ef7eb2e8f9f7 1298 }
<> 144:ef7eb2e8f9f7 1299
<> 144:ef7eb2e8f9f7 1300 /**
<> 144:ef7eb2e8f9f7 1301 * @brief This function handles Alarm interrupt request.
AnnaBridge 182:a56a73fd2a6f 1302 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1303 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1304 * @retval None
<> 144:ef7eb2e8f9f7 1305 */
<> 144:ef7eb2e8f9f7 1306 void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1307 {
<> 144:ef7eb2e8f9f7 1308 if(__HAL_RTC_ALARM_GET_IT(hrtc, RTC_IT_ALRA))
<> 144:ef7eb2e8f9f7 1309 {
<> 144:ef7eb2e8f9f7 1310 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 1311 if((uint32_t)(hrtc->Instance->CR & RTC_IT_ALRA) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1312 {
<> 144:ef7eb2e8f9f7 1313 /* AlarmA callback */
<> 144:ef7eb2e8f9f7 1314 HAL_RTC_AlarmAEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 1315
<> 144:ef7eb2e8f9f7 1316 /* Clear the Alarm interrupt pending bit */
<> 144:ef7eb2e8f9f7 1317 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc,RTC_FLAG_ALRAF);
<> 144:ef7eb2e8f9f7 1318 }
<> 144:ef7eb2e8f9f7 1319 }
<> 144:ef7eb2e8f9f7 1320
<> 144:ef7eb2e8f9f7 1321 if(__HAL_RTC_ALARM_GET_IT(hrtc, RTC_IT_ALRB))
<> 144:ef7eb2e8f9f7 1322 {
<> 144:ef7eb2e8f9f7 1323 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 1324 if((uint32_t)(hrtc->Instance->CR & RTC_IT_ALRB) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1325 {
<> 144:ef7eb2e8f9f7 1326 /* AlarmB callback */
<> 144:ef7eb2e8f9f7 1327 HAL_RTCEx_AlarmBEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 1328
<> 144:ef7eb2e8f9f7 1329 /* Clear the Alarm interrupt pending bit */
<> 144:ef7eb2e8f9f7 1330 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc,RTC_FLAG_ALRBF);
<> 144:ef7eb2e8f9f7 1331 }
<> 144:ef7eb2e8f9f7 1332 }
<> 144:ef7eb2e8f9f7 1333
<> 144:ef7eb2e8f9f7 1334 /* Clear the EXTI's line Flag for RTC Alarm */
<> 144:ef7eb2e8f9f7 1335 __HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 1336
<> 144:ef7eb2e8f9f7 1337 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1338 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1339 }
<> 144:ef7eb2e8f9f7 1340
<> 144:ef7eb2e8f9f7 1341 /**
<> 144:ef7eb2e8f9f7 1342 * @brief Alarm A callback.
AnnaBridge 182:a56a73fd2a6f 1343 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1344 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1345 * @retval None
<> 144:ef7eb2e8f9f7 1346 */
<> 144:ef7eb2e8f9f7 1347 __weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1348 {
<> 144:ef7eb2e8f9f7 1349 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1350 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 1351
<> 144:ef7eb2e8f9f7 1352 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1353 the HAL_RTC_AlarmAEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1354 */
<> 144:ef7eb2e8f9f7 1355 }
<> 144:ef7eb2e8f9f7 1356
<> 144:ef7eb2e8f9f7 1357 /**
<> 144:ef7eb2e8f9f7 1358 * @brief This function handles AlarmA Polling request.
AnnaBridge 182:a56a73fd2a6f 1359 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1360 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1361 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 1362 * @retval HAL status
<> 144:ef7eb2e8f9f7 1363 */
<> 144:ef7eb2e8f9f7 1364 HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1365 {
<> 144:ef7eb2e8f9f7 1366 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1367
<> 144:ef7eb2e8f9f7 1368 /* Get tick */
<> 144:ef7eb2e8f9f7 1369 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1370
<> 144:ef7eb2e8f9f7 1371 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET)
<> 144:ef7eb2e8f9f7 1372 {
<> 144:ef7eb2e8f9f7 1373 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1374 {
<> 144:ef7eb2e8f9f7 1375 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1376 {
<> 144:ef7eb2e8f9f7 1377 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1378 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1379 }
<> 144:ef7eb2e8f9f7 1380 }
<> 144:ef7eb2e8f9f7 1381 }
<> 144:ef7eb2e8f9f7 1382
<> 144:ef7eb2e8f9f7 1383 /* Clear the Alarm interrupt pending bit */
<> 144:ef7eb2e8f9f7 1384 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
<> 144:ef7eb2e8f9f7 1385
<> 144:ef7eb2e8f9f7 1386 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1387 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1388
<> 144:ef7eb2e8f9f7 1389 return HAL_OK;
<> 144:ef7eb2e8f9f7 1390 }
<> 144:ef7eb2e8f9f7 1391
<> 144:ef7eb2e8f9f7 1392 /**
<> 144:ef7eb2e8f9f7 1393 * @}
<> 144:ef7eb2e8f9f7 1394 */
<> 144:ef7eb2e8f9f7 1395
<> 144:ef7eb2e8f9f7 1396 /** @defgroup RTC_Group4 Peripheral Control functions
<> 144:ef7eb2e8f9f7 1397 * @brief Peripheral Control functions
<> 144:ef7eb2e8f9f7 1398 *
<> 144:ef7eb2e8f9f7 1399 @verbatim
<> 144:ef7eb2e8f9f7 1400 ===============================================================================
<> 144:ef7eb2e8f9f7 1401 ##### Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 1402 ===============================================================================
<> 144:ef7eb2e8f9f7 1403 [..]
<> 144:ef7eb2e8f9f7 1404 This subsection provides functions allowing to
<> 144:ef7eb2e8f9f7 1405 (+) Wait for RTC Time and Date Synchronization
<> 144:ef7eb2e8f9f7 1406
<> 144:ef7eb2e8f9f7 1407 @endverbatim
<> 144:ef7eb2e8f9f7 1408 * @{
<> 144:ef7eb2e8f9f7 1409 */
<> 144:ef7eb2e8f9f7 1410
<> 144:ef7eb2e8f9f7 1411 /**
<> 144:ef7eb2e8f9f7 1412 * @brief Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are
<> 144:ef7eb2e8f9f7 1413 * synchronized with RTC APB clock.
<> 144:ef7eb2e8f9f7 1414 * @note The RTC Resynchronization mode is write protected, use the
<> 144:ef7eb2e8f9f7 1415 * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
<> 144:ef7eb2e8f9f7 1416 * @note To read the calendar through the shadow registers after Calendar
<> 144:ef7eb2e8f9f7 1417 * initialization, calendar update or after wakeup from low power modes
<> 144:ef7eb2e8f9f7 1418 * the software must first clear the RSF flag.
<> 144:ef7eb2e8f9f7 1419 * The software must then wait until it is set again before reading
<> 144:ef7eb2e8f9f7 1420 * the calendar, which means that the calendar registers have been
<> 144:ef7eb2e8f9f7 1421 * correctly copied into the RTC_TR and RTC_DR shadow registers.
AnnaBridge 182:a56a73fd2a6f 1422 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1423 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1424 * @retval HAL status
<> 144:ef7eb2e8f9f7 1425 */
<> 144:ef7eb2e8f9f7 1426 HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1427 {
<> 144:ef7eb2e8f9f7 1428 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1429
<> 144:ef7eb2e8f9f7 1430 /* Clear RSF flag */
<> 144:ef7eb2e8f9f7 1431 hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
<> 144:ef7eb2e8f9f7 1432
<> 144:ef7eb2e8f9f7 1433 /* Get tick */
<> 144:ef7eb2e8f9f7 1434 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1435
<> 144:ef7eb2e8f9f7 1436 /* Wait the registers to be synchronised */
<> 144:ef7eb2e8f9f7 1437 while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1438 {
<> 144:ef7eb2e8f9f7 1439 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1440 {
<> 144:ef7eb2e8f9f7 1441 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1442 }
<> 144:ef7eb2e8f9f7 1443 }
<> 144:ef7eb2e8f9f7 1444
<> 144:ef7eb2e8f9f7 1445 return HAL_OK;
<> 144:ef7eb2e8f9f7 1446 }
<> 144:ef7eb2e8f9f7 1447
<> 144:ef7eb2e8f9f7 1448 /**
<> 144:ef7eb2e8f9f7 1449 * @}
<> 144:ef7eb2e8f9f7 1450 */
<> 144:ef7eb2e8f9f7 1451
<> 144:ef7eb2e8f9f7 1452 /** @defgroup RTC_Group5 Peripheral State functions
<> 144:ef7eb2e8f9f7 1453 * @brief Peripheral State functions
<> 144:ef7eb2e8f9f7 1454 *
<> 144:ef7eb2e8f9f7 1455 @verbatim
<> 144:ef7eb2e8f9f7 1456 ===============================================================================
<> 144:ef7eb2e8f9f7 1457 ##### Peripheral State functions #####
<> 144:ef7eb2e8f9f7 1458 ===============================================================================
<> 144:ef7eb2e8f9f7 1459 [..]
<> 144:ef7eb2e8f9f7 1460 This subsection provides functions allowing to
<> 144:ef7eb2e8f9f7 1461 (+) Get RTC state
<> 144:ef7eb2e8f9f7 1462
<> 144:ef7eb2e8f9f7 1463 @endverbatim
<> 144:ef7eb2e8f9f7 1464 * @{
<> 144:ef7eb2e8f9f7 1465 */
<> 144:ef7eb2e8f9f7 1466 /**
<> 144:ef7eb2e8f9f7 1467 * @brief Returns the RTC state.
AnnaBridge 182:a56a73fd2a6f 1468 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1469 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1470 * @retval HAL state
<> 144:ef7eb2e8f9f7 1471 */
<> 144:ef7eb2e8f9f7 1472 HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1473 {
<> 144:ef7eb2e8f9f7 1474 return hrtc->State;
<> 144:ef7eb2e8f9f7 1475 }
<> 144:ef7eb2e8f9f7 1476
<> 144:ef7eb2e8f9f7 1477 /**
<> 144:ef7eb2e8f9f7 1478 * @}
<> 144:ef7eb2e8f9f7 1479 */
<> 144:ef7eb2e8f9f7 1480
<> 144:ef7eb2e8f9f7 1481 /**
<> 144:ef7eb2e8f9f7 1482 * @brief Enters the RTC Initialization mode.
<> 144:ef7eb2e8f9f7 1483 * @note The RTC Initialization mode is write protected, use the
<> 144:ef7eb2e8f9f7 1484 * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
AnnaBridge 182:a56a73fd2a6f 1485 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1486 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1487 * @retval HAL status
<> 144:ef7eb2e8f9f7 1488 */
<> 144:ef7eb2e8f9f7 1489 HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1490 {
<> 144:ef7eb2e8f9f7 1491 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1492
<> 144:ef7eb2e8f9f7 1493 /* Check if the Initialization mode is set */
<> 144:ef7eb2e8f9f7 1494 if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1495 {
<> 144:ef7eb2e8f9f7 1496 /* Set the Initialization mode */
<> 144:ef7eb2e8f9f7 1497 hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
<> 144:ef7eb2e8f9f7 1498
<> 144:ef7eb2e8f9f7 1499 /* Get tick */
<> 144:ef7eb2e8f9f7 1500 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1501
<> 144:ef7eb2e8f9f7 1502 /* Wait till RTC is in INIT state and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1503 while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1504 {
<> 144:ef7eb2e8f9f7 1505 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1506 {
<> 144:ef7eb2e8f9f7 1507 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1508 }
<> 144:ef7eb2e8f9f7 1509 }
<> 144:ef7eb2e8f9f7 1510 }
<> 144:ef7eb2e8f9f7 1511
<> 144:ef7eb2e8f9f7 1512 return HAL_OK;
<> 144:ef7eb2e8f9f7 1513 }
<> 144:ef7eb2e8f9f7 1514
<> 144:ef7eb2e8f9f7 1515
<> 144:ef7eb2e8f9f7 1516 /**
<> 144:ef7eb2e8f9f7 1517 * @brief Converts a 2 digit decimal to BCD format.
AnnaBridge 182:a56a73fd2a6f 1518 * @param Value Byte to be converted
<> 144:ef7eb2e8f9f7 1519 * @retval Converted byte
<> 144:ef7eb2e8f9f7 1520 */
<> 144:ef7eb2e8f9f7 1521 uint8_t RTC_ByteToBcd2(uint8_t Value)
<> 144:ef7eb2e8f9f7 1522 {
<> 144:ef7eb2e8f9f7 1523 uint32_t bcdhigh = 0;
<> 144:ef7eb2e8f9f7 1524
<> 144:ef7eb2e8f9f7 1525 while(Value >= 10)
<> 144:ef7eb2e8f9f7 1526 {
<> 144:ef7eb2e8f9f7 1527 bcdhigh++;
<> 144:ef7eb2e8f9f7 1528 Value -= 10;
<> 144:ef7eb2e8f9f7 1529 }
<> 144:ef7eb2e8f9f7 1530
<> 144:ef7eb2e8f9f7 1531 return ((uint8_t)(bcdhigh << 4) | Value);
<> 144:ef7eb2e8f9f7 1532 }
<> 144:ef7eb2e8f9f7 1533
<> 144:ef7eb2e8f9f7 1534 /**
<> 144:ef7eb2e8f9f7 1535 * @brief Converts from 2 digit BCD to Binary.
AnnaBridge 182:a56a73fd2a6f 1536 * @param Value BCD value to be converted
<> 144:ef7eb2e8f9f7 1537 * @retval Converted word
<> 144:ef7eb2e8f9f7 1538 */
<> 144:ef7eb2e8f9f7 1539 uint8_t RTC_Bcd2ToByte(uint8_t Value)
<> 144:ef7eb2e8f9f7 1540 {
<> 144:ef7eb2e8f9f7 1541 uint32_t tmp = 0;
<> 144:ef7eb2e8f9f7 1542 tmp = ((uint8_t)(Value & (uint8_t)0xF0) >> (uint8_t)0x4) * 10;
<> 144:ef7eb2e8f9f7 1543 return (tmp + (Value & (uint8_t)0x0F));
<> 144:ef7eb2e8f9f7 1544 }
<> 144:ef7eb2e8f9f7 1545
<> 144:ef7eb2e8f9f7 1546 /**
<> 144:ef7eb2e8f9f7 1547 * @}
<> 144:ef7eb2e8f9f7 1548 */
<> 144:ef7eb2e8f9f7 1549
<> 144:ef7eb2e8f9f7 1550 #endif /* HAL_RTC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 1551 /**
<> 144:ef7eb2e8f9f7 1552 * @}
<> 144:ef7eb2e8f9f7 1553 */
<> 144:ef7eb2e8f9f7 1554
<> 144:ef7eb2e8f9f7 1555 /**
<> 144:ef7eb2e8f9f7 1556 * @}
<> 144:ef7eb2e8f9f7 1557 */
<> 144:ef7eb2e8f9f7 1558
<> 144:ef7eb2e8f9f7 1559 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/