Senior Design: Sound Monitor / FINAL_AUDIO_RECORD

AudioRecord and FFT/MSE comparison. Call AudioRecord_demo for control record and AudioSample for subsequent recordings.

Dependencies:   CMSIS_DSP_401 STM32L4xx_HAL_Driver

Fork of OneHopeOnePrayer by Senior Design: Sound Monitor

n25q128a.h@5:f6afbd3fc47a, 2015-12-05 (annotated)

Committer:
EricLew
Date:
Sat Dec 05 16:17:25 2015 +0000
Revision:
5:f6afbd3fc47a
Parent:
0:d4e5ad7ad71c 
Ported to Nucleo

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:d4e5ad7ad71c 1 /**
EricLew 0:d4e5ad7ad71c 2 ******************************************************************************
EricLew 0:d4e5ad7ad71c 3 * @file n25q128a.h
EricLew 0:d4e5ad7ad71c 4 * @author MCD Application Team
EricLew 0:d4e5ad7ad71c 5 * @version V1.0.0
EricLew 0:d4e5ad7ad71c 6 * @date 29-May-2015
EricLew 0:d4e5ad7ad71c 7 * @brief This file contains all the description of the N25Q128A QSPI memory.
EricLew 0:d4e5ad7ad71c 8 ******************************************************************************
EricLew 0:d4e5ad7ad71c 9 * @attention
EricLew 0:d4e5ad7ad71c 10 *
EricLew 0:d4e5ad7ad71c 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:d4e5ad7ad71c 12 *
EricLew 0:d4e5ad7ad71c 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:d4e5ad7ad71c 14 * are permitted provided that the following conditions are met:
EricLew 0:d4e5ad7ad71c 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:d4e5ad7ad71c 16 * this list of conditions and the following disclaimer.
EricLew 0:d4e5ad7ad71c 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:d4e5ad7ad71c 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:d4e5ad7ad71c 19 * and/or other materials provided with the distribution.
EricLew 0:d4e5ad7ad71c 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:d4e5ad7ad71c 21 * may be used to endorse or promote products derived from this software
EricLew 0:d4e5ad7ad71c 22 * without specific prior written permission.
EricLew 0:d4e5ad7ad71c 23 *
EricLew 0:d4e5ad7ad71c 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:d4e5ad7ad71c 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:d4e5ad7ad71c 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:d4e5ad7ad71c 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:d4e5ad7ad71c 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:d4e5ad7ad71c 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:d4e5ad7ad71c 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:d4e5ad7ad71c 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:d4e5ad7ad71c 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:d4e5ad7ad71c 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:d4e5ad7ad71c 34 *
EricLew 0:d4e5ad7ad71c 35 ******************************************************************************
EricLew 0:d4e5ad7ad71c 36 */
EricLew 0:d4e5ad7ad71c 37
EricLew 0:d4e5ad7ad71c 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:d4e5ad7ad71c 39 #ifndef __N25Q128A_H
EricLew 0:d4e5ad7ad71c 40 #define __N25Q128A_H
EricLew 0:d4e5ad7ad71c 41
EricLew 0:d4e5ad7ad71c 42 #ifdef __cplusplus
EricLew 0:d4e5ad7ad71c 43 extern "C" {
EricLew 0:d4e5ad7ad71c 44 #endif
EricLew 0:d4e5ad7ad71c 45
EricLew 0:d4e5ad7ad71c 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:d4e5ad7ad71c 47
EricLew 0:d4e5ad7ad71c 48 /** @addtogroup BSP
EricLew 0:d4e5ad7ad71c 49 * @{
EricLew 0:d4e5ad7ad71c 50 */
EricLew 0:d4e5ad7ad71c 51
EricLew 0:d4e5ad7ad71c 52 /** @addtogroup Components
EricLew 0:d4e5ad7ad71c 53 * @{
EricLew 0:d4e5ad7ad71c 54 */
EricLew 0:d4e5ad7ad71c 55
EricLew 0:d4e5ad7ad71c 56 /** @addtogroup n25q128a
EricLew 0:d4e5ad7ad71c 57 * @{
EricLew 0:d4e5ad7ad71c 58 */
EricLew 0:d4e5ad7ad71c 59
EricLew 0:d4e5ad7ad71c 60 /** @defgroup N25Q128A_Exported_Types
EricLew 0:d4e5ad7ad71c 61 * @{
EricLew 0:d4e5ad7ad71c 62 */
EricLew 0:d4e5ad7ad71c 63
EricLew 0:d4e5ad7ad71c 64 /**
EricLew 0:d4e5ad7ad71c 65 * @}
EricLew 0:d4e5ad7ad71c 66 */
EricLew 0:d4e5ad7ad71c 67
EricLew 0:d4e5ad7ad71c 68 /** @defgroup N25Q128A_Exported_Constants
EricLew 0:d4e5ad7ad71c 69 * @{
EricLew 0:d4e5ad7ad71c 70 */
EricLew 0:d4e5ad7ad71c 71
EricLew 0:d4e5ad7ad71c 72 /**
EricLew 0:d4e5ad7ad71c 73 * @brief N25Q128A Configuration
EricLew 0:d4e5ad7ad71c 74 */
EricLew 0:d4e5ad7ad71c 75 #define N25Q128A_FLASH_SIZE 0x1000000 /* 128 MBits => 16MBytes */
EricLew 0:d4e5ad7ad71c 76 #define N25Q128A_SECTOR_SIZE 0x10000 /* 256 sectors of 64KBytes */
EricLew 0:d4e5ad7ad71c 77 #define N25Q128A_SUBSECTOR_SIZE 0x1000 /* 4096 subsectors of 4kBytes */
EricLew 0:d4e5ad7ad71c 78 #define N25Q128A_PAGE_SIZE 0x100 /* 65536 pages of 256 bytes */
EricLew 0:d4e5ad7ad71c 79
EricLew 0:d4e5ad7ad71c 80 #define N25Q128A_DUMMY_CYCLES_READ 8
EricLew 0:d4e5ad7ad71c 81 #define N25Q128A_DUMMY_CYCLES_READ_QUAD 10
EricLew 0:d4e5ad7ad71c 82
EricLew 0:d4e5ad7ad71c 83 #define N25Q128A_BULK_ERASE_MAX_TIME 250000
EricLew 0:d4e5ad7ad71c 84 #define N25Q128A_SECTOR_ERASE_MAX_TIME 3000
EricLew 0:d4e5ad7ad71c 85 #define N25Q128A_SUBSECTOR_ERASE_MAX_TIME 800
EricLew 0:d4e5ad7ad71c 86
EricLew 0:d4e5ad7ad71c 87 /**
EricLew 0:d4e5ad7ad71c 88 * @brief N25Q128A Commands
EricLew 0:d4e5ad7ad71c 89 */
EricLew 0:d4e5ad7ad71c 90 /* Reset Operations */
EricLew 0:d4e5ad7ad71c 91 #define RESET_ENABLE_CMD 0x66
EricLew 0:d4e5ad7ad71c 92 #define RESET_MEMORY_CMD 0x99
EricLew 0:d4e5ad7ad71c 93
EricLew 0:d4e5ad7ad71c 94 /* Identification Operations */
EricLew 0:d4e5ad7ad71c 95 #define READ_ID_CMD 0x9E
EricLew 0:d4e5ad7ad71c 96 #define READ_ID_CMD2 0x9F
EricLew 0:d4e5ad7ad71c 97 #define MULTIPLE_IO_READ_ID_CMD 0xAF
EricLew 0:d4e5ad7ad71c 98 #define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
EricLew 0:d4e5ad7ad71c 99
EricLew 0:d4e5ad7ad71c 100 /* Read Operations */
EricLew 0:d4e5ad7ad71c 101 #define READ_CMD 0x03
EricLew 0:d4e5ad7ad71c 102 #define FAST_READ_CMD 0x0B
EricLew 0:d4e5ad7ad71c 103 #define DUAL_OUT_FAST_READ_CMD 0x3B
EricLew 0:d4e5ad7ad71c 104 #define DUAL_INOUT_FAST_READ_CMD 0xBB
EricLew 0:d4e5ad7ad71c 105 #define QUAD_OUT_FAST_READ_CMD 0x6B
EricLew 0:d4e5ad7ad71c 106 #define QUAD_INOUT_FAST_READ_CMD 0xEB
EricLew 0:d4e5ad7ad71c 107
EricLew 0:d4e5ad7ad71c 108 /* Write Operations */
EricLew 0:d4e5ad7ad71c 109 #define WRITE_ENABLE_CMD 0x06
EricLew 0:d4e5ad7ad71c 110 #define WRITE_DISABLE_CMD 0x04
EricLew 0:d4e5ad7ad71c 111
EricLew 0:d4e5ad7ad71c 112 /* Register Operations */
EricLew 0:d4e5ad7ad71c 113 #define READ_STATUS_REG_CMD 0x05
EricLew 0:d4e5ad7ad71c 114 #define WRITE_STATUS_REG_CMD 0x01
EricLew 0:d4e5ad7ad71c 115
EricLew 0:d4e5ad7ad71c 116 #define READ_LOCK_REG_CMD 0xE8
EricLew 0:d4e5ad7ad71c 117 #define WRITE_LOCK_REG_CMD 0xE5
EricLew 0:d4e5ad7ad71c 118
EricLew 0:d4e5ad7ad71c 119 #define READ_FLAG_STATUS_REG_CMD 0x70
EricLew 0:d4e5ad7ad71c 120 #define CLEAR_FLAG_STATUS_REG_CMD 0x50
EricLew 0:d4e5ad7ad71c 121
EricLew 0:d4e5ad7ad71c 122 #define READ_NONVOL_CFG_REG_CMD 0xB5
EricLew 0:d4e5ad7ad71c 123 #define WRITE_NONVOL_CFG_REG_CMD 0xB1
EricLew 0:d4e5ad7ad71c 124
EricLew 0:d4e5ad7ad71c 125 #define READ_VOL_CFG_REG_CMD 0x85
EricLew 0:d4e5ad7ad71c 126 #define WRITE_VOL_CFG_REG_CMD 0x81
EricLew 0:d4e5ad7ad71c 127
EricLew 0:d4e5ad7ad71c 128 #define READ_ENHANCED_VOL_CFG_REG_CMD 0x65
EricLew 0:d4e5ad7ad71c 129 #define WRITE_ENHANCED_VOL_CFG_REG_CMD 0x61
EricLew 0:d4e5ad7ad71c 130
EricLew 0:d4e5ad7ad71c 131 /* Program Operations */
EricLew 0:d4e5ad7ad71c 132 #define PAGE_PROG_CMD 0x02
EricLew 0:d4e5ad7ad71c 133 #define DUAL_IN_FAST_PROG_CMD 0xA2
EricLew 0:d4e5ad7ad71c 134 #define EXT_DUAL_IN_FAST_PROG_CMD 0xD2
EricLew 0:d4e5ad7ad71c 135 #define QUAD_IN_FAST_PROG_CMD 0x32
EricLew 0:d4e5ad7ad71c 136 #define EXT_QUAD_IN_FAST_PROG_CMD 0x12
EricLew 0:d4e5ad7ad71c 137
EricLew 0:d4e5ad7ad71c 138 /* Erase Operations */
EricLew 0:d4e5ad7ad71c 139 #define SUBSECTOR_ERASE_CMD 0x20
EricLew 0:d4e5ad7ad71c 140 #define SECTOR_ERASE_CMD 0xD8
EricLew 0:d4e5ad7ad71c 141 #define BULK_ERASE_CMD 0xC7
EricLew 0:d4e5ad7ad71c 142
EricLew 0:d4e5ad7ad71c 143 #define PROG_ERASE_RESUME_CMD 0x7A
EricLew 0:d4e5ad7ad71c 144 #define PROG_ERASE_SUSPEND_CMD 0x75
EricLew 0:d4e5ad7ad71c 145
EricLew 0:d4e5ad7ad71c 146 /* One-Time Programmable Operations */
EricLew 0:d4e5ad7ad71c 147 #define READ_OTP_ARRAY_CMD 0x4B
EricLew 0:d4e5ad7ad71c 148 #define PROG_OTP_ARRAY_CMD 0x42
EricLew 0:d4e5ad7ad71c 149
EricLew 0:d4e5ad7ad71c 150 /**
EricLew 0:d4e5ad7ad71c 151 * @brief N25Q128A Registers
EricLew 0:d4e5ad7ad71c 152 */
EricLew 0:d4e5ad7ad71c 153 /* Status Register */
EricLew 0:d4e5ad7ad71c 154 #define N25Q128A_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
EricLew 0:d4e5ad7ad71c 155 #define N25Q128A_SR_WREN ((uint8_t)0x02) /*!< Write enable latch */
EricLew 0:d4e5ad7ad71c 156 #define N25Q128A_SR_BLOCKPR ((uint8_t)0x5C) /*!< Block protected against program and erase operations */
EricLew 0:d4e5ad7ad71c 157 #define N25Q128A_SR_PRBOTTOM ((uint8_t)0x20) /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
EricLew 0:d4e5ad7ad71c 158 #define N25Q128A_SR_SRWREN ((uint8_t)0x80) /*!< Status register write enable/disable */
EricLew 0:d4e5ad7ad71c 159
EricLew 0:d4e5ad7ad71c 160 /* Nonvolatile Configuration Register */
EricLew 0:d4e5ad7ad71c 161 #define N25Q128A_NVCR_LOCK ((uint16_t)0x0001) /*!< Lock nonvolatile configuration register */
EricLew 0:d4e5ad7ad71c 162 #define N25Q128A_NVCR_DUAL ((uint16_t)0x0004) /*!< Dual I/O protocol */
EricLew 0:d4e5ad7ad71c 163 #define N25Q128A_NVCR_QUAB ((uint16_t)0x0008) /*!< Quad I/O protocol */
EricLew 0:d4e5ad7ad71c 164 #define N25Q128A_NVCR_RH ((uint16_t)0x0010) /*!< Reset/hold */
EricLew 0:d4e5ad7ad71c 165 #define N25Q128A_NVCR_ODS ((uint16_t)0x01C0) /*!< Output driver strength */
EricLew 0:d4e5ad7ad71c 166 #define N25Q128A_NVCR_XIP ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
EricLew 0:d4e5ad7ad71c 167 #define N25Q128A_NVCR_NB_DUMMY ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
EricLew 0:d4e5ad7ad71c 168
EricLew 0:d4e5ad7ad71c 169 /* Volatile Configuration Register */
EricLew 0:d4e5ad7ad71c 170 #define N25Q128A_VCR_WRAP ((uint8_t)0x03) /*!< Wrap */
EricLew 0:d4e5ad7ad71c 171 #define N25Q128A_VCR_XIP ((uint8_t)0x08) /*!< XIP */
EricLew 0:d4e5ad7ad71c 172 #define N25Q128A_VCR_NB_DUMMY ((uint8_t)0xF0) /*!< Number of dummy clock cycles */
EricLew 0:d4e5ad7ad71c 173
EricLew 0:d4e5ad7ad71c 174 /* Enhanced Volatile Configuration Register */
EricLew 0:d4e5ad7ad71c 175 #define N25Q128A_EVCR_ODS ((uint8_t)0x07) /*!< Output driver strength */
EricLew 0:d4e5ad7ad71c 176 #define N25Q128A_EVCR_VPPA ((uint8_t)0x08) /*!< Vpp accelerator */
EricLew 0:d4e5ad7ad71c 177 #define N25Q128A_EVCR_RH ((uint8_t)0x10) /*!< Reset/hold */
EricLew 0:d4e5ad7ad71c 178 #define N25Q128A_EVCR_DUAL ((uint8_t)0x40) /*!< Dual I/O protocol */
EricLew 0:d4e5ad7ad71c 179 #define N25Q128A_EVCR_QUAD ((uint8_t)0x80) /*!< Quad I/O protocol */
EricLew 0:d4e5ad7ad71c 180
EricLew 0:d4e5ad7ad71c 181 /* Flag Status Register */
EricLew 0:d4e5ad7ad71c 182 #define N25Q128A_FSR_PRERR ((uint8_t)0x02) /*!< Protection error */
EricLew 0:d4e5ad7ad71c 183 #define N25Q128A_FSR_PGSUS ((uint8_t)0x04) /*!< Program operation suspended */
EricLew 0:d4e5ad7ad71c 184 #define N25Q128A_FSR_VPPERR ((uint8_t)0x08) /*!< Invalid voltage during program or erase */
EricLew 0:d4e5ad7ad71c 185 #define N25Q128A_FSR_PGERR ((uint8_t)0x10) /*!< Program error */
EricLew 0:d4e5ad7ad71c 186 #define N25Q128A_FSR_ERERR ((uint8_t)0x20) /*!< Erase error */
EricLew 0:d4e5ad7ad71c 187 #define N25Q128A_FSR_ERSUS ((uint8_t)0x40) /*!< Erase operation suspended */
EricLew 0:d4e5ad7ad71c 188 #define N25Q128A_FSR_READY ((uint8_t)0x80) /*!< Ready or command in progress */
EricLew 0:d4e5ad7ad71c 189
EricLew 0:d4e5ad7ad71c 190 /**
EricLew 0:d4e5ad7ad71c 191 * @}
EricLew 0:d4e5ad7ad71c 192 */
EricLew 0:d4e5ad7ad71c 193
EricLew 0:d4e5ad7ad71c 194 /** @defgroup N25Q128A_Exported_Functions
EricLew 0:d4e5ad7ad71c 195 * @{
EricLew 0:d4e5ad7ad71c 196 */
EricLew 0:d4e5ad7ad71c 197 /**
EricLew 0:d4e5ad7ad71c 198 * @}
EricLew 0:d4e5ad7ad71c 199 */
EricLew 0:d4e5ad7ad71c 200
EricLew 0:d4e5ad7ad71c 201 /**
EricLew 0:d4e5ad7ad71c 202 * @}
EricLew 0:d4e5ad7ad71c 203 */
EricLew 0:d4e5ad7ad71c 204
EricLew 0:d4e5ad7ad71c 205 /**
EricLew 0:d4e5ad7ad71c 206 * @}
EricLew 0:d4e5ad7ad71c 207 */
EricLew 0:d4e5ad7ad71c 208
EricLew 0:d4e5ad7ad71c 209 /**
EricLew 0:d4e5ad7ad71c 210 * @}
EricLew 0:d4e5ad7ad71c 211 */
EricLew 0:d4e5ad7ad71c 212
EricLew 0:d4e5ad7ad71c 213 #ifdef __cplusplus
EricLew 0:d4e5ad7ad71c 214 }
EricLew 0:d4e5ad7ad71c 215 #endif
EricLew 0:d4e5ad7ad71c 216
EricLew 0:d4e5ad7ad71c 217 #endif /* __N25Q128A_H */
EricLew 0:d4e5ad7ad71c 218
EricLew 0:d4e5ad7ad71c 219 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:d4e5ad7ad71c 220