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Dependencies: BSP
main.c
00001 /** 00002 ****************************************************************************** 00003 * @file DFSDM/DFSDM_AudioRecord/Src/main.c 00004 * @author MCD Application Team 00005 * @version V1.1.0 00006 * @date 16-September-2015 00007 * @brief This example describes how to use DFSDM HAL API to realize 00008 * audio recording. 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> 00013 * 00014 * Redistribution and use in source and binary forms, with or without modification, 00015 * are permitted provided that the following conditions are met: 00016 * 1. Redistributions of source code must retain the above copyright notice, 00017 * this list of conditions and the following disclaimer. 00018 * 2. Redistributions in binary form must reproduce the above copyright notice, 00019 * this list of conditions and the following disclaimer in the documentation 00020 * and/or other materials provided with the distribution. 00021 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00022 * may be used to endorse or promote products derived from this software 00023 * without specific prior written permission. 00024 * 00025 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00026 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00027 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00028 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00029 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00030 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00031 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00032 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00033 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00034 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00035 * 00036 ****************************************************************************** 00037 */ 00038 00039 /* Includes ------------------------------------------------------------------*/ 00040 #include "main.h" 00041 00042 /** @addtogroup STM32L4xx_HAL_Examples 00043 * @{ 00044 */ 00045 00046 /** @addtogroup DFSDM_AudioRecord 00047 * @{ 00048 */ 00049 00050 /* Private typedef -----------------------------------------------------------*/ 00051 /* Private define ------------------------------------------------------------*/ 00052 /* Private macro -------------------------------------------------------------*/ 00053 #define SaturaLH(N, L, H) (((N)<(L))?(L):(((N)>(H))?(H):(N))) 00054 /* Private variables ---------------------------------------------------------*/ 00055 DFSDM_Channel_HandleTypeDef DfsdmChannelHandle; 00056 DFSDM_Filter_HandleTypeDef DfsdmFilterHandle; 00057 DMA_HandleTypeDef hDfsdmDma; 00058 SAI_HandleTypeDef SaiHandle; 00059 DMA_HandleTypeDef hSaiDma; 00060 AUDIO_DrvTypeDef *audio_drv; 00061 int32_t RecBuff[2048]; 00062 int16_t PlayBuff[4096]; 00063 uint32_t DmaRecHalfBuffCplt = 0; 00064 uint32_t DmaRecBuffCplt = 0; 00065 uint32_t PlaybackStarted = 0; 00066 /* Private function prototypes -----------------------------------------------*/ 00067 void SystemClock_Config(void); 00068 static void DFSDM_Init(void); 00069 static void Playback_Init(void); 00070 00071 /* Private functions ---------------------------------------------------------*/ 00072 00073 /** 00074 * @brief Main program 00075 * @param None 00076 * @retval None 00077 */ 00078 int main(void) 00079 { 00080 uint32_t i; 00081 /* STM32L4xx HAL library initialization: 00082 - Configure the Flash prefetch 00083 - Systick timer is configured by default as source of time base, but user 00084 can eventually implement his proper time base source (a general purpose 00085 timer for example or other time source), keeping in mind that Time base 00086 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and 00087 handled in milliseconds basis. 00088 - Set NVIC Group Priority to 4 00089 - Low Level Initialization 00090 */ 00091 HAL_Init(); 00092 00093 /* Configure the system clock to have a frequency of 80 MHz */ 00094 SystemClock_Config(); 00095 00096 /* Configure LED4 */ 00097 BSP_LED_Init(LED4); 00098 00099 /* Initialize DFSDM channels and filter for record */ 00100 DFSDM_Init(); 00101 00102 /* Initialize playback */ 00103 Playback_Init(); 00104 00105 /* Start DFSDM conversions */ 00106 if(HAL_OK != HAL_DFSDM_FilterRegularStart_DMA(&DfsdmFilterHandle, RecBuff, 2048)) 00107 { 00108 Error_Handler(); 00109 } 00110 00111 /* Start loopback */ 00112 while(1) 00113 { 00114 if(DmaRecHalfBuffCplt == 1) 00115 { 00116 /* Store values on Play buff */ 00117 for(i = 0; i < 1024; i++) 00118 { 00119 PlayBuff[2*i] = SaturaLH((RecBuff[i] >> 8), -32768, 32767); 00120 PlayBuff[(2*i)+1] = PlayBuff[2*i]; 00121 } 00122 if(PlaybackStarted == 0) 00123 { 00124 if(0 != audio_drv->Play(AUDIO_I2C_ADDRESS, (uint16_t *) &PlayBuff[0], 4096)) 00125 { 00126 Error_Handler(); 00127 } 00128 if(HAL_OK != HAL_SAI_Transmit_DMA(&SaiHandle, (uint8_t *) &PlayBuff[0], 4096)) 00129 { 00130 Error_Handler(); 00131 } 00132 PlaybackStarted = 1; 00133 } 00134 DmaRecHalfBuffCplt = 0; 00135 } 00136 if(DmaRecBuffCplt == 1) 00137 { 00138 /* Store values on Play buff */ 00139 for(i = 1024; i < 2048; i++) 00140 { 00141 PlayBuff[2*i] = SaturaLH((RecBuff[i] >> 8), -32768, 32767); 00142 PlayBuff[(2*i)+1] = PlayBuff[2*i]; 00143 } 00144 DmaRecBuffCplt = 0; 00145 } 00146 } 00147 } 00148 00149 /** 00150 * @brief System Clock Configuration 00151 * The system Clock is configured as follows : 00152 * System Clock source = PLL (MSI) 00153 * SYSCLK(Hz) = 80000000 00154 * HCLK(Hz) = 80000000 00155 * AHB Prescaler = 1 00156 * APB1 Prescaler = 1 00157 * APB2 Prescaler = 1 00158 * MSI Frequency(Hz) = 4000000 00159 * PLL_M = 1 00160 * PLL_N = 40 00161 * PLL_R = 2 00162 * PLL_P = 7 00163 * PLL_Q = 4 00164 * Flash Latency(WS) = 4 00165 * @param None 00166 * @retval None 00167 */ 00168 void SystemClock_Config(void) 00169 { 00170 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 00171 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 00172 00173 /* MSI is enabled after System reset, activate PLL with MSI as source */ 00174 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; 00175 RCC_OscInitStruct.MSIState = RCC_MSI_ON; 00176 RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; 00177 RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; 00178 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 00179 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; 00180 RCC_OscInitStruct.PLL.PLLM = 1; 00181 RCC_OscInitStruct.PLL.PLLN = 40; 00182 RCC_OscInitStruct.PLL.PLLR = 2; 00183 RCC_OscInitStruct.PLL.PLLP = 7; 00184 RCC_OscInitStruct.PLL.PLLQ = 4; 00185 if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 00186 { 00187 /* Initialization Error */ 00188 while(1); 00189 } 00190 00191 /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 00192 clocks dividers */ 00193 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); 00194 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 00195 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 00196 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 00197 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 00198 if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) 00199 { 00200 /* Initialization Error */ 00201 while(1); 00202 } 00203 } 00204 00205 /** 00206 * @brief DFSDM channels and filter initialization 00207 * @param None 00208 * @retval None 00209 */ 00210 static void DFSDM_Init(void) 00211 { 00212 /* Initialize channel 2 */ 00213 __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(&DfsdmChannelHandle); 00214 DfsdmChannelHandle.Instance = DFSDM_Channel2; 00215 DfsdmChannelHandle.Init.OutputClock.Activation = ENABLE; 00216 DfsdmChannelHandle.Init.OutputClock.Selection = DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO; 00217 DfsdmChannelHandle.Init.OutputClock.Divider = 4; /* 11.294MHz/4 = 2.82MHz */ 00218 DfsdmChannelHandle.Init.Input.Multiplexer = DFSDM_CHANNEL_EXTERNAL_INPUTS; 00219 DfsdmChannelHandle.Init.Input.DataPacking = DFSDM_CHANNEL_STANDARD_MODE; /* N.U. */ 00220 DfsdmChannelHandle.Init.Input.Pins = DFSDM_CHANNEL_SAME_CHANNEL_PINS; 00221 DfsdmChannelHandle.Init.SerialInterface.Type = DFSDM_CHANNEL_SPI_RISING; 00222 DfsdmChannelHandle.Init.SerialInterface.SpiClock = DFSDM_CHANNEL_SPI_CLOCK_INTERNAL; 00223 DfsdmChannelHandle.Init.Awd.FilterOrder = DFSDM_CHANNEL_FASTSINC_ORDER; /* N.U. */ 00224 DfsdmChannelHandle.Init.Awd.Oversampling = 10; /* N.U. */ 00225 DfsdmChannelHandle.Init.Offset = 0; 00226 DfsdmChannelHandle.Init.RightBitShift = 2; 00227 if(HAL_OK != HAL_DFSDM_ChannelInit(&DfsdmChannelHandle)) 00228 { 00229 Error_Handler(); 00230 } 00231 00232 /* Initialize filter 0 */ 00233 __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(&DfsdmFilterHandle); 00234 DfsdmFilterHandle.Instance = DFSDM_Filter0; 00235 DfsdmFilterHandle.Init.RegularParam.Trigger = DFSDM_FILTER_SW_TRIGGER; 00236 DfsdmFilterHandle.Init.RegularParam.FastMode = ENABLE; 00237 DfsdmFilterHandle.Init.RegularParam.DmaMode = ENABLE; 00238 DfsdmFilterHandle.Init.InjectedParam.Trigger = DFSDM_FILTER_SW_TRIGGER; /* N.U. */ 00239 DfsdmFilterHandle.Init.InjectedParam.ScanMode = ENABLE; /* N.U. */ 00240 DfsdmFilterHandle.Init.InjectedParam.DmaMode = DISABLE; /* N.U. */ 00241 DfsdmFilterHandle.Init.InjectedParam.ExtTrigger = DFSDM_FILTER_EXT_TRIG_TIM1_TRGO; /* N.U. */ 00242 DfsdmFilterHandle.Init.InjectedParam.ExtTriggerEdge = DFSDM_FILTER_EXT_TRIG_RISING_EDGE; /* N.U. */ 00243 DfsdmFilterHandle.Init.FilterParam.SincOrder = DFSDM_FILTER_SINC3_ORDER; 00244 DfsdmFilterHandle.Init.FilterParam.Oversampling = 64; /* 11.294MHz/(4*64) = 44.1KHz */ 00245 DfsdmFilterHandle.Init.FilterParam.IntOversampling = 1; 00246 if(HAL_OK != HAL_DFSDM_FilterInit(&DfsdmFilterHandle)) 00247 { 00248 Error_Handler(); 00249 } 00250 00251 /* Configure regular channel and continuous mode for filter 0 */ 00252 if(HAL_OK != HAL_DFSDM_FilterConfigRegChannel(&DfsdmFilterHandle, DFSDM_CHANNEL_2, DFSDM_CONTINUOUS_CONV_ON)) 00253 { 00254 Error_Handler(); 00255 } 00256 } 00257 00258 /** 00259 * @brief Playback initialization 00260 * @param None 00261 * @retval None 00262 */ 00263 static void Playback_Init(void) 00264 { 00265 /* Initialize SAI */ 00266 __HAL_SAI_RESET_HANDLE_STATE(&SaiHandle); 00267 00268 SaiHandle.Instance = SAI1_Block_A; 00269 00270 SaiHandle.Init.AudioMode = SAI_MODEMASTER_TX; 00271 SaiHandle.Init.Synchro = SAI_ASYNCHRONOUS; 00272 SaiHandle.Init.SynchroExt = SAI_SYNCEXT_DISABLE; 00273 SaiHandle.Init.OutputDrive = SAI_OUTPUTDRIVE_ENABLE; 00274 SaiHandle.Init.NoDivider = SAI_MASTERDIVIDER_ENABLE; 00275 SaiHandle.Init.FIFOThreshold = SAI_FIFOTHRESHOLD_1QF; 00276 SaiHandle.Init.AudioFrequency = SAI_AUDIO_FREQUENCY_44K; 00277 SaiHandle.Init.Mckdiv = 0; /* N.U */ 00278 SaiHandle.Init.MonoStereoMode = SAI_STEREOMODE; 00279 SaiHandle.Init.CompandingMode = SAI_NOCOMPANDING; 00280 SaiHandle.Init.TriState = SAI_OUTPUT_NOTRELEASED; 00281 SaiHandle.Init.Protocol = SAI_FREE_PROTOCOL; 00282 SaiHandle.Init.DataSize = SAI_DATASIZE_16; 00283 SaiHandle.Init.FirstBit = SAI_FIRSTBIT_MSB; 00284 SaiHandle.Init.ClockStrobing = SAI_CLOCKSTROBING_RISINGEDGE; 00285 00286 SaiHandle.FrameInit.FrameLength = 32; 00287 SaiHandle.FrameInit.ActiveFrameLength = 16; 00288 SaiHandle.FrameInit.FSDefinition = SAI_FS_CHANNEL_IDENTIFICATION; 00289 SaiHandle.FrameInit.FSPolarity = SAI_FS_ACTIVE_LOW; 00290 SaiHandle.FrameInit.FSOffset = SAI_FS_BEFOREFIRSTBIT; 00291 00292 SaiHandle.SlotInit.FirstBitOffset = 0; 00293 SaiHandle.SlotInit.SlotSize = SAI_SLOTSIZE_DATASIZE; 00294 SaiHandle.SlotInit.SlotNumber = 2; 00295 SaiHandle.SlotInit.SlotActive = (SAI_SLOTACTIVE_0 | SAI_SLOTACTIVE_1); 00296 00297 if(HAL_OK != HAL_SAI_Init(&SaiHandle)) 00298 { 00299 Error_Handler(); 00300 } 00301 00302 /* Enable SAI to generate clock used by audio driver */ 00303 __HAL_SAI_ENABLE(&SaiHandle); 00304 00305 /* Initialize audio driver */ 00306 if(CS43L22_ID != cs43l22_drv.ReadID(AUDIO_I2C_ADDRESS)) 00307 { 00308 Error_Handler(); 00309 } 00310 audio_drv = &cs43l22_drv; 00311 audio_drv->Reset(AUDIO_I2C_ADDRESS); 00312 if(0 != audio_drv->Init(AUDIO_I2C_ADDRESS, OUTPUT_DEVICE_HEADPHONE, 90, AUDIO_FREQUENCY_44K)) 00313 { 00314 Error_Handler(); 00315 } 00316 } 00317 00318 /** 00319 * @brief This function is executed in case of error occurrence. 00320 * @param None 00321 * @retval None 00322 */ 00323 void Error_Handler(void) 00324 { 00325 while (1) 00326 { 00327 /* Toggle LED4 with a period of one second */ 00328 BSP_LED_Toggle(LED4); 00329 HAL_Delay(1000); 00330 } 00331 } 00332 00333 /** 00334 * @brief Initializes the DFSDM channel MSP. 00335 * @param hdfsdm_channel : DFSDM channel handle. 00336 * @retval None 00337 */ 00338 00339 00340 void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00341 { 00342 /* Init of clock, gpio and PLLSAI1 clock */ 00343 GPIO_InitTypeDef GPIO_Init; 00344 RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct; 00345 00346 /* Enable DFSDM clock */ 00347 __HAL_RCC_DFSDM_CLK_ENABLE(); 00348 00349 /* Configure PE9 for DFSDM_CKOUT and PE7 for DFSDM_DATIN2 */ 00350 __HAL_RCC_GPIOE_CLK_ENABLE(); 00351 GPIO_Init.Mode = GPIO_MODE_AF_PP; 00352 GPIO_Init.Pull = GPIO_PULLDOWN; 00353 GPIO_Init.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 00354 GPIO_Init.Alternate = GPIO_AF6_DFSDM; 00355 GPIO_Init.Pin = GPIO_PIN_9; 00356 HAL_GPIO_Init(GPIOE, &GPIO_Init); 00357 GPIO_Init.Pin = GPIO_PIN_7; 00358 HAL_GPIO_Init(GPIOE, &GPIO_Init); 00359 00360 /* Configure and enable PLLSAI1 clock to generate 11.294MHz */ 00361 RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SAI1; 00362 RCC_PeriphCLKInitStruct.PLLSAI1.PLLSAI1N = 48; 00363 RCC_PeriphCLKInitStruct.PLLSAI1.PLLSAI1P = 17; 00364 RCC_PeriphCLKInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK; 00365 RCC_PeriphCLKInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI1; 00366 if(HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct) != HAL_OK) 00367 { 00368 Error_Handler(); 00369 } 00370 } 00371 00372 /** 00373 * @brief Initializes the DFSDM filter MSP. 00374 * @param hdfsdm_filter : DFSDM filter handle. 00375 * @retval None 00376 */ 00377 void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 00378 { 00379 /* Configure DMA1_Channel4 */ 00380 __HAL_RCC_DMA1_CLK_ENABLE(); 00381 hDfsdmDma.Init.Request = DMA_REQUEST_0; 00382 hDfsdmDma.Init.Direction = DMA_PERIPH_TO_MEMORY; 00383 hDfsdmDma.Init.PeriphInc = DMA_PINC_DISABLE; 00384 hDfsdmDma.Init.MemInc = DMA_MINC_ENABLE; 00385 hDfsdmDma.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 00386 hDfsdmDma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 00387 hDfsdmDma.Init.Mode = DMA_CIRCULAR; 00388 hDfsdmDma.Init.Priority = DMA_PRIORITY_HIGH; 00389 hDfsdmDma.Instance = DMA1_Channel4; 00390 __HAL_LINKDMA(hdfsdm_filter, hdmaReg, hDfsdmDma); 00391 if (HAL_OK != HAL_DMA_Init(&hDfsdmDma)) 00392 { 00393 Error_Handler(); 00394 } 00395 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0x01, 0); 00396 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 00397 } 00398 00399 /** 00400 * @brief SAI MSP Init. 00401 * @param hsai : pointer to a SAI_HandleTypeDef structure that contains 00402 * the configuration information for SAI module. 00403 * @retval None 00404 */ 00405 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai) 00406 { 00407 GPIO_InitTypeDef GPIO_Init; 00408 00409 /* Enable SAI1 clock */ 00410 __HAL_RCC_SAI1_CLK_ENABLE(); 00411 00412 /* Configure GPIOs used for SAI1 */ 00413 __HAL_RCC_GPIOE_CLK_ENABLE(); 00414 GPIO_Init.Mode = GPIO_MODE_AF_PP; 00415 GPIO_Init.Pull = GPIO_NOPULL; 00416 GPIO_Init.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 00417 GPIO_Init.Alternate = GPIO_AF13_SAI1; 00418 GPIO_Init.Pin = (GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6); 00419 HAL_GPIO_Init(GPIOE, &GPIO_Init); 00420 00421 /* Configure DMA used for SAI1 */ 00422 __HAL_RCC_DMA2_CLK_ENABLE(); 00423 hSaiDma.Init.Request = DMA_REQUEST_1; 00424 hSaiDma.Init.Direction = DMA_MEMORY_TO_PERIPH; 00425 hSaiDma.Init.PeriphInc = DMA_PINC_DISABLE; 00426 hSaiDma.Init.MemInc = DMA_MINC_ENABLE; 00427 hSaiDma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 00428 hSaiDma.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 00429 hSaiDma.Init.Mode = DMA_CIRCULAR; 00430 hSaiDma.Init.Priority = DMA_PRIORITY_HIGH; 00431 hSaiDma.Instance = DMA2_Channel1; 00432 __HAL_LINKDMA(hsai, hdmatx, hSaiDma); 00433 if (HAL_OK != HAL_DMA_Init(&hSaiDma)) 00434 { 00435 Error_Handler(); 00436 } 00437 HAL_NVIC_SetPriority(DMA2_Channel1_IRQn, 0x01, 0); 00438 HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn); 00439 } 00440 00441 /** 00442 * @brief Half regular conversion complete callback. 00443 * @param hdfsdm_filter : DFSDM filter handle. 00444 * @retval None 00445 */ 00446 void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 00447 { 00448 DmaRecHalfBuffCplt = 1; 00449 } 00450 00451 /** 00452 * @brief Regular conversion complete callback. 00453 * @note In interrupt mode, user has to read conversion value in this function 00454 using HAL_DFSDM_FilterGetRegularValue. 00455 * @param hdfsdm_filter : DFSDM filter handle. 00456 * @retval None 00457 */ 00458 void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 00459 { 00460 DmaRecBuffCplt = 1; 00461 } 00462 00463 #ifdef USE_FULL_ASSERT 00464 /** 00465 * @brief Reports the name of the source file and the source line number 00466 * where the assert_param error has occurred. 00467 * @param file: pointer to the source file name 00468 * @param line: assert_param error line source number 00469 * @retval None 00470 */ 00471 void assert_failed(uint8_t* file, uint32_t line) 00472 { 00473 /* User can add his own implementation to report the file name and line number, 00474 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 00475 00476 /* Infinite loop */ 00477 while (1) 00478 { 00479 } 00480 } 00481 #endif 00482 00483 /** 00484 * @} 00485 */ 00486 00487 /** 00488 * @} 00489 */ 00490 00491 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 00492
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