Driver for the SX1280 RF Transceiver
Dependents: SX1280PingPong RangignMaster RangingSlave MSNV2-Terminal_V1-6 ... more
sx1280.cpp
00001 /* 00002 ______ _ 00003 / _____) _ | | 00004 ( (____ _____ ____ _| |_ _____ ____| |__ 00005 \____ \| ___ | (_ _) ___ |/ ___) _ \ 00006 _____) ) ____| | | || |_| ____( (___| | | | 00007 (______/|_____)_|_|_| \__)_____)\____)_| |_| 00008 (C)2016 Semtech 00009 00010 Description: Driver for SX1280 devices 00011 00012 License: Revised BSD License, see LICENSE.TXT file include in the project 00013 00014 Maintainer: Miguel Luis, Gregory Cristian and Matthieu Verdy 00015 */ 00016 #include "mbed.h" 00017 #include "sx1280.h" 00018 #include "sx1280-hal.h" 00019 00020 /*! 00021 * \brief Radio registers definition 00022 * 00023 */ 00024 typedef struct 00025 { 00026 uint16_t Addr; //!< The address of the register 00027 uint8_t Value; //!< The value of the register 00028 }RadioRegisters_t; 00029 00030 /*! 00031 * \brief Radio hardware registers initialization definition 00032 */ 00033 #define RADIO_INIT_REGISTERS_VALUE { } 00034 00035 /*! 00036 * \brief Radio hardware registers initialization 00037 */ 00038 const RadioRegisters_t RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE; 00039 00040 void SX1280::Init( void ) 00041 { 00042 Reset( ); 00043 IoIrqInit( dioIrq ); 00044 Wakeup( ); 00045 SetRegistersDefault( ); 00046 } 00047 00048 void SX1280::SetRegistersDefault( void ) 00049 { 00050 for( int16_t i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ ) 00051 { 00052 WriteRegister( RadioRegsInit[i].Addr, RadioRegsInit[i].Value ); 00053 } 00054 } 00055 00056 uint16_t SX1280::GetFirmwareVersion( void ) 00057 { 00058 return( ( ( ReadRegister( REG_LR_FIRMWARE_VERSION_MSB ) ) << 8 ) | ( ReadRegister( REG_LR_FIRMWARE_VERSION_MSB + 1 ) ) ); 00059 } 00060 00061 RadioStatus_t SX1280::GetStatus( void ) 00062 { 00063 uint8_t stat = 0; 00064 RadioStatus_t status; 00065 00066 ReadCommand( RADIO_GET_STATUS, ( uint8_t * )&stat, 1 ); 00067 status.Value = stat; 00068 return( status ); 00069 } 00070 00071 RadioOperatingModes_t SX1280::GetOpMode( void ) 00072 { 00073 return( OperatingMode ); 00074 } 00075 00076 void SX1280::SetSleep( SleepParams_t sleepConfig ) 00077 { 00078 uint8_t sleep = ( sleepConfig.WakeUpRTC << 3 ) | 00079 ( sleepConfig.InstructionRamRetention << 2 ) | 00080 ( sleepConfig.DataBufferRetention << 1 ) | 00081 ( sleepConfig.DataRamRetention ); 00082 00083 OperatingMode = MODE_SLEEP; 00084 WriteCommand( RADIO_SET_SLEEP, &sleep, 1 ); 00085 } 00086 00087 void SX1280::SetStandby( RadioStandbyModes_t standbyConfig ) 00088 { 00089 WriteCommand( RADIO_SET_STANDBY, ( uint8_t* )&standbyConfig, 1 ); 00090 if( standbyConfig == STDBY_RC ) 00091 { 00092 OperatingMode = MODE_STDBY_RC; 00093 } 00094 else 00095 { 00096 OperatingMode = MODE_STDBY_XOSC; 00097 } 00098 } 00099 00100 void SX1280::SetFs( void ) 00101 { 00102 WriteCommand( RADIO_SET_FS, 0, 0 ); 00103 OperatingMode = MODE_FS; 00104 } 00105 00106 void SX1280::SetTx( TickTime_t timeout ) 00107 { 00108 uint8_t buf[3]; 00109 buf[0] = timeout.PeriodBase; 00110 buf[1] = ( uint8_t )( ( timeout.PeriodBaseCount >> 8 ) & 0x00FF ); 00111 buf[2] = ( uint8_t )( timeout.PeriodBaseCount & 0x00FF ); 00112 00113 ClearIrqStatus( IRQ_RADIO_ALL ); 00114 00115 // If the radio is doing ranging operations, then apply the specific calls 00116 // prior to SetTx 00117 if( GetPacketType( true ) == PACKET_TYPE_RANGING ) 00118 { 00119 SetRangingRole( RADIO_RANGING_ROLE_MASTER ); 00120 } 00121 WriteCommand( RADIO_SET_TX, buf, 3 ); 00122 OperatingMode = MODE_TX; 00123 } 00124 00125 void SX1280::SetRx( TickTime_t timeout ) 00126 { 00127 uint8_t buf[3]; 00128 buf[0] = timeout.PeriodBase; 00129 buf[1] = ( uint8_t )( ( timeout.PeriodBaseCount >> 8 ) & 0x00FF ); 00130 buf[2] = ( uint8_t )( timeout.PeriodBaseCount & 0x00FF ); 00131 00132 ClearIrqStatus( IRQ_RADIO_ALL ); 00133 00134 // If the radio is doing ranging operations, then apply the specific calls 00135 // prior to SetRx 00136 if( GetPacketType( true ) == PACKET_TYPE_RANGING ) 00137 { 00138 SetRangingRole( RADIO_RANGING_ROLE_SLAVE ); 00139 } 00140 WriteCommand( RADIO_SET_RX, buf, 3 ); 00141 OperatingMode = MODE_RX; 00142 } 00143 00144 void SX1280::SetRxDutyCycle( RadioTickSizes_t periodBase, uint16_t periodBaseCountRx, uint16_t periodBaseCountSleep ) 00145 { 00146 uint8_t buf[5]; 00147 00148 buf[0] = periodBase; 00149 buf[1] = ( uint8_t )( ( periodBaseCountRx >> 8 ) & 0x00FF ); 00150 buf[2] = ( uint8_t )( periodBaseCountRx & 0x00FF ); 00151 buf[3] = ( uint8_t )( ( periodBaseCountSleep >> 8 ) & 0x00FF ); 00152 buf[4] = ( uint8_t )( periodBaseCountSleep & 0x00FF ); 00153 WriteCommand( RADIO_SET_RXDUTYCYCLE, buf, 5 ); 00154 OperatingMode = MODE_RX; 00155 } 00156 00157 void SX1280::SetCad( void ) 00158 { 00159 WriteCommand( RADIO_SET_CAD, 0, 0 ); 00160 OperatingMode = MODE_CAD; 00161 } 00162 00163 void SX1280::SetTxContinuousWave( void ) 00164 { 00165 WriteCommand( RADIO_SET_TXCONTINUOUSWAVE, 0, 0 ); 00166 } 00167 00168 void SX1280::SetTxContinuousPreamble( void ) 00169 { 00170 WriteCommand( RADIO_SET_TXCONTINUOUSPREAMBLE, 0, 0 ); 00171 } 00172 00173 void SX1280::SetPacketType( RadioPacketTypes_t packetType ) 00174 { 00175 // Save packet type internally to avoid questioning the radio 00176 this->PacketType = packetType; 00177 00178 WriteCommand( RADIO_SET_PACKETTYPE, ( uint8_t* )&packetType, 1 ); 00179 } 00180 00181 RadioPacketTypes_t SX1280::GetPacketType( bool returnLocalCopy ) 00182 { 00183 RadioPacketTypes_t packetType = PACKET_TYPE_NONE; 00184 if( returnLocalCopy == false ) 00185 { 00186 ReadCommand( RADIO_GET_PACKETTYPE, ( uint8_t* )&packetType, 1 ); 00187 if( this->PacketType != packetType ) 00188 { 00189 this->PacketType = packetType; 00190 } 00191 } 00192 else 00193 { 00194 packetType = this->PacketType; 00195 } 00196 return packetType; 00197 } 00198 00199 void SX1280::SetRfFrequency( uint32_t rfFrequency ) 00200 { 00201 uint8_t buf[3]; 00202 uint32_t freq = 0; 00203 00204 freq = ( uint32_t )( ( double )rfFrequency / ( double )FREQ_STEP ); 00205 buf[0] = ( uint8_t )( ( freq >> 16 ) & 0xFF ); 00206 buf[1] = ( uint8_t )( ( freq >> 8 ) & 0xFF ); 00207 buf[2] = ( uint8_t )( freq & 0xFF ); 00208 WriteCommand( RADIO_SET_RFFREQUENCY, buf, 3 ); 00209 } 00210 00211 void SX1280::SetTxParams( int8_t power, RadioRampTimes_t rampTime ) 00212 { 00213 uint8_t buf[2]; 00214 00215 // The power value to send on SPI/UART is in the range [0..31] and the 00216 // physical output power is in the range [-18..13]dBm 00217 buf[0] = power + 18; 00218 buf[1] = ( uint8_t )rampTime; 00219 WriteCommand( RADIO_SET_TXPARAMS, buf, 2 ); 00220 } 00221 00222 void SX1280::SetCadParams( RadioLoRaCadSymbols_t cadSymbolNum ) 00223 { 00224 WriteCommand( RADIO_SET_CADPARAMS, ( uint8_t* )&cadSymbolNum, 1 ); 00225 OperatingMode = MODE_CAD; 00226 } 00227 00228 void SX1280::SetBufferBaseAddresses( uint8_t txBaseAddress, uint8_t rxBaseAddress ) 00229 { 00230 uint8_t buf[2]; 00231 00232 buf[0] = txBaseAddress; 00233 buf[1] = rxBaseAddress; 00234 WriteCommand( RADIO_SET_BUFFERBASEADDRESS, buf, 2 ); 00235 } 00236 00237 void SX1280::SetModulationParams( ModulationParams_t *modParams ) 00238 { 00239 uint8_t buf[3]; 00240 00241 // Check if required configuration corresponds to the stored packet type 00242 // If not, silently update radio packet type 00243 if( this->PacketType != modParams->PacketType ) 00244 { 00245 this->SetPacketType( modParams->PacketType ); 00246 } 00247 00248 switch( modParams->PacketType ) 00249 { 00250 case PACKET_TYPE_GFSK: 00251 buf[0] = modParams->Params.Gfsk.BitrateBandwidth; 00252 buf[1] = modParams->Params.Gfsk.ModulationIndex; 00253 buf[2] = modParams->Params.Gfsk.ModulationShaping; 00254 break; 00255 case PACKET_TYPE_LORA: 00256 case PACKET_TYPE_RANGING: 00257 buf[0] = modParams->Params.LoRa.SpreadingFactor; 00258 buf[1] = modParams->Params.LoRa.Bandwidth; 00259 buf[2] = modParams->Params.LoRa.CodingRate; 00260 this->LoRaBandwidth = modParams->Params.LoRa.Bandwidth; 00261 break; 00262 case PACKET_TYPE_FLRC: 00263 buf[0] = modParams->Params.Flrc.BitrateBandwidth; 00264 buf[1] = modParams->Params.Flrc.CodingRate; 00265 buf[2] = modParams->Params.Flrc.ModulationShaping; 00266 break; 00267 case PACKET_TYPE_BLE: 00268 buf[0] = modParams->Params.Ble.BitrateBandwidth; 00269 buf[1] = modParams->Params.Ble.ModulationIndex; 00270 buf[2] = modParams->Params.Ble.ModulationShaping; 00271 break; 00272 case PACKET_TYPE_NONE: 00273 buf[0] = NULL; 00274 buf[1] = NULL; 00275 buf[2] = NULL; 00276 break; 00277 } 00278 WriteCommand( RADIO_SET_MODULATIONPARAMS, buf, 3 ); 00279 } 00280 00281 void SX1280::SetPacketParams( PacketParams_t *packetParams ) 00282 { 00283 uint8_t buf[7]; 00284 // Check if required configuration corresponds to the stored packet type 00285 // If not, silently update radio packet type 00286 if( this->PacketType != packetParams->PacketType ) 00287 { 00288 this->SetPacketType( packetParams->PacketType ); 00289 } 00290 00291 switch( packetParams->PacketType ) 00292 { 00293 case PACKET_TYPE_GFSK: 00294 buf[0] = packetParams->Params.Gfsk.PreambleLength; 00295 buf[1] = packetParams->Params.Gfsk.SyncWordLength; 00296 buf[2] = packetParams->Params.Gfsk.SyncWordMatch; 00297 buf[3] = packetParams->Params.Gfsk.HeaderType; 00298 buf[4] = packetParams->Params.Gfsk.PayloadLength; 00299 buf[5] = packetParams->Params.Gfsk.CrcLength; 00300 buf[6] = packetParams->Params.Gfsk.Whitening; 00301 break; 00302 case PACKET_TYPE_LORA: 00303 case PACKET_TYPE_RANGING: 00304 buf[0] = packetParams->Params.LoRa.PreambleLength; 00305 buf[1] = packetParams->Params.LoRa.HeaderType; 00306 buf[2] = packetParams->Params.LoRa.PayloadLength; 00307 buf[3] = packetParams->Params.LoRa.Crc; 00308 buf[4] = packetParams->Params.LoRa.InvertIQ; 00309 buf[5] = NULL; 00310 buf[6] = NULL; 00311 break; 00312 case PACKET_TYPE_FLRC: 00313 buf[0] = packetParams->Params.Flrc.PreambleLength; 00314 buf[1] = packetParams->Params.Flrc.SyncWordLength; 00315 buf[2] = packetParams->Params.Flrc.SyncWordMatch; 00316 buf[3] = packetParams->Params.Flrc.HeaderType; 00317 buf[4] = packetParams->Params.Flrc.PayloadLength; 00318 buf[5] = packetParams->Params.Flrc.CrcLength; 00319 buf[6] = packetParams->Params.Flrc.Whitening; 00320 break; 00321 case PACKET_TYPE_BLE: 00322 buf[0] = packetParams->Params.Ble.ConnectionState; 00323 buf[1] = packetParams->Params.Ble.CrcLength; 00324 buf[2] = packetParams->Params.Ble.BleTestPayload; 00325 buf[3] = packetParams->Params.Ble.Whitening; 00326 buf[4] = NULL; 00327 buf[5] = NULL; 00328 buf[6] = NULL; 00329 break; 00330 case PACKET_TYPE_NONE: 00331 buf[0] = NULL; 00332 buf[1] = NULL; 00333 buf[2] = NULL; 00334 buf[3] = NULL; 00335 buf[4] = NULL; 00336 buf[5] = NULL; 00337 buf[6] = NULL; 00338 break; 00339 } 00340 WriteCommand( RADIO_SET_PACKETPARAMS, buf, 7 ); 00341 } 00342 00343 void SX1280::ForcePreambleLength( RadioPreambleLengths_t preambleLength ) 00344 { 00345 this->WriteRegister( REG_LR_PREAMBLELENGTH, ( this->ReadRegister( REG_LR_PREAMBLELENGTH ) & MASK_FORCE_PREAMBLELENGTH ) | preambleLength ); 00346 } 00347 00348 void SX1280::GetRxBufferStatus( uint8_t *rxPayloadLength, uint8_t *rxStartBufferPointer ) 00349 { 00350 uint8_t status[2]; 00351 00352 ReadCommand( RADIO_GET_RXBUFFERSTATUS, status, 2 ); 00353 00354 // In case of LORA fixed header, the rxPayloadLength is obtained by reading 00355 // the register REG_LR_PAYLOADLENGTH 00356 if( ( this -> GetPacketType( true ) == PACKET_TYPE_LORA ) && ( ReadRegister( REG_LR_PACKETPARAMS ) >> 7 == 1 ) ) 00357 { 00358 *rxPayloadLength = ReadRegister( REG_LR_PAYLOADLENGTH ); 00359 } 00360 else if( this -> GetPacketType( true ) == PACKET_TYPE_BLE ) 00361 { 00362 // In the case of BLE, the size returned in status[0] do not include the 2-byte length PDU header 00363 // so it is added there 00364 *rxPayloadLength = status[0] + 2; 00365 } 00366 else 00367 { 00368 *rxPayloadLength = status[0]; 00369 } 00370 00371 *rxStartBufferPointer = status[1]; 00372 } 00373 00374 void SX1280::GetPacketStatus( PacketStatus_t *packetStatus ) 00375 { 00376 uint8_t status[5]; 00377 00378 ReadCommand( RADIO_GET_PACKETSTATUS, status, 5 ); 00379 00380 packetStatus->packetType = this -> GetPacketType( true ); 00381 switch( packetStatus->packetType ) 00382 { 00383 case PACKET_TYPE_GFSK: 00384 packetStatus->Gfsk.RssiSync = -( status[1] / 2 ); 00385 00386 packetStatus->Gfsk.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01; 00387 packetStatus->Gfsk.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01; 00388 packetStatus->Gfsk.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01; 00389 packetStatus->Gfsk.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01; 00390 packetStatus->Gfsk.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01; 00391 packetStatus->Gfsk.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01; 00392 packetStatus->Gfsk.ErrorStatus.PacketControlerBusy = status[2] & 0x01; 00393 00394 packetStatus->Gfsk.TxRxStatus.RxNoAck = ( status[3] >> 5 ) & 0x01; 00395 packetStatus->Gfsk.TxRxStatus.PacketSent = status[3] & 0x01; 00396 00397 packetStatus->Gfsk.SyncAddrStatus = status[4] & 0x07; 00398 break; 00399 00400 case PACKET_TYPE_LORA: 00401 case PACKET_TYPE_RANGING: 00402 packetStatus->LoRa.RssiPkt = -( status[0] / 2 ); 00403 ( status[1] < 128 ) ? ( packetStatus->LoRa.SnrPkt = status[1] / 4 ) : ( packetStatus->LoRa.SnrPkt = ( ( status[1] - 256 ) /4 ) ); 00404 break; 00405 00406 case PACKET_TYPE_FLRC: 00407 packetStatus->Flrc.RssiSync = -( status[1] / 2 ); 00408 00409 packetStatus->Flrc.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01; 00410 packetStatus->Flrc.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01; 00411 packetStatus->Flrc.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01; 00412 packetStatus->Flrc.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01; 00413 packetStatus->Flrc.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01; 00414 packetStatus->Flrc.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01; 00415 packetStatus->Flrc.ErrorStatus.PacketControlerBusy = status[2] & 0x01; 00416 00417 packetStatus->Flrc.TxRxStatus.RxPid = ( status[3] >> 6 ) & 0x03; 00418 packetStatus->Flrc.TxRxStatus.RxNoAck = ( status[3] >> 5 ) & 0x01; 00419 packetStatus->Flrc.TxRxStatus.RxPidErr = ( status[3] >> 4 ) & 0x01; 00420 packetStatus->Flrc.TxRxStatus.PacketSent = status[3] & 0x01; 00421 00422 packetStatus->Flrc.SyncAddrStatus = status[4] & 0x07; 00423 break; 00424 00425 case PACKET_TYPE_BLE: 00426 packetStatus->Ble.RssiSync = -( status[1] / 2 ); 00427 00428 packetStatus->Ble.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01; 00429 packetStatus->Ble.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01; 00430 packetStatus->Ble.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01; 00431 packetStatus->Ble.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01; 00432 packetStatus->Ble.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01; 00433 packetStatus->Ble.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01; 00434 packetStatus->Ble.ErrorStatus.PacketControlerBusy = status[2] & 0x01; 00435 00436 packetStatus->Ble.TxRxStatus.PacketSent = status[3] & 0x01; 00437 00438 packetStatus->Ble.SyncAddrStatus = status[4] & 0x07; 00439 break; 00440 00441 case PACKET_TYPE_NONE: 00442 // In that specific case, we set everything in the packetStatus to zeros 00443 // and reset the packet type accordingly 00444 memset( packetStatus, 0, sizeof( PacketStatus_t ) ); 00445 packetStatus->packetType = PACKET_TYPE_NONE; 00446 break; 00447 } 00448 } 00449 00450 int8_t SX1280::GetRssiInst( void ) 00451 { 00452 uint8_t raw = 0; 00453 00454 ReadCommand( RADIO_GET_RSSIINST, &raw, 1 ); 00455 00456 return ( int8_t ) ( -raw / 2 ); 00457 } 00458 00459 void SX1280::SetDioIrqParams( uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask, uint16_t dio3Mask ) 00460 { 00461 uint8_t buf[8]; 00462 00463 buf[0] = ( uint8_t )( ( irqMask >> 8 ) & 0x00FF ); 00464 buf[1] = ( uint8_t )( irqMask & 0x00FF ); 00465 buf[2] = ( uint8_t )( ( dio1Mask >> 8 ) & 0x00FF ); 00466 buf[3] = ( uint8_t )( dio1Mask & 0x00FF ); 00467 buf[4] = ( uint8_t )( ( dio2Mask >> 8 ) & 0x00FF ); 00468 buf[5] = ( uint8_t )( dio2Mask & 0x00FF ); 00469 buf[6] = ( uint8_t )( ( dio3Mask >> 8 ) & 0x00FF ); 00470 buf[7] = ( uint8_t )( dio3Mask & 0x00FF ); 00471 WriteCommand( RADIO_SET_DIOIRQPARAMS, buf, 8 ); 00472 } 00473 00474 uint16_t SX1280::GetIrqStatus( void ) 00475 { 00476 uint8_t irqStatus[2]; 00477 ReadCommand( RADIO_GET_IRQSTATUS, irqStatus, 2 ); 00478 return ( irqStatus[0] << 8 ) | irqStatus[1]; 00479 } 00480 00481 void SX1280::ClearIrqStatus( uint16_t irqMask ) 00482 { 00483 uint8_t buf[2]; 00484 00485 buf[0] = ( uint8_t )( ( ( uint16_t )irqMask >> 8 ) & 0x00FF ); 00486 buf[1] = ( uint8_t )( ( uint16_t )irqMask & 0x00FF ); 00487 WriteCommand( RADIO_CLR_IRQSTATUS, buf, 2 ); 00488 } 00489 00490 void SX1280::Calibrate( CalibrationParams_t calibParam ) 00491 { 00492 uint8_t cal = ( calibParam.ADCBulkPEnable << 5 ) | 00493 ( calibParam.ADCBulkNEnable << 4 ) | 00494 ( calibParam.ADCPulseEnable << 3 ) | 00495 ( calibParam.PLLEnable << 2 ) | 00496 ( calibParam.RC13MEnable << 1 ) | 00497 ( calibParam.RC64KEnable ); 00498 WriteCommand( RADIO_CALIBRATE, &cal, 1 ); 00499 } 00500 00501 void SX1280::SetRegulatorMode( RadioRegulatorModes_t mode ) 00502 { 00503 WriteCommand( RADIO_SET_REGULATORMODE, ( uint8_t* )&mode, 1 ); 00504 } 00505 00506 void SX1280::SetSaveContext( void ) 00507 { 00508 WriteCommand( RADIO_SET_SAVECONTEXT, 0, 0 ); 00509 } 00510 00511 void SX1280::SetAutoTx( uint16_t time ) 00512 { 00513 uint16_t compensatedTime = time - ( uint16_t )AUTO_TX_OFFSET; 00514 uint8_t buf[2]; 00515 00516 buf[0] = ( uint8_t )( ( compensatedTime >> 8 ) & 0x00FF ); 00517 buf[1] = ( uint8_t )( compensatedTime & 0x00FF ); 00518 WriteCommand( RADIO_SET_AUTOTX, buf, 2 ); 00519 } 00520 00521 void SX1280::StopAutoTx( void ) 00522 { 00523 uint8_t buf[2] = {0x00, 0x00}; 00524 WriteCommand( RADIO_SET_AUTOTX, buf, 2 ); 00525 } 00526 00527 void SX1280::SetAutoFs( bool enableAutoFs ) 00528 { 00529 WriteCommand( RADIO_SET_AUTOFS, ( uint8_t * )&enableAutoFs, 1 ); 00530 } 00531 00532 void SX1280::SetLongPreamble( bool enable ) 00533 { 00534 WriteCommand( RADIO_SET_LONGPREAMBLE, ( uint8_t * )&enable, 1 ); 00535 } 00536 00537 void SX1280::SetPayload( uint8_t *buffer, uint8_t size, uint8_t offset ) 00538 { 00539 WriteBuffer( offset, buffer, size ); 00540 } 00541 00542 uint8_t SX1280::GetPayload( uint8_t *buffer, uint8_t *size , uint8_t maxSize ) 00543 { 00544 uint8_t offset; 00545 00546 GetRxBufferStatus( size, &offset ); 00547 if( *size > maxSize ) 00548 { 00549 return 1; 00550 } 00551 ReadBuffer( offset, buffer, *size ); 00552 return 0; 00553 } 00554 00555 void SX1280::SendPayload( uint8_t *payload, uint8_t size, TickTime_t timeout, uint8_t offset ) 00556 { 00557 SetPayload( payload, size, offset ); 00558 SetTx( timeout ); 00559 } 00560 00561 uint8_t SX1280::SetSyncWord( uint8_t syncWordIdx, uint8_t *syncWord ) 00562 { 00563 uint16_t addr; 00564 uint8_t syncwordSize = 0; 00565 00566 switch( GetPacketType( true ) ) 00567 { 00568 case PACKET_TYPE_GFSK: 00569 syncwordSize = 5; 00570 switch( syncWordIdx ) 00571 { 00572 case 1: 00573 addr = REG_LR_SYNCWORDBASEADDRESS1; 00574 break; 00575 case 2: 00576 addr = REG_LR_SYNCWORDBASEADDRESS2; 00577 break; 00578 case 3: 00579 addr = REG_LR_SYNCWORDBASEADDRESS3; 00580 break; 00581 default: 00582 return 1; 00583 } 00584 break; 00585 case PACKET_TYPE_FLRC: 00586 // For FLRC packet type, the SyncWord is one byte shorter and 00587 // the base address is shifted by one byte 00588 syncwordSize = 4; 00589 switch( syncWordIdx ) 00590 { 00591 case 1: 00592 addr = REG_LR_SYNCWORDBASEADDRESS1 + 1; 00593 break; 00594 case 2: 00595 addr = REG_LR_SYNCWORDBASEADDRESS2 + 1; 00596 break; 00597 case 3: 00598 addr = REG_LR_SYNCWORDBASEADDRESS3 + 1; 00599 break; 00600 default: 00601 return 1; 00602 } 00603 break; 00604 case PACKET_TYPE_BLE: 00605 // For Ble packet type, only the first SyncWord is used and its 00606 // address is shifted by one byte 00607 syncwordSize = 4; 00608 switch( syncWordIdx ) 00609 { 00610 case 1: 00611 addr = REG_LR_SYNCWORDBASEADDRESS1 + 1; 00612 break; 00613 default: 00614 return 1; 00615 } 00616 break; 00617 default: 00618 return 1; 00619 } 00620 WriteRegister( addr, syncWord, syncwordSize ); 00621 return 0; 00622 } 00623 00624 void SX1280::SetSyncWordErrorTolerance( uint8_t ErrorBits ) 00625 { 00626 ErrorBits = ( ReadRegister( REG_LR_SYNCWORDTOLERANCE ) & 0xF0 ) | ( ErrorBits & 0x0F ); 00627 WriteRegister( REG_LR_SYNCWORDTOLERANCE, ErrorBits ); 00628 } 00629 00630 uint8_t SX1280::SetCrcSeed( uint8_t *seed ) 00631 { 00632 uint8_t updated = 0; 00633 switch( GetPacketType( true ) ) 00634 { 00635 case PACKET_TYPE_GFSK: 00636 case PACKET_TYPE_FLRC: 00637 WriteRegister( REG_LR_CRCSEEDBASEADDR, seed, 2 ); 00638 updated = 1; 00639 break; 00640 case PACKET_TYPE_BLE: 00641 this->WriteRegister(0x9c7, seed[2] ); 00642 this->WriteRegister(0x9c8, seed[1] ); 00643 this->WriteRegister(0x9c9, seed[0] ); 00644 updated = 1; 00645 break; 00646 default: 00647 break; 00648 } 00649 return updated; 00650 } 00651 00652 void SX1280::SetBleAccessAddress( uint32_t accessAddress ) 00653 { 00654 this->WriteRegister( REG_LR_BLE_ACCESS_ADDRESS, ( accessAddress >> 24 ) & 0x000000FF ); 00655 this->WriteRegister( REG_LR_BLE_ACCESS_ADDRESS + 1, ( accessAddress >> 16 ) & 0x000000FF ); 00656 this->WriteRegister( REG_LR_BLE_ACCESS_ADDRESS + 2, ( accessAddress >> 8 ) & 0x000000FF ); 00657 this->WriteRegister( REG_LR_BLE_ACCESS_ADDRESS + 3, accessAddress & 0x000000FF ); 00658 } 00659 00660 void SX1280::SetBleAdvertizerAccessAddress( void ) 00661 { 00662 this->SetBleAccessAddress( BLE_ADVERTIZER_ACCESS_ADDRESS ); 00663 } 00664 00665 void SX1280::SetCrcPolynomial( uint16_t polynomial ) 00666 { 00667 uint8_t val[2]; 00668 00669 val[0] = ( uint8_t )( polynomial >> 8 ) & 0xFF; 00670 val[1] = ( uint8_t )( polynomial & 0xFF ); 00671 00672 switch( GetPacketType( true ) ) 00673 { 00674 case PACKET_TYPE_GFSK: 00675 case PACKET_TYPE_FLRC: 00676 WriteRegister( REG_LR_CRCPOLYBASEADDR, val, 2 ); 00677 break; 00678 default: 00679 break; 00680 } 00681 } 00682 00683 void SX1280::SetWhiteningSeed( uint8_t seed ) 00684 { 00685 switch( GetPacketType( true ) ) 00686 { 00687 case PACKET_TYPE_GFSK: 00688 case PACKET_TYPE_FLRC: 00689 case PACKET_TYPE_BLE: 00690 WriteRegister( REG_LR_WHITSEEDBASEADDR, seed ); 00691 break; 00692 default: 00693 break; 00694 } 00695 } 00696 00697 void SX1280::EnableManualGain( void ) 00698 { 00699 this->WriteRegister( REG_ENABLE_MANUAL_GAIN_CONTROL, this->ReadRegister( REG_ENABLE_MANUAL_GAIN_CONTROL ) | MASK_MANUAL_GAIN_CONTROL ); 00700 this->WriteRegister( REG_DEMOD_DETECTION, this->ReadRegister( REG_DEMOD_DETECTION ) & MASK_DEMOD_DETECTION ); 00701 } 00702 00703 void SX1280::DisableManualGain( void ) 00704 { 00705 this->WriteRegister( REG_ENABLE_MANUAL_GAIN_CONTROL, this->ReadRegister( REG_ENABLE_MANUAL_GAIN_CONTROL ) & (~MASK_MANUAL_GAIN_CONTROL) ); 00706 this->WriteRegister( REG_DEMOD_DETECTION, this->ReadRegister( REG_DEMOD_DETECTION ) | (~MASK_DEMOD_DETECTION) ); 00707 } 00708 00709 void SX1280::SetManualGainValue( uint8_t gain ) 00710 { 00711 this->WriteRegister( REG_MANUAL_GAIN_VALUE, ( this->ReadRegister( REG_MANUAL_GAIN_VALUE ) & MASK_MANUAL_GAIN_VALUE ) | gain ); 00712 } 00713 00714 void SX1280::SetLNAGainSetting( const RadioLnaSettings_t lnaSetting ) 00715 { 00716 switch(lnaSetting) 00717 { 00718 case LNA_HIGH_SENSITIVITY_MODE: 00719 { 00720 this->WriteRegister( REG_LNA_REGIME, this->ReadRegister( REG_LNA_REGIME ) | MASK_LNA_REGIME ); 00721 break; 00722 } 00723 case LNA_LOW_POWER_MODE: 00724 { 00725 this->WriteRegister( REG_LNA_REGIME, this->ReadRegister( REG_LNA_REGIME ) & ~MASK_LNA_REGIME ); 00726 break; 00727 } 00728 } 00729 } 00730 00731 void SX1280::SetRangingIdLength( RadioRangingIdCheckLengths_t length ) 00732 { 00733 switch( GetPacketType( true ) ) 00734 { 00735 case PACKET_TYPE_RANGING: 00736 WriteRegister( REG_LR_RANGINGIDCHECKLENGTH, ( ( ( ( uint8_t )length ) & 0x03 ) << 6 ) | ( ReadRegister( REG_LR_RANGINGIDCHECKLENGTH ) & 0x3F ) ); 00737 break; 00738 default: 00739 break; 00740 } 00741 } 00742 00743 void SX1280::SetDeviceRangingAddress( uint32_t address ) 00744 { 00745 uint8_t addrArray[] = { address >> 24, address >> 16, address >> 8, address }; 00746 00747 switch( GetPacketType( true ) ) 00748 { 00749 case PACKET_TYPE_RANGING: 00750 WriteRegister( REG_LR_DEVICERANGINGADDR, addrArray, 4 ); 00751 break; 00752 default: 00753 break; 00754 } 00755 } 00756 00757 void SX1280::SetRangingRequestAddress( uint32_t address ) 00758 { 00759 uint8_t addrArray[] = { address >> 24, address >> 16, address >> 8, address }; 00760 00761 switch( GetPacketType( true ) ) 00762 { 00763 case PACKET_TYPE_RANGING: 00764 WriteRegister( REG_LR_REQUESTRANGINGADDR, addrArray, 4 ); 00765 break; 00766 default: 00767 break; 00768 } 00769 } 00770 00771 double SX1280::GetRangingResult( RadioRangingResultTypes_t resultType ) 00772 { 00773 uint32_t valLsb = 0; 00774 double val = 0.0; 00775 00776 switch( GetPacketType( true ) ) 00777 { 00778 case PACKET_TYPE_RANGING: 00779 this->SetStandby( STDBY_XOSC ); 00780 this->WriteRegister( 0x97F, this->ReadRegister( 0x97F ) | ( 1 << 1 ) ); // enable LORA modem clock 00781 WriteRegister( REG_LR_RANGINGRESULTCONFIG, ( ReadRegister( REG_LR_RANGINGRESULTCONFIG ) & MASK_RANGINGMUXSEL ) | ( ( ( ( uint8_t )resultType ) & 0x03 ) << 4 ) ); 00782 valLsb = ( ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR ) << 16 ) | ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR + 1 ) << 8 ) | ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR + 2 ) ) ); 00783 this->SetStandby( STDBY_RC ); 00784 00785 // Convertion from LSB to distance. For explanation on the formula, refer to Datasheet of SX1280 00786 switch( resultType ) 00787 { 00788 case RANGING_RESULT_RAW: 00789 // Convert the ranging LSB to distance in meter 00790 // The theoretical conversion from register value to distance [m] is given by: 00791 // distance [m] = ( complement2( register ) * 150 ) / ( 2^12 * bandwidth[MHz] ) ) 00792 // The API provide BW in [Hz] so the implemented formula is complement2( register ) / bandwidth[Hz] * A, 00793 // where A = 150 / (2^12 / 1e6) = 36621.09 00794 val = ( double )complement2( valLsb, 24 ) / ( double )this->GetLoRaBandwidth( ) * 36621.09375; 00795 break; 00796 00797 case RANGING_RESULT_AVERAGED: 00798 case RANGING_RESULT_DEBIASED: 00799 case RANGING_RESULT_FILTERED: 00800 val = ( double )valLsb * 20.0 / 100.0; 00801 break; 00802 default: 00803 val = 0.0; 00804 } 00805 break; 00806 default: 00807 break; 00808 } 00809 return val; 00810 } 00811 00812 uint8_t SX1280::GetRangingPowerDeltaThresholdIndicator( void ) 00813 { 00814 SetStandby( STDBY_XOSC ); 00815 WriteRegister( 0x97F, ReadRegister( 0x97F ) | ( 1 << 1 ) ); // enable LoRa modem clock 00816 WriteRegister( REG_LR_RANGINGRESULTCONFIG, ( ReadRegister( REG_LR_RANGINGRESULTCONFIG ) & MASK_RANGINGMUXSEL ) | ( ( ( ( uint8_t )RANGING_RESULT_RAW ) & 0x03 ) << 4 ) ); // Select raw results 00817 return ReadRegister( REG_RANGING_RSSI ); 00818 } 00819 00820 void SX1280::SetRangingCalibration( uint16_t cal ) 00821 { 00822 switch( GetPacketType( true ) ) 00823 { 00824 case PACKET_TYPE_RANGING: 00825 WriteRegister( REG_LR_RANGINGRERXTXDELAYCAL, ( uint8_t )( ( cal >> 8 ) & 0xFF ) ); 00826 WriteRegister( REG_LR_RANGINGRERXTXDELAYCAL + 1, ( uint8_t )( ( cal ) & 0xFF ) ); 00827 break; 00828 default: 00829 break; 00830 } 00831 } 00832 00833 void SX1280::RangingClearFilterResult( void ) 00834 { 00835 uint8_t regVal = ReadRegister( REG_LR_RANGINGRESULTCLEARREG ); 00836 00837 // To clear result, set bit 5 to 1 then to 0 00838 WriteRegister( REG_LR_RANGINGRESULTCLEARREG, regVal | ( 1 << 5 ) ); 00839 WriteRegister( REG_LR_RANGINGRESULTCLEARREG, regVal & ( ~( 1 << 5 ) ) ); 00840 } 00841 00842 void SX1280::RangingSetFilterNumSamples( uint8_t num ) 00843 { 00844 // Silently set 8 as minimum value 00845 WriteRegister( REG_LR_RANGINGFILTERWINDOWSIZE, ( num < DEFAULT_RANGING_FILTER_SIZE ) ? DEFAULT_RANGING_FILTER_SIZE : num ); 00846 } 00847 00848 void SX1280::SetRangingRole( RadioRangingRoles_t role ) 00849 { 00850 uint8_t buf[1]; 00851 00852 buf[0] = role; 00853 WriteCommand( RADIO_SET_RANGING_ROLE, &buf[0], 1 ); 00854 } 00855 00856 double SX1280::GetFrequencyError( ) 00857 { 00858 uint8_t efeRaw[3] = {0}; 00859 uint32_t efe = 0; 00860 double efeHz = 0.0; 00861 00862 switch( this->GetPacketType( true ) ) 00863 { 00864 case PACKET_TYPE_LORA: 00865 case PACKET_TYPE_RANGING: 00866 efeRaw[0] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB ); 00867 efeRaw[1] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB + 1 ); 00868 efeRaw[2] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB + 2 ); 00869 efe = ( efeRaw[0]<<16 ) | ( efeRaw[1]<<8 ) | efeRaw[2]; 00870 efe &= REG_LR_ESTIMATED_FREQUENCY_ERROR_MASK; 00871 00872 efeHz = 1.55 * ( double )complement2( efe, 20 ) / ( 1600.0 / ( double )this->GetLoRaBandwidth( ) * 1000.0 ); 00873 break; 00874 00875 case PACKET_TYPE_NONE: 00876 case PACKET_TYPE_BLE: 00877 case PACKET_TYPE_FLRC: 00878 case PACKET_TYPE_GFSK: 00879 break; 00880 } 00881 00882 return efeHz; 00883 } 00884 00885 void SX1280::SetPollingMode( void ) 00886 { 00887 this->PollingMode = true; 00888 } 00889 00890 int32_t SX1280::complement2( const uint32_t num, const uint8_t bitCnt ) 00891 { 00892 int32_t retVal = ( int32_t )num; 00893 if( num >= 2<<( bitCnt - 2 ) ) 00894 { 00895 retVal -= 2<<( bitCnt - 1 ); 00896 } 00897 return retVal; 00898 } 00899 00900 int32_t SX1280::GetLoRaBandwidth( ) 00901 { 00902 int32_t bwValue = 0; 00903 00904 switch( this->LoRaBandwidth ) 00905 { 00906 case LORA_BW_0200: 00907 bwValue = 203125; 00908 break; 00909 case LORA_BW_0400: 00910 bwValue = 406250; 00911 break; 00912 case LORA_BW_0800: 00913 bwValue = 812500; 00914 break; 00915 case LORA_BW_1600: 00916 bwValue = 1625000; 00917 break; 00918 default: 00919 bwValue = 0; 00920 } 00921 return bwValue; 00922 } 00923 00924 void SX1280::SetInterruptMode( void ) 00925 { 00926 this->PollingMode = false; 00927 } 00928 00929 void SX1280::OnDioIrq( void ) 00930 { 00931 /* 00932 * When polling mode is activated, it is up to the application to call 00933 * ProcessIrqs( ). Otherwise, the driver automatically calls ProcessIrqs( ) 00934 * on radio interrupt. 00935 */ 00936 if( this->PollingMode == true ) 00937 { 00938 this->IrqState = true; 00939 } 00940 else 00941 { 00942 this->ProcessIrqs( ); 00943 } 00944 } 00945 00946 void SX1280::ProcessIrqs( void ) 00947 { 00948 RadioPacketTypes_t packetType = PACKET_TYPE_NONE; 00949 00950 if( this->PollingMode == true ) 00951 { 00952 if( this->IrqState == true ) 00953 { 00954 __disable_irq( ); 00955 this->IrqState = false; 00956 __enable_irq( ); 00957 } 00958 else 00959 { 00960 return; 00961 } 00962 } 00963 00964 packetType = GetPacketType( true ); 00965 uint16_t irqRegs = GetIrqStatus( ); 00966 ClearIrqStatus( IRQ_RADIO_ALL ); 00967 00968 #if( SX1280_DEBUG == 1 ) 00969 DigitalOut TEST_PIN_1( D14 ); 00970 DigitalOut TEST_PIN_2( D15 ); 00971 for( int i = 0x8000; i != 0; i >>= 1 ) 00972 { 00973 TEST_PIN_2 = 0; 00974 TEST_PIN_1 = ( ( irqRegs & i ) != 0 ) ? 1 : 0; 00975 TEST_PIN_2 = 1; 00976 } 00977 TEST_PIN_1 = 0; 00978 TEST_PIN_2 = 0; 00979 #endif 00980 00981 switch( packetType ) 00982 { 00983 case PACKET_TYPE_GFSK: 00984 case PACKET_TYPE_FLRC: 00985 case PACKET_TYPE_BLE: 00986 switch( OperatingMode ) 00987 { 00988 case MODE_RX: 00989 if( ( irqRegs & IRQ_RX_DONE ) == IRQ_RX_DONE ) 00990 { 00991 if( ( irqRegs & IRQ_CRC_ERROR ) == IRQ_CRC_ERROR ) 00992 { 00993 if( rxError != NULL ) 00994 { 00995 rxError( IRQ_CRC_ERROR_CODE ); 00996 } 00997 } 00998 else if( ( irqRegs & IRQ_SYNCWORD_ERROR ) == IRQ_SYNCWORD_ERROR ) 00999 { 01000 if( rxError != NULL ) 01001 { 01002 rxError( IRQ_SYNCWORD_ERROR_CODE ); 01003 } 01004 } 01005 else 01006 { 01007 if( rxDone != NULL ) 01008 { 01009 rxDone( ); 01010 } 01011 } 01012 } 01013 if( ( irqRegs & IRQ_SYNCWORD_VALID ) == IRQ_SYNCWORD_VALID ) 01014 { 01015 if( rxSyncWordDone != NULL ) 01016 { 01017 rxSyncWordDone( ); 01018 } 01019 } 01020 if( ( irqRegs & IRQ_SYNCWORD_ERROR ) == IRQ_SYNCWORD_ERROR ) 01021 { 01022 if( rxError != NULL ) 01023 { 01024 rxError( IRQ_SYNCWORD_ERROR_CODE ); 01025 } 01026 } 01027 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) 01028 { 01029 if( rxTimeout != NULL ) 01030 { 01031 rxTimeout( ); 01032 } 01033 } 01034 if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE ) 01035 { 01036 if( txDone != NULL ) 01037 { 01038 txDone( ); 01039 } 01040 } 01041 break; 01042 case MODE_TX: 01043 if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE ) 01044 { 01045 if( txDone != NULL ) 01046 { 01047 txDone( ); 01048 } 01049 } 01050 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) 01051 { 01052 if( txTimeout != NULL ) 01053 { 01054 txTimeout( ); 01055 } 01056 } 01057 break; 01058 default: 01059 // Unexpected IRQ: silently returns 01060 break; 01061 } 01062 break; 01063 case PACKET_TYPE_LORA: 01064 switch( OperatingMode ) 01065 { 01066 case MODE_RX: 01067 if( ( irqRegs & IRQ_RX_DONE ) == IRQ_RX_DONE ) 01068 { 01069 if( ( irqRegs & IRQ_CRC_ERROR ) == IRQ_CRC_ERROR ) 01070 { 01071 if( rxError != NULL ) 01072 { 01073 rxError( IRQ_CRC_ERROR_CODE ); 01074 } 01075 } 01076 else 01077 { 01078 if( rxDone != NULL ) 01079 { 01080 rxDone( ); 01081 } 01082 } 01083 } 01084 if( ( irqRegs & IRQ_HEADER_VALID ) == IRQ_HEADER_VALID ) 01085 { 01086 if( rxHeaderDone != NULL ) 01087 { 01088 rxHeaderDone( ); 01089 } 01090 } 01091 if( ( irqRegs & IRQ_HEADER_ERROR ) == IRQ_HEADER_ERROR ) 01092 { 01093 if( rxError != NULL ) 01094 { 01095 rxError( IRQ_HEADER_ERROR_CODE ); 01096 } 01097 } 01098 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) 01099 { 01100 if( rxTimeout != NULL ) 01101 { 01102 rxTimeout( ); 01103 } 01104 } 01105 if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) == IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) 01106 { 01107 if( rxError != NULL ) 01108 { 01109 rxError( IRQ_RANGING_ON_LORA_ERROR_CODE ); 01110 } 01111 } 01112 break; 01113 case MODE_TX: 01114 if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE ) 01115 { 01116 if( txDone != NULL ) 01117 { 01118 txDone( ); 01119 } 01120 } 01121 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) 01122 { 01123 if( txTimeout != NULL ) 01124 { 01125 txTimeout( ); 01126 } 01127 } 01128 break; 01129 case MODE_CAD: 01130 if( ( irqRegs & IRQ_CAD_DONE ) == IRQ_CAD_DONE ) 01131 { 01132 if( ( irqRegs & IRQ_CAD_DETECTED ) == IRQ_CAD_DETECTED ) 01133 { 01134 if( cadDone != NULL ) 01135 { 01136 cadDone( true ); 01137 } 01138 } 01139 else 01140 { 01141 if( cadDone != NULL ) 01142 { 01143 cadDone( false ); 01144 } 01145 } 01146 } 01147 else if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) 01148 { 01149 if( rxTimeout != NULL ) 01150 { 01151 rxTimeout( ); 01152 } 01153 } 01154 break; 01155 default: 01156 // Unexpected IRQ: silently returns 01157 break; 01158 } 01159 break; 01160 case PACKET_TYPE_RANGING: 01161 switch( OperatingMode ) 01162 { 01163 // MODE_RX indicates an IRQ on the Slave side 01164 case MODE_RX: 01165 if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) == IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) 01166 { 01167 if( rangingDone != NULL ) 01168 { 01169 rangingDone( IRQ_RANGING_SLAVE_ERROR_CODE ); 01170 } 01171 } 01172 if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_VALID ) == IRQ_RANGING_SLAVE_REQUEST_VALID ) 01173 { 01174 if( rangingDone != NULL ) 01175 { 01176 rangingDone( IRQ_RANGING_SLAVE_VALID_CODE ); 01177 } 01178 } 01179 if( ( irqRegs & IRQ_RANGING_SLAVE_RESPONSE_DONE ) == IRQ_RANGING_SLAVE_RESPONSE_DONE ) 01180 { 01181 if( rangingDone != NULL ) 01182 { 01183 rangingDone( IRQ_RANGING_SLAVE_VALID_CODE ); 01184 } 01185 } 01186 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) 01187 { 01188 if( rangingDone != NULL ) 01189 { 01190 rangingDone( IRQ_RANGING_SLAVE_ERROR_CODE ); 01191 } 01192 } 01193 if( ( irqRegs & IRQ_HEADER_VALID ) == IRQ_HEADER_VALID ) 01194 { 01195 if( rxHeaderDone != NULL ) 01196 { 01197 rxHeaderDone( ); 01198 } 01199 } 01200 if( ( irqRegs & IRQ_HEADER_ERROR ) == IRQ_HEADER_ERROR ) 01201 { 01202 if( rxError != NULL ) 01203 { 01204 rxError( IRQ_HEADER_ERROR_CODE ); 01205 } 01206 } 01207 break; 01208 // MODE_TX indicates an IRQ on the Master side 01209 case MODE_TX: 01210 if( ( irqRegs & IRQ_RANGING_MASTER_TIMEOUT ) == IRQ_RANGING_MASTER_TIMEOUT ) 01211 { 01212 if( rangingDone != NULL ) 01213 { 01214 rangingDone( IRQ_RANGING_MASTER_ERROR_CODE ); 01215 } 01216 } 01217 if( ( irqRegs & IRQ_RANGING_MASTER_RESULT_VALID ) == IRQ_RANGING_MASTER_RESULT_VALID ) 01218 { 01219 if( rangingDone != NULL ) 01220 { 01221 rangingDone( IRQ_RANGING_MASTER_VALID_CODE ); 01222 } 01223 } 01224 break; 01225 default: 01226 // Unexpected IRQ: silently returns 01227 break; 01228 } 01229 break; 01230 default: 01231 // Unexpected IRQ: silently returns 01232 break; 01233 } 01234 }
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