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VL53L3CX_mbed
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Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Dependents: VL53L3CX_NoShield_1Sensor_poll_Mb06x VL53L3_NoShield_1Sensor_polling_Mb63 X_NUCLEO_53L3A2 53L3A2_Ranging
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vl53lx_ll_def.h
00001 00002 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ 00003 /****************************************************************************** 00004 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved 00005 00006 This file is part of VL53LX and is dual licensed, 00007 either GPL-2.0+ 00008 or 'BSD 3-clause "New" or "Revised" License' , at your option. 00009 ****************************************************************************** 00010 */ 00011 00012 00013 00014 00015 00016 #ifndef _VL53LX_LL_DEF_H_ 00017 #define _VL53LX_LL_DEF_H_ 00018 00019 #include "vl53lx_platform_user_config.h" 00020 #include "vl53lx_platform_user_defines.h" 00021 #include "vl53lx_error_codes.h" 00022 #include "vl53lx_register_structs.h" 00023 #include "vl53lx_hist_structs.h" 00024 #include "vl53lx_dmax_structs.h" 00025 #include "vl53lx_error_exceptions.h" 00026 00027 #ifdef __cplusplus 00028 extern "C" { 00029 #endif 00030 00031 00032 00033 00034 #define VL53LX_LL_API_IMPLEMENTATION_VER_MAJOR 1 00035 00036 #define VL53LX_LL_API_IMPLEMENTATION_VER_MINOR 1 00037 00038 #define VL53LX_LL_API_IMPLEMENTATION_VER_SUB 1 00039 00040 #define VL53LX_LL_API_IMPLEMENTATION_VER_REVISION 0 00041 00042 #define VL53LX_LL_API_IMPLEMENTATION_VER_STRING "1.1.1" 00043 00044 00045 #define VL53LX_FIRMWARE_VER_MINIMUM 398 00046 #define VL53LX_FIRMWARE_VER_MAXIMUM 400 00047 00048 00049 00050 00051 #define VL53LX_LL_CALIBRATION_DATA_STRUCT_VERSION 0xECAB0102 00052 00053 00054 00055 00056 #define VL53LX_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION 0xECAE0101 00057 00058 00059 00060 00061 00062 #define VL53LX_BIN_REC_SIZE 6 00063 00064 #define VL53LX_TIMING_CONF_A_B_SIZE 2 00065 00066 #define VL53LX_FRAME_WAIT_EVENT 6 00067 00068 00069 00070 00071 #define VL53LX_MAX_XTALK_RANGE_RESULTS 5 00072 00073 00074 #define VL53LX_MAX_OFFSET_RANGE_RESULTS 3 00075 00076 00077 #define VL53LX_NVM_MAX_FMT_RANGE_DATA 4 00078 00079 00080 #define VL53LX_NVM_PEAK_RATE_MAP_SAMPLES 25 00081 00082 #define VL53LX_NVM_PEAK_RATE_MAP_WIDTH 5 00083 00084 #define VL53LX_NVM_PEAK_RATE_MAP_HEIGHT 5 00085 00086 00087 00088 00089 #define VL53LX_ERROR_DEVICE_FIRMWARE_TOO_OLD ((VL53LX_Error) - 80) 00090 00091 #define VL53LX_ERROR_DEVICE_FIRMWARE_TOO_NEW ((VL53LX_Error) - 85) 00092 00093 #define VL53LX_ERROR_UNIT_TEST_FAIL ((VL53LX_Error) - 90) 00094 00095 #define VL53LX_ERROR_FILE_READ_FAIL ((VL53LX_Error) - 95) 00096 00097 #define VL53LX_ERROR_FILE_WRITE_FAIL ((VL53LX_Error) - 96) 00098 00099 00100 00101 00102 00103 00104 typedef struct { 00105 uint32_t ll_revision; 00106 uint8_t ll_major; 00107 uint8_t ll_minor; 00108 uint8_t ll_build; 00109 } VL53LX_ll_version_t; 00110 00111 00112 00113 00114 typedef struct { 00115 00116 uint8_t device_test_mode; 00117 uint8_t VL53LX_p_005; 00118 uint32_t timeout_us; 00119 uint16_t target_count_rate_mcps; 00120 00121 uint16_t min_count_rate_limit_mcps; 00122 00123 uint16_t max_count_rate_limit_mcps; 00124 00125 00126 } VL53LX_refspadchar_config_t; 00127 00128 00129 00130 00131 typedef struct { 00132 00133 uint16_t dss_config__target_total_rate_mcps; 00134 00135 uint32_t phasecal_config_timeout_us; 00136 00137 uint32_t mm_config_timeout_us; 00138 00139 uint32_t range_config_timeout_us; 00140 00141 uint8_t num_of_samples; 00142 00143 int16_t algo__crosstalk_extract_min_valid_range_mm; 00144 00145 int16_t algo__crosstalk_extract_max_valid_range_mm; 00146 00147 uint16_t algo__crosstalk_extract_max_valid_rate_kcps; 00148 00149 uint16_t algo__crosstalk_extract_max_sigma_mm; 00150 00151 00152 } VL53LX_xtalkextract_config_t; 00153 00154 00155 00156 00157 typedef struct { 00158 00159 uint16_t dss_config__target_total_rate_mcps; 00160 00161 uint32_t phasecal_config_timeout_us; 00162 00163 uint32_t range_config_timeout_us; 00164 00165 uint32_t mm_config_timeout_us; 00166 00167 uint8_t pre_num_of_samples; 00168 00169 uint8_t mm1_num_of_samples; 00170 00171 uint8_t mm2_num_of_samples; 00172 00173 00174 } VL53LX_offsetcal_config_t; 00175 00176 00177 00178 00179 typedef struct { 00180 00181 uint16_t dss_config__target_total_rate_mcps; 00182 00183 uint32_t phasecal_config_timeout_us; 00184 00185 uint32_t mm_config_timeout_us; 00186 00187 uint32_t range_config_timeout_us; 00188 00189 uint16_t phasecal_num_of_samples; 00190 00191 uint16_t zone_num_of_samples; 00192 00193 00194 } VL53LX_zonecal_config_t; 00195 00196 00197 00198 00199 00200 typedef struct { 00201 00202 VL53LX_DeviceSscArray array_select; 00203 00204 uint8_t VL53LX_p_005; 00205 00206 uint8_t vcsel_start; 00207 00208 uint8_t vcsel_width; 00209 00210 uint32_t timeout_us; 00211 00212 uint16_t rate_limit_mcps; 00213 00214 00215 } VL53LX_ssc_config_t; 00216 00217 00218 00219 00220 typedef struct { 00221 00222 00223 uint32_t algo__crosstalk_compensation_plane_offset_kcps; 00224 00225 int16_t algo__crosstalk_compensation_x_plane_gradient_kcps; 00226 00227 int16_t algo__crosstalk_compensation_y_plane_gradient_kcps; 00228 00229 uint32_t nvm_default__crosstalk_compensation_plane_offset_kcps; 00230 00231 int16_t nvm_default__crosstalk_compensation_x_plane_gradient_kcps; 00232 00233 int16_t nvm_default__crosstalk_compensation_y_plane_gradient_kcps; 00234 00235 uint8_t global_crosstalk_compensation_enable; 00236 00237 int16_t histogram_mode_crosstalk_margin_kcps; 00238 00239 int16_t lite_mode_crosstalk_margin_kcps; 00240 00241 uint8_t crosstalk_range_ignore_threshold_mult; 00242 00243 uint16_t crosstalk_range_ignore_threshold_rate_mcps; 00244 00245 int16_t algo__crosstalk_detect_min_valid_range_mm; 00246 00247 int16_t algo__crosstalk_detect_max_valid_range_mm; 00248 00249 uint16_t algo__crosstalk_detect_max_valid_rate_kcps; 00250 00251 uint16_t algo__crosstalk_detect_max_sigma_mm; 00252 00253 00254 00255 } VL53LX_xtalk_config_t; 00256 00257 00258 00259 00260 typedef struct { 00261 00262 00263 uint16_t tp_tuning_parm_version; 00264 00265 uint16_t tp_tuning_parm_key_table_version; 00266 00267 uint16_t tp_tuning_parm_lld_version; 00268 00269 uint8_t tp_init_phase_rtn_lite_long; 00270 00271 uint8_t tp_init_phase_rtn_lite_med; 00272 00273 uint8_t tp_init_phase_rtn_lite_short; 00274 00275 uint8_t tp_init_phase_ref_lite_long; 00276 00277 uint8_t tp_init_phase_ref_lite_med; 00278 00279 uint8_t tp_init_phase_ref_lite_short; 00280 00281 00282 uint8_t tp_init_phase_rtn_hist_long; 00283 00284 uint8_t tp_init_phase_rtn_hist_med; 00285 00286 uint8_t tp_init_phase_rtn_hist_short; 00287 00288 uint8_t tp_init_phase_ref_hist_long; 00289 00290 uint8_t tp_init_phase_ref_hist_med; 00291 00292 uint8_t tp_init_phase_ref_hist_short; 00293 00294 00295 uint8_t tp_consistency_lite_phase_tolerance; 00296 00297 uint8_t tp_phasecal_target; 00298 00299 uint16_t tp_cal_repeat_rate; 00300 00301 uint8_t tp_lite_min_clip; 00302 00303 00304 uint16_t tp_lite_long_sigma_thresh_mm; 00305 00306 uint16_t tp_lite_med_sigma_thresh_mm; 00307 00308 uint16_t tp_lite_short_sigma_thresh_mm; 00309 00310 00311 uint16_t tp_lite_long_min_count_rate_rtn_mcps; 00312 00313 uint16_t tp_lite_med_min_count_rate_rtn_mcps; 00314 00315 uint16_t tp_lite_short_min_count_rate_rtn_mcps; 00316 00317 00318 uint8_t tp_lite_sigma_est_pulse_width_ns; 00319 00320 uint8_t tp_lite_sigma_est_amb_width_ns; 00321 00322 uint8_t tp_lite_sigma_ref_mm; 00323 00324 uint8_t tp_lite_seed_cfg; 00325 00326 uint8_t tp_timed_seed_cfg; 00327 00328 00329 uint8_t tp_lite_quantifier; 00330 00331 uint8_t tp_lite_first_order_select; 00332 00333 00334 uint16_t tp_dss_target_lite_mcps; 00335 00336 uint16_t tp_dss_target_histo_mcps; 00337 00338 uint16_t tp_dss_target_histo_mz_mcps; 00339 00340 uint16_t tp_dss_target_timed_mcps; 00341 00342 uint16_t tp_dss_target_very_short_mcps; 00343 00344 00345 uint32_t tp_phasecal_timeout_lite_us; 00346 00347 uint32_t tp_phasecal_timeout_hist_long_us; 00348 00349 uint32_t tp_phasecal_timeout_hist_med_us; 00350 00351 uint32_t tp_phasecal_timeout_hist_short_us; 00352 00353 00354 uint32_t tp_phasecal_timeout_mz_long_us; 00355 00356 uint32_t tp_phasecal_timeout_mz_med_us; 00357 00358 uint32_t tp_phasecal_timeout_mz_short_us; 00359 00360 uint32_t tp_phasecal_timeout_timed_us; 00361 00362 00363 uint32_t tp_mm_timeout_lite_us; 00364 00365 uint32_t tp_mm_timeout_histo_us; 00366 00367 uint32_t tp_mm_timeout_mz_us; 00368 00369 uint32_t tp_mm_timeout_timed_us; 00370 00371 uint32_t tp_mm_timeout_lpa_us; 00372 00373 00374 uint32_t tp_range_timeout_lite_us; 00375 00376 uint32_t tp_range_timeout_histo_us; 00377 00378 uint32_t tp_range_timeout_mz_us; 00379 00380 uint32_t tp_range_timeout_timed_us; 00381 00382 uint32_t tp_range_timeout_lpa_us; 00383 00384 uint32_t tp_phasecal_patch_power; 00385 00386 uint8_t tp_hist_merge; 00387 00388 uint32_t tp_reset_merge_threshold; 00389 00390 uint8_t tp_hist_merge_max_size; 00391 00392 00393 uint8_t tp_uwr_enable; 00394 int16_t tp_uwr_med_z_1_min; 00395 int16_t tp_uwr_med_z_1_max; 00396 int16_t tp_uwr_med_z_2_min; 00397 int16_t tp_uwr_med_z_2_max; 00398 int16_t tp_uwr_med_z_3_min; 00399 int16_t tp_uwr_med_z_3_max; 00400 int16_t tp_uwr_med_z_4_min; 00401 int16_t tp_uwr_med_z_4_max; 00402 int16_t tp_uwr_med_z_5_min; 00403 int16_t tp_uwr_med_z_5_max; 00404 int16_t tp_uwr_med_corr_z_1_rangea; 00405 int16_t tp_uwr_med_corr_z_1_rangeb; 00406 int16_t tp_uwr_med_corr_z_2_rangea; 00407 int16_t tp_uwr_med_corr_z_2_rangeb; 00408 int16_t tp_uwr_med_corr_z_3_rangea; 00409 int16_t tp_uwr_med_corr_z_3_rangeb; 00410 int16_t tp_uwr_med_corr_z_4_rangea; 00411 int16_t tp_uwr_med_corr_z_4_rangeb; 00412 int16_t tp_uwr_med_corr_z_5_rangea; 00413 int16_t tp_uwr_med_corr_z_5_rangeb; 00414 int16_t tp_uwr_lng_z_1_min; 00415 int16_t tp_uwr_lng_z_1_max; 00416 int16_t tp_uwr_lng_z_2_min; 00417 int16_t tp_uwr_lng_z_2_max; 00418 int16_t tp_uwr_lng_z_3_min; 00419 int16_t tp_uwr_lng_z_3_max; 00420 int16_t tp_uwr_lng_z_4_min; 00421 int16_t tp_uwr_lng_z_4_max; 00422 int16_t tp_uwr_lng_z_5_min; 00423 int16_t tp_uwr_lng_z_5_max; 00424 int16_t tp_uwr_lng_corr_z_1_rangea; 00425 int16_t tp_uwr_lng_corr_z_1_rangeb; 00426 int16_t tp_uwr_lng_corr_z_2_rangea; 00427 int16_t tp_uwr_lng_corr_z_2_rangeb; 00428 int16_t tp_uwr_lng_corr_z_3_rangea; 00429 int16_t tp_uwr_lng_corr_z_3_rangeb; 00430 int16_t tp_uwr_lng_corr_z_4_rangea; 00431 int16_t tp_uwr_lng_corr_z_4_rangeb; 00432 int16_t tp_uwr_lng_corr_z_5_rangea; 00433 int16_t tp_uwr_lng_corr_z_5_rangeb; 00434 00435 } VL53LX_tuning_parm_storage_t; 00436 00437 00438 00439 00440 00441 typedef struct { 00442 00443 uint8_t x_centre; 00444 uint8_t y_centre; 00445 00446 } VL53LX_optical_centre_t; 00447 00448 00449 00450 00451 typedef struct { 00452 00453 uint8_t x_centre; 00454 uint8_t y_centre; 00455 uint8_t width; 00456 uint8_t height; 00457 00458 } VL53LX_user_zone_t; 00459 00460 00461 00462 00463 typedef struct { 00464 00465 uint8_t max_zones; 00466 uint8_t active_zones; 00467 00468 00469 00470 VL53LX_histogram_config_t multizone_hist_cfg; 00471 00472 VL53LX_user_zone_t user_zones[VL53LX_MAX_USER_ZONES]; 00473 00474 00475 uint8_t bin_config[VL53LX_MAX_USER_ZONES]; 00476 00477 00478 } VL53LX_zone_config_t; 00479 00480 00481 00482 typedef struct { 00483 00484 00485 VL53LX_GPIO_Interrupt_Mode intr_mode_distance; 00486 00487 00488 VL53LX_GPIO_Interrupt_Mode intr_mode_rate; 00489 00490 00491 uint8_t intr_new_measure_ready; 00492 00493 00494 uint8_t intr_no_target; 00495 00496 00497 uint8_t intr_combined_mode; 00498 00499 00500 00501 00502 00503 uint16_t threshold_distance_high; 00504 00505 00506 uint16_t threshold_distance_low; 00507 00508 00509 uint16_t threshold_rate_high; 00510 00511 00512 uint16_t threshold_rate_low; 00513 00514 } VL53LX_GPIO_interrupt_config_t; 00515 00516 00517 00518 00519 typedef struct { 00520 00521 00522 uint8_t vhv_loop_bound; 00523 00524 00525 uint8_t is_low_power_auto_mode; 00526 00527 00528 uint8_t low_power_auto_range_count; 00529 00530 00531 uint8_t saved_interrupt_config; 00532 00533 00534 uint8_t saved_vhv_init; 00535 00536 00537 uint8_t saved_vhv_timeout; 00538 00539 00540 uint8_t first_run_phasecal_result; 00541 00542 00543 uint32_t dss__total_rate_per_spad_mcps; 00544 00545 00546 uint16_t dss__required_spads; 00547 00548 } VL53LX_low_power_auto_data_t; 00549 00550 00551 00552 00553 00554 00555 00556 typedef struct { 00557 00558 00559 uint8_t smudge_corr_enabled; 00560 00561 00562 uint8_t smudge_corr_apply_enabled; 00563 00564 00565 uint8_t smudge_corr_single_apply; 00566 00567 00568 00569 00570 uint16_t smudge_margin; 00571 00572 00573 uint32_t noise_margin; 00574 00575 00576 uint32_t user_xtalk_offset_limit; 00577 00578 00579 uint8_t user_xtalk_offset_limit_hi; 00580 00581 00582 uint32_t sample_limit; 00583 00584 00585 uint32_t single_xtalk_delta; 00586 00587 00588 uint32_t averaged_xtalk_delta; 00589 00590 00591 uint32_t smudge_corr_clip_limit; 00592 00593 00594 uint32_t smudge_corr_ambient_threshold; 00595 00596 00597 uint8_t scaler_calc_method; 00598 00599 00600 int16_t x_gradient_scaler; 00601 00602 00603 int16_t y_gradient_scaler; 00604 00605 00606 uint8_t user_scaler_set; 00607 00608 00609 uint32_t nodetect_ambient_threshold; 00610 00611 00612 uint32_t nodetect_sample_limit; 00613 00614 00615 uint32_t nodetect_xtalk_offset; 00616 00617 00618 uint16_t nodetect_min_range_mm; 00619 00620 00621 uint32_t max_smudge_factor; 00622 00623 } VL53LX_smudge_corrector_config_t; 00624 00625 00626 00627 typedef struct { 00628 00629 00630 uint32_t current_samples; 00631 00632 00633 uint32_t required_samples; 00634 00635 00636 uint64_t accumulator; 00637 00638 00639 uint32_t nodetect_counter; 00640 00641 } VL53LX_smudge_corrector_internals_t; 00642 00643 00644 00645 typedef struct { 00646 00647 00648 uint8_t smudge_corr_valid; 00649 00650 00651 uint8_t smudge_corr_clipped; 00652 00653 00654 uint8_t single_xtalk_delta_flag; 00655 00656 00657 uint8_t averaged_xtalk_delta_flag; 00658 00659 00660 uint8_t sample_limit_exceeded_flag; 00661 00662 00663 uint8_t gradient_zero_flag; 00664 00665 00666 uint8_t new_xtalk_applied_flag; 00667 00668 00669 uint32_t algo__crosstalk_compensation_plane_offset_kcps; 00670 00671 00672 int16_t algo__crosstalk_compensation_x_plane_gradient_kcps; 00673 00674 00675 int16_t algo__crosstalk_compensation_y_plane_gradient_kcps; 00676 00677 00678 } VL53LX_smudge_corrector_data_t; 00679 00680 00681 00682 00683 00684 typedef struct { 00685 00686 00687 00688 uint8_t range_id; 00689 00690 uint32_t time_stamp; 00691 00692 uint8_t VL53LX_p_012; 00693 00694 uint8_t VL53LX_p_019; 00695 00696 uint8_t VL53LX_p_023; 00697 00698 uint8_t VL53LX_p_024; 00699 00700 uint8_t VL53LX_p_013; 00701 00702 uint8_t VL53LX_p_025; 00703 00704 00705 uint16_t width; 00706 00707 uint8_t VL53LX_p_029; 00708 00709 00710 uint16_t fast_osc_frequency; 00711 00712 uint16_t zero_distance_phase; 00713 00714 uint16_t VL53LX_p_004; 00715 00716 00717 uint32_t total_periods_elapsed; 00718 00719 00720 uint32_t peak_duration_us; 00721 00722 00723 uint32_t woi_duration_us; 00724 00725 00726 00727 00728 00729 uint32_t VL53LX_p_016; 00730 00731 uint32_t VL53LX_p_017; 00732 00733 int32_t VL53LX_p_010; 00734 00735 00736 00737 00738 uint16_t peak_signal_count_rate_mcps; 00739 00740 uint16_t avg_signal_count_rate_mcps; 00741 00742 uint16_t ambient_count_rate_mcps; 00743 00744 uint16_t total_rate_per_spad_mcps; 00745 00746 uint32_t VL53LX_p_009; 00747 00748 00749 00750 00751 uint16_t VL53LX_p_002; 00752 00753 00754 00755 00756 uint16_t VL53LX_p_026; 00757 00758 uint16_t VL53LX_p_011; 00759 00760 uint16_t VL53LX_p_027; 00761 00762 00763 00764 00765 int16_t min_range_mm; 00766 00767 int16_t median_range_mm; 00768 00769 int16_t max_range_mm; 00770 00771 00772 00773 00774 uint8_t range_status; 00775 00776 } VL53LX_range_data_t; 00777 00778 00779 00780 00781 typedef struct { 00782 00783 VL53LX_DeviceState cfg_device_state; 00784 00785 VL53LX_DeviceState rd_device_state; 00786 00787 uint8_t zone_id; 00788 00789 uint8_t stream_count; 00790 00791 00792 int16_t VL53LX_p_022[VL53LX_MAX_AMBIENT_DMAX_VALUES]; 00793 00794 int16_t wrap_dmax_mm; 00795 00796 00797 uint8_t device_status; 00798 00799 00800 uint8_t max_results; 00801 00802 uint8_t active_results; 00803 00804 VL53LX_range_data_t VL53LX_p_003[VL53LX_MAX_RANGE_RESULTS]; 00805 00806 VL53LX_range_data_t xmonitor; 00807 00808 VL53LX_smudge_corrector_data_t smudge_corrector_data; 00809 00810 00811 00812 } VL53LX_range_results_t; 00813 00814 00815 00816 00817 typedef struct { 00818 00819 uint8_t no_of_samples; 00820 00821 uint32_t rate_per_spad_kcps_sum; 00822 00823 uint32_t rate_per_spad_kcps_avg; 00824 00825 int32_t signal_total_events_sum; 00826 00827 int32_t signal_total_events_avg; 00828 00829 uint32_t sigma_mm_sum; 00830 00831 uint32_t sigma_mm_avg; 00832 00833 uint32_t median_phase_sum; 00834 00835 uint32_t median_phase_avg; 00836 00837 00838 } VL53LX_xtalk_range_data_t; 00839 00840 00841 00842 00843 typedef struct { 00844 00845 VL53LX_Error cal_status; 00846 00847 uint8_t num_of_samples_status; 00848 00849 uint8_t zero_samples_status; 00850 00851 uint8_t max_sigma_status; 00852 00853 uint8_t max_results; 00854 00855 uint8_t active_results; 00856 00857 00858 VL53LX_xtalk_range_data_t 00859 VL53LX_p_003[VL53LX_MAX_XTALK_RANGE_RESULTS]; 00860 00861 VL53LX_histogram_bin_data_t central_histogram_sum; 00862 00863 VL53LX_histogram_bin_data_t central_histogram_avg; 00864 00865 uint8_t central_histogram__window_start; 00866 00867 uint8_t central_histogram__window_end; 00868 00869 VL53LX_histogram_bin_data_t 00870 histogram_avg_1[VL53LX_MAX_XTALK_RANGE_RESULTS]; 00871 00872 VL53LX_histogram_bin_data_t 00873 histogram_avg_2[VL53LX_MAX_XTALK_RANGE_RESULTS]; 00874 00875 VL53LX_histogram_bin_data_t 00876 xtalk_avg[VL53LX_MAX_XTALK_RANGE_RESULTS]; 00877 00878 00879 } VL53LX_xtalk_range_results_t; 00880 00881 00882 00883 00884 typedef struct { 00885 00886 uint8_t preset_mode; 00887 00888 uint8_t dss_config__roi_mode_control; 00889 00890 uint16_t dss_config__manual_effective_spads_select; 00891 00892 uint8_t no_of_samples; 00893 00894 uint32_t effective_spads; 00895 00896 uint32_t peak_rate_mcps; 00897 00898 uint32_t VL53LX_p_002; 00899 00900 int32_t median_range_mm; 00901 00902 int32_t range_mm_offset; 00903 00904 00905 } VL53LX_offset_range_data_t; 00906 00907 00908 00909 00910 typedef struct { 00911 00912 int16_t cal_distance_mm; 00913 00914 uint16_t cal_reflectance_pc; 00915 00916 VL53LX_Error cal_status; 00917 00918 uint8_t cal_report; 00919 00920 uint8_t max_results; 00921 00922 uint8_t active_results; 00923 00924 VL53LX_offset_range_data_t 00925 VL53LX_p_003[VL53LX_MAX_OFFSET_RANGE_RESULTS]; 00926 00927 00928 } VL53LX_offset_range_results_t; 00929 00930 00931 00932 00933 typedef struct { 00934 00935 uint16_t result__mm_inner_actual_effective_spads; 00936 00937 uint16_t result__mm_outer_actual_effective_spads; 00938 00939 uint16_t result__mm_inner_peak_signal_count_rtn_mcps; 00940 00941 uint16_t result__mm_outer_peak_signal_count_rtn_mcps; 00942 00943 00944 } VL53LX_additional_offset_cal_data_t; 00945 00946 00947 00948 typedef struct { 00949 int16_t short_a_offset_mm; 00950 int16_t short_b_offset_mm; 00951 int16_t medium_a_offset_mm; 00952 int16_t medium_b_offset_mm; 00953 int16_t long_a_offset_mm; 00954 int16_t long_b_offset_mm; 00955 } VL53LX_per_vcsel_period_offset_cal_data_t; 00956 00957 00958 00959 00960 00961 typedef struct { 00962 00963 uint32_t VL53LX_p_016; 00964 00965 uint32_t VL53LX_p_017; 00966 00967 uint16_t VL53LX_p_011; 00968 00969 uint8_t range_status; 00970 00971 00972 } VL53LX_object_data_t; 00973 00974 00975 00976 00977 typedef struct { 00978 00979 VL53LX_DeviceState cfg_device_state; 00980 00981 VL53LX_DeviceState rd_device_state; 00982 00983 uint8_t zone_id; 00984 00985 uint8_t stream_count; 00986 00987 uint8_t max_objects; 00988 00989 uint8_t active_objects; 00990 00991 VL53LX_object_data_t VL53LX_p_003[VL53LX_MAX_RANGE_RESULTS]; 00992 00993 00994 VL53LX_object_data_t xmonitor; 00995 00996 00997 } VL53LX_zone_objects_t; 00998 00999 01000 01001 01002 01003 01004 typedef struct { 01005 01006 uint8_t max_zones; 01007 01008 uint8_t active_zones; 01009 01010 VL53LX_zone_objects_t VL53LX_p_003[VL53LX_MAX_USER_ZONES]; 01011 01012 01013 } VL53LX_zone_results_t; 01014 01015 01016 01017 01018 typedef struct { 01019 01020 VL53LX_DeviceState rd_device_state; 01021 01022 01023 uint8_t number_of_ambient_bins; 01024 01025 01026 uint16_t result__dss_actual_effective_spads; 01027 01028 uint8_t VL53LX_p_005; 01029 01030 uint32_t total_periods_elapsed; 01031 01032 01033 int32_t ambient_events_sum; 01034 01035 01036 } VL53LX_zone_hist_info_t; 01037 01038 01039 01040 01041 typedef struct { 01042 01043 uint8_t max_zones; 01044 01045 uint8_t active_zones; 01046 01047 VL53LX_zone_hist_info_t VL53LX_p_003[VL53LX_MAX_USER_ZONES]; 01048 01049 01050 } VL53LX_zone_histograms_t; 01051 01052 01053 01054 01055 typedef struct { 01056 01057 uint32_t no_of_samples; 01058 01059 uint32_t effective_spads; 01060 01061 uint32_t peak_rate_mcps; 01062 01063 uint32_t VL53LX_p_011; 01064 01065 uint32_t VL53LX_p_002; 01066 01067 int32_t median_range_mm; 01068 01069 int32_t range_mm_offset; 01070 01071 01072 } VL53LX_zone_calibration_data_t; 01073 01074 01075 01076 01077 01078 01079 typedef struct { 01080 01081 uint32_t struct_version; 01082 01083 VL53LX_DevicePresetModes preset_mode; 01084 01085 VL53LX_DeviceZonePreset zone_preset; 01086 01087 int16_t cal_distance_mm; 01088 01089 uint16_t cal_reflectance_pc; 01090 01091 uint16_t phasecal_result__reference_phase; 01092 01093 uint16_t zero_distance_phase; 01094 01095 VL53LX_Error cal_status; 01096 01097 uint8_t max_zones; 01098 01099 uint8_t active_zones; 01100 01101 VL53LX_zone_calibration_data_t VL53LX_p_003[VL53LX_MAX_USER_ZONES]; 01102 01103 01104 } VL53LX_zone_calibration_results_t; 01105 01106 01107 01108 01109 01110 typedef struct { 01111 01112 int16_t cal_distance_mm; 01113 01114 uint16_t cal_reflectance_pc; 01115 01116 uint16_t max_samples; 01117 01118 uint16_t width; 01119 01120 uint16_t height; 01121 01122 uint16_t peak_rate_mcps[VL53LX_NVM_PEAK_RATE_MAP_SAMPLES]; 01123 01124 01125 } VL53LX_cal_peak_rate_map_t; 01126 01127 01128 01129 01130 typedef struct { 01131 01132 uint8_t expected_stream_count; 01133 01134 uint8_t expected_gph_id; 01135 01136 uint8_t dss_mode; 01137 01138 uint16_t dss_requested_effective_spad_count; 01139 01140 uint8_t seed_cfg; 01141 01142 uint8_t initial_phase_seed; 01143 01144 01145 uint8_t roi_config__user_roi_centre_spad; 01146 01147 uint8_t roi_config__user_roi_requested_global_xy_size; 01148 01149 01150 } VL53LX_zone_private_dyn_cfg_t; 01151 01152 01153 01154 01155 typedef struct { 01156 01157 uint8_t max_zones; 01158 01159 uint8_t active_zones; 01160 01161 VL53LX_zone_private_dyn_cfg_t VL53LX_p_003[VL53LX_MAX_USER_ZONES]; 01162 01163 01164 } VL53LX_zone_private_dyn_cfgs_t; 01165 01166 01167 01168 typedef struct { 01169 01170 uint32_t algo__crosstalk_compensation_plane_offset_kcps; 01171 01172 int16_t algo__crosstalk_compensation_x_plane_gradient_kcps; 01173 01174 int16_t algo__crosstalk_compensation_y_plane_gradient_kcps; 01175 01176 uint32_t algo__xtalk_cpo_HistoMerge_kcps[VL53LX_BIN_REC_SIZE]; 01177 01178 01179 } VL53LX_xtalk_calibration_results_t; 01180 01181 01182 01183 01184 typedef struct { 01185 01186 01187 uint32_t sample_count; 01188 01189 01190 uint32_t pll_period_mm; 01191 01192 01193 uint32_t peak_duration_us_sum; 01194 01195 01196 uint32_t effective_spad_count_sum; 01197 01198 01199 uint32_t zero_distance_phase_sum; 01200 01201 01202 uint32_t zero_distance_phase_avg; 01203 01204 01205 int32_t event_scaler_sum; 01206 01207 01208 int32_t event_scaler_avg; 01209 01210 01211 int32_t signal_events_sum; 01212 01213 01214 uint32_t xtalk_rate_kcps_per_spad; 01215 01216 01217 int32_t xtalk_start_phase; 01218 01219 01220 int32_t xtalk_end_phase; 01221 01222 01223 int32_t xtalk_width_phase; 01224 01225 01226 int32_t target_start_phase; 01227 01228 01229 int32_t target_end_phase; 01230 01231 01232 int32_t target_width_phase; 01233 01234 01235 int32_t effective_width; 01236 01237 01238 int32_t event_scaler; 01239 01240 01241 uint8_t VL53LX_p_012; 01242 01243 01244 uint8_t VL53LX_p_013; 01245 01246 01247 uint8_t target_start; 01248 01249 01250 int32_t max_shape_value; 01251 01252 01253 int32_t bin_data_sums[VL53LX_XTALK_HISTO_BINS]; 01254 01255 } VL53LX_hist_xtalk_extract_data_t; 01256 01257 01258 01259 01260 typedef struct { 01261 01262 uint16_t standard_ranging_gain_factor; 01263 01264 uint16_t histogram_ranging_gain_factor; 01265 01266 01267 } VL53LX_gain_calibration_data_t; 01268 01269 01270 01271 01272 typedef struct { 01273 01274 VL53LX_DeviceState cfg_device_state; 01275 01276 uint8_t cfg_stream_count; 01277 01278 uint8_t cfg_internal_stream_count; 01279 01280 uint8_t cfg_internal_stream_count_val; 01281 01282 uint8_t cfg_gph_id; 01283 01284 uint8_t cfg_timing_status; 01285 01286 uint8_t cfg_zone_id; 01287 01288 01289 VL53LX_DeviceState rd_device_state; 01290 01291 uint8_t rd_stream_count; 01292 01293 uint8_t rd_internal_stream_count; 01294 01295 uint8_t rd_internal_stream_count_val; 01296 01297 uint8_t rd_gph_id; 01298 01299 uint8_t rd_timing_status; 01300 01301 uint8_t rd_zone_id; 01302 01303 01304 } VL53LX_ll_driver_state_t; 01305 01306 01307 01308 01309 typedef struct { 01310 01311 uint8_t wait_method; 01312 01313 VL53LX_DevicePresetModes preset_mode; 01314 01315 VL53LX_DeviceZonePreset zone_preset; 01316 01317 VL53LX_DeviceMeasurementModes measurement_mode; 01318 01319 VL53LX_OffsetCalibrationMode offset_calibration_mode; 01320 01321 VL53LX_OffsetCorrectionMode offset_correction_mode; 01322 01323 VL53LX_DeviceDmaxMode dmax_mode; 01324 01325 uint32_t phasecal_config_timeout_us; 01326 01327 uint32_t mm_config_timeout_us; 01328 01329 uint32_t range_config_timeout_us; 01330 01331 uint32_t inter_measurement_period_ms; 01332 01333 uint16_t dss_config__target_total_rate_mcps; 01334 01335 uint32_t fw_ready_poll_duration_ms; 01336 01337 uint8_t fw_ready; 01338 01339 uint8_t debug_mode; 01340 01341 01342 01343 VL53LX_ll_version_t version; 01344 01345 01346 VL53LX_ll_driver_state_t ll_state; 01347 01348 01349 VL53LX_GPIO_interrupt_config_t gpio_interrupt_config; 01350 01351 01352 VL53LX_customer_nvm_managed_t customer; 01353 VL53LX_cal_peak_rate_map_t cal_peak_rate_map; 01354 VL53LX_additional_offset_cal_data_t add_off_cal_data; 01355 VL53LX_dmax_calibration_data_t fmt_dmax_cal; 01356 VL53LX_dmax_calibration_data_t cust_dmax_cal; 01357 VL53LX_gain_calibration_data_t gain_cal; 01358 VL53LX_user_zone_t mm_roi; 01359 VL53LX_optical_centre_t optical_centre; 01360 VL53LX_zone_config_t zone_cfg; 01361 01362 01363 VL53LX_tuning_parm_storage_t tuning_parms; 01364 01365 01366 uint8_t rtn_good_spads[VL53LX_RTN_SPAD_BUFFER_SIZE]; 01367 01368 01369 VL53LX_refspadchar_config_t refspadchar; 01370 VL53LX_ssc_config_t ssc_cfg; 01371 VL53LX_hist_post_process_config_t histpostprocess; 01372 VL53LX_hist_gen3_dmax_config_t dmax_cfg; 01373 VL53LX_xtalkextract_config_t xtalk_extract_cfg; 01374 VL53LX_xtalk_config_t xtalk_cfg; 01375 VL53LX_offsetcal_config_t offsetcal_cfg; 01376 VL53LX_zonecal_config_t zonecal_cfg; 01377 01378 01379 VL53LX_static_nvm_managed_t stat_nvm; 01380 VL53LX_histogram_config_t hist_cfg; 01381 VL53LX_static_config_t stat_cfg; 01382 VL53LX_general_config_t gen_cfg; 01383 VL53LX_timing_config_t tim_cfg; 01384 VL53LX_dynamic_config_t dyn_cfg; 01385 VL53LX_system_control_t sys_ctrl; 01386 VL53LX_system_results_t sys_results; 01387 VL53LX_nvm_copy_data_t nvm_copy_data; 01388 01389 01390 VL53LX_histogram_bin_data_t hist_data; 01391 VL53LX_histogram_bin_data_t hist_xtalk; 01392 01393 01394 VL53LX_xtalk_histogram_data_t xtalk_shapes; 01395 VL53LX_xtalk_range_results_t xtalk_results; 01396 VL53LX_xtalk_calibration_results_t xtalk_cal; 01397 VL53LX_hist_xtalk_extract_data_t xtalk_extract; 01398 01399 01400 VL53LX_offset_range_results_t offset_results; 01401 01402 01403 VL53LX_core_results_t core_results; 01404 VL53LX_debug_results_t dbg_results; 01405 01406 VL53LX_smudge_corrector_config_t smudge_correct_config; 01407 01408 VL53LX_smudge_corrector_internals_t smudge_corrector_internals; 01409 01410 01411 01412 01413 VL53LX_low_power_auto_data_t low_power_auto_data; 01414 01415 uint8_t wArea1[1536]; 01416 uint8_t wArea2[512]; 01417 VL53LX_per_vcsel_period_offset_cal_data_t per_vcsel_cal_data; 01418 01419 uint8_t bin_rec_pos; 01420 01421 uint8_t pos_before_next_recom; 01422 01423 int32_t multi_bins_rec[VL53LX_BIN_REC_SIZE] 01424 [VL53LX_TIMING_CONF_A_B_SIZE][VL53LX_HISTOGRAM_BUFFER_SIZE]; 01425 01426 int16_t PreviousRangeMilliMeter[VL53LX_MAX_RANGE_RESULTS]; 01427 uint8_t PreviousRangeStatus[VL53LX_MAX_RANGE_RESULTS]; 01428 uint8_t PreviousExtendedRange[VL53LX_MAX_RANGE_RESULTS]; 01429 uint8_t PreviousStreamCount; 01430 } VL53LX_LLDriverData_t; 01431 01432 01433 01434 01435 typedef struct { 01436 01437 01438 VL53LX_range_results_t range_results; 01439 01440 01441 VL53LX_zone_private_dyn_cfgs_t zone_dyn_cfgs; 01442 01443 01444 VL53LX_zone_results_t zone_results; 01445 VL53LX_zone_histograms_t zone_hists; 01446 VL53LX_zone_calibration_results_t zone_cal; 01447 01448 } VL53LX_LLDriverResults_t; 01449 01450 01451 01452 01453 typedef struct { 01454 01455 uint32_t struct_version; 01456 VL53LX_customer_nvm_managed_t customer; 01457 VL53LX_dmax_calibration_data_t fmt_dmax_cal; 01458 VL53LX_dmax_calibration_data_t cust_dmax_cal; 01459 VL53LX_additional_offset_cal_data_t add_off_cal_data; 01460 VL53LX_optical_centre_t optical_centre; 01461 VL53LX_xtalk_histogram_data_t xtalkhisto; 01462 VL53LX_gain_calibration_data_t gain_cal; 01463 VL53LX_cal_peak_rate_map_t cal_peak_rate_map; 01464 VL53LX_per_vcsel_period_offset_cal_data_t per_vcsel_cal_data; 01465 01466 } VL53LX_calibration_data_t; 01467 01468 01469 01470 01471 typedef struct { 01472 01473 VL53LX_customer_nvm_managed_t customer; 01474 VL53LX_xtalkextract_config_t xtalk_extract_cfg; 01475 VL53LX_xtalk_config_t xtalk_cfg; 01476 VL53LX_histogram_bin_data_t hist_data; 01477 VL53LX_xtalk_histogram_data_t xtalk_shapes; 01478 VL53LX_xtalk_range_results_t xtalk_results; 01479 01480 } VL53LX_xtalk_debug_data_t; 01481 01482 01483 01484 01485 typedef struct { 01486 01487 VL53LX_customer_nvm_managed_t customer; 01488 VL53LX_dmax_calibration_data_t fmt_dmax_cal; 01489 VL53LX_dmax_calibration_data_t cust_dmax_cal; 01490 VL53LX_additional_offset_cal_data_t add_off_cal_data; 01491 VL53LX_offset_range_results_t offset_results; 01492 01493 } VL53LX_offset_debug_data_t; 01494 01495 01496 01497 01498 typedef struct { 01499 uint16_t vl53lx_tuningparm_version; 01500 uint16_t vl53lx_tuningparm_key_table_version; 01501 uint16_t vl53lx_tuningparm_lld_version; 01502 uint8_t vl53lx_tuningparm_hist_algo_select; 01503 uint8_t vl53lx_tuningparm_hist_target_order; 01504 uint8_t vl53lx_tuningparm_hist_filter_woi_0; 01505 uint8_t vl53lx_tuningparm_hist_filter_woi_1; 01506 uint8_t vl53lx_tuningparm_hist_amb_est_method; 01507 uint8_t vl53lx_tuningparm_hist_amb_thresh_sigma_0; 01508 uint8_t vl53lx_tuningparm_hist_amb_thresh_sigma_1; 01509 int32_t vl53lx_tuningparm_hist_min_amb_thresh_events; 01510 uint16_t vl53lx_tuningparm_hist_amb_events_scaler; 01511 uint16_t vl53lx_tuningparm_hist_noise_threshold; 01512 int32_t vl53lx_tuningparm_hist_signal_total_events_limit; 01513 uint8_t vl53lx_tuningparm_hist_sigma_est_ref_mm; 01514 uint16_t vl53lx_tuningparm_hist_sigma_thresh_mm; 01515 uint16_t vl53lx_tuningparm_hist_gain_factor; 01516 uint8_t vl53lx_tuningparm_consistency_hist_phase_tolerance; 01517 uint16_t vl53lx_tuningparm_consistency_hist_min_max_tolerance_mm; 01518 uint8_t vl53lx_tuningparm_consistency_hist_event_sigma; 01519 uint16_t vl53lx_tuningparm_consistency_hist_event_sigma_min_spad_limit; 01520 uint8_t vl53lx_tuningparm_initial_phase_rtn_histo_long_range; 01521 uint8_t vl53lx_tuningparm_initial_phase_rtn_histo_med_range; 01522 uint8_t vl53lx_tuningparm_initial_phase_rtn_histo_short_range; 01523 uint8_t vl53lx_tuningparm_initial_phase_ref_histo_long_range; 01524 uint8_t vl53lx_tuningparm_initial_phase_ref_histo_med_range; 01525 uint8_t vl53lx_tuningparm_initial_phase_ref_histo_short_range; 01526 int16_t vl53lx_tuningparm_xtalk_detect_min_valid_range_mm; 01527 int16_t vl53lx_tuningparm_xtalk_detect_max_valid_range_mm; 01528 uint16_t vl53lx_tuningparm_xtalk_detect_max_sigma_mm; 01529 uint16_t vl53lx_tuningparm_xtalk_detect_min_max_tolerance; 01530 uint16_t vl53lx_tuningparm_xtalk_detect_max_valid_rate_kcps; 01531 uint8_t vl53lx_tuningparm_xtalk_detect_event_sigma; 01532 int16_t vl53lx_tuningparm_hist_xtalk_margin_kcps; 01533 uint8_t vl53lx_tuningparm_consistency_lite_phase_tolerance; 01534 uint8_t vl53lx_tuningparm_phasecal_target; 01535 uint16_t vl53lx_tuningparm_lite_cal_repeat_rate; 01536 uint16_t vl53lx_tuningparm_lite_ranging_gain_factor; 01537 uint8_t vl53lx_tuningparm_lite_min_clip_mm; 01538 uint16_t vl53lx_tuningparm_lite_long_sigma_thresh_mm; 01539 uint16_t vl53lx_tuningparm_lite_med_sigma_thresh_mm; 01540 uint16_t vl53lx_tuningparm_lite_short_sigma_thresh_mm; 01541 uint16_t vl53lx_tuningparm_lite_long_min_count_rate_rtn_mcps; 01542 uint16_t vl53lx_tuningparm_lite_med_min_count_rate_rtn_mcps; 01543 uint16_t vl53lx_tuningparm_lite_short_min_count_rate_rtn_mcps; 01544 uint8_t vl53lx_tuningparm_lite_sigma_est_pulse_width; 01545 uint8_t vl53lx_tuningparm_lite_sigma_est_amb_width_ns; 01546 uint8_t vl53lx_tuningparm_lite_sigma_ref_mm; 01547 uint8_t vl53lx_tuningparm_lite_rit_mult; 01548 uint8_t vl53lx_tuningparm_lite_seed_config; 01549 uint8_t vl53lx_tuningparm_lite_quantifier; 01550 uint8_t vl53lx_tuningparm_lite_first_order_select; 01551 int16_t vl53lx_tuningparm_lite_xtalk_margin_kcps; 01552 uint8_t vl53lx_tuningparm_initial_phase_rtn_lite_long_range; 01553 uint8_t vl53lx_tuningparm_initial_phase_rtn_lite_med_range; 01554 uint8_t vl53lx_tuningparm_initial_phase_rtn_lite_short_range; 01555 uint8_t vl53lx_tuningparm_initial_phase_ref_lite_long_range; 01556 uint8_t vl53lx_tuningparm_initial_phase_ref_lite_med_range; 01557 uint8_t vl53lx_tuningparm_initial_phase_ref_lite_short_range; 01558 uint8_t vl53lx_tuningparm_timed_seed_config; 01559 uint8_t vl53lx_tuningparm_dmax_cfg_signal_thresh_sigma; 01560 uint16_t vl53lx_tuningparm_dmax_cfg_reflectance_array_0; 01561 uint16_t vl53lx_tuningparm_dmax_cfg_reflectance_array_1; 01562 uint16_t vl53lx_tuningparm_dmax_cfg_reflectance_array_2; 01563 uint16_t vl53lx_tuningparm_dmax_cfg_reflectance_array_3; 01564 uint16_t vl53lx_tuningparm_dmax_cfg_reflectance_array_4; 01565 uint8_t vl53lx_tuningparm_vhv_loopbound; 01566 uint8_t vl53lx_tuningparm_refspadchar_device_test_mode; 01567 uint8_t vl53lx_tuningparm_refspadchar_vcsel_period; 01568 uint32_t vl53lx_tuningparm_refspadchar_phasecal_timeout_us; 01569 uint16_t vl53lx_tuningparm_refspadchar_target_count_rate_mcps; 01570 uint16_t vl53lx_tuningparm_refspadchar_min_countrate_limit_mcps; 01571 uint16_t vl53lx_tuningparm_refspadchar_max_countrate_limit_mcps; 01572 uint8_t vl53lx_tuningparm_xtalk_extract_num_of_samples; 01573 int16_t vl53lx_tuningparm_xtalk_extract_min_filter_thresh_mm; 01574 int16_t vl53lx_tuningparm_xtalk_extract_max_filter_thresh_mm; 01575 uint16_t vl53lx_tuningparm_xtalk_extract_dss_rate_mcps; 01576 uint32_t vl53lx_tuningparm_xtalk_extract_phasecal_timeout_us; 01577 uint16_t vl53lx_tuningparm_xtalk_extract_max_valid_rate_kcps; 01578 uint16_t vl53lx_tuningparm_xtalk_extract_sigma_threshold_mm; 01579 uint32_t vl53lx_tuningparm_xtalk_extract_dss_timeout_us; 01580 uint32_t vl53lx_tuningparm_xtalk_extract_bin_timeout_us; 01581 uint16_t vl53lx_tuningparm_offset_cal_dss_rate_mcps; 01582 uint32_t vl53lx_tuningparm_offset_cal_phasecal_timeout_us; 01583 uint32_t vl53lx_tuningparm_offset_cal_mm_timeout_us; 01584 uint32_t vl53lx_tuningparm_offset_cal_range_timeout_us; 01585 uint8_t vl53lx_tuningparm_offset_cal_pre_samples; 01586 uint8_t vl53lx_tuningparm_offset_cal_mm1_samples; 01587 uint8_t vl53lx_tuningparm_offset_cal_mm2_samples; 01588 uint16_t vl53lx_tuningparm_zone_cal_dss_rate_mcps; 01589 uint32_t vl53lx_tuningparm_zone_cal_phasecal_timeout_us; 01590 uint32_t vl53lx_tuningparm_zone_cal_dss_timeout_us; 01591 uint16_t vl53lx_tuningparm_zone_cal_phasecal_num_samples; 01592 uint32_t vl53lx_tuningparm_zone_cal_range_timeout_us; 01593 uint16_t vl53lx_tuningparm_zone_cal_zone_num_samples; 01594 uint8_t vl53lx_tuningparm_spadmap_vcsel_period; 01595 uint8_t vl53lx_tuningparm_spadmap_vcsel_start; 01596 uint16_t vl53lx_tuningparm_spadmap_rate_limit_mcps; 01597 uint16_t vl53lx_tuningparm_lite_dss_config_target_total_rate_mcps; 01598 uint16_t vl53lx_tuningparm_ranging_dss_config_target_total_rate_mcps; 01599 uint16_t vl53lx_tuningparm_mz_dss_config_target_total_rate_mcps; 01600 uint16_t vl53lx_tuningparm_timed_dss_config_target_total_rate_mcps; 01601 uint32_t vl53lx_tuningparm_lite_phasecal_config_timeout_us; 01602 uint32_t vl53lx_tuningparm_ranging_long_phasecal_config_timeout_us; 01603 uint32_t vl53lx_tuningparm_ranging_med_phasecal_config_timeout_us; 01604 uint32_t vl53lx_tuningparm_ranging_short_phasecal_config_timeout_us; 01605 uint32_t vl53lx_tuningparm_mz_long_phasecal_config_timeout_us; 01606 uint32_t vl53lx_tuningparm_mz_med_phasecal_config_timeout_us; 01607 uint32_t vl53lx_tuningparm_mz_short_phasecal_config_timeout_us; 01608 uint32_t vl53lx_tuningparm_timed_phasecal_config_timeout_us; 01609 uint32_t vl53lx_tuningparm_lite_mm_config_timeout_us; 01610 uint32_t vl53lx_tuningparm_ranging_mm_config_timeout_us; 01611 uint32_t vl53lx_tuningparm_mz_mm_config_timeout_us; 01612 uint32_t vl53lx_tuningparm_timed_mm_config_timeout_us; 01613 uint32_t vl53lx_tuningparm_lite_range_config_timeout_us; 01614 uint32_t vl53lx_tuningparm_ranging_range_config_timeout_us; 01615 uint32_t vl53lx_tuningparm_mz_range_config_timeout_us; 01616 uint32_t vl53lx_tuningparm_timed_range_config_timeout_us; 01617 uint16_t vl53lx_tuningparm_dynxtalk_smudge_margin; 01618 uint32_t vl53lx_tuningparm_dynxtalk_noise_margin; 01619 uint32_t vl53lx_tuningparm_dynxtalk_xtalk_offset_limit; 01620 uint8_t vl53lx_tuningparm_dynxtalk_xtalk_offset_limit_hi; 01621 uint32_t vl53lx_tuningparm_dynxtalk_sample_limit; 01622 uint32_t vl53lx_tuningparm_dynxtalk_single_xtalk_delta; 01623 uint32_t vl53lx_tuningparm_dynxtalk_averaged_xtalk_delta; 01624 uint32_t vl53lx_tuningparm_dynxtalk_clip_limit; 01625 uint8_t vl53lx_tuningparm_dynxtalk_scaler_calc_method; 01626 int16_t vl53lx_tuningparm_dynxtalk_xgradient_scaler; 01627 int16_t vl53lx_tuningparm_dynxtalk_ygradient_scaler; 01628 uint8_t vl53lx_tuningparm_dynxtalk_user_scaler_set; 01629 uint8_t vl53lx_tuningparm_dynxtalk_smudge_cor_single_apply; 01630 uint32_t vl53lx_tuningparm_dynxtalk_xtalk_amb_threshold; 01631 uint32_t vl53lx_tuningparm_dynxtalk_nodetect_amb_threshold_kcps; 01632 uint32_t vl53lx_tuningparm_dynxtalk_nodetect_sample_limit; 01633 uint32_t vl53lx_tuningparm_dynxtalk_nodetect_xtalk_offset_kcps; 01634 uint16_t vl53lx_tuningparm_dynxtalk_nodetect_min_range_mm; 01635 uint8_t vl53lx_tuningparm_lowpowerauto_vhv_loop_bound; 01636 uint32_t vl53lx_tuningparm_lowpowerauto_mm_config_timeout_us; 01637 uint32_t vl53lx_tuningparm_lowpowerauto_range_config_timeout_us; 01638 uint16_t vl53lx_tuningparm_very_short_dss_rate_mcps; 01639 uint32_t vl53lx_tuningparm_phasecal_patch_power; 01640 } VL53LX_tuning_parameters_t; 01641 01642 01643 01644 01645 01646 typedef struct { 01647 01648 uint16_t target_reflectance_for_dmax[VL53LX_MAX_AMBIENT_DMAX_VALUES]; 01649 01650 } VL53LX_dmax_reflectance_array_t; 01651 01652 01653 01654 01655 typedef struct { 01656 01657 uint8_t spad_type; 01658 01659 uint16_t VL53LX_p_020; 01660 01661 uint16_t rate_data[VL53LX_NO_OF_SPAD_ENABLES]; 01662 01663 uint16_t no_of_values; 01664 01665 uint8_t fractional_bits; 01666 01667 uint8_t error_status; 01668 01669 01670 } VL53LX_spad_rate_data_t; 01671 01672 01673 01674 01675 01676 01677 typedef struct { 01678 01679 VL53LX_DevicePresetModes preset_mode; 01680 01681 VL53LX_DeviceZonePreset zone_preset; 01682 01683 VL53LX_DeviceMeasurementModes measurement_mode; 01684 01685 VL53LX_OffsetCalibrationMode offset_calibration_mode; 01686 01687 VL53LX_OffsetCorrectionMode offset_correction_mode; 01688 01689 VL53LX_DeviceDmaxMode dmax_mode; 01690 01691 01692 uint32_t phasecal_config_timeout_us; 01693 01694 uint32_t mm_config_timeout_us; 01695 01696 uint32_t range_config_timeout_us; 01697 01698 uint32_t inter_measurement_period_ms; 01699 01700 uint16_t dss_config__target_total_rate_mcps; 01701 01702 01703 VL53LX_histogram_bin_data_t VL53LX_p_006; 01704 01705 01706 } VL53LX_additional_data_t; 01707 01708 01709 01710 01711 01712 01713 01714 01715 #define SUPPRESS_UNUSED_WARNING(x) \ 01716 ((void) (x)) 01717 01718 01719 #define IGNORE_STATUS(__FUNCTION_ID__, __ERROR_STATUS_CHECK__, __STATUS__) \ 01720 do { \ 01721 DISABLE_WARNINGS(); \ 01722 if (__FUNCTION_ID__) { \ 01723 if (__STATUS__ == __ERROR_STATUS_CHECK__) { \ 01724 __STATUS__ = VL53LX_ERROR_NONE; \ 01725 WARN_OVERRIDE_STATUS(__FUNCTION_ID__); \ 01726 } \ 01727 } \ 01728 ENABLE_WARNINGS(); \ 01729 } \ 01730 while (0) 01731 01732 #define VL53LX_COPYSTRING(str, ...) \ 01733 (strncpy(str, ##__VA_ARGS__, VL53LX_MAX_STRING_LENGTH-1)) 01734 01735 #ifdef __cplusplus 01736 } 01737 #endif 01738 01739 #endif 01740 01741 01742
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