Rename library

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L3CX_NoShield_1Sensor_poll_Mb06x VL53L3_NoShield_1Sensor_polling_Mb63 X_NUCLEO_53L3A2 53L3A2_Ranging

Committer:
charlesmn
Date:
Wed Jul 21 14:07:59 2021 +0000
Revision:
7:7f1bbf370283
Parent:
5:89031b2f5316
Moved vl53l3cx_class.cpp and .h to 53l3a2_RangingClass

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Charles MacNeill 5:89031b2f5316 1
Charles MacNeill 5:89031b2f5316 2 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
Charles MacNeill 5:89031b2f5316 3 /******************************************************************************
Charles MacNeill 5:89031b2f5316 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
Charles MacNeill 5:89031b2f5316 5
Charles MacNeill 5:89031b2f5316 6 This file is part of VL53LX and is dual licensed,
Charles MacNeill 5:89031b2f5316 7 either GPL-2.0+
Charles MacNeill 5:89031b2f5316 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 5:89031b2f5316 9 ******************************************************************************
Charles MacNeill 5:89031b2f5316 10 */
Charles MacNeill 5:89031b2f5316 11
Charles MacNeill 5:89031b2f5316 12
Charles MacNeill 5:89031b2f5316 13 #ifndef _VL53LX_REGISTER_MAP_H_
Charles MacNeill 5:89031b2f5316 14 #define _VL53LX_REGISTER_MAP_H_
Charles MacNeill 5:89031b2f5316 15
Charles MacNeill 5:89031b2f5316 16 #define VL53LX_SOFT_RESET 0x0000
Charles MacNeill 5:89031b2f5316 17
Charles MacNeill 5:89031b2f5316 18 #define VL53LX_I2C_SLAVE__DEVICE_ADDRESS 0x0001
Charles MacNeill 5:89031b2f5316 19
Charles MacNeill 5:89031b2f5316 20 #define VL53LX_ANA_CONFIG__VHV_REF_SEL_VDDPIX 0x0002
Charles MacNeill 5:89031b2f5316 21
Charles MacNeill 5:89031b2f5316 22 #define VL53LX_ANA_CONFIG__VHV_REF_SEL_VQUENCH 0x0003
Charles MacNeill 5:89031b2f5316 23
Charles MacNeill 5:89031b2f5316 24 #define VL53LX_ANA_CONFIG__REG_AVDD1V2_SEL 0x0004
Charles MacNeill 5:89031b2f5316 25
Charles MacNeill 5:89031b2f5316 26 #define VL53LX_ANA_CONFIG__FAST_OSC__TRIM 0x0005
Charles MacNeill 5:89031b2f5316 27
Charles MacNeill 5:89031b2f5316 28 #define VL53LX_OSC_MEASURED__FAST_OSC__FREQUENCY 0x0006
Charles MacNeill 5:89031b2f5316 29
Charles MacNeill 5:89031b2f5316 30 #define VL53LX_OSC_MEASURED__FAST_OSC__FREQUENCY_HI 0x0006
Charles MacNeill 5:89031b2f5316 31
Charles MacNeill 5:89031b2f5316 32 #define VL53LX_OSC_MEASURED__FAST_OSC__FREQUENCY_LO 0x0007
Charles MacNeill 5:89031b2f5316 33
Charles MacNeill 5:89031b2f5316 34 #define VL53LX_VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x0008
Charles MacNeill 5:89031b2f5316 35
Charles MacNeill 5:89031b2f5316 36 #define VL53LX_VHV_CONFIG__COUNT_THRESH 0x0009
Charles MacNeill 5:89031b2f5316 37
Charles MacNeill 5:89031b2f5316 38 #define VL53LX_VHV_CONFIG__OFFSET 0x000A
Charles MacNeill 5:89031b2f5316 39
Charles MacNeill 5:89031b2f5316 40 #define VL53LX_VHV_CONFIG__INIT 0x000B
Charles MacNeill 5:89031b2f5316 41
Charles MacNeill 5:89031b2f5316 42 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_REF_0 0x000D
Charles MacNeill 5:89031b2f5316 43
Charles MacNeill 5:89031b2f5316 44 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_REF_1 0x000E
Charles MacNeill 5:89031b2f5316 45
Charles MacNeill 5:89031b2f5316 46 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_REF_2 0x000F
Charles MacNeill 5:89031b2f5316 47
Charles MacNeill 5:89031b2f5316 48 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_REF_3 0x0010
Charles MacNeill 5:89031b2f5316 49
Charles MacNeill 5:89031b2f5316 50 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_REF_4 0x0011
Charles MacNeill 5:89031b2f5316 51
Charles MacNeill 5:89031b2f5316 52 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_REF_5 0x0012
Charles MacNeill 5:89031b2f5316 53
Charles MacNeill 5:89031b2f5316 54 #define VL53LX_GLOBAL_CONFIG__REF_EN_START_SELECT 0x0013
Charles MacNeill 5:89031b2f5316 55
Charles MacNeill 5:89031b2f5316 56 #define VL53LX_REF_SPAD_MAN__NUM_REQUESTED_REF_SPADS 0x0014
Charles MacNeill 5:89031b2f5316 57
Charles MacNeill 5:89031b2f5316 58 #define VL53LX_REF_SPAD_MAN__REF_LOCATION 0x0015
Charles MacNeill 5:89031b2f5316 59
Charles MacNeill 5:89031b2f5316 60 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x0016
Charles MacNeill 5:89031b2f5316 61
Charles MacNeill 5:89031b2f5316 62 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_HI 0x0016
Charles MacNeill 5:89031b2f5316 63
Charles MacNeill 5:89031b2f5316 64 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_LO 0x0017
Charles MacNeill 5:89031b2f5316 65
Charles MacNeill 5:89031b2f5316 66 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x0018
Charles MacNeill 5:89031b2f5316 67
Charles MacNeill 5:89031b2f5316 68 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_HI 0x0018
Charles MacNeill 5:89031b2f5316 69
Charles MacNeill 5:89031b2f5316 70 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_LO 0x0019
Charles MacNeill 5:89031b2f5316 71
Charles MacNeill 5:89031b2f5316 72 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x001A
Charles MacNeill 5:89031b2f5316 73
Charles MacNeill 5:89031b2f5316 74 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_HI 0x001A
Charles MacNeill 5:89031b2f5316 75
Charles MacNeill 5:89031b2f5316 76 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_LO 0x001B
Charles MacNeill 5:89031b2f5316 77
Charles MacNeill 5:89031b2f5316 78 #define VL53LX_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS 0x001C
Charles MacNeill 5:89031b2f5316 79
Charles MacNeill 5:89031b2f5316 80 #define VL53LX_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_HI 0x001C
Charles MacNeill 5:89031b2f5316 81
Charles MacNeill 5:89031b2f5316 82 #define VL53LX_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_LO 0x001D
Charles MacNeill 5:89031b2f5316 83
Charles MacNeill 5:89031b2f5316 84 #define VL53LX_ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x001E
Charles MacNeill 5:89031b2f5316 85
Charles MacNeill 5:89031b2f5316 86 #define VL53LX_ALGO__PART_TO_PART_RANGE_OFFSET_MM_HI 0x001E
Charles MacNeill 5:89031b2f5316 87
Charles MacNeill 5:89031b2f5316 88 #define VL53LX_ALGO__PART_TO_PART_RANGE_OFFSET_MM_LO 0x001F
Charles MacNeill 5:89031b2f5316 89
Charles MacNeill 5:89031b2f5316 90 #define VL53LX_MM_CONFIG__INNER_OFFSET_MM 0x0020
Charles MacNeill 5:89031b2f5316 91
Charles MacNeill 5:89031b2f5316 92 #define VL53LX_MM_CONFIG__INNER_OFFSET_MM_HI 0x0020
Charles MacNeill 5:89031b2f5316 93
Charles MacNeill 5:89031b2f5316 94 #define VL53LX_MM_CONFIG__INNER_OFFSET_MM_LO 0x0021
Charles MacNeill 5:89031b2f5316 95
Charles MacNeill 5:89031b2f5316 96 #define VL53LX_MM_CONFIG__OUTER_OFFSET_MM 0x0022
Charles MacNeill 5:89031b2f5316 97
Charles MacNeill 5:89031b2f5316 98 #define VL53LX_MM_CONFIG__OUTER_OFFSET_MM_HI 0x0022
Charles MacNeill 5:89031b2f5316 99
Charles MacNeill 5:89031b2f5316 100 #define VL53LX_MM_CONFIG__OUTER_OFFSET_MM_LO 0x0023
Charles MacNeill 5:89031b2f5316 101
Charles MacNeill 5:89031b2f5316 102 #define VL53LX_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS 0x0024
Charles MacNeill 5:89031b2f5316 103
Charles MacNeill 5:89031b2f5316 104 #define VL53LX_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_HI 0x0024
Charles MacNeill 5:89031b2f5316 105
Charles MacNeill 5:89031b2f5316 106 #define VL53LX_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_LO 0x0025
Charles MacNeill 5:89031b2f5316 107
Charles MacNeill 5:89031b2f5316 108 #define VL53LX_DEBUG__CTRL 0x0026
Charles MacNeill 5:89031b2f5316 109
Charles MacNeill 5:89031b2f5316 110 #define VL53LX_TEST_MODE__CTRL 0x0027
Charles MacNeill 5:89031b2f5316 111
Charles MacNeill 5:89031b2f5316 112 #define VL53LX_CLK_GATING__CTRL 0x0028
Charles MacNeill 5:89031b2f5316 113
Charles MacNeill 5:89031b2f5316 114 #define VL53LX_NVM_BIST__CTRL 0x0029
Charles MacNeill 5:89031b2f5316 115
Charles MacNeill 5:89031b2f5316 116 #define VL53LX_NVM_BIST__NUM_NVM_WORDS 0x002A
Charles MacNeill 5:89031b2f5316 117
Charles MacNeill 5:89031b2f5316 118 #define VL53LX_NVM_BIST__START_ADDRESS 0x002B
Charles MacNeill 5:89031b2f5316 119
Charles MacNeill 5:89031b2f5316 120 #define VL53LX_HOST_IF__STATUS 0x002C
Charles MacNeill 5:89031b2f5316 121
Charles MacNeill 5:89031b2f5316 122 #define VL53LX_PAD_I2C_HV__CONFIG 0x002D
Charles MacNeill 5:89031b2f5316 123
Charles MacNeill 5:89031b2f5316 124 #define VL53LX_PAD_I2C_HV__EXTSUP_CONFIG 0x002E
Charles MacNeill 5:89031b2f5316 125
Charles MacNeill 5:89031b2f5316 126 #define VL53LX_GPIO_HV_PAD__CTRL 0x002F
Charles MacNeill 5:89031b2f5316 127
Charles MacNeill 5:89031b2f5316 128 #define VL53LX_GPIO_HV_MUX__CTRL 0x0030
Charles MacNeill 5:89031b2f5316 129
Charles MacNeill 5:89031b2f5316 130 #define VL53LX_GPIO__TIO_HV_STATUS 0x0031
Charles MacNeill 5:89031b2f5316 131
Charles MacNeill 5:89031b2f5316 132 #define VL53LX_GPIO__FIO_HV_STATUS 0x0032
Charles MacNeill 5:89031b2f5316 133
Charles MacNeill 5:89031b2f5316 134 #define VL53LX_ANA_CONFIG__SPAD_SEL_PSWIDTH 0x0033
Charles MacNeill 5:89031b2f5316 135
Charles MacNeill 5:89031b2f5316 136 #define VL53LX_ANA_CONFIG__VCSEL_PULSE_WIDTH_OFFSET 0x0034
Charles MacNeill 5:89031b2f5316 137
Charles MacNeill 5:89031b2f5316 138 #define VL53LX_ANA_CONFIG__FAST_OSC__CONFIG_CTRL 0x0035
Charles MacNeill 5:89031b2f5316 139
Charles MacNeill 5:89031b2f5316 140 #define VL53LX_SIGMA_ESTIMATOR__EFFECTIVE_PULSE_WIDTH_NS 0x0036
Charles MacNeill 5:89031b2f5316 141
Charles MacNeill 5:89031b2f5316 142 #define VL53LX_SIGMA_ESTIMATOR__EFFECTIVE_AMBIENT_WIDTH_NS 0x0037
Charles MacNeill 5:89031b2f5316 143
Charles MacNeill 5:89031b2f5316 144 #define VL53LX_SIGMA_ESTIMATOR__SIGMA_REF_MM 0x0038
Charles MacNeill 5:89031b2f5316 145
Charles MacNeill 5:89031b2f5316 146 #define VL53LX_ALGO__CROSSTALK_COMPENSATION_VALID_HEIGHT_MM 0x0039
Charles MacNeill 5:89031b2f5316 147
Charles MacNeill 5:89031b2f5316 148 #define VL53LX_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_0 0x003A
Charles MacNeill 5:89031b2f5316 149
Charles MacNeill 5:89031b2f5316 150 #define VL53LX_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_1 0x003B
Charles MacNeill 5:89031b2f5316 151
Charles MacNeill 5:89031b2f5316 152 #define VL53LX_ALGO__RANGE_IGNORE_THRESHOLD_MCPS 0x003C
Charles MacNeill 5:89031b2f5316 153
Charles MacNeill 5:89031b2f5316 154 #define VL53LX_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_HI 0x003C
Charles MacNeill 5:89031b2f5316 155
Charles MacNeill 5:89031b2f5316 156 #define VL53LX_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_LO 0x003D
Charles MacNeill 5:89031b2f5316 157
Charles MacNeill 5:89031b2f5316 158 #define VL53LX_ALGO__RANGE_IGNORE_VALID_HEIGHT_MM 0x003E
Charles MacNeill 5:89031b2f5316 159
Charles MacNeill 5:89031b2f5316 160 #define VL53LX_ALGO__RANGE_MIN_CLIP 0x003F
Charles MacNeill 5:89031b2f5316 161
Charles MacNeill 5:89031b2f5316 162 #define VL53LX_ALGO__CONSISTENCY_CHECK__TOLERANCE 0x0040
Charles MacNeill 5:89031b2f5316 163
Charles MacNeill 5:89031b2f5316 164 #define VL53LX_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_2 0x0041
Charles MacNeill 5:89031b2f5316 165
Charles MacNeill 5:89031b2f5316 166 #define VL53LX_SD_CONFIG__RESET_STAGES_MSB 0x0042
Charles MacNeill 5:89031b2f5316 167
Charles MacNeill 5:89031b2f5316 168 #define VL53LX_SD_CONFIG__RESET_STAGES_LSB 0x0043
Charles MacNeill 5:89031b2f5316 169
Charles MacNeill 5:89031b2f5316 170 #define VL53LX_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE 0x0044
Charles MacNeill 5:89031b2f5316 171
Charles MacNeill 5:89031b2f5316 172 #define VL53LX_GLOBAL_CONFIG__STREAM_DIVIDER 0x0045
Charles MacNeill 5:89031b2f5316 173
Charles MacNeill 5:89031b2f5316 174 #define VL53LX_SYSTEM__INTERRUPT_CONFIG_GPIO 0x0046
Charles MacNeill 5:89031b2f5316 175
Charles MacNeill 5:89031b2f5316 176 #define VL53LX_CAL_CONFIG__VCSEL_START 0x0047
Charles MacNeill 5:89031b2f5316 177
Charles MacNeill 5:89031b2f5316 178 #define VL53LX_CAL_CONFIG__REPEAT_RATE 0x0048
Charles MacNeill 5:89031b2f5316 179
Charles MacNeill 5:89031b2f5316 180 #define VL53LX_CAL_CONFIG__REPEAT_RATE_HI 0x0048
Charles MacNeill 5:89031b2f5316 181
Charles MacNeill 5:89031b2f5316 182 #define VL53LX_CAL_CONFIG__REPEAT_RATE_LO 0x0049
Charles MacNeill 5:89031b2f5316 183
Charles MacNeill 5:89031b2f5316 184 #define VL53LX_GLOBAL_CONFIG__VCSEL_WIDTH 0x004A
Charles MacNeill 5:89031b2f5316 185
Charles MacNeill 5:89031b2f5316 186 #define VL53LX_PHASECAL_CONFIG__TIMEOUT_MACROP 0x004B
Charles MacNeill 5:89031b2f5316 187
Charles MacNeill 5:89031b2f5316 188 #define VL53LX_PHASECAL_CONFIG__TARGET 0x004C
Charles MacNeill 5:89031b2f5316 189
Charles MacNeill 5:89031b2f5316 190 #define VL53LX_PHASECAL_CONFIG__OVERRIDE 0x004D
Charles MacNeill 5:89031b2f5316 191
Charles MacNeill 5:89031b2f5316 192 #define VL53LX_DSS_CONFIG__ROI_MODE_CONTROL 0x004F
Charles MacNeill 5:89031b2f5316 193
Charles MacNeill 5:89031b2f5316 194 #define VL53LX_SYSTEM__THRESH_RATE_HIGH 0x0050
Charles MacNeill 5:89031b2f5316 195
Charles MacNeill 5:89031b2f5316 196 #define VL53LX_SYSTEM__THRESH_RATE_HIGH_HI 0x0050
Charles MacNeill 5:89031b2f5316 197
Charles MacNeill 5:89031b2f5316 198 #define VL53LX_SYSTEM__THRESH_RATE_HIGH_LO 0x0051
Charles MacNeill 5:89031b2f5316 199
Charles MacNeill 5:89031b2f5316 200 #define VL53LX_SYSTEM__THRESH_RATE_LOW 0x0052
Charles MacNeill 5:89031b2f5316 201
Charles MacNeill 5:89031b2f5316 202 #define VL53LX_SYSTEM__THRESH_RATE_LOW_HI 0x0052
Charles MacNeill 5:89031b2f5316 203
Charles MacNeill 5:89031b2f5316 204 #define VL53LX_SYSTEM__THRESH_RATE_LOW_LO 0x0053
Charles MacNeill 5:89031b2f5316 205
Charles MacNeill 5:89031b2f5316 206 #define VL53LX_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0054
Charles MacNeill 5:89031b2f5316 207
Charles MacNeill 5:89031b2f5316 208 #define VL53LX_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0054
Charles MacNeill 5:89031b2f5316 209
Charles MacNeill 5:89031b2f5316 210 #define VL53LX_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0055
Charles MacNeill 5:89031b2f5316 211
Charles MacNeill 5:89031b2f5316 212 #define VL53LX_DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0056
Charles MacNeill 5:89031b2f5316 213
Charles MacNeill 5:89031b2f5316 214 #define VL53LX_DSS_CONFIG__APERTURE_ATTENUATION 0x0057
Charles MacNeill 5:89031b2f5316 215
Charles MacNeill 5:89031b2f5316 216 #define VL53LX_DSS_CONFIG__MAX_SPADS_LIMIT 0x0058
Charles MacNeill 5:89031b2f5316 217
Charles MacNeill 5:89031b2f5316 218 #define VL53LX_DSS_CONFIG__MIN_SPADS_LIMIT 0x0059
Charles MacNeill 5:89031b2f5316 219
Charles MacNeill 5:89031b2f5316 220 #define VL53LX_MM_CONFIG__TIMEOUT_MACROP_A_HI 0x005A
Charles MacNeill 5:89031b2f5316 221
Charles MacNeill 5:89031b2f5316 222 #define VL53LX_MM_CONFIG__TIMEOUT_MACROP_A_LO 0x005B
Charles MacNeill 5:89031b2f5316 223
Charles MacNeill 5:89031b2f5316 224 #define VL53LX_MM_CONFIG__TIMEOUT_MACROP_B_HI 0x005C
Charles MacNeill 5:89031b2f5316 225
Charles MacNeill 5:89031b2f5316 226 #define VL53LX_MM_CONFIG__TIMEOUT_MACROP_B_LO 0x005D
Charles MacNeill 5:89031b2f5316 227
Charles MacNeill 5:89031b2f5316 228 #define VL53LX_RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x005E
Charles MacNeill 5:89031b2f5316 229
Charles MacNeill 5:89031b2f5316 230 #define VL53LX_RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x005F
Charles MacNeill 5:89031b2f5316 231
Charles MacNeill 5:89031b2f5316 232 #define VL53LX_RANGE_CONFIG__VCSEL_PERIOD_A 0x0060
Charles MacNeill 5:89031b2f5316 233
Charles MacNeill 5:89031b2f5316 234 #define VL53LX_RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0061
Charles MacNeill 5:89031b2f5316 235
Charles MacNeill 5:89031b2f5316 236 #define VL53LX_RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0062
Charles MacNeill 5:89031b2f5316 237
Charles MacNeill 5:89031b2f5316 238 #define VL53LX_RANGE_CONFIG__VCSEL_PERIOD_B 0x0063
Charles MacNeill 5:89031b2f5316 239
Charles MacNeill 5:89031b2f5316 240 #define VL53LX_RANGE_CONFIG__SIGMA_THRESH 0x0064
Charles MacNeill 5:89031b2f5316 241
Charles MacNeill 5:89031b2f5316 242 #define VL53LX_RANGE_CONFIG__SIGMA_THRESH_HI 0x0064
Charles MacNeill 5:89031b2f5316 243
Charles MacNeill 5:89031b2f5316 244 #define VL53LX_RANGE_CONFIG__SIGMA_THRESH_LO 0x0065
Charles MacNeill 5:89031b2f5316 245
Charles MacNeill 5:89031b2f5316 246 #define VL53LX_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0066
Charles MacNeill 5:89031b2f5316 247
Charles MacNeill 5:89031b2f5316 248 #define VL53LX_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0066
Charles MacNeill 5:89031b2f5316 249
Charles MacNeill 5:89031b2f5316 250 #define VL53LX_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0067
Charles MacNeill 5:89031b2f5316 251
Charles MacNeill 5:89031b2f5316 252 #define VL53LX_RANGE_CONFIG__VALID_PHASE_LOW 0x0068
Charles MacNeill 5:89031b2f5316 253
Charles MacNeill 5:89031b2f5316 254 #define VL53LX_RANGE_CONFIG__VALID_PHASE_HIGH 0x0069
Charles MacNeill 5:89031b2f5316 255
Charles MacNeill 5:89031b2f5316 256 #define VL53LX_SYSTEM__INTERMEASUREMENT_PERIOD 0x006C
Charles MacNeill 5:89031b2f5316 257
Charles MacNeill 5:89031b2f5316 258 #define VL53LX_SYSTEM__INTERMEASUREMENT_PERIOD_3 0x006C
Charles MacNeill 5:89031b2f5316 259
Charles MacNeill 5:89031b2f5316 260 #define VL53LX_SYSTEM__INTERMEASUREMENT_PERIOD_2 0x006D
Charles MacNeill 5:89031b2f5316 261
Charles MacNeill 5:89031b2f5316 262 #define VL53LX_SYSTEM__INTERMEASUREMENT_PERIOD_1 0x006E
Charles MacNeill 5:89031b2f5316 263
Charles MacNeill 5:89031b2f5316 264 #define VL53LX_SYSTEM__INTERMEASUREMENT_PERIOD_0 0x006F
Charles MacNeill 5:89031b2f5316 265
Charles MacNeill 5:89031b2f5316 266 #define VL53LX_SYSTEM__FRACTIONAL_ENABLE 0x0070
Charles MacNeill 5:89031b2f5316 267
Charles MacNeill 5:89031b2f5316 268 #define VL53LX_SYSTEM__GROUPED_PARAMETER_HOLD_0 0x0071
Charles MacNeill 5:89031b2f5316 269
Charles MacNeill 5:89031b2f5316 270 #define VL53LX_SYSTEM__THRESH_HIGH 0x0072
Charles MacNeill 5:89031b2f5316 271
Charles MacNeill 5:89031b2f5316 272 #define VL53LX_SYSTEM__THRESH_HIGH_HI 0x0072
Charles MacNeill 5:89031b2f5316 273
Charles MacNeill 5:89031b2f5316 274 #define VL53LX_SYSTEM__THRESH_HIGH_LO 0x0073
Charles MacNeill 5:89031b2f5316 275
Charles MacNeill 5:89031b2f5316 276 #define VL53LX_SYSTEM__THRESH_LOW 0x0074
Charles MacNeill 5:89031b2f5316 277
Charles MacNeill 5:89031b2f5316 278 #define VL53LX_SYSTEM__THRESH_LOW_HI 0x0074
Charles MacNeill 5:89031b2f5316 279
Charles MacNeill 5:89031b2f5316 280 #define VL53LX_SYSTEM__THRESH_LOW_LO 0x0075
Charles MacNeill 5:89031b2f5316 281
Charles MacNeill 5:89031b2f5316 282 #define VL53LX_SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x0076
Charles MacNeill 5:89031b2f5316 283
Charles MacNeill 5:89031b2f5316 284 #define VL53LX_SYSTEM__SEED_CONFIG 0x0077
Charles MacNeill 5:89031b2f5316 285
Charles MacNeill 5:89031b2f5316 286 #define VL53LX_SD_CONFIG__WOI_SD0 0x0078
Charles MacNeill 5:89031b2f5316 287
Charles MacNeill 5:89031b2f5316 288 #define VL53LX_SD_CONFIG__WOI_SD1 0x0079
Charles MacNeill 5:89031b2f5316 289
Charles MacNeill 5:89031b2f5316 290 #define VL53LX_SD_CONFIG__INITIAL_PHASE_SD0 0x007A
Charles MacNeill 5:89031b2f5316 291
Charles MacNeill 5:89031b2f5316 292 #define VL53LX_SD_CONFIG__INITIAL_PHASE_SD1 0x007B
Charles MacNeill 5:89031b2f5316 293
Charles MacNeill 5:89031b2f5316 294 #define VL53LX_SYSTEM__GROUPED_PARAMETER_HOLD_1 0x007C
Charles MacNeill 5:89031b2f5316 295
Charles MacNeill 5:89031b2f5316 296 #define VL53LX_SD_CONFIG__FIRST_ORDER_SELECT 0x007D
Charles MacNeill 5:89031b2f5316 297
Charles MacNeill 5:89031b2f5316 298 #define VL53LX_SD_CONFIG__QUANTIFIER 0x007E
Charles MacNeill 5:89031b2f5316 299
Charles MacNeill 5:89031b2f5316 300 #define VL53LX_ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x007F
Charles MacNeill 5:89031b2f5316 301
Charles MacNeill 5:89031b2f5316 302 #define VL53LX_ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x0080
Charles MacNeill 5:89031b2f5316 303
Charles MacNeill 5:89031b2f5316 304 #define VL53LX_SYSTEM__SEQUENCE_CONFIG 0x0081
Charles MacNeill 5:89031b2f5316 305
Charles MacNeill 5:89031b2f5316 306 #define VL53LX_SYSTEM__GROUPED_PARAMETER_HOLD 0x0082
Charles MacNeill 5:89031b2f5316 307
Charles MacNeill 5:89031b2f5316 308 #define VL53LX_POWER_MANAGEMENT__GO1_POWER_FORCE 0x0083
Charles MacNeill 5:89031b2f5316 309
Charles MacNeill 5:89031b2f5316 310 #define VL53LX_SYSTEM__STREAM_COUNT_CTRL 0x0084
Charles MacNeill 5:89031b2f5316 311
Charles MacNeill 5:89031b2f5316 312 #define VL53LX_FIRMWARE__ENABLE 0x0085
Charles MacNeill 5:89031b2f5316 313
Charles MacNeill 5:89031b2f5316 314 #define VL53LX_SYSTEM__INTERRUPT_CLEAR 0x0086
Charles MacNeill 5:89031b2f5316 315
Charles MacNeill 5:89031b2f5316 316 #define VL53LX_SYSTEM__MODE_START 0x0087
Charles MacNeill 5:89031b2f5316 317
Charles MacNeill 5:89031b2f5316 318 #define VL53LX_RESULT__INTERRUPT_STATUS 0x0088
Charles MacNeill 5:89031b2f5316 319
Charles MacNeill 5:89031b2f5316 320 #define VL53LX_RESULT__RANGE_STATUS 0x0089
Charles MacNeill 5:89031b2f5316 321
Charles MacNeill 5:89031b2f5316 322 #define VL53LX_RESULT__REPORT_STATUS 0x008A
Charles MacNeill 5:89031b2f5316 323
Charles MacNeill 5:89031b2f5316 324 #define VL53LX_RESULT__STREAM_COUNT 0x008B
Charles MacNeill 5:89031b2f5316 325
Charles MacNeill 5:89031b2f5316 326 #define VL53LX_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x008C
Charles MacNeill 5:89031b2f5316 327
Charles MacNeill 5:89031b2f5316 328 #define VL53LX_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x008C
Charles MacNeill 5:89031b2f5316 329
Charles MacNeill 5:89031b2f5316 330 #define VL53LX_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x008D
Charles MacNeill 5:89031b2f5316 331
Charles MacNeill 5:89031b2f5316 332 #define VL53LX_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x008E
Charles MacNeill 5:89031b2f5316 333
Charles MacNeill 5:89031b2f5316 334 #define VL53LX_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x008E
Charles MacNeill 5:89031b2f5316 335
Charles MacNeill 5:89031b2f5316 336 #define VL53LX_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x008F
Charles MacNeill 5:89031b2f5316 337
Charles MacNeill 5:89031b2f5316 338 #define VL53LX_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0090
Charles MacNeill 5:89031b2f5316 339
Charles MacNeill 5:89031b2f5316 340 #define VL53LX_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0090
Charles MacNeill 5:89031b2f5316 341
Charles MacNeill 5:89031b2f5316 342 #define VL53LX_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0091
Charles MacNeill 5:89031b2f5316 343
Charles MacNeill 5:89031b2f5316 344 #define VL53LX_RESULT__SIGMA_SD0 0x0092
Charles MacNeill 5:89031b2f5316 345
Charles MacNeill 5:89031b2f5316 346 #define VL53LX_RESULT__SIGMA_SD0_HI 0x0092
Charles MacNeill 5:89031b2f5316 347
Charles MacNeill 5:89031b2f5316 348 #define VL53LX_RESULT__SIGMA_SD0_LO 0x0093
Charles MacNeill 5:89031b2f5316 349
Charles MacNeill 5:89031b2f5316 350 #define VL53LX_RESULT__PHASE_SD0 0x0094
Charles MacNeill 5:89031b2f5316 351
Charles MacNeill 5:89031b2f5316 352 #define VL53LX_RESULT__PHASE_SD0_HI 0x0094
Charles MacNeill 5:89031b2f5316 353
Charles MacNeill 5:89031b2f5316 354 #define VL53LX_RESULT__PHASE_SD0_LO 0x0095
Charles MacNeill 5:89031b2f5316 355
Charles MacNeill 5:89031b2f5316 356 #define VL53LX_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0096
Charles MacNeill 5:89031b2f5316 357
Charles MacNeill 5:89031b2f5316 358 #define VL53LX_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0096
Charles MacNeill 5:89031b2f5316 359
Charles MacNeill 5:89031b2f5316 360 #define VL53LX_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0097
Charles MacNeill 5:89031b2f5316 361
Charles MacNeill 5:89031b2f5316 362 #define VL53LX_PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0098
Charles MacNeill 5:89031b2f5316 363
Charles MacNeill 5:89031b2f5316 364 #define VL53LX__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0098
Charles MacNeill 5:89031b2f5316 365
Charles MacNeill 5:89031b2f5316 366 #define VL53LX___PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0099
Charles MacNeill 5:89031b2f5316 367
Charles MacNeill 5:89031b2f5316 368 #define VL53LX_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009A
Charles MacNeill 5:89031b2f5316 369
Charles MacNeill 5:89031b2f5316 370 #define VL53LX_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009A
Charles MacNeill 5:89031b2f5316 371
Charles MacNeill 5:89031b2f5316 372 #define VL53LX_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009B
Charles MacNeill 5:89031b2f5316 373
Charles MacNeill 5:89031b2f5316 374 #define VL53LX_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009C
Charles MacNeill 5:89031b2f5316 375
Charles MacNeill 5:89031b2f5316 376 #define VL53LX_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009C
Charles MacNeill 5:89031b2f5316 377
Charles MacNeill 5:89031b2f5316 378 #define VL53LX_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009D
Charles MacNeill 5:89031b2f5316 379
Charles MacNeill 5:89031b2f5316 380 #define VL53LX_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x009E
Charles MacNeill 5:89031b2f5316 381
Charles MacNeill 5:89031b2f5316 382 #define VL53LX_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x009E
Charles MacNeill 5:89031b2f5316 383
Charles MacNeill 5:89031b2f5316 384 #define VL53LX_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x009F
Charles MacNeill 5:89031b2f5316 385
Charles MacNeill 5:89031b2f5316 386 #define VL53LX_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x00A0
Charles MacNeill 5:89031b2f5316 387
Charles MacNeill 5:89031b2f5316 388 #define VL53LX_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x00A0
Charles MacNeill 5:89031b2f5316 389
Charles MacNeill 5:89031b2f5316 390 #define VL53LX_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x00A1
Charles MacNeill 5:89031b2f5316 391
Charles MacNeill 5:89031b2f5316 392 #define VL53LX_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x00A2
Charles MacNeill 5:89031b2f5316 393
Charles MacNeill 5:89031b2f5316 394 #define VL53LX_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x00A2
Charles MacNeill 5:89031b2f5316 395
Charles MacNeill 5:89031b2f5316 396 #define VL53LX_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x00A3
Charles MacNeill 5:89031b2f5316 397
Charles MacNeill 5:89031b2f5316 398 #define VL53LX_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x00A4
Charles MacNeill 5:89031b2f5316 399
Charles MacNeill 5:89031b2f5316 400 #define VL53LX_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x00A4
Charles MacNeill 5:89031b2f5316 401
Charles MacNeill 5:89031b2f5316 402 #define VL53LX_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x00A5
Charles MacNeill 5:89031b2f5316 403
Charles MacNeill 5:89031b2f5316 404 #define VL53LX_RESULT__SIGMA_SD1 0x00A6
Charles MacNeill 5:89031b2f5316 405
Charles MacNeill 5:89031b2f5316 406 #define VL53LX_RESULT__SIGMA_SD1_HI 0x00A6
Charles MacNeill 5:89031b2f5316 407
Charles MacNeill 5:89031b2f5316 408 #define VL53LX_RESULT__SIGMA_SD1_LO 0x00A7
Charles MacNeill 5:89031b2f5316 409
Charles MacNeill 5:89031b2f5316 410 #define VL53LX_RESULT__PHASE_SD1 0x00A8
Charles MacNeill 5:89031b2f5316 411
Charles MacNeill 5:89031b2f5316 412 #define VL53LX_RESULT__PHASE_SD1_HI 0x00A8
Charles MacNeill 5:89031b2f5316 413
Charles MacNeill 5:89031b2f5316 414 #define VL53LX_RESULT__PHASE_SD1_LO 0x00A9
Charles MacNeill 5:89031b2f5316 415
Charles MacNeill 5:89031b2f5316 416 #define VL53LX_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x00AA
Charles MacNeill 5:89031b2f5316 417
Charles MacNeill 5:89031b2f5316 418 #define VL53LX_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x00AA
Charles MacNeill 5:89031b2f5316 419
Charles MacNeill 5:89031b2f5316 420 #define VL53LX_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x00AB
Charles MacNeill 5:89031b2f5316 421
Charles MacNeill 5:89031b2f5316 422 #define VL53LX_RESULT__SPARE_0_SD1 0x00AC
Charles MacNeill 5:89031b2f5316 423
Charles MacNeill 5:89031b2f5316 424 #define VL53LX_RESULT__SPARE_0_SD1_HI 0x00AC
Charles MacNeill 5:89031b2f5316 425
Charles MacNeill 5:89031b2f5316 426 #define VL53LX_RESULT__SPARE_0_SD1_LO 0x00AD
Charles MacNeill 5:89031b2f5316 427
Charles MacNeill 5:89031b2f5316 428 #define VL53LX_RESULT__SPARE_1_SD1 0x00AE
Charles MacNeill 5:89031b2f5316 429
Charles MacNeill 5:89031b2f5316 430 #define VL53LX_RESULT__SPARE_1_SD1_HI 0x00AE
Charles MacNeill 5:89031b2f5316 431
Charles MacNeill 5:89031b2f5316 432 #define VL53LX_RESULT__SPARE_1_SD1_LO 0x00AF
Charles MacNeill 5:89031b2f5316 433
Charles MacNeill 5:89031b2f5316 434 #define VL53LX_RESULT__SPARE_2_SD1 0x00B0
Charles MacNeill 5:89031b2f5316 435
Charles MacNeill 5:89031b2f5316 436 #define VL53LX_RESULT__SPARE_2_SD1_HI 0x00B0
Charles MacNeill 5:89031b2f5316 437
Charles MacNeill 5:89031b2f5316 438 #define VL53LX_RESULT__SPARE_2_SD1_LO 0x00B1
Charles MacNeill 5:89031b2f5316 439
Charles MacNeill 5:89031b2f5316 440 #define VL53LX_RESULT__SPARE_3_SD1 0x00B2
Charles MacNeill 5:89031b2f5316 441
Charles MacNeill 5:89031b2f5316 442 #define VL53LX_RESULT__THRESH_INFO 0x00B3
Charles MacNeill 5:89031b2f5316 443
Charles MacNeill 5:89031b2f5316 444 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x00B4
Charles MacNeill 5:89031b2f5316 445
Charles MacNeill 5:89031b2f5316 446 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x00B4
Charles MacNeill 5:89031b2f5316 447
Charles MacNeill 5:89031b2f5316 448 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x00B5
Charles MacNeill 5:89031b2f5316 449
Charles MacNeill 5:89031b2f5316 450 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x00B6
Charles MacNeill 5:89031b2f5316 451
Charles MacNeill 5:89031b2f5316 452 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x00B7
Charles MacNeill 5:89031b2f5316 453
Charles MacNeill 5:89031b2f5316 454 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x00B8
Charles MacNeill 5:89031b2f5316 455
Charles MacNeill 5:89031b2f5316 456 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x00B8
Charles MacNeill 5:89031b2f5316 457
Charles MacNeill 5:89031b2f5316 458 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x00B9
Charles MacNeill 5:89031b2f5316 459
Charles MacNeill 5:89031b2f5316 460 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x00BA
Charles MacNeill 5:89031b2f5316 461
Charles MacNeill 5:89031b2f5316 462 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x00BB
Charles MacNeill 5:89031b2f5316 463
Charles MacNeill 5:89031b2f5316 464 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x00BC
Charles MacNeill 5:89031b2f5316 465
Charles MacNeill 5:89031b2f5316 466 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x00BC
Charles MacNeill 5:89031b2f5316 467
Charles MacNeill 5:89031b2f5316 468 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x00BD
Charles MacNeill 5:89031b2f5316 469
Charles MacNeill 5:89031b2f5316 470 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x00BE
Charles MacNeill 5:89031b2f5316 471
Charles MacNeill 5:89031b2f5316 472 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x00BF
Charles MacNeill 5:89031b2f5316 473
Charles MacNeill 5:89031b2f5316 474 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x00C0
Charles MacNeill 5:89031b2f5316 475
Charles MacNeill 5:89031b2f5316 476 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x00C0
Charles MacNeill 5:89031b2f5316 477
Charles MacNeill 5:89031b2f5316 478 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x00C1
Charles MacNeill 5:89031b2f5316 479
Charles MacNeill 5:89031b2f5316 480 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x00C2
Charles MacNeill 5:89031b2f5316 481
Charles MacNeill 5:89031b2f5316 482 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x00C3
Charles MacNeill 5:89031b2f5316 483
Charles MacNeill 5:89031b2f5316 484 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x00C4
Charles MacNeill 5:89031b2f5316 485
Charles MacNeill 5:89031b2f5316 486 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x00C4
Charles MacNeill 5:89031b2f5316 487
Charles MacNeill 5:89031b2f5316 488 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x00C5
Charles MacNeill 5:89031b2f5316 489
Charles MacNeill 5:89031b2f5316 490 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x00C6
Charles MacNeill 5:89031b2f5316 491
Charles MacNeill 5:89031b2f5316 492 #define VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x00C7
Charles MacNeill 5:89031b2f5316 493
Charles MacNeill 5:89031b2f5316 494 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x00C8
Charles MacNeill 5:89031b2f5316 495
Charles MacNeill 5:89031b2f5316 496 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x00C8
Charles MacNeill 5:89031b2f5316 497
Charles MacNeill 5:89031b2f5316 498 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x00C9
Charles MacNeill 5:89031b2f5316 499
Charles MacNeill 5:89031b2f5316 500 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x00CA
Charles MacNeill 5:89031b2f5316 501
Charles MacNeill 5:89031b2f5316 502 #define VL53LX_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x00CB
Charles MacNeill 5:89031b2f5316 503
Charles MacNeill 5:89031b2f5316 504 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x00CC
Charles MacNeill 5:89031b2f5316 505
Charles MacNeill 5:89031b2f5316 506 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x00CC
Charles MacNeill 5:89031b2f5316 507
Charles MacNeill 5:89031b2f5316 508 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x00CD
Charles MacNeill 5:89031b2f5316 509
Charles MacNeill 5:89031b2f5316 510 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x00CE
Charles MacNeill 5:89031b2f5316 511
Charles MacNeill 5:89031b2f5316 512 #define VL53LX_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x00CF
Charles MacNeill 5:89031b2f5316 513
Charles MacNeill 5:89031b2f5316 514 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x00D0
Charles MacNeill 5:89031b2f5316 515
Charles MacNeill 5:89031b2f5316 516 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x00D0
Charles MacNeill 5:89031b2f5316 517
Charles MacNeill 5:89031b2f5316 518 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x00D1
Charles MacNeill 5:89031b2f5316 519
Charles MacNeill 5:89031b2f5316 520 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x00D2
Charles MacNeill 5:89031b2f5316 521
Charles MacNeill 5:89031b2f5316 522 #define VL53LX_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x00D3
Charles MacNeill 5:89031b2f5316 523
Charles MacNeill 5:89031b2f5316 524 #define VL53LX_RESULT_CORE__SPARE_0 0x00D4
Charles MacNeill 5:89031b2f5316 525
Charles MacNeill 5:89031b2f5316 526 #define VL53LX_PHASECAL_RESULT__REFERENCE_PHASE 0x00D6
Charles MacNeill 5:89031b2f5316 527
Charles MacNeill 5:89031b2f5316 528 #define VL53LX_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x00D6
Charles MacNeill 5:89031b2f5316 529
Charles MacNeill 5:89031b2f5316 530 #define VL53LX_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x00D7
Charles MacNeill 5:89031b2f5316 531
Charles MacNeill 5:89031b2f5316 532 #define VL53LX_PHASECAL_RESULT__VCSEL_START 0x00D8
Charles MacNeill 5:89031b2f5316 533
Charles MacNeill 5:89031b2f5316 534 #define VL53LX_REF_SPAD_CHAR_RESULT__NUM_ACTUAL_REF_SPADS 0x00D9
Charles MacNeill 5:89031b2f5316 535
Charles MacNeill 5:89031b2f5316 536 #define VL53LX_REF_SPAD_CHAR_RESULT__REF_LOCATION 0x00DA
Charles MacNeill 5:89031b2f5316 537
Charles MacNeill 5:89031b2f5316 538 #define VL53LX_VHV_RESULT__COLDBOOT_STATUS 0x00DB
Charles MacNeill 5:89031b2f5316 539
Charles MacNeill 5:89031b2f5316 540 #define VL53LX_VHV_RESULT__SEARCH_RESULT 0x00DC
Charles MacNeill 5:89031b2f5316 541
Charles MacNeill 5:89031b2f5316 542 #define VL53LX_VHV_RESULT__LATEST_SETTING 0x00DD
Charles MacNeill 5:89031b2f5316 543
Charles MacNeill 5:89031b2f5316 544 #define VL53LX_RESULT__OSC_CALIBRATE_VAL 0x00DE
Charles MacNeill 5:89031b2f5316 545
Charles MacNeill 5:89031b2f5316 546 #define VL53LX_RESULT__OSC_CALIBRATE_VAL_HI 0x00DE
Charles MacNeill 5:89031b2f5316 547
Charles MacNeill 5:89031b2f5316 548 #define VL53LX_RESULT__OSC_CALIBRATE_VAL_LO 0x00DF
Charles MacNeill 5:89031b2f5316 549
Charles MacNeill 5:89031b2f5316 550 #define VL53LX_ANA_CONFIG__POWERDOWN_GO1 0x00E0
Charles MacNeill 5:89031b2f5316 551
Charles MacNeill 5:89031b2f5316 552 #define VL53LX_ANA_CONFIG__REF_BG_CTRL 0x00E1
Charles MacNeill 5:89031b2f5316 553
Charles MacNeill 5:89031b2f5316 554 #define VL53LX_ANA_CONFIG__REGDVDD1V2_CTRL 0x00E2
Charles MacNeill 5:89031b2f5316 555
Charles MacNeill 5:89031b2f5316 556 #define VL53LX_ANA_CONFIG__OSC_SLOW_CTRL 0x00E3
Charles MacNeill 5:89031b2f5316 557
Charles MacNeill 5:89031b2f5316 558 #define VL53LX_TEST_MODE__STATUS 0x00E4
Charles MacNeill 5:89031b2f5316 559
Charles MacNeill 5:89031b2f5316 560 #define VL53LX_FIRMWARE__SYSTEM_STATUS 0x00E5
Charles MacNeill 5:89031b2f5316 561
Charles MacNeill 5:89031b2f5316 562 #define VL53LX_FIRMWARE__MODE_STATUS 0x00E6
Charles MacNeill 5:89031b2f5316 563
Charles MacNeill 5:89031b2f5316 564 #define VL53LX_FIRMWARE__SECONDARY_MODE_STATUS 0x00E7
Charles MacNeill 5:89031b2f5316 565
Charles MacNeill 5:89031b2f5316 566 #define VL53LX_FIRMWARE__CAL_REPEAT_RATE_COUNTER 0x00E8
Charles MacNeill 5:89031b2f5316 567
Charles MacNeill 5:89031b2f5316 568 #define VL53LX_FIRMWARE__CAL_REPEAT_RATE_COUNTER_HI 0x00E8
Charles MacNeill 5:89031b2f5316 569
Charles MacNeill 5:89031b2f5316 570 #define VL53LX_FIRMWARE__CAL_REPEAT_RATE_COUNTER_LO 0x00E9
Charles MacNeill 5:89031b2f5316 571
Charles MacNeill 5:89031b2f5316 572 #define VL53LX_FIRMWARE__HISTOGRAM_BIN 0x00EA
Charles MacNeill 5:89031b2f5316 573
Charles MacNeill 5:89031b2f5316 574 #define VL53LX_GPH__SYSTEM__THRESH_HIGH 0x00EC
Charles MacNeill 5:89031b2f5316 575
Charles MacNeill 5:89031b2f5316 576 #define VL53LX_GPH__SYSTEM__THRESH_HIGH_HI 0x00EC
Charles MacNeill 5:89031b2f5316 577
Charles MacNeill 5:89031b2f5316 578 #define VL53LX_GPH__SYSTEM__THRESH_HIGH_LO 0x00ED
Charles MacNeill 5:89031b2f5316 579
Charles MacNeill 5:89031b2f5316 580 #define VL53LX_GPH__SYSTEM__THRESH_LOW 0x00EE
Charles MacNeill 5:89031b2f5316 581
Charles MacNeill 5:89031b2f5316 582 #define VL53LX_GPH__SYSTEM__THRESH_LOW_HI 0x00EE
Charles MacNeill 5:89031b2f5316 583
Charles MacNeill 5:89031b2f5316 584 #define VL53LX_GPH__SYSTEM__THRESH_LOW_LO 0x00EF
Charles MacNeill 5:89031b2f5316 585
Charles MacNeill 5:89031b2f5316 586 #define VL53LX_GPH__SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x00F0
Charles MacNeill 5:89031b2f5316 587
Charles MacNeill 5:89031b2f5316 588 #define VL53LX_GPH__SPARE_0 0x00F1
Charles MacNeill 5:89031b2f5316 589
Charles MacNeill 5:89031b2f5316 590 #define VL53LX_GPH__SD_CONFIG__WOI_SD0 0x00F2
Charles MacNeill 5:89031b2f5316 591
Charles MacNeill 5:89031b2f5316 592 #define VL53LX_GPH__SD_CONFIG__WOI_SD1 0x00F3
Charles MacNeill 5:89031b2f5316 593
Charles MacNeill 5:89031b2f5316 594 #define VL53LX_GPH__SD_CONFIG__INITIAL_PHASE_SD0 0x00F4
Charles MacNeill 5:89031b2f5316 595
Charles MacNeill 5:89031b2f5316 596 #define VL53LX_GPH__SD_CONFIG__INITIAL_PHASE_SD1 0x00F5
Charles MacNeill 5:89031b2f5316 597
Charles MacNeill 5:89031b2f5316 598 #define VL53LX_GPH__SD_CONFIG__FIRST_ORDER_SELECT 0x00F6
Charles MacNeill 5:89031b2f5316 599
Charles MacNeill 5:89031b2f5316 600 #define VL53LX_GPH__SD_CONFIG__QUANTIFIER 0x00F7
Charles MacNeill 5:89031b2f5316 601
Charles MacNeill 5:89031b2f5316 602 #define VL53LX_GPH__ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x00F8
Charles MacNeill 5:89031b2f5316 603
Charles MacNeill 5:89031b2f5316 604 #define VL53LX_GPH__ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x00F9
Charles MacNeill 5:89031b2f5316 605
Charles MacNeill 5:89031b2f5316 606 #define VL53LX_GPH__SYSTEM__SEQUENCE_CONFIG 0x00FA
Charles MacNeill 5:89031b2f5316 607
Charles MacNeill 5:89031b2f5316 608 #define VL53LX_GPH__GPH_ID 0x00FB
Charles MacNeill 5:89031b2f5316 609
Charles MacNeill 5:89031b2f5316 610 #define VL53LX_SYSTEM__INTERRUPT_SET 0x00FC
Charles MacNeill 5:89031b2f5316 611
Charles MacNeill 5:89031b2f5316 612 #define VL53LX_INTERRUPT_MANAGER__ENABLES 0x00FD
Charles MacNeill 5:89031b2f5316 613
Charles MacNeill 5:89031b2f5316 614 #define VL53LX_INTERRUPT_MANAGER__CLEAR 0x00FE
Charles MacNeill 5:89031b2f5316 615
Charles MacNeill 5:89031b2f5316 616 #define VL53LX_INTERRUPT_MANAGER__STATUS 0x00FF
Charles MacNeill 5:89031b2f5316 617
Charles MacNeill 5:89031b2f5316 618 #define VL53LX_MCU_TO_HOST_BANK__WR_ACCESS_EN 0x0100
Charles MacNeill 5:89031b2f5316 619
Charles MacNeill 5:89031b2f5316 620 #define VL53LX_POWER_MANAGEMENT__GO1_RESET_STATUS 0x0101
Charles MacNeill 5:89031b2f5316 621
Charles MacNeill 5:89031b2f5316 622 #define VL53LX_PAD_STARTUP_MODE__VALUE_RO 0x0102
Charles MacNeill 5:89031b2f5316 623
Charles MacNeill 5:89031b2f5316 624 #define VL53LX_PAD_STARTUP_MODE__VALUE_CTRL 0x0103
Charles MacNeill 5:89031b2f5316 625
Charles MacNeill 5:89031b2f5316 626 #define VL53LX_PLL_PERIOD_US 0x0104
Charles MacNeill 5:89031b2f5316 627
Charles MacNeill 5:89031b2f5316 628 #define VL53LX_PLL_PERIOD_US_3 0x0104
Charles MacNeill 5:89031b2f5316 629
Charles MacNeill 5:89031b2f5316 630 #define VL53LX_PLL_PERIOD_US_2 0x0105
Charles MacNeill 5:89031b2f5316 631
Charles MacNeill 5:89031b2f5316 632 #define VL53LX_PLL_PERIOD_US_1 0x0106
Charles MacNeill 5:89031b2f5316 633
Charles MacNeill 5:89031b2f5316 634 #define VL53LX_PLL_PERIOD_US_0 0x0107
Charles MacNeill 5:89031b2f5316 635
Charles MacNeill 5:89031b2f5316 636 #define VL53LX_INTERRUPT_SCHEDULER__DATA_OUT 0x0108
Charles MacNeill 5:89031b2f5316 637
Charles MacNeill 5:89031b2f5316 638 #define VL53LX_INTERRUPT_SCHEDULER__DATA_OUT_3 0x0108
Charles MacNeill 5:89031b2f5316 639
Charles MacNeill 5:89031b2f5316 640 #define VL53LX_INTERRUPT_SCHEDULER__DATA_OUT_2 0x0109
Charles MacNeill 5:89031b2f5316 641
Charles MacNeill 5:89031b2f5316 642 #define VL53LX_INTERRUPT_SCHEDULER__DATA_OUT_1 0x010A
Charles MacNeill 5:89031b2f5316 643
Charles MacNeill 5:89031b2f5316 644 #define VL53LX_INTERRUPT_SCHEDULER__DATA_OUT_0 0x010B
Charles MacNeill 5:89031b2f5316 645
Charles MacNeill 5:89031b2f5316 646 #define VL53LX_NVM_BIST__COMPLETE 0x010C
Charles MacNeill 5:89031b2f5316 647
Charles MacNeill 5:89031b2f5316 648 #define VL53LX_NVM_BIST__STATUS 0x010D
Charles MacNeill 5:89031b2f5316 649
Charles MacNeill 5:89031b2f5316 650 #define VL53LX_IDENTIFICATION__MODEL_ID 0x010F
Charles MacNeill 5:89031b2f5316 651
Charles MacNeill 5:89031b2f5316 652 #define VL53LX_IDENTIFICATION__MODULE_TYPE 0x0110
Charles MacNeill 5:89031b2f5316 653
Charles MacNeill 5:89031b2f5316 654 #define VL53LX_IDENTIFICATION__REVISION_ID 0x0111
Charles MacNeill 5:89031b2f5316 655
Charles MacNeill 5:89031b2f5316 656 #define VL53LX_IDENTIFICATION__MODULE_ID 0x0112
Charles MacNeill 5:89031b2f5316 657
Charles MacNeill 5:89031b2f5316 658 #define VL53LX_IDENTIFICATION__MODULE_ID_HI 0x0112
Charles MacNeill 5:89031b2f5316 659
Charles MacNeill 5:89031b2f5316 660 #define VL53LX_IDENTIFICATION__MODULE_ID_LO 0x0113
Charles MacNeill 5:89031b2f5316 661
Charles MacNeill 5:89031b2f5316 662 #define VL53LX_ANA_CONFIG__FAST_OSC__TRIM_MAX 0x0114
Charles MacNeill 5:89031b2f5316 663
Charles MacNeill 5:89031b2f5316 664 #define VL53LX_ANA_CONFIG__FAST_OSC__FREQ_SET 0x0115
Charles MacNeill 5:89031b2f5316 665
Charles MacNeill 5:89031b2f5316 666 #define VL53LX_ANA_CONFIG__VCSEL_TRIM 0x0116
Charles MacNeill 5:89031b2f5316 667
Charles MacNeill 5:89031b2f5316 668 #define VL53LX_ANA_CONFIG__VCSEL_SELION 0x0117
Charles MacNeill 5:89031b2f5316 669
Charles MacNeill 5:89031b2f5316 670 #define VL53LX_ANA_CONFIG__VCSEL_SELION_MAX 0x0118
Charles MacNeill 5:89031b2f5316 671
Charles MacNeill 5:89031b2f5316 672 #define VL53LX_PROTECTED_LASER_SAFETY__LOCK_BIT 0x0119
Charles MacNeill 5:89031b2f5316 673
Charles MacNeill 5:89031b2f5316 674 #define VL53LX_LASER_SAFETY__KEY 0x011A
Charles MacNeill 5:89031b2f5316 675
Charles MacNeill 5:89031b2f5316 676 #define VL53LX_LASER_SAFETY__KEY_RO 0x011B
Charles MacNeill 5:89031b2f5316 677
Charles MacNeill 5:89031b2f5316 678 #define VL53LX_LASER_SAFETY__CLIP 0x011C
Charles MacNeill 5:89031b2f5316 679
Charles MacNeill 5:89031b2f5316 680 #define VL53LX_LASER_SAFETY__MULT 0x011D
Charles MacNeill 5:89031b2f5316 681
Charles MacNeill 5:89031b2f5316 682 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_0 0x011E
Charles MacNeill 5:89031b2f5316 683
Charles MacNeill 5:89031b2f5316 684 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_1 0x011F
Charles MacNeill 5:89031b2f5316 685
Charles MacNeill 5:89031b2f5316 686 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_2 0x0120
Charles MacNeill 5:89031b2f5316 687
Charles MacNeill 5:89031b2f5316 688 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_3 0x0121
Charles MacNeill 5:89031b2f5316 689
Charles MacNeill 5:89031b2f5316 690 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_4 0x0122
Charles MacNeill 5:89031b2f5316 691
Charles MacNeill 5:89031b2f5316 692 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_5 0x0123
Charles MacNeill 5:89031b2f5316 693
Charles MacNeill 5:89031b2f5316 694 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_6 0x0124
Charles MacNeill 5:89031b2f5316 695
Charles MacNeill 5:89031b2f5316 696 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_7 0x0125
Charles MacNeill 5:89031b2f5316 697
Charles MacNeill 5:89031b2f5316 698 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_8 0x0126
Charles MacNeill 5:89031b2f5316 699
Charles MacNeill 5:89031b2f5316 700 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_9 0x0127
Charles MacNeill 5:89031b2f5316 701
Charles MacNeill 5:89031b2f5316 702 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_10 0x0128
Charles MacNeill 5:89031b2f5316 703
Charles MacNeill 5:89031b2f5316 704 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_11 0x0129
Charles MacNeill 5:89031b2f5316 705
Charles MacNeill 5:89031b2f5316 706 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_12 0x012A
Charles MacNeill 5:89031b2f5316 707
Charles MacNeill 5:89031b2f5316 708 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_13 0x012B
Charles MacNeill 5:89031b2f5316 709
Charles MacNeill 5:89031b2f5316 710 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_14 0x012C
Charles MacNeill 5:89031b2f5316 711
Charles MacNeill 5:89031b2f5316 712 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_15 0x012D
Charles MacNeill 5:89031b2f5316 713
Charles MacNeill 5:89031b2f5316 714 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_16 0x012E
Charles MacNeill 5:89031b2f5316 715
Charles MacNeill 5:89031b2f5316 716 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_17 0x012F
Charles MacNeill 5:89031b2f5316 717
Charles MacNeill 5:89031b2f5316 718 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_18 0x0130
Charles MacNeill 5:89031b2f5316 719
Charles MacNeill 5:89031b2f5316 720 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_19 0x0131
Charles MacNeill 5:89031b2f5316 721
Charles MacNeill 5:89031b2f5316 722 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_20 0x0132
Charles MacNeill 5:89031b2f5316 723
Charles MacNeill 5:89031b2f5316 724 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_21 0x0133
Charles MacNeill 5:89031b2f5316 725
Charles MacNeill 5:89031b2f5316 726 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_22 0x0134
Charles MacNeill 5:89031b2f5316 727
Charles MacNeill 5:89031b2f5316 728 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_23 0x0135
Charles MacNeill 5:89031b2f5316 729
Charles MacNeill 5:89031b2f5316 730 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_24 0x0136
Charles MacNeill 5:89031b2f5316 731
Charles MacNeill 5:89031b2f5316 732 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_25 0x0137
Charles MacNeill 5:89031b2f5316 733
Charles MacNeill 5:89031b2f5316 734 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_26 0x0138
Charles MacNeill 5:89031b2f5316 735
Charles MacNeill 5:89031b2f5316 736 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_27 0x0139
Charles MacNeill 5:89031b2f5316 737
Charles MacNeill 5:89031b2f5316 738 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_28 0x013A
Charles MacNeill 5:89031b2f5316 739
Charles MacNeill 5:89031b2f5316 740 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_29 0x013B
Charles MacNeill 5:89031b2f5316 741
Charles MacNeill 5:89031b2f5316 742 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_30 0x013C
Charles MacNeill 5:89031b2f5316 743
Charles MacNeill 5:89031b2f5316 744 #define VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_RTN_31 0x013D
Charles MacNeill 5:89031b2f5316 745
Charles MacNeill 5:89031b2f5316 746 #define VL53LX_ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x013E
Charles MacNeill 5:89031b2f5316 747
Charles MacNeill 5:89031b2f5316 748 #define VL53LX_ROI_CONFIG__MODE_ROI_XY_SIZE 0x013F
Charles MacNeill 5:89031b2f5316 749
Charles MacNeill 5:89031b2f5316 750 #define VL53LX_GO2_HOST_BANK_ACCESS__OVERRIDE 0x0300
Charles MacNeill 5:89031b2f5316 751
Charles MacNeill 5:89031b2f5316 752 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLICAND 0x0400
Charles MacNeill 5:89031b2f5316 753
Charles MacNeill 5:89031b2f5316 754 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLICAND_3 0x0400
Charles MacNeill 5:89031b2f5316 755
Charles MacNeill 5:89031b2f5316 756 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLICAND_2 0x0401
Charles MacNeill 5:89031b2f5316 757
Charles MacNeill 5:89031b2f5316 758 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLICAND_1 0x0402
Charles MacNeill 5:89031b2f5316 759
Charles MacNeill 5:89031b2f5316 760 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLICAND_0 0x0403
Charles MacNeill 5:89031b2f5316 761
Charles MacNeill 5:89031b2f5316 762 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLIER 0x0404
Charles MacNeill 5:89031b2f5316 763
Charles MacNeill 5:89031b2f5316 764 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLIER_3 0x0404
Charles MacNeill 5:89031b2f5316 765
Charles MacNeill 5:89031b2f5316 766 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLIER_2 0x0405
Charles MacNeill 5:89031b2f5316 767
Charles MacNeill 5:89031b2f5316 768 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLIER_1 0x0406
Charles MacNeill 5:89031b2f5316 769
Charles MacNeill 5:89031b2f5316 770 #define VL53LX_MCU_UTIL_MULTIPLIER__MULTIPLIER_0 0x0407
Charles MacNeill 5:89031b2f5316 771
Charles MacNeill 5:89031b2f5316 772 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_HI 0x0408
Charles MacNeill 5:89031b2f5316 773
Charles MacNeill 5:89031b2f5316 774 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_HI_3 0x0408
Charles MacNeill 5:89031b2f5316 775
Charles MacNeill 5:89031b2f5316 776 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_HI_2 0x0409
Charles MacNeill 5:89031b2f5316 777
Charles MacNeill 5:89031b2f5316 778 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_HI_1 0x040A
Charles MacNeill 5:89031b2f5316 779
Charles MacNeill 5:89031b2f5316 780 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_HI_0 0x040B
Charles MacNeill 5:89031b2f5316 781
Charles MacNeill 5:89031b2f5316 782 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_LO 0x040C
Charles MacNeill 5:89031b2f5316 783
Charles MacNeill 5:89031b2f5316 784 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_LO_3 0x040C
Charles MacNeill 5:89031b2f5316 785
Charles MacNeill 5:89031b2f5316 786 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_LO_2 0x040D
Charles MacNeill 5:89031b2f5316 787
Charles MacNeill 5:89031b2f5316 788 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_LO_1 0x040E
Charles MacNeill 5:89031b2f5316 789
Charles MacNeill 5:89031b2f5316 790 #define VL53LX_MCU_UTIL_MULTIPLIER__PRODUCT_LO_0 0x040F
Charles MacNeill 5:89031b2f5316 791
Charles MacNeill 5:89031b2f5316 792 #define VL53LX_MCU_UTIL_MULTIPLIER__START 0x0410
Charles MacNeill 5:89031b2f5316 793
Charles MacNeill 5:89031b2f5316 794 #define VL53LX_MCU_UTIL_MULTIPLIER__STATUS 0x0411
Charles MacNeill 5:89031b2f5316 795
Charles MacNeill 5:89031b2f5316 796 #define VL53LX_MCU_UTIL_DIVIDER__START 0x0412
Charles MacNeill 5:89031b2f5316 797
Charles MacNeill 5:89031b2f5316 798 #define VL53LX_MCU_UTIL_DIVIDER__STATUS 0x0413
Charles MacNeill 5:89031b2f5316 799
Charles MacNeill 5:89031b2f5316 800 #define VL53LX_MCU_UTIL_DIVIDER__DIVIDEND 0x0414
Charles MacNeill 5:89031b2f5316 801
Charles MacNeill 5:89031b2f5316 802 #define VL53LX_MCU_UTIL_DIVIDER__DIVIDEND_3 0x0414
Charles MacNeill 5:89031b2f5316 803
Charles MacNeill 5:89031b2f5316 804 #define VL53LX_MCU_UTIL_DIVIDER__DIVIDEND_2 0x0415
Charles MacNeill 5:89031b2f5316 805
Charles MacNeill 5:89031b2f5316 806 #define VL53LX_MCU_UTIL_DIVIDER__DIVIDEND_1 0x0416
Charles MacNeill 5:89031b2f5316 807
Charles MacNeill 5:89031b2f5316 808 #define VL53LX_MCU_UTIL_DIVIDER__DIVIDEND_0 0x0417
Charles MacNeill 5:89031b2f5316 809
Charles MacNeill 5:89031b2f5316 810 #define VL53LX_MCU_UTIL_DIVIDER__DIVISOR 0x0418
Charles MacNeill 5:89031b2f5316 811
Charles MacNeill 5:89031b2f5316 812 #define VL53LX_MCU_UTIL_DIVIDER__DIVISOR_3 0x0418
Charles MacNeill 5:89031b2f5316 813
Charles MacNeill 5:89031b2f5316 814 #define VL53LX_MCU_UTIL_DIVIDER__DIVISOR_2 0x0419
Charles MacNeill 5:89031b2f5316 815
Charles MacNeill 5:89031b2f5316 816 #define VL53LX_MCU_UTIL_DIVIDER__DIVISOR_1 0x041A
Charles MacNeill 5:89031b2f5316 817
Charles MacNeill 5:89031b2f5316 818 #define VL53LX_MCU_UTIL_DIVIDER__DIVISOR_0 0x041B
Charles MacNeill 5:89031b2f5316 819
Charles MacNeill 5:89031b2f5316 820 #define VL53LX_MCU_UTIL_DIVIDER__QUOTIENT 0x041C
Charles MacNeill 5:89031b2f5316 821
Charles MacNeill 5:89031b2f5316 822 #define VL53LX_MCU_UTIL_DIVIDER__QUOTIENT_3 0x041C
Charles MacNeill 5:89031b2f5316 823
Charles MacNeill 5:89031b2f5316 824 #define VL53LX_MCU_UTIL_DIVIDER__QUOTIENT_2 0x041D
Charles MacNeill 5:89031b2f5316 825
Charles MacNeill 5:89031b2f5316 826 #define VL53LX_MCU_UTIL_DIVIDER__QUOTIENT_1 0x041E
Charles MacNeill 5:89031b2f5316 827
Charles MacNeill 5:89031b2f5316 828 #define VL53LX_MCU_UTIL_DIVIDER__QUOTIENT_0 0x041F
Charles MacNeill 5:89031b2f5316 829
Charles MacNeill 5:89031b2f5316 830 #define VL53LX_TIMER0__VALUE_IN 0x0420
Charles MacNeill 5:89031b2f5316 831
Charles MacNeill 5:89031b2f5316 832 #define VL53LX_TIMER0__VALUE_IN_3 0x0420
Charles MacNeill 5:89031b2f5316 833
Charles MacNeill 5:89031b2f5316 834 #define VL53LX_TIMER0__VALUE_IN_2 0x0421
Charles MacNeill 5:89031b2f5316 835
Charles MacNeill 5:89031b2f5316 836 #define VL53LX_TIMER0__VALUE_IN_1 0x0422
Charles MacNeill 5:89031b2f5316 837
Charles MacNeill 5:89031b2f5316 838 #define VL53LX_TIMER0__VALUE_IN_0 0x0423
Charles MacNeill 5:89031b2f5316 839
Charles MacNeill 5:89031b2f5316 840 #define VL53LX_TIMER1__VALUE_IN 0x0424
Charles MacNeill 5:89031b2f5316 841
Charles MacNeill 5:89031b2f5316 842 #define VL53LX_TIMER1__VALUE_IN_3 0x0424
Charles MacNeill 5:89031b2f5316 843
Charles MacNeill 5:89031b2f5316 844 #define VL53LX_TIMER1__VALUE_IN_2 0x0425
Charles MacNeill 5:89031b2f5316 845
Charles MacNeill 5:89031b2f5316 846 #define VL53LX_TIMER1__VALUE_IN_1 0x0426
Charles MacNeill 5:89031b2f5316 847
Charles MacNeill 5:89031b2f5316 848 #define VL53LX_TIMER1__VALUE_IN_0 0x0427
Charles MacNeill 5:89031b2f5316 849
Charles MacNeill 5:89031b2f5316 850 #define VL53LX_TIMER0__CTRL 0x0428
Charles MacNeill 5:89031b2f5316 851
Charles MacNeill 5:89031b2f5316 852 #define VL53LX_TIMER1__CTRL 0x0429
Charles MacNeill 5:89031b2f5316 853
Charles MacNeill 5:89031b2f5316 854 #define VL53LX_MCU_GENERAL_PURPOSE__GP_0 0x042C
Charles MacNeill 5:89031b2f5316 855
Charles MacNeill 5:89031b2f5316 856 #define VL53LX_MCU_GENERAL_PURPOSE__GP_1 0x042D
Charles MacNeill 5:89031b2f5316 857
Charles MacNeill 5:89031b2f5316 858 #define VL53LX_MCU_GENERAL_PURPOSE__GP_2 0x042E
Charles MacNeill 5:89031b2f5316 859
Charles MacNeill 5:89031b2f5316 860 #define VL53LX_MCU_GENERAL_PURPOSE__GP_3 0x042F
Charles MacNeill 5:89031b2f5316 861
Charles MacNeill 5:89031b2f5316 862 #define VL53LX_MCU_RANGE_CALC__CONFIG 0x0430
Charles MacNeill 5:89031b2f5316 863
Charles MacNeill 5:89031b2f5316 864 #define VL53LX_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE 0x0432
Charles MacNeill 5:89031b2f5316 865
Charles MacNeill 5:89031b2f5316 866 #define VL53LX_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_HI 0x0432
Charles MacNeill 5:89031b2f5316 867
Charles MacNeill 5:89031b2f5316 868 #define VL53LX_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_LO 0x0433
Charles MacNeill 5:89031b2f5316 869
Charles MacNeill 5:89031b2f5316 870 #define VL53LX_MCU_RANGE_CALC__SPARE_4 0x0434
Charles MacNeill 5:89031b2f5316 871
Charles MacNeill 5:89031b2f5316 872 #define VL53LX_MCU_RANGE_CALC__SPARE_4_3 0x0434
Charles MacNeill 5:89031b2f5316 873
Charles MacNeill 5:89031b2f5316 874 #define VL53LX_MCU_RANGE_CALC__SPARE_4_2 0x0435
Charles MacNeill 5:89031b2f5316 875
Charles MacNeill 5:89031b2f5316 876 #define VL53LX_MCU_RANGE_CALC__SPARE_4_1 0x0436
Charles MacNeill 5:89031b2f5316 877
Charles MacNeill 5:89031b2f5316 878 #define VL53LX_MCU_RANGE_CALC__SPARE_4_0 0x0437
Charles MacNeill 5:89031b2f5316 879
Charles MacNeill 5:89031b2f5316 880 #define VL53LX_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC 0x0438
Charles MacNeill 5:89031b2f5316 881
Charles MacNeill 5:89031b2f5316 882 #define VL53LX_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_HI 0x0438
Charles MacNeill 5:89031b2f5316 883
Charles MacNeill 5:89031b2f5316 884 #define VL53LX_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_LO 0x0439
Charles MacNeill 5:89031b2f5316 885
Charles MacNeill 5:89031b2f5316 886 #define VL53LX_MCU_RANGE_CALC__ALGO_VCSEL_PERIOD 0x043C
Charles MacNeill 5:89031b2f5316 887
Charles MacNeill 5:89031b2f5316 888 #define VL53LX_MCU_RANGE_CALC__SPARE_5 0x043D
Charles MacNeill 5:89031b2f5316 889
Charles MacNeill 5:89031b2f5316 890 #define VL53LX_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS 0x043E
Charles MacNeill 5:89031b2f5316 891
Charles MacNeill 5:89031b2f5316 892 #define VL53LX_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_HI 0x043E
Charles MacNeill 5:89031b2f5316 893
Charles MacNeill 5:89031b2f5316 894 #define VL53LX_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_LO 0x043F
Charles MacNeill 5:89031b2f5316 895
Charles MacNeill 5:89031b2f5316 896 #define VL53LX_MCU_RANGE_CALC__ALGO_ACCUM_PHASE 0x0440
Charles MacNeill 5:89031b2f5316 897
Charles MacNeill 5:89031b2f5316 898 #define VL53LX_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_3 0x0440
Charles MacNeill 5:89031b2f5316 899
Charles MacNeill 5:89031b2f5316 900 #define VL53LX_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_2 0x0441
Charles MacNeill 5:89031b2f5316 901
Charles MacNeill 5:89031b2f5316 902 #define VL53LX_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_1 0x0442
Charles MacNeill 5:89031b2f5316 903
Charles MacNeill 5:89031b2f5316 904 #define VL53LX_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_0 0x0443
Charles MacNeill 5:89031b2f5316 905
Charles MacNeill 5:89031b2f5316 906 #define VL53LX_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS 0x0444
Charles MacNeill 5:89031b2f5316 907
Charles MacNeill 5:89031b2f5316 908 #define VL53LX_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_3 0x0444
Charles MacNeill 5:89031b2f5316 909
Charles MacNeill 5:89031b2f5316 910 #define VL53LX_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_2 0x0445
Charles MacNeill 5:89031b2f5316 911
Charles MacNeill 5:89031b2f5316 912 #define VL53LX_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_1 0x0446
Charles MacNeill 5:89031b2f5316 913
Charles MacNeill 5:89031b2f5316 914 #define VL53LX_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_0 0x0447
Charles MacNeill 5:89031b2f5316 915
Charles MacNeill 5:89031b2f5316 916 #define VL53LX_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS 0x0448
Charles MacNeill 5:89031b2f5316 917
Charles MacNeill 5:89031b2f5316 918 #define VL53LX_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_3 0x0448
Charles MacNeill 5:89031b2f5316 919
Charles MacNeill 5:89031b2f5316 920 #define VL53LX_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_2 0x0449
Charles MacNeill 5:89031b2f5316 921
Charles MacNeill 5:89031b2f5316 922 #define VL53LX_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_1 0x044A
Charles MacNeill 5:89031b2f5316 923
Charles MacNeill 5:89031b2f5316 924 #define VL53LX_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_0 0x044B
Charles MacNeill 5:89031b2f5316 925
Charles MacNeill 5:89031b2f5316 926 #define VL53LX_MCU_RANGE_CALC__SPARE_6 0x044C
Charles MacNeill 5:89031b2f5316 927
Charles MacNeill 5:89031b2f5316 928 #define VL53LX_MCU_RANGE_CALC__SPARE_6_HI 0x044C
Charles MacNeill 5:89031b2f5316 929
Charles MacNeill 5:89031b2f5316 930 #define VL53LX_MCU_RANGE_CALC__SPARE_6_LO 0x044D
Charles MacNeill 5:89031b2f5316 931
Charles MacNeill 5:89031b2f5316 932 #define VL53LX_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD 0x044E
Charles MacNeill 5:89031b2f5316 933
Charles MacNeill 5:89031b2f5316 934 #define VL53LX_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_HI 0x044E
Charles MacNeill 5:89031b2f5316 935
Charles MacNeill 5:89031b2f5316 936 #define VL53LX_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_LO 0x044F
Charles MacNeill 5:89031b2f5316 937
Charles MacNeill 5:89031b2f5316 938 #define VL53LX_MCU_RANGE_CALC__NUM_SPADS 0x0450
Charles MacNeill 5:89031b2f5316 939
Charles MacNeill 5:89031b2f5316 940 #define VL53LX_MCU_RANGE_CALC__NUM_SPADS_HI 0x0450
Charles MacNeill 5:89031b2f5316 941
Charles MacNeill 5:89031b2f5316 942 #define VL53LX_MCU_RANGE_CALC__NUM_SPADS_LO 0x0451
Charles MacNeill 5:89031b2f5316 943
Charles MacNeill 5:89031b2f5316 944 #define VL53LX_MCU_RANGE_CALC__PHASE_OUTPUT 0x0452
Charles MacNeill 5:89031b2f5316 945
Charles MacNeill 5:89031b2f5316 946 #define VL53LX_MCU_RANGE_CALC__PHASE_OUTPUT_HI 0x0452
Charles MacNeill 5:89031b2f5316 947
Charles MacNeill 5:89031b2f5316 948 #define VL53LX_MCU_RANGE_CALC__PHASE_OUTPUT_LO 0x0453
Charles MacNeill 5:89031b2f5316 949
Charles MacNeill 5:89031b2f5316 950 #define VL53LX_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS 0x0454
Charles MacNeill 5:89031b2f5316 951
Charles MacNeill 5:89031b2f5316 952 #define VL53LX_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_3 0x0454
Charles MacNeill 5:89031b2f5316 953
Charles MacNeill 5:89031b2f5316 954 #define VL53LX_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_2 0x0455
Charles MacNeill 5:89031b2f5316 955
Charles MacNeill 5:89031b2f5316 956 #define VL53LX_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_1 0x0456
Charles MacNeill 5:89031b2f5316 957
Charles MacNeill 5:89031b2f5316 958 #define VL53LX_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_0 0x0457
Charles MacNeill 5:89031b2f5316 959
Charles MacNeill 5:89031b2f5316 960 #define VL53LX_MCU_RANGE_CALC__SPARE_7 0x0458
Charles MacNeill 5:89031b2f5316 961
Charles MacNeill 5:89031b2f5316 962 #define VL53LX_MCU_RANGE_CALC__SPARE_8 0x0459
Charles MacNeill 5:89031b2f5316 963
Charles MacNeill 5:89031b2f5316 964 #define VL53LX_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS 0x045A
Charles MacNeill 5:89031b2f5316 965
Charles MacNeill 5:89031b2f5316 966 #define VL53LX_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_HI 0x045A
Charles MacNeill 5:89031b2f5316 967
Charles MacNeill 5:89031b2f5316 968 #define VL53LX_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_LO 0x045B
Charles MacNeill 5:89031b2f5316 969
Charles MacNeill 5:89031b2f5316 970 #define VL53LX_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS 0x045C
Charles MacNeill 5:89031b2f5316 971
Charles MacNeill 5:89031b2f5316 972 #define VL53LX_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_HI 0x045C
Charles MacNeill 5:89031b2f5316 973
Charles MacNeill 5:89031b2f5316 974 #define VL53LX_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_LO 0x045D
Charles MacNeill 5:89031b2f5316 975
Charles MacNeill 5:89031b2f5316 976 #define VL53LX_MCU_RANGE_CALC__AMBIENT_RATE_MCPS 0x045E
Charles MacNeill 5:89031b2f5316 977
Charles MacNeill 5:89031b2f5316 978 #define VL53LX_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_HI 0x045E
Charles MacNeill 5:89031b2f5316 979
Charles MacNeill 5:89031b2f5316 980 #define VL53LX_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_LO 0x045F
Charles MacNeill 5:89031b2f5316 981
Charles MacNeill 5:89031b2f5316 982 #define VL53LX_MCU_RANGE_CALC__XTALK 0x0460
Charles MacNeill 5:89031b2f5316 983
Charles MacNeill 5:89031b2f5316 984 #define VL53LX_MCU_RANGE_CALC__XTALK_HI 0x0460
Charles MacNeill 5:89031b2f5316 985
Charles MacNeill 5:89031b2f5316 986 #define VL53LX_MCU_RANGE_CALC__XTALK_LO 0x0461
Charles MacNeill 5:89031b2f5316 987
Charles MacNeill 5:89031b2f5316 988 #define VL53LX_MCU_RANGE_CALC__CALC_STATUS 0x0462
Charles MacNeill 5:89031b2f5316 989
Charles MacNeill 5:89031b2f5316 990 #define VL53LX_MCU_RANGE_CALC__DEBUG 0x0463
Charles MacNeill 5:89031b2f5316 991
Charles MacNeill 5:89031b2f5316 992 #define VL53LX_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS 0x0464
Charles MacNeill 5:89031b2f5316 993
Charles MacNeill 5:89031b2f5316 994 #define VL53LX_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_HI 0x0464
Charles MacNeill 5:89031b2f5316 995
Charles MacNeill 5:89031b2f5316 996 #define VL53LX_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_LO 0x0465
Charles MacNeill 5:89031b2f5316 997
Charles MacNeill 5:89031b2f5316 998 #define VL53LX_MCU_RANGE_CALC__SPARE_0 0x0468
Charles MacNeill 5:89031b2f5316 999
Charles MacNeill 5:89031b2f5316 1000 #define VL53LX_MCU_RANGE_CALC__SPARE_1 0x0469
Charles MacNeill 5:89031b2f5316 1001
Charles MacNeill 5:89031b2f5316 1002 #define VL53LX_MCU_RANGE_CALC__SPARE_2 0x046A
Charles MacNeill 5:89031b2f5316 1003
Charles MacNeill 5:89031b2f5316 1004 #define VL53LX_MCU_RANGE_CALC__SPARE_3 0x046B
Charles MacNeill 5:89031b2f5316 1005
Charles MacNeill 5:89031b2f5316 1006 #define VL53LX_PATCH__CTRL 0x0470
Charles MacNeill 5:89031b2f5316 1007
Charles MacNeill 5:89031b2f5316 1008 #define VL53LX_PATCH__JMP_ENABLES 0x0472
Charles MacNeill 5:89031b2f5316 1009
Charles MacNeill 5:89031b2f5316 1010 #define VL53LX_PATCH__JMP_ENABLES_HI 0x0472
Charles MacNeill 5:89031b2f5316 1011
Charles MacNeill 5:89031b2f5316 1012 #define VL53LX_PATCH__JMP_ENABLES_LO 0x0473
Charles MacNeill 5:89031b2f5316 1013
Charles MacNeill 5:89031b2f5316 1014 #define VL53LX_PATCH__DATA_ENABLES 0x0474
Charles MacNeill 5:89031b2f5316 1015
Charles MacNeill 5:89031b2f5316 1016 #define VL53LX_PATCH__DATA_ENABLES_HI 0x0474
Charles MacNeill 5:89031b2f5316 1017
Charles MacNeill 5:89031b2f5316 1018 #define VL53LX_PATCH__DATA_ENABLES_LO 0x0475
Charles MacNeill 5:89031b2f5316 1019
Charles MacNeill 5:89031b2f5316 1020 #define VL53LX_PATCH__OFFSET_0 0x0476
Charles MacNeill 5:89031b2f5316 1021
Charles MacNeill 5:89031b2f5316 1022 #define VL53LX_PATCH__OFFSET_0_HI 0x0476
Charles MacNeill 5:89031b2f5316 1023
Charles MacNeill 5:89031b2f5316 1024 #define VL53LX_PATCH__OFFSET_0_LO 0x0477
Charles MacNeill 5:89031b2f5316 1025
Charles MacNeill 5:89031b2f5316 1026 #define VL53LX_PATCH__OFFSET_1 0x0478
Charles MacNeill 5:89031b2f5316 1027
Charles MacNeill 5:89031b2f5316 1028 #define VL53LX_PATCH__OFFSET_1_HI 0x0478
Charles MacNeill 5:89031b2f5316 1029
Charles MacNeill 5:89031b2f5316 1030 #define VL53LX_PATCH__OFFSET_1_LO 0x0479
Charles MacNeill 5:89031b2f5316 1031
Charles MacNeill 5:89031b2f5316 1032 #define VL53LX_PATCH__OFFSET_2 0x047A
Charles MacNeill 5:89031b2f5316 1033
Charles MacNeill 5:89031b2f5316 1034 #define VL53LX_PATCH__OFFSET_2_HI 0x047A
Charles MacNeill 5:89031b2f5316 1035
Charles MacNeill 5:89031b2f5316 1036 #define VL53LX_PATCH__OFFSET_2_LO 0x047B
Charles MacNeill 5:89031b2f5316 1037
Charles MacNeill 5:89031b2f5316 1038 #define VL53LX_PATCH__OFFSET_3 0x047C
Charles MacNeill 5:89031b2f5316 1039
Charles MacNeill 5:89031b2f5316 1040 #define VL53LX_PATCH__OFFSET_3_HI 0x047C
Charles MacNeill 5:89031b2f5316 1041
Charles MacNeill 5:89031b2f5316 1042 #define VL53LX_PATCH__OFFSET_3_LO 0x047D
Charles MacNeill 5:89031b2f5316 1043
Charles MacNeill 5:89031b2f5316 1044 #define VL53LX_PATCH__OFFSET_4 0x047E
Charles MacNeill 5:89031b2f5316 1045
Charles MacNeill 5:89031b2f5316 1046 #define VL53LX_PATCH__OFFSET_4_HI 0x047E
Charles MacNeill 5:89031b2f5316 1047
Charles MacNeill 5:89031b2f5316 1048 #define VL53LX_PATCH__OFFSET_4_LO 0x047F
Charles MacNeill 5:89031b2f5316 1049
Charles MacNeill 5:89031b2f5316 1050 #define VL53LX_PATCH__OFFSET_5 0x0480
Charles MacNeill 5:89031b2f5316 1051
Charles MacNeill 5:89031b2f5316 1052 #define VL53LX_PATCH__OFFSET_5_HI 0x0480
Charles MacNeill 5:89031b2f5316 1053
Charles MacNeill 5:89031b2f5316 1054 #define VL53LX_PATCH__OFFSET_5_LO 0x0481
Charles MacNeill 5:89031b2f5316 1055
Charles MacNeill 5:89031b2f5316 1056 #define VL53LX_PATCH__OFFSET_6 0x0482
Charles MacNeill 5:89031b2f5316 1057
Charles MacNeill 5:89031b2f5316 1058 #define VL53LX_PATCH__OFFSET_6_HI 0x0482
Charles MacNeill 5:89031b2f5316 1059
Charles MacNeill 5:89031b2f5316 1060 #define VL53LX_PATCH__OFFSET_6_LO 0x0483
Charles MacNeill 5:89031b2f5316 1061
Charles MacNeill 5:89031b2f5316 1062 #define VL53LX_PATCH__OFFSET_7 0x0484
Charles MacNeill 5:89031b2f5316 1063
Charles MacNeill 5:89031b2f5316 1064 #define VL53LX_PATCH__OFFSET_7_HI 0x0484
Charles MacNeill 5:89031b2f5316 1065
Charles MacNeill 5:89031b2f5316 1066 #define VL53LX_PATCH__OFFSET_7_LO 0x0485
Charles MacNeill 5:89031b2f5316 1067
Charles MacNeill 5:89031b2f5316 1068 #define VL53LX_PATCH__OFFSET_8 0x0486
Charles MacNeill 5:89031b2f5316 1069
Charles MacNeill 5:89031b2f5316 1070 #define VL53LX_PATCH__OFFSET_8_HI 0x0486
Charles MacNeill 5:89031b2f5316 1071
Charles MacNeill 5:89031b2f5316 1072 #define VL53LX_PATCH__OFFSET_8_LO 0x0487
Charles MacNeill 5:89031b2f5316 1073
Charles MacNeill 5:89031b2f5316 1074 #define VL53LX_PATCH__OFFSET_9 0x0488
Charles MacNeill 5:89031b2f5316 1075
Charles MacNeill 5:89031b2f5316 1076 #define VL53LX_PATCH__OFFSET_9_HI 0x0488
Charles MacNeill 5:89031b2f5316 1077
Charles MacNeill 5:89031b2f5316 1078 #define VL53LX_PATCH__OFFSET_9_LO 0x0489
Charles MacNeill 5:89031b2f5316 1079
Charles MacNeill 5:89031b2f5316 1080 #define VL53LX_PATCH__OFFSET_10 0x048A
Charles MacNeill 5:89031b2f5316 1081
Charles MacNeill 5:89031b2f5316 1082 #define VL53LX_PATCH__OFFSET_10_HI 0x048A
Charles MacNeill 5:89031b2f5316 1083
Charles MacNeill 5:89031b2f5316 1084 #define VL53LX_PATCH__OFFSET_10_LO 0x048B
Charles MacNeill 5:89031b2f5316 1085
Charles MacNeill 5:89031b2f5316 1086 #define VL53LX_PATCH__OFFSET_11 0x048C
Charles MacNeill 5:89031b2f5316 1087
Charles MacNeill 5:89031b2f5316 1088 #define VL53LX_PATCH__OFFSET_11_HI 0x048C
Charles MacNeill 5:89031b2f5316 1089
Charles MacNeill 5:89031b2f5316 1090 #define VL53LX_PATCH__OFFSET_11_LO 0x048D
Charles MacNeill 5:89031b2f5316 1091
Charles MacNeill 5:89031b2f5316 1092 #define VL53LX_PATCH__OFFSET_12 0x048E
Charles MacNeill 5:89031b2f5316 1093
Charles MacNeill 5:89031b2f5316 1094 #define VL53LX_PATCH__OFFSET_12_HI 0x048E
Charles MacNeill 5:89031b2f5316 1095
Charles MacNeill 5:89031b2f5316 1096 #define VL53LX_PATCH__OFFSET_12_LO 0x048F
Charles MacNeill 5:89031b2f5316 1097
Charles MacNeill 5:89031b2f5316 1098 #define VL53LX_PATCH__OFFSET_13 0x0490
Charles MacNeill 5:89031b2f5316 1099
Charles MacNeill 5:89031b2f5316 1100 #define VL53LX_PATCH__OFFSET_13_HI 0x0490
Charles MacNeill 5:89031b2f5316 1101
Charles MacNeill 5:89031b2f5316 1102 #define VL53LX_PATCH__OFFSET_13_LO 0x0491
Charles MacNeill 5:89031b2f5316 1103
Charles MacNeill 5:89031b2f5316 1104 #define VL53LX_PATCH__OFFSET_14 0x0492
Charles MacNeill 5:89031b2f5316 1105
Charles MacNeill 5:89031b2f5316 1106 #define VL53LX_PATCH__OFFSET_14_HI 0x0492
Charles MacNeill 5:89031b2f5316 1107
Charles MacNeill 5:89031b2f5316 1108 #define VL53LX_PATCH__OFFSET_14_LO 0x0493
Charles MacNeill 5:89031b2f5316 1109
Charles MacNeill 5:89031b2f5316 1110 #define VL53LX_PATCH__OFFSET_15 0x0494
Charles MacNeill 5:89031b2f5316 1111
Charles MacNeill 5:89031b2f5316 1112 #define VL53LX_PATCH__OFFSET_15_HI 0x0494
Charles MacNeill 5:89031b2f5316 1113
Charles MacNeill 5:89031b2f5316 1114 #define VL53LX_PATCH__OFFSET_15_LO 0x0495
Charles MacNeill 5:89031b2f5316 1115
Charles MacNeill 5:89031b2f5316 1116 #define VL53LX_PATCH__ADDRESS_0 0x0496
Charles MacNeill 5:89031b2f5316 1117
Charles MacNeill 5:89031b2f5316 1118 #define VL53LX_PATCH__ADDRESS_0_HI 0x0496
Charles MacNeill 5:89031b2f5316 1119
Charles MacNeill 5:89031b2f5316 1120 #define VL53LX_PATCH__ADDRESS_0_LO 0x0497
Charles MacNeill 5:89031b2f5316 1121
Charles MacNeill 5:89031b2f5316 1122 #define VL53LX_PATCH__ADDRESS_1 0x0498
Charles MacNeill 5:89031b2f5316 1123
Charles MacNeill 5:89031b2f5316 1124 #define VL53LX_PATCH__ADDRESS_1_HI 0x0498
Charles MacNeill 5:89031b2f5316 1125
Charles MacNeill 5:89031b2f5316 1126 #define VL53LX_PATCH__ADDRESS_1_LO 0x0499
Charles MacNeill 5:89031b2f5316 1127
Charles MacNeill 5:89031b2f5316 1128 #define VL53LX_PATCH__ADDRESS_2 0x049A
Charles MacNeill 5:89031b2f5316 1129
Charles MacNeill 5:89031b2f5316 1130 #define VL53LX_PATCH__ADDRESS_2_HI 0x049A
Charles MacNeill 5:89031b2f5316 1131
Charles MacNeill 5:89031b2f5316 1132 #define VL53LX_PATCH__ADDRESS_2_LO 0x049B
Charles MacNeill 5:89031b2f5316 1133
Charles MacNeill 5:89031b2f5316 1134 #define VL53LX_PATCH__ADDRESS_3 0x049C
Charles MacNeill 5:89031b2f5316 1135
Charles MacNeill 5:89031b2f5316 1136 #define VL53LX_PATCH__ADDRESS_3_HI 0x049C
Charles MacNeill 5:89031b2f5316 1137
Charles MacNeill 5:89031b2f5316 1138 #define VL53LX_PATCH__ADDRESS_3_LO 0x049D
Charles MacNeill 5:89031b2f5316 1139
Charles MacNeill 5:89031b2f5316 1140 #define VL53LX_PATCH__ADDRESS_4 0x049E
Charles MacNeill 5:89031b2f5316 1141
Charles MacNeill 5:89031b2f5316 1142 #define VL53LX_PATCH__ADDRESS_4_HI 0x049E
Charles MacNeill 5:89031b2f5316 1143
Charles MacNeill 5:89031b2f5316 1144 #define VL53LX_PATCH__ADDRESS_4_LO 0x049F
Charles MacNeill 5:89031b2f5316 1145
Charles MacNeill 5:89031b2f5316 1146 #define VL53LX_PATCH__ADDRESS_5 0x04A0
Charles MacNeill 5:89031b2f5316 1147
Charles MacNeill 5:89031b2f5316 1148 #define VL53LX_PATCH__ADDRESS_5_HI 0x04A0
Charles MacNeill 5:89031b2f5316 1149
Charles MacNeill 5:89031b2f5316 1150 #define VL53LX_PATCH__ADDRESS_5_LO 0x04A1
Charles MacNeill 5:89031b2f5316 1151
Charles MacNeill 5:89031b2f5316 1152 #define VL53LX_PATCH__ADDRESS_6 0x04A2
Charles MacNeill 5:89031b2f5316 1153
Charles MacNeill 5:89031b2f5316 1154 #define VL53LX_PATCH__ADDRESS_6_HI 0x04A2
Charles MacNeill 5:89031b2f5316 1155
Charles MacNeill 5:89031b2f5316 1156 #define VL53LX_PATCH__ADDRESS_6_LO 0x04A3
Charles MacNeill 5:89031b2f5316 1157
Charles MacNeill 5:89031b2f5316 1158 #define VL53LX_PATCH__ADDRESS_7 0x04A4
Charles MacNeill 5:89031b2f5316 1159
Charles MacNeill 5:89031b2f5316 1160 #define VL53LX_PATCH__ADDRESS_7_HI 0x04A4
Charles MacNeill 5:89031b2f5316 1161
Charles MacNeill 5:89031b2f5316 1162 #define VL53LX_PATCH__ADDRESS_7_LO 0x04A5
Charles MacNeill 5:89031b2f5316 1163
Charles MacNeill 5:89031b2f5316 1164 #define VL53LX_PATCH__ADDRESS_8 0x04A6
Charles MacNeill 5:89031b2f5316 1165
Charles MacNeill 5:89031b2f5316 1166 #define VL53LX_PATCH__ADDRESS_8_HI 0x04A6
Charles MacNeill 5:89031b2f5316 1167
Charles MacNeill 5:89031b2f5316 1168 #define VL53LX_PATCH__ADDRESS_8_LO 0x04A7
Charles MacNeill 5:89031b2f5316 1169
Charles MacNeill 5:89031b2f5316 1170 #define VL53LX_PATCH__ADDRESS_9 0x04A8
Charles MacNeill 5:89031b2f5316 1171
Charles MacNeill 5:89031b2f5316 1172 #define VL53LX_PATCH__ADDRESS_9_HI 0x04A8
Charles MacNeill 5:89031b2f5316 1173
Charles MacNeill 5:89031b2f5316 1174 #define VL53LX_PATCH__ADDRESS_9_LO 0x04A9
Charles MacNeill 5:89031b2f5316 1175
Charles MacNeill 5:89031b2f5316 1176 #define VL53LX_PATCH__ADDRESS_10 0x04AA
Charles MacNeill 5:89031b2f5316 1177
Charles MacNeill 5:89031b2f5316 1178 #define VL53LX_PATCH__ADDRESS_10_HI 0x04AA
Charles MacNeill 5:89031b2f5316 1179
Charles MacNeill 5:89031b2f5316 1180 #define VL53LX_PATCH__ADDRESS_10_LO 0x04AB
Charles MacNeill 5:89031b2f5316 1181
Charles MacNeill 5:89031b2f5316 1182 #define VL53LX_PATCH__ADDRESS_11 0x04AC
Charles MacNeill 5:89031b2f5316 1183
Charles MacNeill 5:89031b2f5316 1184 #define VL53LX_PATCH__ADDRESS_11_HI 0x04AC
Charles MacNeill 5:89031b2f5316 1185
Charles MacNeill 5:89031b2f5316 1186 #define VL53LX_PATCH__ADDRESS_11_LO 0x04AD
Charles MacNeill 5:89031b2f5316 1187
Charles MacNeill 5:89031b2f5316 1188 #define VL53LX_PATCH__ADDRESS_12 0x04AE
Charles MacNeill 5:89031b2f5316 1189
Charles MacNeill 5:89031b2f5316 1190 #define VL53LX_PATCH__ADDRESS_12_HI 0x04AE
Charles MacNeill 5:89031b2f5316 1191
Charles MacNeill 5:89031b2f5316 1192 #define VL53LX_PATCH__ADDRESS_12_LO 0x04AF
Charles MacNeill 5:89031b2f5316 1193
Charles MacNeill 5:89031b2f5316 1194 #define VL53LX_PATCH__ADDRESS_13 0x04B0
Charles MacNeill 5:89031b2f5316 1195
Charles MacNeill 5:89031b2f5316 1196 #define VL53LX_PATCH__ADDRESS_13_HI 0x04B0
Charles MacNeill 5:89031b2f5316 1197
Charles MacNeill 5:89031b2f5316 1198 #define VL53LX_PATCH__ADDRESS_13_LO 0x04B1
Charles MacNeill 5:89031b2f5316 1199
Charles MacNeill 5:89031b2f5316 1200 #define VL53LX_PATCH__ADDRESS_14 0x04B2
Charles MacNeill 5:89031b2f5316 1201
Charles MacNeill 5:89031b2f5316 1202 #define VL53LX_PATCH__ADDRESS_14_HI 0x04B2
Charles MacNeill 5:89031b2f5316 1203
Charles MacNeill 5:89031b2f5316 1204 #define VL53LX_PATCH__ADDRESS_14_LO 0x04B3
Charles MacNeill 5:89031b2f5316 1205
Charles MacNeill 5:89031b2f5316 1206 #define VL53LX_PATCH__ADDRESS_15 0x04B4
Charles MacNeill 5:89031b2f5316 1207
Charles MacNeill 5:89031b2f5316 1208 #define VL53LX_PATCH__ADDRESS_15_HI 0x04B4
Charles MacNeill 5:89031b2f5316 1209
Charles MacNeill 5:89031b2f5316 1210 #define VL53LX_PATCH__ADDRESS_15_LO 0x04B5
Charles MacNeill 5:89031b2f5316 1211
Charles MacNeill 5:89031b2f5316 1212 #define VL53LX_SPI_ASYNC_MUX__CTRL 0x04C0
Charles MacNeill 5:89031b2f5316 1213
Charles MacNeill 5:89031b2f5316 1214 #define VL53LX_CLK__CONFIG 0x04C4
Charles MacNeill 5:89031b2f5316 1215
Charles MacNeill 5:89031b2f5316 1216 #define VL53LX_GPIO_LV_MUX__CTRL 0x04CC
Charles MacNeill 5:89031b2f5316 1217
Charles MacNeill 5:89031b2f5316 1218 #define VL53LX_GPIO_LV_PAD__CTRL 0x04CD
Charles MacNeill 5:89031b2f5316 1219
Charles MacNeill 5:89031b2f5316 1220 #define VL53LX_PAD_I2C_LV__CONFIG 0x04D0
Charles MacNeill 5:89031b2f5316 1221
Charles MacNeill 5:89031b2f5316 1222 #define VL53LX_PAD_STARTUP_MODE__VALUE_RO_GO1 0x04D4
Charles MacNeill 5:89031b2f5316 1223
Charles MacNeill 5:89031b2f5316 1224 #define VL53LX_HOST_IF__STATUS_GO1 0x04D5
Charles MacNeill 5:89031b2f5316 1225
Charles MacNeill 5:89031b2f5316 1226 #define VL53LX_MCU_CLK_GATING__CTRL 0x04D8
Charles MacNeill 5:89031b2f5316 1227
Charles MacNeill 5:89031b2f5316 1228 #define VL53LX_TEST__BIST_ROM_CTRL 0x04E0
Charles MacNeill 5:89031b2f5316 1229
Charles MacNeill 5:89031b2f5316 1230 #define VL53LX_TEST__BIST_ROM_RESULT 0x04E1
Charles MacNeill 5:89031b2f5316 1231
Charles MacNeill 5:89031b2f5316 1232 #define VL53LX_TEST__BIST_ROM_MCU_SIG 0x04E2
Charles MacNeill 5:89031b2f5316 1233
Charles MacNeill 5:89031b2f5316 1234 #define VL53LX_TEST__BIST_ROM_MCU_SIG_HI 0x04E2
Charles MacNeill 5:89031b2f5316 1235
Charles MacNeill 5:89031b2f5316 1236 #define VL53LX_TEST__BIST_ROM_MCU_SIG_LO 0x04E3
Charles MacNeill 5:89031b2f5316 1237
Charles MacNeill 5:89031b2f5316 1238 #define VL53LX_TEST__BIST_RAM_CTRL 0x04E4
Charles MacNeill 5:89031b2f5316 1239
Charles MacNeill 5:89031b2f5316 1240 #define VL53LX_TEST__BIST_RAM_RESULT 0x04E5
Charles MacNeill 5:89031b2f5316 1241
Charles MacNeill 5:89031b2f5316 1242 #define VL53LX_TEST__TMC 0x04E8
Charles MacNeill 5:89031b2f5316 1243
Charles MacNeill 5:89031b2f5316 1244 #define VL53LX_TEST__PLL_BIST_MIN_THRESHOLD 0x04F0
Charles MacNeill 5:89031b2f5316 1245
Charles MacNeill 5:89031b2f5316 1246 #define VL53LX_TEST__PLL_BIST_MIN_THRESHOLD_HI 0x04F0
Charles MacNeill 5:89031b2f5316 1247
Charles MacNeill 5:89031b2f5316 1248 #define VL53LX_TEST__PLL_BIST_MIN_THRESHOLD_LO 0x04F1
Charles MacNeill 5:89031b2f5316 1249
Charles MacNeill 5:89031b2f5316 1250 #define VL53LX_TEST__PLL_BIST_MAX_THRESHOLD 0x04F2
Charles MacNeill 5:89031b2f5316 1251
Charles MacNeill 5:89031b2f5316 1252 #define VL53LX_TEST__PLL_BIST_MAX_THRESHOLD_HI 0x04F2
Charles MacNeill 5:89031b2f5316 1253
Charles MacNeill 5:89031b2f5316 1254 #define VL53LX_TEST__PLL_BIST_MAX_THRESHOLD_LO 0x04F3
Charles MacNeill 5:89031b2f5316 1255
Charles MacNeill 5:89031b2f5316 1256 #define VL53LX_TEST__PLL_BIST_COUNT_OUT 0x04F4
Charles MacNeill 5:89031b2f5316 1257
Charles MacNeill 5:89031b2f5316 1258 #define VL53LX_TEST__PLL_BIST_COUNT_OUT_HI 0x04F4
Charles MacNeill 5:89031b2f5316 1259
Charles MacNeill 5:89031b2f5316 1260 #define VL53LX_TEST__PLL_BIST_COUNT_OUT_LO 0x04F5
Charles MacNeill 5:89031b2f5316 1261
Charles MacNeill 5:89031b2f5316 1262 #define VL53LX_TEST__PLL_BIST_GONOGO 0x04F6
Charles MacNeill 5:89031b2f5316 1263
Charles MacNeill 5:89031b2f5316 1264 #define VL53LX_TEST__PLL_BIST_CTRL 0x04F7
Charles MacNeill 5:89031b2f5316 1265
Charles MacNeill 5:89031b2f5316 1266 #define VL53LX_RANGING_CORE__DEVICE_ID 0x0680
Charles MacNeill 5:89031b2f5316 1267
Charles MacNeill 5:89031b2f5316 1268 #define VL53LX_RANGING_CORE__REVISION_ID 0x0681
Charles MacNeill 5:89031b2f5316 1269
Charles MacNeill 5:89031b2f5316 1270 #define VL53LX_RANGING_CORE__CLK_CTRL1 0x0683
Charles MacNeill 5:89031b2f5316 1271
Charles MacNeill 5:89031b2f5316 1272 #define VL53LX_RANGING_CORE__CLK_CTRL2 0x0684
Charles MacNeill 5:89031b2f5316 1273
Charles MacNeill 5:89031b2f5316 1274 #define VL53LX_RANGING_CORE__WOI_1 0x0685
Charles MacNeill 5:89031b2f5316 1275
Charles MacNeill 5:89031b2f5316 1276 #define VL53LX_RANGING_CORE__WOI_REF_1 0x0686
Charles MacNeill 5:89031b2f5316 1277
Charles MacNeill 5:89031b2f5316 1278 #define VL53LX_RANGING_CORE__START_RANGING 0x0687
Charles MacNeill 5:89031b2f5316 1279
Charles MacNeill 5:89031b2f5316 1280 #define VL53LX_RANGING_CORE__LOW_LIMIT_1 0x0690
Charles MacNeill 5:89031b2f5316 1281
Charles MacNeill 5:89031b2f5316 1282 #define VL53LX_RANGING_CORE__HIGH_LIMIT_1 0x0691
Charles MacNeill 5:89031b2f5316 1283
Charles MacNeill 5:89031b2f5316 1284 #define VL53LX_RANGING_CORE__LOW_LIMIT_REF_1 0x0692
Charles MacNeill 5:89031b2f5316 1285
Charles MacNeill 5:89031b2f5316 1286 #define VL53LX_RANGING_CORE__HIGH_LIMIT_REF_1 0x0693
Charles MacNeill 5:89031b2f5316 1287
Charles MacNeill 5:89031b2f5316 1288 #define VL53LX_RANGING_CORE__QUANTIFIER_1_MSB 0x0694
Charles MacNeill 5:89031b2f5316 1289
Charles MacNeill 5:89031b2f5316 1290 #define VL53LX_RANGING_CORE__QUANTIFIER_1_LSB 0x0695
Charles MacNeill 5:89031b2f5316 1291
Charles MacNeill 5:89031b2f5316 1292 #define VL53LX_RANGING_CORE__QUANTIFIER_REF_1_MSB 0x0696
Charles MacNeill 5:89031b2f5316 1293
Charles MacNeill 5:89031b2f5316 1294 #define VL53LX_RANGING_CORE__QUANTIFIER_REF_1_LSB 0x0697
Charles MacNeill 5:89031b2f5316 1295
Charles MacNeill 5:89031b2f5316 1296 #define VL53LX_RANGING_CORE__AMBIENT_OFFSET_1_MSB 0x0698
Charles MacNeill 5:89031b2f5316 1297
Charles MacNeill 5:89031b2f5316 1298 #define VL53LX_RANGING_CORE__AMBIENT_OFFSET_1_LSB 0x0699
Charles MacNeill 5:89031b2f5316 1299
Charles MacNeill 5:89031b2f5316 1300 #define VL53LX_RANGING_CORE__AMBIENT_OFFSET_REF_1_MSB 0x069A
Charles MacNeill 5:89031b2f5316 1301
Charles MacNeill 5:89031b2f5316 1302 #define VL53LX_RANGING_CORE__AMBIENT_OFFSET_REF_1_LSB 0x069B
Charles MacNeill 5:89031b2f5316 1303
Charles MacNeill 5:89031b2f5316 1304 #define VL53LX_RANGING_CORE__FILTER_STRENGTH_1 0x069C
Charles MacNeill 5:89031b2f5316 1305
Charles MacNeill 5:89031b2f5316 1306 #define VL53LX_RANGING_CORE__FILTER_STRENGTH_REF_1 0x069D
Charles MacNeill 5:89031b2f5316 1307
Charles MacNeill 5:89031b2f5316 1308 #define VL53LX_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_MSB 0x069E
Charles MacNeill 5:89031b2f5316 1309
Charles MacNeill 5:89031b2f5316 1310 #define VL53LX_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_LSB 0x069F
Charles MacNeill 5:89031b2f5316 1311
Charles MacNeill 5:89031b2f5316 1312 #define VL53LX_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_MSB 0x06A0
Charles MacNeill 5:89031b2f5316 1313
Charles MacNeill 5:89031b2f5316 1314 #define VL53LX_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_LSB 0x06A1
Charles MacNeill 5:89031b2f5316 1315
Charles MacNeill 5:89031b2f5316 1316 #define VL53LX_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_MSB 0x06A4
Charles MacNeill 5:89031b2f5316 1317
Charles MacNeill 5:89031b2f5316 1318 #define VL53LX_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_LSB 0x06A5
Charles MacNeill 5:89031b2f5316 1319
Charles MacNeill 5:89031b2f5316 1320 #define VL53LX_RANGING_CORE__INVERT_HW 0x06A6
Charles MacNeill 5:89031b2f5316 1321
Charles MacNeill 5:89031b2f5316 1322 #define VL53LX_RANGING_CORE__FORCE_HW 0x06A7
Charles MacNeill 5:89031b2f5316 1323
Charles MacNeill 5:89031b2f5316 1324 #define VL53LX_RANGING_CORE__STATIC_HW_VALUE 0x06A8
Charles MacNeill 5:89031b2f5316 1325
Charles MacNeill 5:89031b2f5316 1326 #define VL53LX_RANGING_CORE__FORCE_CONTINUOUS_AMBIENT 0x06A9
Charles MacNeill 5:89031b2f5316 1327
Charles MacNeill 5:89031b2f5316 1328 #define VL53LX_RANGING_CORE__TEST_PHASE_SELECT_TO_FILTER 0x06AA
Charles MacNeill 5:89031b2f5316 1329
Charles MacNeill 5:89031b2f5316 1330 #define VL53LX_RANGING_CORE__TEST_PHASE_SELECT_TO_TIMING_GEN 0x06AB
Charles MacNeill 5:89031b2f5316 1331
Charles MacNeill 5:89031b2f5316 1332 #define VL53LX_RANGING_CORE__INITIAL_PHASE_VALUE_1 0x06AC
Charles MacNeill 5:89031b2f5316 1333
Charles MacNeill 5:89031b2f5316 1334 #define VL53LX_RANGING_CORE__INITIAL_PHASE_VALUE_REF_1 0x06AD
Charles MacNeill 5:89031b2f5316 1335
Charles MacNeill 5:89031b2f5316 1336 #define VL53LX_RANGING_CORE__FORCE_UP_IN 0x06AE
Charles MacNeill 5:89031b2f5316 1337
Charles MacNeill 5:89031b2f5316 1338 #define VL53LX_RANGING_CORE__FORCE_DN_IN 0x06AF
Charles MacNeill 5:89031b2f5316 1339
Charles MacNeill 5:89031b2f5316 1340 #define VL53LX_RANGING_CORE__STATIC_UP_VALUE_1 0x06B0
Charles MacNeill 5:89031b2f5316 1341
Charles MacNeill 5:89031b2f5316 1342 #define VL53LX_RANGING_CORE__STATIC_UP_VALUE_REF_1 0x06B1
Charles MacNeill 5:89031b2f5316 1343
Charles MacNeill 5:89031b2f5316 1344 #define VL53LX_RANGING_CORE__STATIC_DN_VALUE_1 0x06B2
Charles MacNeill 5:89031b2f5316 1345
Charles MacNeill 5:89031b2f5316 1346 #define VL53LX_RANGING_CORE__STATIC_DN_VALUE_REF_1 0x06B3
Charles MacNeill 5:89031b2f5316 1347
Charles MacNeill 5:89031b2f5316 1348 #define VL53LX_RANGING_CORE__MONITOR_UP_DN 0x06B4
Charles MacNeill 5:89031b2f5316 1349
Charles MacNeill 5:89031b2f5316 1350 #define VL53LX_RANGING_CORE__INVERT_UP_DN 0x06B5
Charles MacNeill 5:89031b2f5316 1351
Charles MacNeill 5:89031b2f5316 1352 #define VL53LX_RANGING_CORE__CPUMP_1 0x06B6
Charles MacNeill 5:89031b2f5316 1353
Charles MacNeill 5:89031b2f5316 1354 #define VL53LX_RANGING_CORE__CPUMP_2 0x06B7
Charles MacNeill 5:89031b2f5316 1355
Charles MacNeill 5:89031b2f5316 1356 #define VL53LX_RANGING_CORE__CPUMP_3 0x06B8
Charles MacNeill 5:89031b2f5316 1357
Charles MacNeill 5:89031b2f5316 1358 #define VL53LX_RANGING_CORE__OSC_1 0x06B9
Charles MacNeill 5:89031b2f5316 1359
Charles MacNeill 5:89031b2f5316 1360 #define VL53LX_RANGING_CORE__PLL_1 0x06BB
Charles MacNeill 5:89031b2f5316 1361
Charles MacNeill 5:89031b2f5316 1362 #define VL53LX_RANGING_CORE__PLL_2 0x06BC
Charles MacNeill 5:89031b2f5316 1363
Charles MacNeill 5:89031b2f5316 1364 #define VL53LX_RANGING_CORE__REFERENCE_1 0x06BD
Charles MacNeill 5:89031b2f5316 1365
Charles MacNeill 5:89031b2f5316 1366 #define VL53LX_RANGING_CORE__REFERENCE_3 0x06BF
Charles MacNeill 5:89031b2f5316 1367
Charles MacNeill 5:89031b2f5316 1368 #define VL53LX_RANGING_CORE__REFERENCE_4 0x06C0
Charles MacNeill 5:89031b2f5316 1369
Charles MacNeill 5:89031b2f5316 1370 #define VL53LX_RANGING_CORE__REFERENCE_5 0x06C1
Charles MacNeill 5:89031b2f5316 1371
Charles MacNeill 5:89031b2f5316 1372 #define VL53LX_RANGING_CORE__REGAVDD1V2 0x06C3
Charles MacNeill 5:89031b2f5316 1373
Charles MacNeill 5:89031b2f5316 1374 #define VL53LX_RANGING_CORE__CALIB_1 0x06C4
Charles MacNeill 5:89031b2f5316 1375
Charles MacNeill 5:89031b2f5316 1376 #define VL53LX_RANGING_CORE__CALIB_2 0x06C5
Charles MacNeill 5:89031b2f5316 1377
Charles MacNeill 5:89031b2f5316 1378 #define VL53LX_RANGING_CORE__CALIB_3 0x06C6
Charles MacNeill 5:89031b2f5316 1379
Charles MacNeill 5:89031b2f5316 1380 #define VL53LX_RANGING_CORE__TST_MUX_SEL1 0x06C9
Charles MacNeill 5:89031b2f5316 1381
Charles MacNeill 5:89031b2f5316 1382 #define VL53LX_RANGING_CORE__TST_MUX_SEL2 0x06CA
Charles MacNeill 5:89031b2f5316 1383
Charles MacNeill 5:89031b2f5316 1384 #define VL53LX_RANGING_CORE__TST_MUX 0x06CB
Charles MacNeill 5:89031b2f5316 1385
Charles MacNeill 5:89031b2f5316 1386 #define VL53LX_RANGING_CORE__GPIO_OUT_TESTMUX 0x06CC
Charles MacNeill 5:89031b2f5316 1387
Charles MacNeill 5:89031b2f5316 1388 #define VL53LX_RANGING_CORE__CUSTOM_FE 0x06CD
Charles MacNeill 5:89031b2f5316 1389
Charles MacNeill 5:89031b2f5316 1390 #define VL53LX_RANGING_CORE__CUSTOM_FE_2 0x06CE
Charles MacNeill 5:89031b2f5316 1391
Charles MacNeill 5:89031b2f5316 1392 #define VL53LX_RANGING_CORE__SPAD_READOUT 0x06CF
Charles MacNeill 5:89031b2f5316 1393
Charles MacNeill 5:89031b2f5316 1394 #define VL53LX_RANGING_CORE__SPAD_READOUT_1 0x06D0
Charles MacNeill 5:89031b2f5316 1395
Charles MacNeill 5:89031b2f5316 1396 #define VL53LX_RANGING_CORE__SPAD_READOUT_2 0x06D1
Charles MacNeill 5:89031b2f5316 1397
Charles MacNeill 5:89031b2f5316 1398 #define VL53LX_RANGING_CORE__SPAD_PS 0x06D2
Charles MacNeill 5:89031b2f5316 1399
Charles MacNeill 5:89031b2f5316 1400 #define VL53LX_RANGING_CORE__LASER_SAFETY_2 0x06D4
Charles MacNeill 5:89031b2f5316 1401
Charles MacNeill 5:89031b2f5316 1402 #define VL53LX_RANGING_CORE__NVM_CTRL__MODE 0x0780
Charles MacNeill 5:89031b2f5316 1403
Charles MacNeill 5:89031b2f5316 1404 #define VL53LX_RANGING_CORE__NVM_CTRL__PDN 0x0781
Charles MacNeill 5:89031b2f5316 1405
Charles MacNeill 5:89031b2f5316 1406 #define VL53LX_RANGING_CORE__NVM_CTRL__PROGN 0x0782
Charles MacNeill 5:89031b2f5316 1407
Charles MacNeill 5:89031b2f5316 1408 #define VL53LX_RANGING_CORE__NVM_CTRL__READN 0x0783
Charles MacNeill 5:89031b2f5316 1409
Charles MacNeill 5:89031b2f5316 1410 #define VL53LX_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB 0x0784
Charles MacNeill 5:89031b2f5316 1411
Charles MacNeill 5:89031b2f5316 1412 #define VL53LX_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_LSB 0x0785
Charles MacNeill 5:89031b2f5316 1413
Charles MacNeill 5:89031b2f5316 1414 #define VL53LX_RANGING_CORE__NVM_CTRL__HV_RISE_MSB 0x0786
Charles MacNeill 5:89031b2f5316 1415
Charles MacNeill 5:89031b2f5316 1416 #define VL53LX_RANGING_CORE__NVM_CTRL__HV_RISE_LSB 0x0787
Charles MacNeill 5:89031b2f5316 1417
Charles MacNeill 5:89031b2f5316 1418 #define VL53LX_RANGING_CORE__NVM_CTRL__HV_FALL_MSB 0x0788
Charles MacNeill 5:89031b2f5316 1419
Charles MacNeill 5:89031b2f5316 1420 #define VL53LX_RANGING_CORE__NVM_CTRL__HV_FALL_LSB 0x0789
Charles MacNeill 5:89031b2f5316 1421
Charles MacNeill 5:89031b2f5316 1422 #define VL53LX_RANGING_CORE__NVM_CTRL__TST 0x078A
Charles MacNeill 5:89031b2f5316 1423
Charles MacNeill 5:89031b2f5316 1424 #define VL53LX_RANGING_CORE__NVM_CTRL__TESTREAD 0x078B
Charles MacNeill 5:89031b2f5316 1425
Charles MacNeill 5:89031b2f5316 1426 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAIN_MMM 0x078C
Charles MacNeill 5:89031b2f5316 1427
Charles MacNeill 5:89031b2f5316 1428 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAIN_LMM 0x078D
Charles MacNeill 5:89031b2f5316 1429
Charles MacNeill 5:89031b2f5316 1430 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAIN_LLM 0x078E
Charles MacNeill 5:89031b2f5316 1431
Charles MacNeill 5:89031b2f5316 1432 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAIN_LLL 0x078F
Charles MacNeill 5:89031b2f5316 1433
Charles MacNeill 5:89031b2f5316 1434 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAOUT_MMM 0x0790
Charles MacNeill 5:89031b2f5316 1435
Charles MacNeill 5:89031b2f5316 1436 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAOUT_LMM 0x0791
Charles MacNeill 5:89031b2f5316 1437
Charles MacNeill 5:89031b2f5316 1438 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAOUT_LLM 0x0792
Charles MacNeill 5:89031b2f5316 1439
Charles MacNeill 5:89031b2f5316 1440 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAOUT_LLL 0x0793
Charles MacNeill 5:89031b2f5316 1441
Charles MacNeill 5:89031b2f5316 1442 #define VL53LX_RANGING_CORE__NVM_CTRL__ADDR 0x0794
Charles MacNeill 5:89031b2f5316 1443
Charles MacNeill 5:89031b2f5316 1444 #define VL53LX_RANGING_CORE__NVM_CTRL__DATAOUT_ECC 0x0795
Charles MacNeill 5:89031b2f5316 1445
Charles MacNeill 5:89031b2f5316 1446 #define VL53LX_RANGING_CORE__RET_SPAD_EN_0 0x0796
Charles MacNeill 5:89031b2f5316 1447
Charles MacNeill 5:89031b2f5316 1448 #define VL53LX_RANGING_CORE__RET_SPAD_EN_1 0x0797
Charles MacNeill 5:89031b2f5316 1449
Charles MacNeill 5:89031b2f5316 1450 #define VL53LX_RANGING_CORE__RET_SPAD_EN_2 0x0798
Charles MacNeill 5:89031b2f5316 1451
Charles MacNeill 5:89031b2f5316 1452 #define VL53LX_RANGING_CORE__RET_SPAD_EN_3 0x0799
Charles MacNeill 5:89031b2f5316 1453
Charles MacNeill 5:89031b2f5316 1454 #define VL53LX_RANGING_CORE__RET_SPAD_EN_4 0x079A
Charles MacNeill 5:89031b2f5316 1455
Charles MacNeill 5:89031b2f5316 1456 #define VL53LX_RANGING_CORE__RET_SPAD_EN_5 0x079B
Charles MacNeill 5:89031b2f5316 1457
Charles MacNeill 5:89031b2f5316 1458 #define VL53LX_RANGING_CORE__RET_SPAD_EN_6 0x079C
Charles MacNeill 5:89031b2f5316 1459
Charles MacNeill 5:89031b2f5316 1460 #define VL53LX_RANGING_CORE__RET_SPAD_EN_7 0x079D
Charles MacNeill 5:89031b2f5316 1461
Charles MacNeill 5:89031b2f5316 1462 #define VL53LX_RANGING_CORE__RET_SPAD_EN_8 0x079E
Charles MacNeill 5:89031b2f5316 1463
Charles MacNeill 5:89031b2f5316 1464 #define VL53LX_RANGING_CORE__RET_SPAD_EN_9 0x079F
Charles MacNeill 5:89031b2f5316 1465
Charles MacNeill 5:89031b2f5316 1466 #define VL53LX_RANGING_CORE__RET_SPAD_EN_10 0x07A0
Charles MacNeill 5:89031b2f5316 1467
Charles MacNeill 5:89031b2f5316 1468 #define VL53LX_RANGING_CORE__RET_SPAD_EN_11 0x07A1
Charles MacNeill 5:89031b2f5316 1469
Charles MacNeill 5:89031b2f5316 1470 #define VL53LX_RANGING_CORE__RET_SPAD_EN_12 0x07A2
Charles MacNeill 5:89031b2f5316 1471
Charles MacNeill 5:89031b2f5316 1472 #define VL53LX_RANGING_CORE__RET_SPAD_EN_13 0x07A3
Charles MacNeill 5:89031b2f5316 1473
Charles MacNeill 5:89031b2f5316 1474 #define VL53LX_RANGING_CORE__RET_SPAD_EN_14 0x07A4
Charles MacNeill 5:89031b2f5316 1475
Charles MacNeill 5:89031b2f5316 1476 #define VL53LX_RANGING_CORE__RET_SPAD_EN_15 0x07A5
Charles MacNeill 5:89031b2f5316 1477
Charles MacNeill 5:89031b2f5316 1478 #define VL53LX_RANGING_CORE__RET_SPAD_EN_16 0x07A6
Charles MacNeill 5:89031b2f5316 1479
Charles MacNeill 5:89031b2f5316 1480 #define VL53LX_RANGING_CORE__RET_SPAD_EN_17 0x07A7
Charles MacNeill 5:89031b2f5316 1481
Charles MacNeill 5:89031b2f5316 1482 #define VL53LX_RANGING_CORE__SPAD_SHIFT_EN 0x07BA
Charles MacNeill 5:89031b2f5316 1483
Charles MacNeill 5:89031b2f5316 1484 #define VL53LX_RANGING_CORE__SPAD_DISABLE_CTRL 0x07BB
Charles MacNeill 5:89031b2f5316 1485
Charles MacNeill 5:89031b2f5316 1486 #define VL53LX_RANGING_CORE__SPAD_EN_SHIFT_OUT_DEBUG 0x07BC
Charles MacNeill 5:89031b2f5316 1487
Charles MacNeill 5:89031b2f5316 1488 #define VL53LX_RANGING_CORE__SPI_MODE 0x07BD
Charles MacNeill 5:89031b2f5316 1489
Charles MacNeill 5:89031b2f5316 1490 #define VL53LX_RANGING_CORE__GPIO_DIR 0x07BE
Charles MacNeill 5:89031b2f5316 1491
Charles MacNeill 5:89031b2f5316 1492 #define VL53LX_RANGING_CORE__VCSEL_PERIOD 0x0880
Charles MacNeill 5:89031b2f5316 1493
Charles MacNeill 5:89031b2f5316 1494 #define VL53LX_RANGING_CORE__VCSEL_START 0x0881
Charles MacNeill 5:89031b2f5316 1495
Charles MacNeill 5:89031b2f5316 1496 #define VL53LX_RANGING_CORE__VCSEL_STOP 0x0882
Charles MacNeill 5:89031b2f5316 1497
Charles MacNeill 5:89031b2f5316 1498 #define VL53LX_RANGING_CORE__VCSEL_1 0x0885
Charles MacNeill 5:89031b2f5316 1499
Charles MacNeill 5:89031b2f5316 1500 #define VL53LX_RANGING_CORE__VCSEL_STATUS 0x088D
Charles MacNeill 5:89031b2f5316 1501
Charles MacNeill 5:89031b2f5316 1502 #define VL53LX_RANGING_CORE__STATUS 0x0980
Charles MacNeill 5:89031b2f5316 1503
Charles MacNeill 5:89031b2f5316 1504 #define VL53LX_RANGING_CORE__LASER_CONTINUITY_STATE 0x0981
Charles MacNeill 5:89031b2f5316 1505
Charles MacNeill 5:89031b2f5316 1506 #define VL53LX_RANGING_CORE__RANGE_1_MMM 0x0982
Charles MacNeill 5:89031b2f5316 1507
Charles MacNeill 5:89031b2f5316 1508 #define VL53LX_RANGING_CORE__RANGE_1_LMM 0x0983
Charles MacNeill 5:89031b2f5316 1509
Charles MacNeill 5:89031b2f5316 1510 #define VL53LX_RANGING_CORE__RANGE_1_LLM 0x0984
Charles MacNeill 5:89031b2f5316 1511
Charles MacNeill 5:89031b2f5316 1512 #define VL53LX_RANGING_CORE__RANGE_1_LLL 0x0985
Charles MacNeill 5:89031b2f5316 1513
Charles MacNeill 5:89031b2f5316 1514 #define VL53LX_RANGING_CORE__RANGE_REF_1_MMM 0x0986
Charles MacNeill 5:89031b2f5316 1515
Charles MacNeill 5:89031b2f5316 1516 #define VL53LX_RANGING_CORE__RANGE_REF_1_LMM 0x0987
Charles MacNeill 5:89031b2f5316 1517
Charles MacNeill 5:89031b2f5316 1518 #define VL53LX_RANGING_CORE__RANGE_REF_1_LLM 0x0988
Charles MacNeill 5:89031b2f5316 1519
Charles MacNeill 5:89031b2f5316 1520 #define VL53LX_RANGING_CORE__RANGE_REF_1_LLL 0x0989
Charles MacNeill 5:89031b2f5316 1521
Charles MacNeill 5:89031b2f5316 1522 #define VL53LX_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_MMM 0x098A
Charles MacNeill 5:89031b2f5316 1523
Charles MacNeill 5:89031b2f5316 1524 #define VL53LX_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LMM 0x098B
Charles MacNeill 5:89031b2f5316 1525
Charles MacNeill 5:89031b2f5316 1526 #define VL53LX_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLM 0x098C
Charles MacNeill 5:89031b2f5316 1527
Charles MacNeill 5:89031b2f5316 1528 #define VL53LX_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLL 0x098D
Charles MacNeill 5:89031b2f5316 1529
Charles MacNeill 5:89031b2f5316 1530 #define VL53LX_RANGING_CORE__RANGING_TOTAL_EVENTS_1_MMM 0x098E
Charles MacNeill 5:89031b2f5316 1531
Charles MacNeill 5:89031b2f5316 1532 #define VL53LX_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LMM 0x098F
Charles MacNeill 5:89031b2f5316 1533
Charles MacNeill 5:89031b2f5316 1534 #define VL53LX_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLM 0x0990
Charles MacNeill 5:89031b2f5316 1535
Charles MacNeill 5:89031b2f5316 1536 #define VL53LX_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLL 0x0991
Charles MacNeill 5:89031b2f5316 1537
Charles MacNeill 5:89031b2f5316 1538 #define VL53LX_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_MMM 0x0992
Charles MacNeill 5:89031b2f5316 1539
Charles MacNeill 5:89031b2f5316 1540 #define VL53LX_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LMM 0x0993
Charles MacNeill 5:89031b2f5316 1541
Charles MacNeill 5:89031b2f5316 1542 #define VL53LX_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLM 0x0994
Charles MacNeill 5:89031b2f5316 1543
Charles MacNeill 5:89031b2f5316 1544 #define VL53LX_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLL 0x0995
Charles MacNeill 5:89031b2f5316 1545
Charles MacNeill 5:89031b2f5316 1546 #define VL53LX_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_MM 0x0996
Charles MacNeill 5:89031b2f5316 1547
Charles MacNeill 5:89031b2f5316 1548 #define VL53LX_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LM 0x0997
Charles MacNeill 5:89031b2f5316 1549
Charles MacNeill 5:89031b2f5316 1550 #define VL53LX_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LL 0x0998
Charles MacNeill 5:89031b2f5316 1551
Charles MacNeill 5:89031b2f5316 1552 #define VL53LX_RANGING_CORE__AMBIENT_MISMATCH_MM 0x0999
Charles MacNeill 5:89031b2f5316 1553
Charles MacNeill 5:89031b2f5316 1554 #define VL53LX_RANGING_CORE__AMBIENT_MISMATCH_LM 0x099A
Charles MacNeill 5:89031b2f5316 1555
Charles MacNeill 5:89031b2f5316 1556 #define VL53LX_RANGING_CORE__AMBIENT_MISMATCH_LL 0x099B
Charles MacNeill 5:89031b2f5316 1557
Charles MacNeill 5:89031b2f5316 1558 #define VL53LX_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_MMM 0x099C
Charles MacNeill 5:89031b2f5316 1559
Charles MacNeill 5:89031b2f5316 1560 #define VL53LX_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LMM 0x099D
Charles MacNeill 5:89031b2f5316 1561
Charles MacNeill 5:89031b2f5316 1562 #define VL53LX_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLM 0x099E
Charles MacNeill 5:89031b2f5316 1563
Charles MacNeill 5:89031b2f5316 1564 #define VL53LX_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLL 0x099F
Charles MacNeill 5:89031b2f5316 1565
Charles MacNeill 5:89031b2f5316 1566 #define VL53LX_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_MMM 0x09A0
Charles MacNeill 5:89031b2f5316 1567
Charles MacNeill 5:89031b2f5316 1568 #define VL53LX_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LMM 0x09A1
Charles MacNeill 5:89031b2f5316 1569
Charles MacNeill 5:89031b2f5316 1570 #define VL53LX_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLM 0x09A2
Charles MacNeill 5:89031b2f5316 1571
Charles MacNeill 5:89031b2f5316 1572 #define VL53LX_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLL 0x09A3
Charles MacNeill 5:89031b2f5316 1573
Charles MacNeill 5:89031b2f5316 1574 #define VL53LX_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_MMM 0x09A4
Charles MacNeill 5:89031b2f5316 1575
Charles MacNeill 5:89031b2f5316 1576 #define VL53LX_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LMM 0x09A5
Charles MacNeill 5:89031b2f5316 1577
Charles MacNeill 5:89031b2f5316 1578 #define VL53LX_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLM 0x09A6
Charles MacNeill 5:89031b2f5316 1579
Charles MacNeill 5:89031b2f5316 1580 #define VL53LX_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLL 0x09A7
Charles MacNeill 5:89031b2f5316 1581
Charles MacNeill 5:89031b2f5316 1582 #define VL53LX_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_MM 0x09A8
Charles MacNeill 5:89031b2f5316 1583
Charles MacNeill 5:89031b2f5316 1584 #define VL53LX_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LM 0x09A9
Charles MacNeill 5:89031b2f5316 1585
Charles MacNeill 5:89031b2f5316 1586 #define VL53LX_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LL 0x09AA
Charles MacNeill 5:89031b2f5316 1587
Charles MacNeill 5:89031b2f5316 1588 #define VL53LX_RANGING_CORE__AMBIENT_MISMATCH_REF_MM 0x09AB
Charles MacNeill 5:89031b2f5316 1589
Charles MacNeill 5:89031b2f5316 1590 #define VL53LX_RANGING_CORE__AMBIENT_MISMATCH_REF_LM 0x09AC
Charles MacNeill 5:89031b2f5316 1591
Charles MacNeill 5:89031b2f5316 1592 #define VL53LX_RANGING_CORE__AMBIENT_MISMATCH_REF_LL 0x09AD
Charles MacNeill 5:89031b2f5316 1593
Charles MacNeill 5:89031b2f5316 1594 #define VL53LX_RANGING_CORE__GPIO_CONFIG__A0 0x0A00
Charles MacNeill 5:89031b2f5316 1595
Charles MacNeill 5:89031b2f5316 1596 #define VL53LX_RANGING_CORE__RESET_CONTROL__A0 0x0A01
Charles MacNeill 5:89031b2f5316 1597
Charles MacNeill 5:89031b2f5316 1598 #define VL53LX_RANGING_CORE__INTR_MANAGER__A0 0x0A02
Charles MacNeill 5:89031b2f5316 1599
Charles MacNeill 5:89031b2f5316 1600 #define VL53LX_RANGING_CORE__POWER_FSM_TIME_OSC__A0 0x0A06
Charles MacNeill 5:89031b2f5316 1601
Charles MacNeill 5:89031b2f5316 1602 #define VL53LX_RANGING_CORE__VCSEL_ATEST__A0 0x0A07
Charles MacNeill 5:89031b2f5316 1603
Charles MacNeill 5:89031b2f5316 1604 #define VL53LX_RANGING_CORE__VCSEL_PERIOD_CLIPPED__A0 0x0A08
Charles MacNeill 5:89031b2f5316 1605
Charles MacNeill 5:89031b2f5316 1606 #define VL53LX_RANGING_CORE__VCSEL_STOP_CLIPPED__A0 0x0A09
Charles MacNeill 5:89031b2f5316 1607
Charles MacNeill 5:89031b2f5316 1608 #define VL53LX_RANGING_CORE__CALIB_2__A0 0x0A0A
Charles MacNeill 5:89031b2f5316 1609
Charles MacNeill 5:89031b2f5316 1610 #define VL53LX_RANGING_CORE__STOP_CONDITION__A0 0x0A0B
Charles MacNeill 5:89031b2f5316 1611
Charles MacNeill 5:89031b2f5316 1612 #define VL53LX_RANGING_CORE__STATUS_RESET__A0 0x0A0C
Charles MacNeill 5:89031b2f5316 1613
Charles MacNeill 5:89031b2f5316 1614 #define VL53LX_RANGING_CORE__READOUT_CFG__A0 0x0A0D
Charles MacNeill 5:89031b2f5316 1615
Charles MacNeill 5:89031b2f5316 1616 #define VL53LX_RANGING_CORE__WINDOW_SETTING__A0 0x0A0E
Charles MacNeill 5:89031b2f5316 1617
Charles MacNeill 5:89031b2f5316 1618 #define VL53LX_RANGING_CORE__VCSEL_DELAY__A0 0x0A1A
Charles MacNeill 5:89031b2f5316 1619
Charles MacNeill 5:89031b2f5316 1620 #define VL53LX_RANGING_CORE__REFERENCE_2__A0 0x0A1B
Charles MacNeill 5:89031b2f5316 1621
Charles MacNeill 5:89031b2f5316 1622 #define VL53LX_RANGING_CORE__REGAVDD1V2__A0 0x0A1D
Charles MacNeill 5:89031b2f5316 1623
Charles MacNeill 5:89031b2f5316 1624 #define VL53LX_RANGING_CORE__TST_MUX__A0 0x0A1F
Charles MacNeill 5:89031b2f5316 1625
Charles MacNeill 5:89031b2f5316 1626 #define VL53LX_RANGING_CORE__CUSTOM_FE_2__A0 0x0A20
Charles MacNeill 5:89031b2f5316 1627
Charles MacNeill 5:89031b2f5316 1628 #define VL53LX_RANGING_CORE__SPAD_READOUT__A0 0x0A21
Charles MacNeill 5:89031b2f5316 1629
Charles MacNeill 5:89031b2f5316 1630 #define VL53LX_RANGING_CORE__CPUMP_1__A0 0x0A22
Charles MacNeill 5:89031b2f5316 1631
Charles MacNeill 5:89031b2f5316 1632 #define VL53LX_RANGING_CORE__SPARE_REGISTER__A0 0x0A23
Charles MacNeill 5:89031b2f5316 1633
Charles MacNeill 5:89031b2f5316 1634 #define VL53LX_RANGING_CORE__VCSEL_CONT_STAGE5_BYPASS__A0 0x0A24
Charles MacNeill 5:89031b2f5316 1635
Charles MacNeill 5:89031b2f5316 1636 #define VL53LX_RANGING_CORE__RET_SPAD_EN_18 0x0A25
Charles MacNeill 5:89031b2f5316 1637
Charles MacNeill 5:89031b2f5316 1638 #define VL53LX_RANGING_CORE__RET_SPAD_EN_19 0x0A26
Charles MacNeill 5:89031b2f5316 1639
Charles MacNeill 5:89031b2f5316 1640 #define VL53LX_RANGING_CORE__RET_SPAD_EN_20 0x0A27
Charles MacNeill 5:89031b2f5316 1641
Charles MacNeill 5:89031b2f5316 1642 #define VL53LX_RANGING_CORE__RET_SPAD_EN_21 0x0A28
Charles MacNeill 5:89031b2f5316 1643
Charles MacNeill 5:89031b2f5316 1644 #define VL53LX_RANGING_CORE__RET_SPAD_EN_22 0x0A29
Charles MacNeill 5:89031b2f5316 1645
Charles MacNeill 5:89031b2f5316 1646 #define VL53LX_RANGING_CORE__RET_SPAD_EN_23 0x0A2A
Charles MacNeill 5:89031b2f5316 1647
Charles MacNeill 5:89031b2f5316 1648 #define VL53LX_RANGING_CORE__RET_SPAD_EN_24 0x0A2B
Charles MacNeill 5:89031b2f5316 1649
Charles MacNeill 5:89031b2f5316 1650 #define VL53LX_RANGING_CORE__RET_SPAD_EN_25 0x0A2C
Charles MacNeill 5:89031b2f5316 1651
Charles MacNeill 5:89031b2f5316 1652 #define VL53LX_RANGING_CORE__RET_SPAD_EN_26 0x0A2D
Charles MacNeill 5:89031b2f5316 1653
Charles MacNeill 5:89031b2f5316 1654 #define VL53LX_RANGING_CORE__RET_SPAD_EN_27 0x0A2E
Charles MacNeill 5:89031b2f5316 1655
Charles MacNeill 5:89031b2f5316 1656 #define VL53LX_RANGING_CORE__RET_SPAD_EN_28 0x0A2F
Charles MacNeill 5:89031b2f5316 1657
Charles MacNeill 5:89031b2f5316 1658 #define VL53LX_RANGING_CORE__RET_SPAD_EN_29 0x0A30
Charles MacNeill 5:89031b2f5316 1659
Charles MacNeill 5:89031b2f5316 1660 #define VL53LX_RANGING_CORE__RET_SPAD_EN_30 0x0A31
Charles MacNeill 5:89031b2f5316 1661
Charles MacNeill 5:89031b2f5316 1662 #define VL53LX_RANGING_CORE__RET_SPAD_EN_31 0x0A32
Charles MacNeill 5:89031b2f5316 1663
Charles MacNeill 5:89031b2f5316 1664 #define VL53LX_RANGING_CORE__REF_SPAD_EN_0__EWOK 0x0A33
Charles MacNeill 5:89031b2f5316 1665
Charles MacNeill 5:89031b2f5316 1666 #define VL53LX_RANGING_CORE__REF_SPAD_EN_1__EWOK 0x0A34
Charles MacNeill 5:89031b2f5316 1667
Charles MacNeill 5:89031b2f5316 1668 #define VL53LX_RANGING_CORE__REF_SPAD_EN_2__EWOK 0x0A35
Charles MacNeill 5:89031b2f5316 1669
Charles MacNeill 5:89031b2f5316 1670 #define VL53LX_RANGING_CORE__REF_SPAD_EN_3__EWOK 0x0A36
Charles MacNeill 5:89031b2f5316 1671
Charles MacNeill 5:89031b2f5316 1672 #define VL53LX_RANGING_CORE__REF_SPAD_EN_4__EWOK 0x0A37
Charles MacNeill 5:89031b2f5316 1673
Charles MacNeill 5:89031b2f5316 1674 #define VL53LX_RANGING_CORE__REF_SPAD_EN_5__EWOK 0x0A38
Charles MacNeill 5:89031b2f5316 1675
Charles MacNeill 5:89031b2f5316 1676 #define VL53LX_RANGING_CORE__REF_EN_START_SELECT 0x0A39
Charles MacNeill 5:89031b2f5316 1677
Charles MacNeill 5:89031b2f5316 1678 #define VL53LX_RANGING_CORE__REGDVDD1V2_ATEST__EWOK 0x0A41
Charles MacNeill 5:89031b2f5316 1679
Charles MacNeill 5:89031b2f5316 1680 #define VL53LX_SOFT_RESET_GO1 0x0B00
Charles MacNeill 5:89031b2f5316 1681
Charles MacNeill 5:89031b2f5316 1682 #define VL53LX_PRIVATE__PATCH_BASE_ADDR_RSLV 0x0E00
Charles MacNeill 5:89031b2f5316 1683
Charles MacNeill 5:89031b2f5316 1684 #define VL53LX_PREV_SHADOW_RESULT__INTERRUPT_STATUS 0x0ED0
Charles MacNeill 5:89031b2f5316 1685
Charles MacNeill 5:89031b2f5316 1686 #define VL53LX_PREV_SHADOW_RESULT__RANGE_STATUS 0x0ED1
Charles MacNeill 5:89031b2f5316 1687
Charles MacNeill 5:89031b2f5316 1688 #define VL53LX_PREV_SHADOW_RESULT__REPORT_STATUS 0x0ED2
Charles MacNeill 5:89031b2f5316 1689
Charles MacNeill 5:89031b2f5316 1690 #define VL53LX_PREV_SHADOW_RESULT__STREAM_COUNT 0x0ED3
Charles MacNeill 5:89031b2f5316 1691
Charles MacNeill 5:89031b2f5316 1692 #define VL53LX_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0ED4
Charles MacNeill 5:89031b2f5316 1693
Charles MacNeill 5:89031b2f5316 1694 #define VL53LX_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0ED4
Charles MacNeill 5:89031b2f5316 1695
Charles MacNeill 5:89031b2f5316 1696 #define VL53LX_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0ED5
Charles MacNeill 5:89031b2f5316 1697
Charles MacNeill 5:89031b2f5316 1698 #define VL53LX_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0ED6
Charles MacNeill 5:89031b2f5316 1699
Charles MacNeill 5:89031b2f5316 1700 #define VL53LX_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0ED6
Charles MacNeill 5:89031b2f5316 1701
Charles MacNeill 5:89031b2f5316 1702 #define VL53LX_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0ED7
Charles MacNeill 5:89031b2f5316 1703
Charles MacNeill 5:89031b2f5316 1704 #define VL53LX_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0ED8
Charles MacNeill 5:89031b2f5316 1705
Charles MacNeill 5:89031b2f5316 1706 #define VL53LX_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0ED8
Charles MacNeill 5:89031b2f5316 1707
Charles MacNeill 5:89031b2f5316 1708 #define VL53LX_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0ED9
Charles MacNeill 5:89031b2f5316 1709
Charles MacNeill 5:89031b2f5316 1710 #define VL53LX_PREV_SHADOW_RESULT__SIGMA_SD0 0x0EDA
Charles MacNeill 5:89031b2f5316 1711
Charles MacNeill 5:89031b2f5316 1712 #define VL53LX_PREV_SHADOW_RESULT__SIGMA_SD0_HI 0x0EDA
Charles MacNeill 5:89031b2f5316 1713
Charles MacNeill 5:89031b2f5316 1714 #define VL53LX_PREV_SHADOW_RESULT__SIGMA_SD0_LO 0x0EDB
Charles MacNeill 5:89031b2f5316 1715
Charles MacNeill 5:89031b2f5316 1716 #define VL53LX_PREV_SHADOW_RESULT__PHASE_SD0 0x0EDC
Charles MacNeill 5:89031b2f5316 1717
Charles MacNeill 5:89031b2f5316 1718 #define VL53LX_PREV_SHADOW_RESULT__PHASE_SD0_HI 0x0EDC
Charles MacNeill 5:89031b2f5316 1719
Charles MacNeill 5:89031b2f5316 1720 #define VL53LX_PREV_SHADOW_RESULT__PHASE_SD0_LO 0x0EDD
Charles MacNeill 5:89031b2f5316 1721
Charles MacNeill 5:89031b2f5316 1722 #define VL53LX_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0EDE
Charles MacNeill 5:89031b2f5316 1723
Charles MacNeill 5:89031b2f5316 1724 #define VL53LX_PREV__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0EDE
Charles MacNeill 5:89031b2f5316 1725
Charles MacNeill 5:89031b2f5316 1726 #define VL53LX_PREV__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0EDF
Charles MacNeill 5:89031b2f5316 1727
Charles MacNeill 5:89031b2f5316 1728 #define VL53LX_PREV__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0EE0
Charles MacNeill 5:89031b2f5316 1729
Charles MacNeill 5:89031b2f5316 1730 #define VL53LX_PPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0EE0
Charles MacNeill 5:89031b2f5316 1731
Charles MacNeill 5:89031b2f5316 1732 #define VL53LX_PPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0EE1
Charles MacNeill 5:89031b2f5316 1733
Charles MacNeill 5:89031b2f5316 1734 #define VL53LX_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE2
Charles MacNeill 5:89031b2f5316 1735
Charles MacNeill 5:89031b2f5316 1736 #define VL53LX_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE2
Charles MacNeill 5:89031b2f5316 1737
Charles MacNeill 5:89031b2f5316 1738 #define VL53LX_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE3
Charles MacNeill 5:89031b2f5316 1739
Charles MacNeill 5:89031b2f5316 1740 #define VL53LX_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE4
Charles MacNeill 5:89031b2f5316 1741
Charles MacNeill 5:89031b2f5316 1742 #define VL53LX_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE4
Charles MacNeill 5:89031b2f5316 1743
Charles MacNeill 5:89031b2f5316 1744 #define VL53LX_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE5
Charles MacNeill 5:89031b2f5316 1745
Charles MacNeill 5:89031b2f5316 1746 #define VL53LX_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0EE6
Charles MacNeill 5:89031b2f5316 1747
Charles MacNeill 5:89031b2f5316 1748 #define VL53LX_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0EE6
Charles MacNeill 5:89031b2f5316 1749
Charles MacNeill 5:89031b2f5316 1750 #define VL53LX_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0EE7
Charles MacNeill 5:89031b2f5316 1751
Charles MacNeill 5:89031b2f5316 1752 #define VL53LX_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0EE8
Charles MacNeill 5:89031b2f5316 1753
Charles MacNeill 5:89031b2f5316 1754 #define VL53LX_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0EE8
Charles MacNeill 5:89031b2f5316 1755
Charles MacNeill 5:89031b2f5316 1756 #define VL53LX_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0EE9
Charles MacNeill 5:89031b2f5316 1757
Charles MacNeill 5:89031b2f5316 1758 #define VL53LX_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0EEA
Charles MacNeill 5:89031b2f5316 1759
Charles MacNeill 5:89031b2f5316 1760 #define VL53LX_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0EEA
Charles MacNeill 5:89031b2f5316 1761
Charles MacNeill 5:89031b2f5316 1762 #define VL53LX_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0EEB
Charles MacNeill 5:89031b2f5316 1763
Charles MacNeill 5:89031b2f5316 1764 #define VL53LX_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0EEC
Charles MacNeill 5:89031b2f5316 1765
Charles MacNeill 5:89031b2f5316 1766 #define VL53LX_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0EEC
Charles MacNeill 5:89031b2f5316 1767
Charles MacNeill 5:89031b2f5316 1768 #define VL53LX_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0EED
Charles MacNeill 5:89031b2f5316 1769
Charles MacNeill 5:89031b2f5316 1770 #define VL53LX_PREV_SHADOW_RESULT__SIGMA_SD1 0x0EEE
Charles MacNeill 5:89031b2f5316 1771
Charles MacNeill 5:89031b2f5316 1772 #define VL53LX_PREV_SHADOW_RESULT__SIGMA_SD1_HI 0x0EEE
Charles MacNeill 5:89031b2f5316 1773
Charles MacNeill 5:89031b2f5316 1774 #define VL53LX_PREV_SHADOW_RESULT__SIGMA_SD1_LO 0x0EEF
Charles MacNeill 5:89031b2f5316 1775
Charles MacNeill 5:89031b2f5316 1776 #define VL53LX_PREV_SHADOW_RESULT__PHASE_SD1 0x0EF0
Charles MacNeill 5:89031b2f5316 1777
Charles MacNeill 5:89031b2f5316 1778 #define VL53LX_PREV_SHADOW_RESULT__PHASE_SD1_HI 0x0EF0
Charles MacNeill 5:89031b2f5316 1779
Charles MacNeill 5:89031b2f5316 1780 #define VL53LX_PREV_SHADOW_RESULT__PHASE_SD1_LO 0x0EF1
Charles MacNeill 5:89031b2f5316 1781
Charles MacNeill 5:89031b2f5316 1782 #define VL53LX_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0EF2
Charles MacNeill 5:89031b2f5316 1783
Charles MacNeill 5:89031b2f5316 1784 #define VL53LX_PFINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0EF2
Charles MacNeill 5:89031b2f5316 1785
Charles MacNeill 5:89031b2f5316 1786 #define VL53LX_PFINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0EF3
Charles MacNeill 5:89031b2f5316 1787
Charles MacNeill 5:89031b2f5316 1788 #define VL53LX_PREV_SHADOW_RESULT__SPARE_0_SD1 0x0EF4
Charles MacNeill 5:89031b2f5316 1789
Charles MacNeill 5:89031b2f5316 1790 #define VL53LX_PREV_SHADOW_RESULT__SPARE_0_SD1_HI 0x0EF4
Charles MacNeill 5:89031b2f5316 1791
Charles MacNeill 5:89031b2f5316 1792 #define VL53LX_PREV_SHADOW_RESULT__SPARE_0_SD1_LO 0x0EF5
Charles MacNeill 5:89031b2f5316 1793
Charles MacNeill 5:89031b2f5316 1794 #define VL53LX_PREV_SHADOW_RESULT__SPARE_1_SD1 0x0EF6
Charles MacNeill 5:89031b2f5316 1795
Charles MacNeill 5:89031b2f5316 1796 #define VL53LX_PREV_SHADOW_RESULT__SPARE_1_SD1_HI 0x0EF6
Charles MacNeill 5:89031b2f5316 1797
Charles MacNeill 5:89031b2f5316 1798 #define VL53LX_PREV_SHADOW_RESULT__SPARE_1_SD1_LO 0x0EF7
Charles MacNeill 5:89031b2f5316 1799
Charles MacNeill 5:89031b2f5316 1800 #define VL53LX_PREV_SHADOW_RESULT__SPARE_2_SD1 0x0EF8
Charles MacNeill 5:89031b2f5316 1801
Charles MacNeill 5:89031b2f5316 1802 #define VL53LX_PREV_SHADOW_RESULT__SPARE_2_SD1_HI 0x0EF8
Charles MacNeill 5:89031b2f5316 1803
Charles MacNeill 5:89031b2f5316 1804 #define VL53LX_PREV_SHADOW_RESULT__SPARE_2_SD1_LO 0x0EF9
Charles MacNeill 5:89031b2f5316 1805
Charles MacNeill 5:89031b2f5316 1806 #define VL53LX_PREV_SHADOW_RESULT__SPARE_3_SD1 0x0EFA
Charles MacNeill 5:89031b2f5316 1807
Charles MacNeill 5:89031b2f5316 1808 #define VL53LX_PREV_SHADOW_RESULT__SPARE_3_SD1_HI 0x0EFA
Charles MacNeill 5:89031b2f5316 1809
Charles MacNeill 5:89031b2f5316 1810 #define VL53LX_PREV_SHADOW_RESULT__SPARE_3_SD1_LO 0x0EFB
Charles MacNeill 5:89031b2f5316 1811
Charles MacNeill 5:89031b2f5316 1812 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0EFC
Charles MacNeill 5:89031b2f5316 1813
Charles MacNeill 5:89031b2f5316 1814 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0EFC
Charles MacNeill 5:89031b2f5316 1815
Charles MacNeill 5:89031b2f5316 1816 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0EFD
Charles MacNeill 5:89031b2f5316 1817
Charles MacNeill 5:89031b2f5316 1818 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0EFE
Charles MacNeill 5:89031b2f5316 1819
Charles MacNeill 5:89031b2f5316 1820 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0EFF
Charles MacNeill 5:89031b2f5316 1821
Charles MacNeill 5:89031b2f5316 1822 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0F00
Charles MacNeill 5:89031b2f5316 1823
Charles MacNeill 5:89031b2f5316 1824 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0F00
Charles MacNeill 5:89031b2f5316 1825
Charles MacNeill 5:89031b2f5316 1826 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0F01
Charles MacNeill 5:89031b2f5316 1827
Charles MacNeill 5:89031b2f5316 1828 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0F02
Charles MacNeill 5:89031b2f5316 1829
Charles MacNeill 5:89031b2f5316 1830 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0F03
Charles MacNeill 5:89031b2f5316 1831
Charles MacNeill 5:89031b2f5316 1832 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0F04
Charles MacNeill 5:89031b2f5316 1833
Charles MacNeill 5:89031b2f5316 1834 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0F04
Charles MacNeill 5:89031b2f5316 1835
Charles MacNeill 5:89031b2f5316 1836 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0F05
Charles MacNeill 5:89031b2f5316 1837
Charles MacNeill 5:89031b2f5316 1838 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0F06
Charles MacNeill 5:89031b2f5316 1839
Charles MacNeill 5:89031b2f5316 1840 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0F07
Charles MacNeill 5:89031b2f5316 1841
Charles MacNeill 5:89031b2f5316 1842 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0F08
Charles MacNeill 5:89031b2f5316 1843
Charles MacNeill 5:89031b2f5316 1844 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0F08
Charles MacNeill 5:89031b2f5316 1845
Charles MacNeill 5:89031b2f5316 1846 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0F09
Charles MacNeill 5:89031b2f5316 1847
Charles MacNeill 5:89031b2f5316 1848 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0F0A
Charles MacNeill 5:89031b2f5316 1849
Charles MacNeill 5:89031b2f5316 1850 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0F0B
Charles MacNeill 5:89031b2f5316 1851
Charles MacNeill 5:89031b2f5316 1852 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0F0C
Charles MacNeill 5:89031b2f5316 1853
Charles MacNeill 5:89031b2f5316 1854 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0F0C
Charles MacNeill 5:89031b2f5316 1855
Charles MacNeill 5:89031b2f5316 1856 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0F0D
Charles MacNeill 5:89031b2f5316 1857
Charles MacNeill 5:89031b2f5316 1858 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0F0E
Charles MacNeill 5:89031b2f5316 1859
Charles MacNeill 5:89031b2f5316 1860 #define VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0F0F
Charles MacNeill 5:89031b2f5316 1861
Charles MacNeill 5:89031b2f5316 1862 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0F10
Charles MacNeill 5:89031b2f5316 1863
Charles MacNeill 5:89031b2f5316 1864 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0F10
Charles MacNeill 5:89031b2f5316 1865
Charles MacNeill 5:89031b2f5316 1866 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0F11
Charles MacNeill 5:89031b2f5316 1867
Charles MacNeill 5:89031b2f5316 1868 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0F12
Charles MacNeill 5:89031b2f5316 1869
Charles MacNeill 5:89031b2f5316 1870 #define VL53LX_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0F13
Charles MacNeill 5:89031b2f5316 1871
Charles MacNeill 5:89031b2f5316 1872 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0F14
Charles MacNeill 5:89031b2f5316 1873
Charles MacNeill 5:89031b2f5316 1874 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0F14
Charles MacNeill 5:89031b2f5316 1875
Charles MacNeill 5:89031b2f5316 1876 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0F15
Charles MacNeill 5:89031b2f5316 1877
Charles MacNeill 5:89031b2f5316 1878 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0F16
Charles MacNeill 5:89031b2f5316 1879
Charles MacNeill 5:89031b2f5316 1880 #define VL53LX_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0F17
Charles MacNeill 5:89031b2f5316 1881
Charles MacNeill 5:89031b2f5316 1882 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0F18
Charles MacNeill 5:89031b2f5316 1883
Charles MacNeill 5:89031b2f5316 1884 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0F18
Charles MacNeill 5:89031b2f5316 1885
Charles MacNeill 5:89031b2f5316 1886 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0F19
Charles MacNeill 5:89031b2f5316 1887
Charles MacNeill 5:89031b2f5316 1888 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0F1A
Charles MacNeill 5:89031b2f5316 1889
Charles MacNeill 5:89031b2f5316 1890 #define VL53LX_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0F1B
Charles MacNeill 5:89031b2f5316 1891
Charles MacNeill 5:89031b2f5316 1892 #define VL53LX_PREV_SHADOW_RESULT_CORE__SPARE_0 0x0F1C
Charles MacNeill 5:89031b2f5316 1893
Charles MacNeill 5:89031b2f5316 1894 #define VL53LX_RESULT__DEBUG_STATUS 0x0F20
Charles MacNeill 5:89031b2f5316 1895
Charles MacNeill 5:89031b2f5316 1896 #define VL53LX_RESULT__DEBUG_STAGE 0x0F21
Charles MacNeill 5:89031b2f5316 1897
Charles MacNeill 5:89031b2f5316 1898 #define VL53LX_GPH__SYSTEM__THRESH_RATE_HIGH 0x0F24
Charles MacNeill 5:89031b2f5316 1899
Charles MacNeill 5:89031b2f5316 1900 #define VL53LX_GPH__SYSTEM__THRESH_RATE_HIGH_HI 0x0F24
Charles MacNeill 5:89031b2f5316 1901
Charles MacNeill 5:89031b2f5316 1902 #define VL53LX_GPH__SYSTEM__THRESH_RATE_HIGH_LO 0x0F25
Charles MacNeill 5:89031b2f5316 1903
Charles MacNeill 5:89031b2f5316 1904 #define VL53LX_GPH__SYSTEM__THRESH_RATE_LOW 0x0F26
Charles MacNeill 5:89031b2f5316 1905
Charles MacNeill 5:89031b2f5316 1906 #define VL53LX_GPH__SYSTEM__THRESH_RATE_LOW_HI 0x0F26
Charles MacNeill 5:89031b2f5316 1907
Charles MacNeill 5:89031b2f5316 1908 #define VL53LX_GPH__SYSTEM__THRESH_RATE_LOW_LO 0x0F27
Charles MacNeill 5:89031b2f5316 1909
Charles MacNeill 5:89031b2f5316 1910 #define VL53LX_GPH__SYSTEM__INTERRUPT_CONFIG_GPIO 0x0F28
Charles MacNeill 5:89031b2f5316 1911
Charles MacNeill 5:89031b2f5316 1912 #define VL53LX_GPH__DSS_CONFIG__ROI_MODE_CONTROL 0x0F2F
Charles MacNeill 5:89031b2f5316 1913
Charles MacNeill 5:89031b2f5316 1914 #define VL53LX_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0F30
Charles MacNeill 5:89031b2f5316 1915
Charles MacNeill 5:89031b2f5316 1916 #define VL53LX_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0F30
Charles MacNeill 5:89031b2f5316 1917
Charles MacNeill 5:89031b2f5316 1918 #define VL53LX_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0F31
Charles MacNeill 5:89031b2f5316 1919
Charles MacNeill 5:89031b2f5316 1920 #define VL53LX_GPH__DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0F32
Charles MacNeill 5:89031b2f5316 1921
Charles MacNeill 5:89031b2f5316 1922 #define VL53LX_GPH__DSS_CONFIG__MAX_SPADS_LIMIT 0x0F33
Charles MacNeill 5:89031b2f5316 1923
Charles MacNeill 5:89031b2f5316 1924 #define VL53LX_GPH__DSS_CONFIG__MIN_SPADS_LIMIT 0x0F34
Charles MacNeill 5:89031b2f5316 1925
Charles MacNeill 5:89031b2f5316 1926 #define VL53LX_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI 0x0F36
Charles MacNeill 5:89031b2f5316 1927
Charles MacNeill 5:89031b2f5316 1928 #define VL53LX_GPH__MM_CONFIG__TIMEOUT_MACROP_A_LO 0x0F37
Charles MacNeill 5:89031b2f5316 1929
Charles MacNeill 5:89031b2f5316 1930 #define VL53LX_GPH__MM_CONFIG__TIMEOUT_MACROP_B_HI 0x0F38
Charles MacNeill 5:89031b2f5316 1931
Charles MacNeill 5:89031b2f5316 1932 #define VL53LX_GPH__MM_CONFIG__TIMEOUT_MACROP_B_LO 0x0F39
Charles MacNeill 5:89031b2f5316 1933
Charles MacNeill 5:89031b2f5316 1934 #define VL53LX_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x0F3A
Charles MacNeill 5:89031b2f5316 1935
Charles MacNeill 5:89031b2f5316 1936 #define VL53LX_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x0F3B
Charles MacNeill 5:89031b2f5316 1937
Charles MacNeill 5:89031b2f5316 1938 #define VL53LX_GPH__RANGE_CONFIG__VCSEL_PERIOD_A 0x0F3C
Charles MacNeill 5:89031b2f5316 1939
Charles MacNeill 5:89031b2f5316 1940 #define VL53LX_GPH__RANGE_CONFIG__VCSEL_PERIOD_B 0x0F3D
Charles MacNeill 5:89031b2f5316 1941
Charles MacNeill 5:89031b2f5316 1942 #define VL53LX_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0F3E
Charles MacNeill 5:89031b2f5316 1943
Charles MacNeill 5:89031b2f5316 1944 #define VL53LX_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0F3F
Charles MacNeill 5:89031b2f5316 1945
Charles MacNeill 5:89031b2f5316 1946 #define VL53LX_GPH__RANGE_CONFIG__SIGMA_THRESH 0x0F40
Charles MacNeill 5:89031b2f5316 1947
Charles MacNeill 5:89031b2f5316 1948 #define VL53LX_GPH__RANGE_CONFIG__SIGMA_THRESH_HI 0x0F40
Charles MacNeill 5:89031b2f5316 1949
Charles MacNeill 5:89031b2f5316 1950 #define VL53LX_GPH__RANGE_CONFIG__SIGMA_THRESH_LO 0x0F41
Charles MacNeill 5:89031b2f5316 1951
Charles MacNeill 5:89031b2f5316 1952 #define VL53LX_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0F42
Charles MacNeill 5:89031b2f5316 1953
Charles MacNeill 5:89031b2f5316 1954 #define VL53LX_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0F42
Charles MacNeill 5:89031b2f5316 1955
Charles MacNeill 5:89031b2f5316 1956 #define VL53LX_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0F43
Charles MacNeill 5:89031b2f5316 1957
Charles MacNeill 5:89031b2f5316 1958 #define VL53LX_GPH__RANGE_CONFIG__VALID_PHASE_LOW 0x0F44
Charles MacNeill 5:89031b2f5316 1959
Charles MacNeill 5:89031b2f5316 1960 #define VL53LX_GPH__RANGE_CONFIG__VALID_PHASE_HIGH 0x0F45
Charles MacNeill 5:89031b2f5316 1961
Charles MacNeill 5:89031b2f5316 1962 #define VL53LX_FIRMWARE__INTERNAL_STREAM_COUNT_DIV 0x0F46
Charles MacNeill 5:89031b2f5316 1963
Charles MacNeill 5:89031b2f5316 1964 #define VL53LX_FIRMWARE__INTERNAL_STREAM_COUNTER_VAL 0x0F47
Charles MacNeill 5:89031b2f5316 1965
Charles MacNeill 5:89031b2f5316 1966 #define VL53LX_DSS_CALC__ROI_CTRL 0x0F54
Charles MacNeill 5:89031b2f5316 1967
Charles MacNeill 5:89031b2f5316 1968 #define VL53LX_DSS_CALC__SPARE_1 0x0F55
Charles MacNeill 5:89031b2f5316 1969
Charles MacNeill 5:89031b2f5316 1970 #define VL53LX_DSS_CALC__SPARE_2 0x0F56
Charles MacNeill 5:89031b2f5316 1971
Charles MacNeill 5:89031b2f5316 1972 #define VL53LX_DSS_CALC__SPARE_3 0x0F57
Charles MacNeill 5:89031b2f5316 1973
Charles MacNeill 5:89031b2f5316 1974 #define VL53LX_DSS_CALC__SPARE_4 0x0F58
Charles MacNeill 5:89031b2f5316 1975
Charles MacNeill 5:89031b2f5316 1976 #define VL53LX_DSS_CALC__SPARE_5 0x0F59
Charles MacNeill 5:89031b2f5316 1977
Charles MacNeill 5:89031b2f5316 1978 #define VL53LX_DSS_CALC__SPARE_6 0x0F5A
Charles MacNeill 5:89031b2f5316 1979
Charles MacNeill 5:89031b2f5316 1980 #define VL53LX_DSS_CALC__SPARE_7 0x0F5B
Charles MacNeill 5:89031b2f5316 1981
Charles MacNeill 5:89031b2f5316 1982 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_0 0x0F5C
Charles MacNeill 5:89031b2f5316 1983
Charles MacNeill 5:89031b2f5316 1984 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_1 0x0F5D
Charles MacNeill 5:89031b2f5316 1985
Charles MacNeill 5:89031b2f5316 1986 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_2 0x0F5E
Charles MacNeill 5:89031b2f5316 1987
Charles MacNeill 5:89031b2f5316 1988 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_3 0x0F5F
Charles MacNeill 5:89031b2f5316 1989
Charles MacNeill 5:89031b2f5316 1990 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_4 0x0F60
Charles MacNeill 5:89031b2f5316 1991
Charles MacNeill 5:89031b2f5316 1992 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_5 0x0F61
Charles MacNeill 5:89031b2f5316 1993
Charles MacNeill 5:89031b2f5316 1994 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_6 0x0F62
Charles MacNeill 5:89031b2f5316 1995
Charles MacNeill 5:89031b2f5316 1996 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_7 0x0F63
Charles MacNeill 5:89031b2f5316 1997
Charles MacNeill 5:89031b2f5316 1998 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_8 0x0F64
Charles MacNeill 5:89031b2f5316 1999
Charles MacNeill 5:89031b2f5316 2000 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_9 0x0F65
Charles MacNeill 5:89031b2f5316 2001
Charles MacNeill 5:89031b2f5316 2002 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_10 0x0F66
Charles MacNeill 5:89031b2f5316 2003
Charles MacNeill 5:89031b2f5316 2004 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_11 0x0F67
Charles MacNeill 5:89031b2f5316 2005
Charles MacNeill 5:89031b2f5316 2006 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_12 0x0F68
Charles MacNeill 5:89031b2f5316 2007
Charles MacNeill 5:89031b2f5316 2008 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_13 0x0F69
Charles MacNeill 5:89031b2f5316 2009
Charles MacNeill 5:89031b2f5316 2010 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_14 0x0F6A
Charles MacNeill 5:89031b2f5316 2011
Charles MacNeill 5:89031b2f5316 2012 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_15 0x0F6B
Charles MacNeill 5:89031b2f5316 2013
Charles MacNeill 5:89031b2f5316 2014 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_16 0x0F6C
Charles MacNeill 5:89031b2f5316 2015
Charles MacNeill 5:89031b2f5316 2016 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_17 0x0F6D
Charles MacNeill 5:89031b2f5316 2017
Charles MacNeill 5:89031b2f5316 2018 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_18 0x0F6E
Charles MacNeill 5:89031b2f5316 2019
Charles MacNeill 5:89031b2f5316 2020 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_19 0x0F6F
Charles MacNeill 5:89031b2f5316 2021
Charles MacNeill 5:89031b2f5316 2022 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_20 0x0F70
Charles MacNeill 5:89031b2f5316 2023
Charles MacNeill 5:89031b2f5316 2024 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_21 0x0F71
Charles MacNeill 5:89031b2f5316 2025
Charles MacNeill 5:89031b2f5316 2026 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_22 0x0F72
Charles MacNeill 5:89031b2f5316 2027
Charles MacNeill 5:89031b2f5316 2028 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_23 0x0F73
Charles MacNeill 5:89031b2f5316 2029
Charles MacNeill 5:89031b2f5316 2030 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_24 0x0F74
Charles MacNeill 5:89031b2f5316 2031
Charles MacNeill 5:89031b2f5316 2032 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_25 0x0F75
Charles MacNeill 5:89031b2f5316 2033
Charles MacNeill 5:89031b2f5316 2034 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_26 0x0F76
Charles MacNeill 5:89031b2f5316 2035
Charles MacNeill 5:89031b2f5316 2036 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_27 0x0F77
Charles MacNeill 5:89031b2f5316 2037
Charles MacNeill 5:89031b2f5316 2038 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_28 0x0F78
Charles MacNeill 5:89031b2f5316 2039
Charles MacNeill 5:89031b2f5316 2040 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_29 0x0F79
Charles MacNeill 5:89031b2f5316 2041
Charles MacNeill 5:89031b2f5316 2042 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_30 0x0F7A
Charles MacNeill 5:89031b2f5316 2043
Charles MacNeill 5:89031b2f5316 2044 #define VL53LX_DSS_CALC__USER_ROI_SPAD_EN_31 0x0F7B
Charles MacNeill 5:89031b2f5316 2045
Charles MacNeill 5:89031b2f5316 2046 #define VL53LX_DSS_CALC__USER_ROI_0 0x0F7C
Charles MacNeill 5:89031b2f5316 2047
Charles MacNeill 5:89031b2f5316 2048 #define VL53LX_DSS_CALC__USER_ROI_1 0x0F7D
Charles MacNeill 5:89031b2f5316 2049
Charles MacNeill 5:89031b2f5316 2050 #define VL53LX_DSS_CALC__MODE_ROI_0 0x0F7E
Charles MacNeill 5:89031b2f5316 2051
Charles MacNeill 5:89031b2f5316 2052 #define VL53LX_DSS_CALC__MODE_ROI_1 0x0F7F
Charles MacNeill 5:89031b2f5316 2053
Charles MacNeill 5:89031b2f5316 2054 #define VL53LX_SIGMA_ESTIMATOR_CALC__SPARE_0 0x0F80
Charles MacNeill 5:89031b2f5316 2055
Charles MacNeill 5:89031b2f5316 2056 #define VL53LX_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS 0x0F82
Charles MacNeill 5:89031b2f5316 2057
Charles MacNeill 5:89031b2f5316 2058 #define VL53LX_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_HI 0x0F82
Charles MacNeill 5:89031b2f5316 2059
Charles MacNeill 5:89031b2f5316 2060 #define VL53LX_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_LO 0x0F83
Charles MacNeill 5:89031b2f5316 2061
Charles MacNeill 5:89031b2f5316 2062 #define VL53LX_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF 0x0F84
Charles MacNeill 5:89031b2f5316 2063
Charles MacNeill 5:89031b2f5316 2064 #define VL53LX_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_3 0x0F84
Charles MacNeill 5:89031b2f5316 2065
Charles MacNeill 5:89031b2f5316 2066 #define VL53LX_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_2 0x0F85
Charles MacNeill 5:89031b2f5316 2067
Charles MacNeill 5:89031b2f5316 2068 #define VL53LX_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_1 0x0F86
Charles MacNeill 5:89031b2f5316 2069
Charles MacNeill 5:89031b2f5316 2070 #define VL53LX_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_0 0x0F87
Charles MacNeill 5:89031b2f5316 2071
Charles MacNeill 5:89031b2f5316 2072 #define VL53LX_PHASECAL_RESULT__PHASE_OUTPUT_REF 0x0F88
Charles MacNeill 5:89031b2f5316 2073
Charles MacNeill 5:89031b2f5316 2074 #define VL53LX_PHASECAL_RESULT__PHASE_OUTPUT_REF_HI 0x0F88
Charles MacNeill 5:89031b2f5316 2075
Charles MacNeill 5:89031b2f5316 2076 #define VL53LX_PHASECAL_RESULT__PHASE_OUTPUT_REF_LO 0x0F89
Charles MacNeill 5:89031b2f5316 2077
Charles MacNeill 5:89031b2f5316 2078 #define VL53LX_DSS_RESULT__TOTAL_RATE_PER_SPAD 0x0F8A
Charles MacNeill 5:89031b2f5316 2079
Charles MacNeill 5:89031b2f5316 2080 #define VL53LX_DSS_RESULT__TOTAL_RATE_PER_SPAD_HI 0x0F8A
Charles MacNeill 5:89031b2f5316 2081
Charles MacNeill 5:89031b2f5316 2082 #define VL53LX_DSS_RESULT__TOTAL_RATE_PER_SPAD_LO 0x0F8B
Charles MacNeill 5:89031b2f5316 2083
Charles MacNeill 5:89031b2f5316 2084 #define VL53LX_DSS_RESULT__ENABLED_BLOCKS 0x0F8C
Charles MacNeill 5:89031b2f5316 2085
Charles MacNeill 5:89031b2f5316 2086 #define VL53LX_DSS_RESULT__NUM_REQUESTED_SPADS 0x0F8E
Charles MacNeill 5:89031b2f5316 2087
Charles MacNeill 5:89031b2f5316 2088 #define VL53LX_DSS_RESULT__NUM_REQUESTED_SPADS_HI 0x0F8E
Charles MacNeill 5:89031b2f5316 2089
Charles MacNeill 5:89031b2f5316 2090 #define VL53LX_DSS_RESULT__NUM_REQUESTED_SPADS_LO 0x0F8F
Charles MacNeill 5:89031b2f5316 2091
Charles MacNeill 5:89031b2f5316 2092 #define VL53LX_MM_RESULT__INNER_INTERSECTION_RATE 0x0F92
Charles MacNeill 5:89031b2f5316 2093
Charles MacNeill 5:89031b2f5316 2094 #define VL53LX_MM_RESULT__INNER_INTERSECTION_RATE_HI 0x0F92
Charles MacNeill 5:89031b2f5316 2095
Charles MacNeill 5:89031b2f5316 2096 #define VL53LX_MM_RESULT__INNER_INTERSECTION_RATE_LO 0x0F93
Charles MacNeill 5:89031b2f5316 2097
Charles MacNeill 5:89031b2f5316 2098 #define VL53LX_MM_RESULT__OUTER_COMPLEMENT_RATE 0x0F94
Charles MacNeill 5:89031b2f5316 2099
Charles MacNeill 5:89031b2f5316 2100 #define VL53LX_MM_RESULT__OUTER_COMPLEMENT_RATE_HI 0x0F94
Charles MacNeill 5:89031b2f5316 2101
Charles MacNeill 5:89031b2f5316 2102 #define VL53LX_MM_RESULT__OUTER_COMPLEMENT_RATE_LO 0x0F95
Charles MacNeill 5:89031b2f5316 2103
Charles MacNeill 5:89031b2f5316 2104 #define VL53LX_MM_RESULT__TOTAL_OFFSET 0x0F96
Charles MacNeill 5:89031b2f5316 2105
Charles MacNeill 5:89031b2f5316 2106 #define VL53LX_MM_RESULT__TOTAL_OFFSET_HI 0x0F96
Charles MacNeill 5:89031b2f5316 2107
Charles MacNeill 5:89031b2f5316 2108 #define VL53LX_MM_RESULT__TOTAL_OFFSET_LO 0x0F97
Charles MacNeill 5:89031b2f5316 2109
Charles MacNeill 5:89031b2f5316 2110 #define VL53LX_XTALK_CALC__XTALK_FOR_ENABLED_SPADS 0x0F98
Charles MacNeill 5:89031b2f5316 2111
Charles MacNeill 5:89031b2f5316 2112 #define VL53LX_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_3 0x0F98
Charles MacNeill 5:89031b2f5316 2113
Charles MacNeill 5:89031b2f5316 2114 #define VL53LX_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_2 0x0F99
Charles MacNeill 5:89031b2f5316 2115
Charles MacNeill 5:89031b2f5316 2116 #define VL53LX_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_1 0x0F9A
Charles MacNeill 5:89031b2f5316 2117
Charles MacNeill 5:89031b2f5316 2118 #define VL53LX_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_0 0x0F9B
Charles MacNeill 5:89031b2f5316 2119
Charles MacNeill 5:89031b2f5316 2120 #define VL53LX_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS 0x0F9C
Charles MacNeill 5:89031b2f5316 2121
Charles MacNeill 5:89031b2f5316 2122 #define VL53LX_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_3 0x0F9C
Charles MacNeill 5:89031b2f5316 2123
Charles MacNeill 5:89031b2f5316 2124 #define VL53LX_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_2 0x0F9D
Charles MacNeill 5:89031b2f5316 2125
Charles MacNeill 5:89031b2f5316 2126 #define VL53LX_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_1 0x0F9E
Charles MacNeill 5:89031b2f5316 2127
Charles MacNeill 5:89031b2f5316 2128 #define VL53LX_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_0 0x0F9F
Charles MacNeill 5:89031b2f5316 2129
Charles MacNeill 5:89031b2f5316 2130 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS 0x0FA0
Charles MacNeill 5:89031b2f5316 2131
Charles MacNeill 5:89031b2f5316 2132 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_3 0x0FA0
Charles MacNeill 5:89031b2f5316 2133
Charles MacNeill 5:89031b2f5316 2134 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_2 0x0FA1
Charles MacNeill 5:89031b2f5316 2135
Charles MacNeill 5:89031b2f5316 2136 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_1 0x0FA2
Charles MacNeill 5:89031b2f5316 2137
Charles MacNeill 5:89031b2f5316 2138 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_0 0x0FA3
Charles MacNeill 5:89031b2f5316 2139
Charles MacNeill 5:89031b2f5316 2140 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS 0x0FA4
Charles MacNeill 5:89031b2f5316 2141
Charles MacNeill 5:89031b2f5316 2142 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_3 0x0FA4
Charles MacNeill 5:89031b2f5316 2143
Charles MacNeill 5:89031b2f5316 2144 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_2 0x0FA5
Charles MacNeill 5:89031b2f5316 2145
Charles MacNeill 5:89031b2f5316 2146 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_1 0x0FA6
Charles MacNeill 5:89031b2f5316 2147
Charles MacNeill 5:89031b2f5316 2148 #define VL53LX_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_0 0x0FA7
Charles MacNeill 5:89031b2f5316 2149
Charles MacNeill 5:89031b2f5316 2150 #define VL53LX_RANGE_RESULT__ACCUM_PHASE 0x0FA8
Charles MacNeill 5:89031b2f5316 2151
Charles MacNeill 5:89031b2f5316 2152 #define VL53LX_RANGE_RESULT__ACCUM_PHASE_3 0x0FA8
Charles MacNeill 5:89031b2f5316 2153
Charles MacNeill 5:89031b2f5316 2154 #define VL53LX_RANGE_RESULT__ACCUM_PHASE_2 0x0FA9
Charles MacNeill 5:89031b2f5316 2155
Charles MacNeill 5:89031b2f5316 2156 #define VL53LX_RANGE_RESULT__ACCUM_PHASE_1 0x0FAA
Charles MacNeill 5:89031b2f5316 2157
Charles MacNeill 5:89031b2f5316 2158 #define VL53LX_RANGE_RESULT__ACCUM_PHASE_0 0x0FAB
Charles MacNeill 5:89031b2f5316 2159
Charles MacNeill 5:89031b2f5316 2160 #define VL53LX_RANGE_RESULT__OFFSET_CORRECTED_RANGE 0x0FAC
Charles MacNeill 5:89031b2f5316 2161
Charles MacNeill 5:89031b2f5316 2162 #define VL53LX_RANGE_RESULT__OFFSET_CORRECTED_RANGE_HI 0x0FAC
Charles MacNeill 5:89031b2f5316 2163
Charles MacNeill 5:89031b2f5316 2164 #define VL53LX_RANGE_RESULT__OFFSET_CORRECTED_RANGE_LO 0x0FAD
Charles MacNeill 5:89031b2f5316 2165
Charles MacNeill 5:89031b2f5316 2166 #define VL53LX_SHADOW_PHASECAL_RESULT__VCSEL_START 0x0FAE
Charles MacNeill 5:89031b2f5316 2167
Charles MacNeill 5:89031b2f5316 2168 #define VL53LX_SHADOW_RESULT__INTERRUPT_STATUS 0x0FB0
Charles MacNeill 5:89031b2f5316 2169
Charles MacNeill 5:89031b2f5316 2170 #define VL53LX_SHADOW_RESULT__RANGE_STATUS 0x0FB1
Charles MacNeill 5:89031b2f5316 2171
Charles MacNeill 5:89031b2f5316 2172 #define VL53LX_SHADOW_RESULT__REPORT_STATUS 0x0FB2
Charles MacNeill 5:89031b2f5316 2173
Charles MacNeill 5:89031b2f5316 2174 #define VL53LX_SHADOW_RESULT__STREAM_COUNT 0x0FB3
Charles MacNeill 5:89031b2f5316 2175
Charles MacNeill 5:89031b2f5316 2176 #define VL53LX_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FB4
Charles MacNeill 5:89031b2f5316 2177
Charles MacNeill 5:89031b2f5316 2178 #define VL53LX_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FB4
Charles MacNeill 5:89031b2f5316 2179
Charles MacNeill 5:89031b2f5316 2180 #define VL53LX_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FB5
Charles MacNeill 5:89031b2f5316 2181
Charles MacNeill 5:89031b2f5316 2182 #define VL53LX_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FB6
Charles MacNeill 5:89031b2f5316 2183
Charles MacNeill 5:89031b2f5316 2184 #define VL53LX_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FB6
Charles MacNeill 5:89031b2f5316 2185
Charles MacNeill 5:89031b2f5316 2186 #define VL53LX_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FB7
Charles MacNeill 5:89031b2f5316 2187
Charles MacNeill 5:89031b2f5316 2188 #define VL53LX_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0FB8
Charles MacNeill 5:89031b2f5316 2189
Charles MacNeill 5:89031b2f5316 2190 #define VL53LX_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0FB8
Charles MacNeill 5:89031b2f5316 2191
Charles MacNeill 5:89031b2f5316 2192 #define VL53LX_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0FB9
Charles MacNeill 5:89031b2f5316 2193
Charles MacNeill 5:89031b2f5316 2194 #define VL53LX_SHADOW_RESULT__SIGMA_SD0 0x0FBA
Charles MacNeill 5:89031b2f5316 2195
Charles MacNeill 5:89031b2f5316 2196 #define VL53LX_SHADOW_RESULT__SIGMA_SD0_HI 0x0FBA
Charles MacNeill 5:89031b2f5316 2197
Charles MacNeill 5:89031b2f5316 2198 #define VL53LX_SHADOW_RESULT__SIGMA_SD0_LO 0x0FBB
Charles MacNeill 5:89031b2f5316 2199
Charles MacNeill 5:89031b2f5316 2200 #define VL53LX_SHADOW_RESULT__PHASE_SD0 0x0FBC
Charles MacNeill 5:89031b2f5316 2201
Charles MacNeill 5:89031b2f5316 2202 #define VL53LX_SHADOW_RESULT__PHASE_SD0_HI 0x0FBC
Charles MacNeill 5:89031b2f5316 2203
Charles MacNeill 5:89031b2f5316 2204 #define VL53LX_SHADOW_RESULT__PHASE_SD0_LO 0x0FBD
Charles MacNeill 5:89031b2f5316 2205
Charles MacNeill 5:89031b2f5316 2206 #define VL53LX_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0FBE
Charles MacNeill 5:89031b2f5316 2207
Charles MacNeill 5:89031b2f5316 2208 #define VL53LX_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0FBE
Charles MacNeill 5:89031b2f5316 2209
Charles MacNeill 5:89031b2f5316 2210 #define VL53LX_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0FBF
Charles MacNeill 5:89031b2f5316 2211
Charles MacNeill 5:89031b2f5316 2212 #define VL53LX_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0FC0
Charles MacNeill 5:89031b2f5316 2213
Charles MacNeill 5:89031b2f5316 2214 #define VL53LX_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0FC0
Charles MacNeill 5:89031b2f5316 2215
Charles MacNeill 5:89031b2f5316 2216 #define VL53LX_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0FC1
Charles MacNeill 5:89031b2f5316 2217
Charles MacNeill 5:89031b2f5316 2218 #define VL53LX_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC2
Charles MacNeill 5:89031b2f5316 2219
Charles MacNeill 5:89031b2f5316 2220 #define VL53LX_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC2
Charles MacNeill 5:89031b2f5316 2221
Charles MacNeill 5:89031b2f5316 2222 #define VL53LX_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC3
Charles MacNeill 5:89031b2f5316 2223
Charles MacNeill 5:89031b2f5316 2224 #define VL53LX_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC4
Charles MacNeill 5:89031b2f5316 2225
Charles MacNeill 5:89031b2f5316 2226 #define VL53LX_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC4
Charles MacNeill 5:89031b2f5316 2227
Charles MacNeill 5:89031b2f5316 2228 #define VL53LX_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC5
Charles MacNeill 5:89031b2f5316 2229
Charles MacNeill 5:89031b2f5316 2230 #define VL53LX_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FC6
Charles MacNeill 5:89031b2f5316 2231
Charles MacNeill 5:89031b2f5316 2232 #define VL53LX_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FC6
Charles MacNeill 5:89031b2f5316 2233
Charles MacNeill 5:89031b2f5316 2234 #define VL53LX_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FC7
Charles MacNeill 5:89031b2f5316 2235
Charles MacNeill 5:89031b2f5316 2236 #define VL53LX_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0FC8
Charles MacNeill 5:89031b2f5316 2237
Charles MacNeill 5:89031b2f5316 2238 #define VL53LX_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0FC8
Charles MacNeill 5:89031b2f5316 2239
Charles MacNeill 5:89031b2f5316 2240 #define VL53LX_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0FC9
Charles MacNeill 5:89031b2f5316 2241
Charles MacNeill 5:89031b2f5316 2242 #define VL53LX_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0FCA
Charles MacNeill 5:89031b2f5316 2243
Charles MacNeill 5:89031b2f5316 2244 #define VL53LX_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0FCA
Charles MacNeill 5:89031b2f5316 2245
Charles MacNeill 5:89031b2f5316 2246 #define VL53LX_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0FCB
Charles MacNeill 5:89031b2f5316 2247
Charles MacNeill 5:89031b2f5316 2248 #define VL53LX_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0FCC
Charles MacNeill 5:89031b2f5316 2249
Charles MacNeill 5:89031b2f5316 2250 #define VL53LX_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0FCC
Charles MacNeill 5:89031b2f5316 2251
Charles MacNeill 5:89031b2f5316 2252 #define VL53LX_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0FCD
Charles MacNeill 5:89031b2f5316 2253
Charles MacNeill 5:89031b2f5316 2254 #define VL53LX_SHADOW_RESULT__SIGMA_SD1 0x0FCE
Charles MacNeill 5:89031b2f5316 2255
Charles MacNeill 5:89031b2f5316 2256 #define VL53LX_SHADOW_RESULT__SIGMA_SD1_HI 0x0FCE
Charles MacNeill 5:89031b2f5316 2257
Charles MacNeill 5:89031b2f5316 2258 #define VL53LX_SHADOW_RESULT__SIGMA_SD1_LO 0x0FCF
Charles MacNeill 5:89031b2f5316 2259
Charles MacNeill 5:89031b2f5316 2260 #define VL53LX_SHADOW_RESULT__PHASE_SD1 0x0FD0
Charles MacNeill 5:89031b2f5316 2261
Charles MacNeill 5:89031b2f5316 2262 #define VL53LX_SHADOW_RESULT__PHASE_SD1_HI 0x0FD0
Charles MacNeill 5:89031b2f5316 2263
Charles MacNeill 5:89031b2f5316 2264 #define VL53LX_SHADOW_RESULT__PHASE_SD1_LO 0x0FD1
Charles MacNeill 5:89031b2f5316 2265
Charles MacNeill 5:89031b2f5316 2266 #define VL53LX_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0FD2
Charles MacNeill 5:89031b2f5316 2267
Charles MacNeill 5:89031b2f5316 2268 #define VL53LX_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0FD2
Charles MacNeill 5:89031b2f5316 2269
Charles MacNeill 5:89031b2f5316 2270 #define VL53LX_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0FD3
Charles MacNeill 5:89031b2f5316 2271
Charles MacNeill 5:89031b2f5316 2272 #define VL53LX_SHADOW_RESULT__SPARE_0_SD1 0x0FD4
Charles MacNeill 5:89031b2f5316 2273
Charles MacNeill 5:89031b2f5316 2274 #define VL53LX_SHADOW_RESULT__SPARE_0_SD1_HI 0x0FD4
Charles MacNeill 5:89031b2f5316 2275
Charles MacNeill 5:89031b2f5316 2276 #define VL53LX_SHADOW_RESULT__SPARE_0_SD1_LO 0x0FD5
Charles MacNeill 5:89031b2f5316 2277
Charles MacNeill 5:89031b2f5316 2278 #define VL53LX_SHADOW_RESULT__SPARE_1_SD1 0x0FD6
Charles MacNeill 5:89031b2f5316 2279
Charles MacNeill 5:89031b2f5316 2280 #define VL53LX_SHADOW_RESULT__SPARE_1_SD1_HI 0x0FD6
Charles MacNeill 5:89031b2f5316 2281
Charles MacNeill 5:89031b2f5316 2282 #define VL53LX_SHADOW_RESULT__SPARE_1_SD1_LO 0x0FD7
Charles MacNeill 5:89031b2f5316 2283
Charles MacNeill 5:89031b2f5316 2284 #define VL53LX_SHADOW_RESULT__SPARE_2_SD1 0x0FD8
Charles MacNeill 5:89031b2f5316 2285
Charles MacNeill 5:89031b2f5316 2286 #define VL53LX_SHADOW_RESULT__SPARE_2_SD1_HI 0x0FD8
Charles MacNeill 5:89031b2f5316 2287
Charles MacNeill 5:89031b2f5316 2288 #define VL53LX_SHADOW_RESULT__SPARE_2_SD1_LO 0x0FD9
Charles MacNeill 5:89031b2f5316 2289
Charles MacNeill 5:89031b2f5316 2290 #define VL53LX_SHADOW_RESULT__SPARE_3_SD1 0x0FDA
Charles MacNeill 5:89031b2f5316 2291
Charles MacNeill 5:89031b2f5316 2292 #define VL53LX_SHADOW_RESULT__THRESH_INFO 0x0FDB
Charles MacNeill 5:89031b2f5316 2293
Charles MacNeill 5:89031b2f5316 2294 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0FDC
Charles MacNeill 5:89031b2f5316 2295
Charles MacNeill 5:89031b2f5316 2296 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0FDC
Charles MacNeill 5:89031b2f5316 2297
Charles MacNeill 5:89031b2f5316 2298 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0FDD
Charles MacNeill 5:89031b2f5316 2299
Charles MacNeill 5:89031b2f5316 2300 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0FDE
Charles MacNeill 5:89031b2f5316 2301
Charles MacNeill 5:89031b2f5316 2302 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0FDF
Charles MacNeill 5:89031b2f5316 2303
Charles MacNeill 5:89031b2f5316 2304 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0FE0
Charles MacNeill 5:89031b2f5316 2305
Charles MacNeill 5:89031b2f5316 2306 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0FE0
Charles MacNeill 5:89031b2f5316 2307
Charles MacNeill 5:89031b2f5316 2308 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0FE1
Charles MacNeill 5:89031b2f5316 2309
Charles MacNeill 5:89031b2f5316 2310 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0FE2
Charles MacNeill 5:89031b2f5316 2311
Charles MacNeill 5:89031b2f5316 2312 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0FE3
Charles MacNeill 5:89031b2f5316 2313
Charles MacNeill 5:89031b2f5316 2314 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0FE4
Charles MacNeill 5:89031b2f5316 2315
Charles MacNeill 5:89031b2f5316 2316 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0FE4
Charles MacNeill 5:89031b2f5316 2317
Charles MacNeill 5:89031b2f5316 2318 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0FE5
Charles MacNeill 5:89031b2f5316 2319
Charles MacNeill 5:89031b2f5316 2320 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0FE6
Charles MacNeill 5:89031b2f5316 2321
Charles MacNeill 5:89031b2f5316 2322 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0FE7
Charles MacNeill 5:89031b2f5316 2323
Charles MacNeill 5:89031b2f5316 2324 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0FE8
Charles MacNeill 5:89031b2f5316 2325
Charles MacNeill 5:89031b2f5316 2326 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0FE8
Charles MacNeill 5:89031b2f5316 2327
Charles MacNeill 5:89031b2f5316 2328 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0FE9
Charles MacNeill 5:89031b2f5316 2329
Charles MacNeill 5:89031b2f5316 2330 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0FEA
Charles MacNeill 5:89031b2f5316 2331
Charles MacNeill 5:89031b2f5316 2332 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0FEB
Charles MacNeill 5:89031b2f5316 2333
Charles MacNeill 5:89031b2f5316 2334 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0FEC
Charles MacNeill 5:89031b2f5316 2335
Charles MacNeill 5:89031b2f5316 2336 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0FEC
Charles MacNeill 5:89031b2f5316 2337
Charles MacNeill 5:89031b2f5316 2338 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0FED
Charles MacNeill 5:89031b2f5316 2339
Charles MacNeill 5:89031b2f5316 2340 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0FEE
Charles MacNeill 5:89031b2f5316 2341
Charles MacNeill 5:89031b2f5316 2342 #define VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0FEF
Charles MacNeill 5:89031b2f5316 2343
Charles MacNeill 5:89031b2f5316 2344 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0FF0
Charles MacNeill 5:89031b2f5316 2345
Charles MacNeill 5:89031b2f5316 2346 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0FF0
Charles MacNeill 5:89031b2f5316 2347
Charles MacNeill 5:89031b2f5316 2348 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0FF1
Charles MacNeill 5:89031b2f5316 2349
Charles MacNeill 5:89031b2f5316 2350 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0FF2
Charles MacNeill 5:89031b2f5316 2351
Charles MacNeill 5:89031b2f5316 2352 #define VL53LX_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0FF3
Charles MacNeill 5:89031b2f5316 2353
Charles MacNeill 5:89031b2f5316 2354 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0FF4
Charles MacNeill 5:89031b2f5316 2355
Charles MacNeill 5:89031b2f5316 2356 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0FF4
Charles MacNeill 5:89031b2f5316 2357
Charles MacNeill 5:89031b2f5316 2358 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0FF5
Charles MacNeill 5:89031b2f5316 2359
Charles MacNeill 5:89031b2f5316 2360 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0FF6
Charles MacNeill 5:89031b2f5316 2361
Charles MacNeill 5:89031b2f5316 2362 #define VL53LX_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0FF7
Charles MacNeill 5:89031b2f5316 2363
Charles MacNeill 5:89031b2f5316 2364 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0FF8
Charles MacNeill 5:89031b2f5316 2365
Charles MacNeill 5:89031b2f5316 2366 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0FF8
Charles MacNeill 5:89031b2f5316 2367
Charles MacNeill 5:89031b2f5316 2368 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0FF9
Charles MacNeill 5:89031b2f5316 2369
Charles MacNeill 5:89031b2f5316 2370 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0FFA
Charles MacNeill 5:89031b2f5316 2371
Charles MacNeill 5:89031b2f5316 2372 #define VL53LX_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0FFB
Charles MacNeill 5:89031b2f5316 2373
Charles MacNeill 5:89031b2f5316 2374 #define VL53LX_SHADOW_RESULT_CORE__SPARE_0 0x0FFC
Charles MacNeill 5:89031b2f5316 2375
Charles MacNeill 5:89031b2f5316 2376 #define VL53LX_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x0FFE
Charles MacNeill 5:89031b2f5316 2377
Charles MacNeill 5:89031b2f5316 2378 #define VL53LX_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x0FFF
Charles MacNeill 5:89031b2f5316 2379
Charles MacNeill 5:89031b2f5316 2380
Charles MacNeill 5:89031b2f5316 2381 #endif
Charles MacNeill 5:89031b2f5316 2382
Charles MacNeill 5:89031b2f5316 2383