ST Expansion SW Team / VL53L3CX_mbed

Rename library

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L3CX_NoShield_1Sensor_poll_Mb06x VL53L3_NoShield_1Sensor_polling_Mb63 X_NUCLEO_53L3A2 53L3A2_Ranging

modules/vl53lx_register_funcs.c@7:7f1bbf370283, 2021-07-21 (annotated)

Committer:
charlesmn
Date:
Wed Jul 21 14:07:59 2021 +0000
Revision:
7:7f1bbf370283
Parent:
5:89031b2f5316 
Moved vl53l3cx_class.cpp and .h to 53l3a2_RangingClass

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Charles MacNeill 5:89031b2f5316 1
Charles MacNeill 5:89031b2f5316 2 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Charles MacNeill 5:89031b2f5316 3 /******************************************************************************
Charles MacNeill 5:89031b2f5316 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
Charles MacNeill 5:89031b2f5316 5
Charles MacNeill 5:89031b2f5316 6 This file is part of VL53LX and is dual licensed,
Charles MacNeill 5:89031b2f5316 7 either GPL-2.0+
Charles MacNeill 5:89031b2f5316 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 5:89031b2f5316 9 ******************************************************************************
Charles MacNeill 5:89031b2f5316 10 */
Charles MacNeill 5:89031b2f5316 11
Charles MacNeill 5:89031b2f5316 12
Charles MacNeill 5:89031b2f5316 13
Charles MacNeill 5:89031b2f5316 14
Charles MacNeill 5:89031b2f5316 15 #include "vl53lx_platform.h"
Charles MacNeill 5:89031b2f5316 16 #include <vl53lx_platform_log.h>
Charles MacNeill 5:89031b2f5316 17 #include "vl53lx_ll_def.h"
Charles MacNeill 5:89031b2f5316 18 #include "vl53lx_core.h"
Charles MacNeill 5:89031b2f5316 19 #include "vl53lx_register_map.h"
Charles MacNeill 5:89031b2f5316 20 #include "vl53lx_register_structs.h"
Charles MacNeill 5:89031b2f5316 21 #include "vl53lx_register_funcs.h"
Charles MacNeill 5:89031b2f5316 22
Charles MacNeill 5:89031b2f5316 23 #define LOG_FUNCTION_START(fmt, ...) \
Charles MacNeill 5:89031b2f5316 24 _LOG_FUNCTION_START(VL53LX_TRACE_MODULE_REGISTERS, fmt, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 25 #define LOG_FUNCTION_END(status, ...) \
Charles MacNeill 5:89031b2f5316 26 _LOG_FUNCTION_END(VL53LX_TRACE_MODULE_REGISTERS, status, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 27 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
Charles MacNeill 5:89031b2f5316 28 _LOG_FUNCTION_END_FMT(VL53LX_TRACE_MODULE_REGISTERS,\
Charles MacNeill 5:89031b2f5316 29 status, fmt, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 30
Charles MacNeill 5:89031b2f5316 31
Charles MacNeill 5:89031b2f5316 32 VL53LX_Error VL53LX_i2c_encode_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 33 VL53LX_static_nvm_managed_t *pdata,
Charles MacNeill 5:89031b2f5316 34 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 35 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 36 {
Charles MacNeill 5:89031b2f5316 37
Charles MacNeill 5:89031b2f5316 38
Charles MacNeill 5:89031b2f5316 39 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 40
Charles MacNeill 5:89031b2f5316 41 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 42
Charles MacNeill 5:89031b2f5316 43 if (buf_size < VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 44 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 45
Charles MacNeill 5:89031b2f5316 46 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 47 pdata->i2c_slave__device_address & 0x7F;
Charles MacNeill 5:89031b2f5316 48 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 49 pdata->ana_config__vhv_ref_sel_vddpix & 0xF;
Charles MacNeill 5:89031b2f5316 50 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 51 pdata->ana_config__vhv_ref_sel_vquench & 0x7F;
Charles MacNeill 5:89031b2f5316 52 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 53 pdata->ana_config__reg_avdd1v2_sel & 0x3;
Charles MacNeill 5:89031b2f5316 54 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 55 pdata->ana_config__fast_osc__trim & 0x7F;
Charles MacNeill 5:89031b2f5316 56 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 57 pdata->osc_measured__fast_osc__frequency,
Charles MacNeill 5:89031b2f5316 58 2,
Charles MacNeill 5:89031b2f5316 59 pbuffer + 5);
Charles MacNeill 5:89031b2f5316 60 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 61 pdata->vhv_config__timeout_macrop_loop_bound;
Charles MacNeill 5:89031b2f5316 62 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 63 pdata->vhv_config__count_thresh;
Charles MacNeill 5:89031b2f5316 64 *(pbuffer + 9) =
Charles MacNeill 5:89031b2f5316 65 pdata->vhv_config__offset & 0x3F;
Charles MacNeill 5:89031b2f5316 66 *(pbuffer + 10) =
Charles MacNeill 5:89031b2f5316 67 pdata->vhv_config__init;
Charles MacNeill 5:89031b2f5316 68 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 69
Charles MacNeill 5:89031b2f5316 70
Charles MacNeill 5:89031b2f5316 71 return status;
Charles MacNeill 5:89031b2f5316 72 }
Charles MacNeill 5:89031b2f5316 73
Charles MacNeill 5:89031b2f5316 74
Charles MacNeill 5:89031b2f5316 75 VL53LX_Error VL53LX_i2c_decode_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 76 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 77 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 78 VL53LX_static_nvm_managed_t *pdata)
Charles MacNeill 5:89031b2f5316 79 {
Charles MacNeill 5:89031b2f5316 80
Charles MacNeill 5:89031b2f5316 81
Charles MacNeill 5:89031b2f5316 82 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 83
Charles MacNeill 5:89031b2f5316 84 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 85
Charles MacNeill 5:89031b2f5316 86 if (buf_size < VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 87 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 88
Charles MacNeill 5:89031b2f5316 89 pdata->i2c_slave__device_address =
Charles MacNeill 5:89031b2f5316 90 (*(pbuffer + 0)) & 0x7F;
Charles MacNeill 5:89031b2f5316 91 pdata->ana_config__vhv_ref_sel_vddpix =
Charles MacNeill 5:89031b2f5316 92 (*(pbuffer + 1)) & 0xF;
Charles MacNeill 5:89031b2f5316 93 pdata->ana_config__vhv_ref_sel_vquench =
Charles MacNeill 5:89031b2f5316 94 (*(pbuffer + 2)) & 0x7F;
Charles MacNeill 5:89031b2f5316 95 pdata->ana_config__reg_avdd1v2_sel =
Charles MacNeill 5:89031b2f5316 96 (*(pbuffer + 3)) & 0x3;
Charles MacNeill 5:89031b2f5316 97 pdata->ana_config__fast_osc__trim =
Charles MacNeill 5:89031b2f5316 98 (*(pbuffer + 4)) & 0x7F;
Charles MacNeill 5:89031b2f5316 99 pdata->osc_measured__fast_osc__frequency =
Charles MacNeill 5:89031b2f5316 100 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 5));
Charles MacNeill 5:89031b2f5316 101 pdata->vhv_config__timeout_macrop_loop_bound =
Charles MacNeill 5:89031b2f5316 102 (*(pbuffer + 7));
Charles MacNeill 5:89031b2f5316 103 pdata->vhv_config__count_thresh =
Charles MacNeill 5:89031b2f5316 104 (*(pbuffer + 8));
Charles MacNeill 5:89031b2f5316 105 pdata->vhv_config__offset =
Charles MacNeill 5:89031b2f5316 106 (*(pbuffer + 9)) & 0x3F;
Charles MacNeill 5:89031b2f5316 107 pdata->vhv_config__init =
Charles MacNeill 5:89031b2f5316 108 (*(pbuffer + 10));
Charles MacNeill 5:89031b2f5316 109
Charles MacNeill 5:89031b2f5316 110 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 111
Charles MacNeill 5:89031b2f5316 112 return status;
Charles MacNeill 5:89031b2f5316 113 }
Charles MacNeill 5:89031b2f5316 114
Charles MacNeill 5:89031b2f5316 115
Charles MacNeill 5:89031b2f5316 116 VL53LX_Error VL53LX_set_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 117 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 118 VL53LX_static_nvm_managed_t *pdata)
Charles MacNeill 5:89031b2f5316 119 {
Charles MacNeill 5:89031b2f5316 120
Charles MacNeill 5:89031b2f5316 121
Charles MacNeill 5:89031b2f5316 122 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 123 uint8_t comms_buffer[VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 124
Charles MacNeill 5:89031b2f5316 125 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 126
Charles MacNeill 5:89031b2f5316 127 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 128 status = VL53LX_i2c_encode_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 129 pdata,
Charles MacNeill 5:89031b2f5316 130 VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 131 comms_buffer);
Charles MacNeill 5:89031b2f5316 132
Charles MacNeill 5:89031b2f5316 133 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 134 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 135 Dev,
Charles MacNeill 5:89031b2f5316 136 VL53LX_I2C_SLAVE__DEVICE_ADDRESS,
Charles MacNeill 5:89031b2f5316 137 comms_buffer,
Charles MacNeill 5:89031b2f5316 138 VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 139
Charles MacNeill 5:89031b2f5316 140 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 141
Charles MacNeill 5:89031b2f5316 142 return status;
Charles MacNeill 5:89031b2f5316 143 }
Charles MacNeill 5:89031b2f5316 144
Charles MacNeill 5:89031b2f5316 145
Charles MacNeill 5:89031b2f5316 146 VL53LX_Error VL53LX_get_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 147 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 148 VL53LX_static_nvm_managed_t *pdata)
Charles MacNeill 5:89031b2f5316 149 {
Charles MacNeill 5:89031b2f5316 150
Charles MacNeill 5:89031b2f5316 151
Charles MacNeill 5:89031b2f5316 152 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 153 uint8_t comms_buffer[VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 154
Charles MacNeill 5:89031b2f5316 155 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 156
Charles MacNeill 5:89031b2f5316 157 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 158 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 159 Dev,
Charles MacNeill 5:89031b2f5316 160 VL53LX_I2C_SLAVE__DEVICE_ADDRESS,
Charles MacNeill 5:89031b2f5316 161 comms_buffer,
Charles MacNeill 5:89031b2f5316 162 VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 163
Charles MacNeill 5:89031b2f5316 164 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 165 status = VL53LX_i2c_decode_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 166 VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 167 comms_buffer,
Charles MacNeill 5:89031b2f5316 168 pdata);
Charles MacNeill 5:89031b2f5316 169
Charles MacNeill 5:89031b2f5316 170 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 171
Charles MacNeill 5:89031b2f5316 172 return status;
Charles MacNeill 5:89031b2f5316 173 }
Charles MacNeill 5:89031b2f5316 174
Charles MacNeill 5:89031b2f5316 175
Charles MacNeill 5:89031b2f5316 176 VL53LX_Error VL53LX_i2c_encode_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 177 VL53LX_customer_nvm_managed_t *pdata,
Charles MacNeill 5:89031b2f5316 178 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 179 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 180 {
Charles MacNeill 5:89031b2f5316 181
Charles MacNeill 5:89031b2f5316 182
Charles MacNeill 5:89031b2f5316 183 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 184
Charles MacNeill 5:89031b2f5316 185 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 186
Charles MacNeill 5:89031b2f5316 187 if (buf_size < VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 188 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 189
Charles MacNeill 5:89031b2f5316 190 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 191 pdata->global_config__spad_enables_ref_0;
Charles MacNeill 5:89031b2f5316 192 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 193 pdata->global_config__spad_enables_ref_1;
Charles MacNeill 5:89031b2f5316 194 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 195 pdata->global_config__spad_enables_ref_2;
Charles MacNeill 5:89031b2f5316 196 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 197 pdata->global_config__spad_enables_ref_3;
Charles MacNeill 5:89031b2f5316 198 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 199 pdata->global_config__spad_enables_ref_4;
Charles MacNeill 5:89031b2f5316 200 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 201 pdata->global_config__spad_enables_ref_5 & 0xF;
Charles MacNeill 5:89031b2f5316 202 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 203 pdata->global_config__ref_en_start_select;
Charles MacNeill 5:89031b2f5316 204 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 205 pdata->ref_spad_man__num_requested_ref_spads & 0x3F;
Charles MacNeill 5:89031b2f5316 206 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 207 pdata->ref_spad_man__ref_location & 0x3;
Charles MacNeill 5:89031b2f5316 208 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 209 pdata->algo__crosstalk_compensation_plane_offset_kcps,
Charles MacNeill 5:89031b2f5316 210 2,
Charles MacNeill 5:89031b2f5316 211 pbuffer + 9);
Charles MacNeill 5:89031b2f5316 212 VL53LX_i2c_encode_int16_t(
Charles MacNeill 5:89031b2f5316 213 pdata->algo__crosstalk_compensation_x_plane_gradient_kcps,
Charles MacNeill 5:89031b2f5316 214 2,
Charles MacNeill 5:89031b2f5316 215 pbuffer + 11);
Charles MacNeill 5:89031b2f5316 216 VL53LX_i2c_encode_int16_t(
Charles MacNeill 5:89031b2f5316 217 pdata->algo__crosstalk_compensation_y_plane_gradient_kcps,
Charles MacNeill 5:89031b2f5316 218 2,
Charles MacNeill 5:89031b2f5316 219 pbuffer + 13);
Charles MacNeill 5:89031b2f5316 220 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 221 pdata->ref_spad_char__total_rate_target_mcps,
Charles MacNeill 5:89031b2f5316 222 2,
Charles MacNeill 5:89031b2f5316 223 pbuffer + 15);
Charles MacNeill 5:89031b2f5316 224 VL53LX_i2c_encode_int16_t(
Charles MacNeill 5:89031b2f5316 225 pdata->algo__part_to_part_range_offset_mm & 0x1FFF,
Charles MacNeill 5:89031b2f5316 226 2,
Charles MacNeill 5:89031b2f5316 227 pbuffer + 17);
Charles MacNeill 5:89031b2f5316 228 VL53LX_i2c_encode_int16_t(
Charles MacNeill 5:89031b2f5316 229 pdata->mm_config__inner_offset_mm,
Charles MacNeill 5:89031b2f5316 230 2,
Charles MacNeill 5:89031b2f5316 231 pbuffer + 19);
Charles MacNeill 5:89031b2f5316 232 VL53LX_i2c_encode_int16_t(
Charles MacNeill 5:89031b2f5316 233 pdata->mm_config__outer_offset_mm,
Charles MacNeill 5:89031b2f5316 234 2,
Charles MacNeill 5:89031b2f5316 235 pbuffer + 21);
Charles MacNeill 5:89031b2f5316 236 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 237
Charles MacNeill 5:89031b2f5316 238
Charles MacNeill 5:89031b2f5316 239 return status;
Charles MacNeill 5:89031b2f5316 240 }
Charles MacNeill 5:89031b2f5316 241
Charles MacNeill 5:89031b2f5316 242
Charles MacNeill 5:89031b2f5316 243 VL53LX_Error VL53LX_i2c_decode_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 244 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 245 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 246 VL53LX_customer_nvm_managed_t *pdata)
Charles MacNeill 5:89031b2f5316 247 {
Charles MacNeill 5:89031b2f5316 248
Charles MacNeill 5:89031b2f5316 249
Charles MacNeill 5:89031b2f5316 250 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 251
Charles MacNeill 5:89031b2f5316 252 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 253
Charles MacNeill 5:89031b2f5316 254 if (buf_size < VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 255 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 256
Charles MacNeill 5:89031b2f5316 257 pdata->global_config__spad_enables_ref_0 =
Charles MacNeill 5:89031b2f5316 258 (*(pbuffer + 0));
Charles MacNeill 5:89031b2f5316 259 pdata->global_config__spad_enables_ref_1 =
Charles MacNeill 5:89031b2f5316 260 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 261 pdata->global_config__spad_enables_ref_2 =
Charles MacNeill 5:89031b2f5316 262 (*(pbuffer + 2));
Charles MacNeill 5:89031b2f5316 263 pdata->global_config__spad_enables_ref_3 =
Charles MacNeill 5:89031b2f5316 264 (*(pbuffer + 3));
Charles MacNeill 5:89031b2f5316 265 pdata->global_config__spad_enables_ref_4 =
Charles MacNeill 5:89031b2f5316 266 (*(pbuffer + 4));
Charles MacNeill 5:89031b2f5316 267 pdata->global_config__spad_enables_ref_5 =
Charles MacNeill 5:89031b2f5316 268 (*(pbuffer + 5)) & 0xF;
Charles MacNeill 5:89031b2f5316 269 pdata->global_config__ref_en_start_select =
Charles MacNeill 5:89031b2f5316 270 (*(pbuffer + 6));
Charles MacNeill 5:89031b2f5316 271 pdata->ref_spad_man__num_requested_ref_spads =
Charles MacNeill 5:89031b2f5316 272 (*(pbuffer + 7)) & 0x3F;
Charles MacNeill 5:89031b2f5316 273 pdata->ref_spad_man__ref_location =
Charles MacNeill 5:89031b2f5316 274 (*(pbuffer + 8)) & 0x3;
Charles MacNeill 5:89031b2f5316 275 pdata->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 276 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 9));
Charles MacNeill 5:89031b2f5316 277 pdata->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 278 (VL53LX_i2c_decode_int16_t(2, pbuffer + 11));
Charles MacNeill 5:89031b2f5316 279 pdata->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 280 (VL53LX_i2c_decode_int16_t(2, pbuffer + 13));
Charles MacNeill 5:89031b2f5316 281 pdata->ref_spad_char__total_rate_target_mcps =
Charles MacNeill 5:89031b2f5316 282 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 15));
Charles MacNeill 5:89031b2f5316 283 pdata->algo__part_to_part_range_offset_mm =
Charles MacNeill 5:89031b2f5316 284 (VL53LX_i2c_decode_int16_t(2, pbuffer + 17)) & 0x1FFF;
Charles MacNeill 5:89031b2f5316 285 pdata->mm_config__inner_offset_mm =
Charles MacNeill 5:89031b2f5316 286 (VL53LX_i2c_decode_int16_t(2, pbuffer + 19));
Charles MacNeill 5:89031b2f5316 287 pdata->mm_config__outer_offset_mm =
Charles MacNeill 5:89031b2f5316 288 (VL53LX_i2c_decode_int16_t(2, pbuffer + 21));
Charles MacNeill 5:89031b2f5316 289
Charles MacNeill 5:89031b2f5316 290 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 291
Charles MacNeill 5:89031b2f5316 292 return status;
Charles MacNeill 5:89031b2f5316 293 }
Charles MacNeill 5:89031b2f5316 294
Charles MacNeill 5:89031b2f5316 295
Charles MacNeill 5:89031b2f5316 296 VL53LX_Error VL53LX_set_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 297 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 298 VL53LX_customer_nvm_managed_t *pdata)
Charles MacNeill 5:89031b2f5316 299 {
Charles MacNeill 5:89031b2f5316 300
Charles MacNeill 5:89031b2f5316 301
Charles MacNeill 5:89031b2f5316 302 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 303 uint8_t comms_buffer[VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 304
Charles MacNeill 5:89031b2f5316 305 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 306
Charles MacNeill 5:89031b2f5316 307 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 308 status = VL53LX_i2c_encode_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 309 pdata,
Charles MacNeill 5:89031b2f5316 310 VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 311 comms_buffer);
Charles MacNeill 5:89031b2f5316 312
Charles MacNeill 5:89031b2f5316 313 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 314 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 315 Dev,
Charles MacNeill 5:89031b2f5316 316 VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_REF_0,
Charles MacNeill 5:89031b2f5316 317 comms_buffer,
Charles MacNeill 5:89031b2f5316 318 VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 319
Charles MacNeill 5:89031b2f5316 320 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 321
Charles MacNeill 5:89031b2f5316 322 return status;
Charles MacNeill 5:89031b2f5316 323 }
Charles MacNeill 5:89031b2f5316 324
Charles MacNeill 5:89031b2f5316 325
Charles MacNeill 5:89031b2f5316 326 VL53LX_Error VL53LX_get_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 327 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 328 VL53LX_customer_nvm_managed_t *pdata)
Charles MacNeill 5:89031b2f5316 329 {
Charles MacNeill 5:89031b2f5316 330
Charles MacNeill 5:89031b2f5316 331
Charles MacNeill 5:89031b2f5316 332 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 333 uint8_t comms_buffer[VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 334 int16_t offset;
Charles MacNeill 5:89031b2f5316 335
Charles MacNeill 5:89031b2f5316 336 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 337
Charles MacNeill 5:89031b2f5316 338 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 339 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 340 Dev,
Charles MacNeill 5:89031b2f5316 341 VL53LX_GLOBAL_CONFIG__SPAD_ENABLES_REF_0,
Charles MacNeill 5:89031b2f5316 342 comms_buffer,
Charles MacNeill 5:89031b2f5316 343 VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 344
Charles MacNeill 5:89031b2f5316 345 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 346 status = VL53LX_i2c_decode_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 347 VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 348 comms_buffer,
Charles MacNeill 5:89031b2f5316 349 pdata);
Charles MacNeill 5:89031b2f5316 350
Charles MacNeill 5:89031b2f5316 351 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 352 offset = pdata->algo__part_to_part_range_offset_mm;
Charles MacNeill 5:89031b2f5316 353 offset = offset / 4;
Charles MacNeill 5:89031b2f5316 354 if (offset >= 1024)
Charles MacNeill 5:89031b2f5316 355 offset -= 2048;
Charles MacNeill 5:89031b2f5316 356 pdata->algo__part_to_part_range_offset_mm = 0;
Charles MacNeill 5:89031b2f5316 357 pdata->mm_config__inner_offset_mm = offset;
Charles MacNeill 5:89031b2f5316 358 pdata->mm_config__outer_offset_mm = offset;
Charles MacNeill 5:89031b2f5316 359 }
Charles MacNeill 5:89031b2f5316 360
Charles MacNeill 5:89031b2f5316 361 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 362
Charles MacNeill 5:89031b2f5316 363 return status;
Charles MacNeill 5:89031b2f5316 364 }
Charles MacNeill 5:89031b2f5316 365
Charles MacNeill 5:89031b2f5316 366
Charles MacNeill 5:89031b2f5316 367 VL53LX_Error VL53LX_i2c_encode_static_config(
Charles MacNeill 5:89031b2f5316 368 VL53LX_static_config_t *pdata,
Charles MacNeill 5:89031b2f5316 369 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 370 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 371 {
Charles MacNeill 5:89031b2f5316 372
Charles MacNeill 5:89031b2f5316 373
Charles MacNeill 5:89031b2f5316 374 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 375
Charles MacNeill 5:89031b2f5316 376 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 377
Charles MacNeill 5:89031b2f5316 378 if (buf_size < VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 379 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 380
Charles MacNeill 5:89031b2f5316 381 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 382 pdata->dss_config__target_total_rate_mcps,
Charles MacNeill 5:89031b2f5316 383 2,
Charles MacNeill 5:89031b2f5316 384 pbuffer + 0);
Charles MacNeill 5:89031b2f5316 385 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 386 pdata->debug__ctrl & 0x1;
Charles MacNeill 5:89031b2f5316 387 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 388 pdata->test_mode__ctrl & 0xF;
Charles MacNeill 5:89031b2f5316 389 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 390 pdata->clk_gating__ctrl & 0xF;
Charles MacNeill 5:89031b2f5316 391 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 392 pdata->nvm_bist__ctrl & 0x1F;
Charles MacNeill 5:89031b2f5316 393 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 394 pdata->nvm_bist__num_nvm_words & 0x7F;
Charles MacNeill 5:89031b2f5316 395 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 396 pdata->nvm_bist__start_address & 0x7F;
Charles MacNeill 5:89031b2f5316 397 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 398 pdata->host_if__status & 0x1;
Charles MacNeill 5:89031b2f5316 399 *(pbuffer + 9) =
Charles MacNeill 5:89031b2f5316 400 pdata->pad_i2c_hv__config;
Charles MacNeill 5:89031b2f5316 401 *(pbuffer + 10) =
Charles MacNeill 5:89031b2f5316 402 pdata->pad_i2c_hv__extsup_config & 0x1;
Charles MacNeill 5:89031b2f5316 403 *(pbuffer + 11) =
Charles MacNeill 5:89031b2f5316 404 pdata->gpio_hv_pad__ctrl & 0x3;
Charles MacNeill 5:89031b2f5316 405 *(pbuffer + 12) =
Charles MacNeill 5:89031b2f5316 406 pdata->gpio_hv_mux__ctrl & 0x1F;
Charles MacNeill 5:89031b2f5316 407 *(pbuffer + 13) =
Charles MacNeill 5:89031b2f5316 408 pdata->gpio__tio_hv_status & 0x3;
Charles MacNeill 5:89031b2f5316 409 *(pbuffer + 14) =
Charles MacNeill 5:89031b2f5316 410 pdata->gpio__fio_hv_status & 0x3;
Charles MacNeill 5:89031b2f5316 411 *(pbuffer + 15) =
Charles MacNeill 5:89031b2f5316 412 pdata->ana_config__spad_sel_pswidth & 0x7;
Charles MacNeill 5:89031b2f5316 413 *(pbuffer + 16) =
Charles MacNeill 5:89031b2f5316 414 pdata->ana_config__vcsel_pulse_width_offset & 0x1F;
Charles MacNeill 5:89031b2f5316 415 *(pbuffer + 17) =
Charles MacNeill 5:89031b2f5316 416 pdata->ana_config__fast_osc__config_ctrl & 0x1;
Charles MacNeill 5:89031b2f5316 417 *(pbuffer + 18) =
Charles MacNeill 5:89031b2f5316 418 pdata->sigma_estimator__effective_pulse_width_ns;
Charles MacNeill 5:89031b2f5316 419 *(pbuffer + 19) =
Charles MacNeill 5:89031b2f5316 420 pdata->sigma_estimator__effective_ambient_width_ns;
Charles MacNeill 5:89031b2f5316 421 *(pbuffer + 20) =
Charles MacNeill 5:89031b2f5316 422 pdata->sigma_estimator__sigma_ref_mm;
Charles MacNeill 5:89031b2f5316 423 *(pbuffer + 21) =
Charles MacNeill 5:89031b2f5316 424 pdata->algo__crosstalk_compensation_valid_height_mm;
Charles MacNeill 5:89031b2f5316 425 *(pbuffer + 22) =
Charles MacNeill 5:89031b2f5316 426 pdata->spare_host_config__static_config_spare_0;
Charles MacNeill 5:89031b2f5316 427 *(pbuffer + 23) =
Charles MacNeill 5:89031b2f5316 428 pdata->spare_host_config__static_config_spare_1;
Charles MacNeill 5:89031b2f5316 429 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 430 pdata->algo__range_ignore_threshold_mcps,
Charles MacNeill 5:89031b2f5316 431 2,
Charles MacNeill 5:89031b2f5316 432 pbuffer + 24);
Charles MacNeill 5:89031b2f5316 433 *(pbuffer + 26) =
Charles MacNeill 5:89031b2f5316 434 pdata->algo__range_ignore_valid_height_mm;
Charles MacNeill 5:89031b2f5316 435 *(pbuffer + 27) =
Charles MacNeill 5:89031b2f5316 436 pdata->algo__range_min_clip;
Charles MacNeill 5:89031b2f5316 437 *(pbuffer + 28) =
Charles MacNeill 5:89031b2f5316 438 pdata->algo__consistency_check__tolerance & 0xF;
Charles MacNeill 5:89031b2f5316 439 *(pbuffer + 29) =
Charles MacNeill 5:89031b2f5316 440 pdata->spare_host_config__static_config_spare_2;
Charles MacNeill 5:89031b2f5316 441 *(pbuffer + 30) =
Charles MacNeill 5:89031b2f5316 442 pdata->sd_config__reset_stages_msb & 0xF;
Charles MacNeill 5:89031b2f5316 443 *(pbuffer + 31) =
Charles MacNeill 5:89031b2f5316 444 pdata->sd_config__reset_stages_lsb;
Charles MacNeill 5:89031b2f5316 445 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 446
Charles MacNeill 5:89031b2f5316 447
Charles MacNeill 5:89031b2f5316 448 return status;
Charles MacNeill 5:89031b2f5316 449 }
Charles MacNeill 5:89031b2f5316 450
Charles MacNeill 5:89031b2f5316 451
Charles MacNeill 5:89031b2f5316 452 VL53LX_Error VL53LX_i2c_decode_static_config(
Charles MacNeill 5:89031b2f5316 453 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 454 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 455 VL53LX_static_config_t *pdata)
Charles MacNeill 5:89031b2f5316 456 {
Charles MacNeill 5:89031b2f5316 457
Charles MacNeill 5:89031b2f5316 458
Charles MacNeill 5:89031b2f5316 459 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 460
Charles MacNeill 5:89031b2f5316 461 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 462
Charles MacNeill 5:89031b2f5316 463 if (buf_size < VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 464 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 465
Charles MacNeill 5:89031b2f5316 466 pdata->dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 467 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 0));
Charles MacNeill 5:89031b2f5316 468 pdata->debug__ctrl =
Charles MacNeill 5:89031b2f5316 469 (*(pbuffer + 2)) & 0x1;
Charles MacNeill 5:89031b2f5316 470 pdata->test_mode__ctrl =
Charles MacNeill 5:89031b2f5316 471 (*(pbuffer + 3)) & 0xF;
Charles MacNeill 5:89031b2f5316 472 pdata->clk_gating__ctrl =
Charles MacNeill 5:89031b2f5316 473 (*(pbuffer + 4)) & 0xF;
Charles MacNeill 5:89031b2f5316 474 pdata->nvm_bist__ctrl =
Charles MacNeill 5:89031b2f5316 475 (*(pbuffer + 5)) & 0x1F;
Charles MacNeill 5:89031b2f5316 476 pdata->nvm_bist__num_nvm_words =
Charles MacNeill 5:89031b2f5316 477 (*(pbuffer + 6)) & 0x7F;
Charles MacNeill 5:89031b2f5316 478 pdata->nvm_bist__start_address =
Charles MacNeill 5:89031b2f5316 479 (*(pbuffer + 7)) & 0x7F;
Charles MacNeill 5:89031b2f5316 480 pdata->host_if__status =
Charles MacNeill 5:89031b2f5316 481 (*(pbuffer + 8)) & 0x1;
Charles MacNeill 5:89031b2f5316 482 pdata->pad_i2c_hv__config =
Charles MacNeill 5:89031b2f5316 483 (*(pbuffer + 9));
Charles MacNeill 5:89031b2f5316 484 pdata->pad_i2c_hv__extsup_config =
Charles MacNeill 5:89031b2f5316 485 (*(pbuffer + 10)) & 0x1;
Charles MacNeill 5:89031b2f5316 486 pdata->gpio_hv_pad__ctrl =
Charles MacNeill 5:89031b2f5316 487 (*(pbuffer + 11)) & 0x3;
Charles MacNeill 5:89031b2f5316 488 pdata->gpio_hv_mux__ctrl =
Charles MacNeill 5:89031b2f5316 489 (*(pbuffer + 12)) & 0x1F;
Charles MacNeill 5:89031b2f5316 490 pdata->gpio__tio_hv_status =
Charles MacNeill 5:89031b2f5316 491 (*(pbuffer + 13)) & 0x3;
Charles MacNeill 5:89031b2f5316 492 pdata->gpio__fio_hv_status =
Charles MacNeill 5:89031b2f5316 493 (*(pbuffer + 14)) & 0x3;
Charles MacNeill 5:89031b2f5316 494 pdata->ana_config__spad_sel_pswidth =
Charles MacNeill 5:89031b2f5316 495 (*(pbuffer + 15)) & 0x7;
Charles MacNeill 5:89031b2f5316 496 pdata->ana_config__vcsel_pulse_width_offset =
Charles MacNeill 5:89031b2f5316 497 (*(pbuffer + 16)) & 0x1F;
Charles MacNeill 5:89031b2f5316 498 pdata->ana_config__fast_osc__config_ctrl =
Charles MacNeill 5:89031b2f5316 499 (*(pbuffer + 17)) & 0x1;
Charles MacNeill 5:89031b2f5316 500 pdata->sigma_estimator__effective_pulse_width_ns =
Charles MacNeill 5:89031b2f5316 501 (*(pbuffer + 18));
Charles MacNeill 5:89031b2f5316 502 pdata->sigma_estimator__effective_ambient_width_ns =
Charles MacNeill 5:89031b2f5316 503 (*(pbuffer + 19));
Charles MacNeill 5:89031b2f5316 504 pdata->sigma_estimator__sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 505 (*(pbuffer + 20));
Charles MacNeill 5:89031b2f5316 506 pdata->algo__crosstalk_compensation_valid_height_mm =
Charles MacNeill 5:89031b2f5316 507 (*(pbuffer + 21));
Charles MacNeill 5:89031b2f5316 508 pdata->spare_host_config__static_config_spare_0 =
Charles MacNeill 5:89031b2f5316 509 (*(pbuffer + 22));
Charles MacNeill 5:89031b2f5316 510 pdata->spare_host_config__static_config_spare_1 =
Charles MacNeill 5:89031b2f5316 511 (*(pbuffer + 23));
Charles MacNeill 5:89031b2f5316 512 pdata->algo__range_ignore_threshold_mcps =
Charles MacNeill 5:89031b2f5316 513 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 24));
Charles MacNeill 5:89031b2f5316 514 pdata->algo__range_ignore_valid_height_mm =
Charles MacNeill 5:89031b2f5316 515 (*(pbuffer + 26));
Charles MacNeill 5:89031b2f5316 516 pdata->algo__range_min_clip =
Charles MacNeill 5:89031b2f5316 517 (*(pbuffer + 27));
Charles MacNeill 5:89031b2f5316 518 pdata->algo__consistency_check__tolerance =
Charles MacNeill 5:89031b2f5316 519 (*(pbuffer + 28)) & 0xF;
Charles MacNeill 5:89031b2f5316 520 pdata->spare_host_config__static_config_spare_2 =
Charles MacNeill 5:89031b2f5316 521 (*(pbuffer + 29));
Charles MacNeill 5:89031b2f5316 522 pdata->sd_config__reset_stages_msb =
Charles MacNeill 5:89031b2f5316 523 (*(pbuffer + 30)) & 0xF;
Charles MacNeill 5:89031b2f5316 524 pdata->sd_config__reset_stages_lsb =
Charles MacNeill 5:89031b2f5316 525 (*(pbuffer + 31));
Charles MacNeill 5:89031b2f5316 526
Charles MacNeill 5:89031b2f5316 527 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 528
Charles MacNeill 5:89031b2f5316 529 return status;
Charles MacNeill 5:89031b2f5316 530 }
Charles MacNeill 5:89031b2f5316 531
Charles MacNeill 5:89031b2f5316 532
Charles MacNeill 5:89031b2f5316 533 VL53LX_Error VL53LX_set_static_config(
Charles MacNeill 5:89031b2f5316 534 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 535 VL53LX_static_config_t *pdata)
Charles MacNeill 5:89031b2f5316 536 {
Charles MacNeill 5:89031b2f5316 537
Charles MacNeill 5:89031b2f5316 538
Charles MacNeill 5:89031b2f5316 539 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 540 uint8_t comms_buffer[VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 541
Charles MacNeill 5:89031b2f5316 542 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 543
Charles MacNeill 5:89031b2f5316 544 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 545 status = VL53LX_i2c_encode_static_config(
Charles MacNeill 5:89031b2f5316 546 pdata,
Charles MacNeill 5:89031b2f5316 547 VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 548 comms_buffer);
Charles MacNeill 5:89031b2f5316 549
Charles MacNeill 5:89031b2f5316 550 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 551 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 552 Dev,
Charles MacNeill 5:89031b2f5316 553 VL53LX_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS,
Charles MacNeill 5:89031b2f5316 554 comms_buffer,
Charles MacNeill 5:89031b2f5316 555 VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 556
Charles MacNeill 5:89031b2f5316 557 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 558
Charles MacNeill 5:89031b2f5316 559 return status;
Charles MacNeill 5:89031b2f5316 560 }
Charles MacNeill 5:89031b2f5316 561
Charles MacNeill 5:89031b2f5316 562
Charles MacNeill 5:89031b2f5316 563 VL53LX_Error VL53LX_get_static_config(
Charles MacNeill 5:89031b2f5316 564 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 565 VL53LX_static_config_t *pdata)
Charles MacNeill 5:89031b2f5316 566 {
Charles MacNeill 5:89031b2f5316 567
Charles MacNeill 5:89031b2f5316 568
Charles MacNeill 5:89031b2f5316 569 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 570 uint8_t comms_buffer[VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 571
Charles MacNeill 5:89031b2f5316 572 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 573
Charles MacNeill 5:89031b2f5316 574 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 575 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 576 Dev,
Charles MacNeill 5:89031b2f5316 577 VL53LX_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS,
Charles MacNeill 5:89031b2f5316 578 comms_buffer,
Charles MacNeill 5:89031b2f5316 579 VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 580
Charles MacNeill 5:89031b2f5316 581 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 582 status = VL53LX_i2c_decode_static_config(
Charles MacNeill 5:89031b2f5316 583 VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 584 comms_buffer,
Charles MacNeill 5:89031b2f5316 585 pdata);
Charles MacNeill 5:89031b2f5316 586
Charles MacNeill 5:89031b2f5316 587 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 588
Charles MacNeill 5:89031b2f5316 589 return status;
Charles MacNeill 5:89031b2f5316 590 }
Charles MacNeill 5:89031b2f5316 591
Charles MacNeill 5:89031b2f5316 592
Charles MacNeill 5:89031b2f5316 593 VL53LX_Error VL53LX_i2c_encode_general_config(
Charles MacNeill 5:89031b2f5316 594 VL53LX_general_config_t *pdata,
Charles MacNeill 5:89031b2f5316 595 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 596 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 597 {
Charles MacNeill 5:89031b2f5316 598
Charles MacNeill 5:89031b2f5316 599
Charles MacNeill 5:89031b2f5316 600 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 601
Charles MacNeill 5:89031b2f5316 602 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 603
Charles MacNeill 5:89031b2f5316 604 if (buf_size < VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 605 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 606
Charles MacNeill 5:89031b2f5316 607 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 608 pdata->gph_config__stream_count_update_value;
Charles MacNeill 5:89031b2f5316 609 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 610 pdata->global_config__stream_divider;
Charles MacNeill 5:89031b2f5316 611 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 612 pdata->system__interrupt_config_gpio;
Charles MacNeill 5:89031b2f5316 613 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 614 pdata->cal_config__vcsel_start & 0x7F;
Charles MacNeill 5:89031b2f5316 615 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 616 pdata->cal_config__repeat_rate & 0xFFF,
Charles MacNeill 5:89031b2f5316 617 2,
Charles MacNeill 5:89031b2f5316 618 pbuffer + 4);
Charles MacNeill 5:89031b2f5316 619 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 620 pdata->global_config__vcsel_width & 0x7F;
Charles MacNeill 5:89031b2f5316 621 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 622 pdata->phasecal_config__timeout_macrop;
Charles MacNeill 5:89031b2f5316 623 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 624 pdata->phasecal_config__target;
Charles MacNeill 5:89031b2f5316 625 *(pbuffer + 9) =
Charles MacNeill 5:89031b2f5316 626 pdata->phasecal_config__override & 0x1;
Charles MacNeill 5:89031b2f5316 627 *(pbuffer + 11) =
Charles MacNeill 5:89031b2f5316 628 pdata->dss_config__roi_mode_control & 0x7;
Charles MacNeill 5:89031b2f5316 629 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 630 pdata->system__thresh_rate_high,
Charles MacNeill 5:89031b2f5316 631 2,
Charles MacNeill 5:89031b2f5316 632 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 633 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 634 pdata->system__thresh_rate_low,
Charles MacNeill 5:89031b2f5316 635 2,
Charles MacNeill 5:89031b2f5316 636 pbuffer + 14);
Charles MacNeill 5:89031b2f5316 637 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 638 pdata->dss_config__manual_effective_spads_select,
Charles MacNeill 5:89031b2f5316 639 2,
Charles MacNeill 5:89031b2f5316 640 pbuffer + 16);
Charles MacNeill 5:89031b2f5316 641 *(pbuffer + 18) =
Charles MacNeill 5:89031b2f5316 642 pdata->dss_config__manual_block_select;
Charles MacNeill 5:89031b2f5316 643 *(pbuffer + 19) =
Charles MacNeill 5:89031b2f5316 644 pdata->dss_config__aperture_attenuation;
Charles MacNeill 5:89031b2f5316 645 *(pbuffer + 20) =
Charles MacNeill 5:89031b2f5316 646 pdata->dss_config__max_spads_limit;
Charles MacNeill 5:89031b2f5316 647 *(pbuffer + 21) =
Charles MacNeill 5:89031b2f5316 648 pdata->dss_config__min_spads_limit;
Charles MacNeill 5:89031b2f5316 649 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 650
Charles MacNeill 5:89031b2f5316 651
Charles MacNeill 5:89031b2f5316 652 return status;
Charles MacNeill 5:89031b2f5316 653 }
Charles MacNeill 5:89031b2f5316 654
Charles MacNeill 5:89031b2f5316 655
Charles MacNeill 5:89031b2f5316 656 VL53LX_Error VL53LX_i2c_decode_general_config(
Charles MacNeill 5:89031b2f5316 657 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 658 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 659 VL53LX_general_config_t *pdata)
Charles MacNeill 5:89031b2f5316 660 {
Charles MacNeill 5:89031b2f5316 661
Charles MacNeill 5:89031b2f5316 662
Charles MacNeill 5:89031b2f5316 663 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 664
Charles MacNeill 5:89031b2f5316 665 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 666
Charles MacNeill 5:89031b2f5316 667 if (buf_size < VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 668 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 669
Charles MacNeill 5:89031b2f5316 670 pdata->gph_config__stream_count_update_value =
Charles MacNeill 5:89031b2f5316 671 (*(pbuffer + 0));
Charles MacNeill 5:89031b2f5316 672 pdata->global_config__stream_divider =
Charles MacNeill 5:89031b2f5316 673 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 674 pdata->system__interrupt_config_gpio =
Charles MacNeill 5:89031b2f5316 675 (*(pbuffer + 2));
Charles MacNeill 5:89031b2f5316 676 pdata->cal_config__vcsel_start =
Charles MacNeill 5:89031b2f5316 677 (*(pbuffer + 3)) & 0x7F;
Charles MacNeill 5:89031b2f5316 678 pdata->cal_config__repeat_rate =
Charles MacNeill 5:89031b2f5316 679 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 4)) & 0xFFF;
Charles MacNeill 5:89031b2f5316 680 pdata->global_config__vcsel_width =
Charles MacNeill 5:89031b2f5316 681 (*(pbuffer + 6)) & 0x7F;
Charles MacNeill 5:89031b2f5316 682 pdata->phasecal_config__timeout_macrop =
Charles MacNeill 5:89031b2f5316 683 (*(pbuffer + 7));
Charles MacNeill 5:89031b2f5316 684 pdata->phasecal_config__target =
Charles MacNeill 5:89031b2f5316 685 (*(pbuffer + 8));
Charles MacNeill 5:89031b2f5316 686 pdata->phasecal_config__override =
Charles MacNeill 5:89031b2f5316 687 (*(pbuffer + 9)) & 0x1;
Charles MacNeill 5:89031b2f5316 688 pdata->dss_config__roi_mode_control =
Charles MacNeill 5:89031b2f5316 689 (*(pbuffer + 11)) & 0x7;
Charles MacNeill 5:89031b2f5316 690 pdata->system__thresh_rate_high =
Charles MacNeill 5:89031b2f5316 691 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 692 pdata->system__thresh_rate_low =
Charles MacNeill 5:89031b2f5316 693 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 14));
Charles MacNeill 5:89031b2f5316 694 pdata->dss_config__manual_effective_spads_select =
Charles MacNeill 5:89031b2f5316 695 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 16));
Charles MacNeill 5:89031b2f5316 696 pdata->dss_config__manual_block_select =
Charles MacNeill 5:89031b2f5316 697 (*(pbuffer + 18));
Charles MacNeill 5:89031b2f5316 698 pdata->dss_config__aperture_attenuation =
Charles MacNeill 5:89031b2f5316 699 (*(pbuffer + 19));
Charles MacNeill 5:89031b2f5316 700 pdata->dss_config__max_spads_limit =
Charles MacNeill 5:89031b2f5316 701 (*(pbuffer + 20));
Charles MacNeill 5:89031b2f5316 702 pdata->dss_config__min_spads_limit =
Charles MacNeill 5:89031b2f5316 703 (*(pbuffer + 21));
Charles MacNeill 5:89031b2f5316 704
Charles MacNeill 5:89031b2f5316 705 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 706
Charles MacNeill 5:89031b2f5316 707 return status;
Charles MacNeill 5:89031b2f5316 708 }
Charles MacNeill 5:89031b2f5316 709
Charles MacNeill 5:89031b2f5316 710
Charles MacNeill 5:89031b2f5316 711 VL53LX_Error VL53LX_set_general_config(
Charles MacNeill 5:89031b2f5316 712 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 713 VL53LX_general_config_t *pdata)
Charles MacNeill 5:89031b2f5316 714 {
Charles MacNeill 5:89031b2f5316 715
Charles MacNeill 5:89031b2f5316 716
Charles MacNeill 5:89031b2f5316 717 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 718 uint8_t comms_buffer[VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 719
Charles MacNeill 5:89031b2f5316 720 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 721
Charles MacNeill 5:89031b2f5316 722 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 723 status = VL53LX_i2c_encode_general_config(
Charles MacNeill 5:89031b2f5316 724 pdata,
Charles MacNeill 5:89031b2f5316 725 VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 726 comms_buffer);
Charles MacNeill 5:89031b2f5316 727
Charles MacNeill 5:89031b2f5316 728 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 729 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 730 Dev,
Charles MacNeill 5:89031b2f5316 731 VL53LX_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE,
Charles MacNeill 5:89031b2f5316 732 comms_buffer,
Charles MacNeill 5:89031b2f5316 733 VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 734
Charles MacNeill 5:89031b2f5316 735 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 736
Charles MacNeill 5:89031b2f5316 737 return status;
Charles MacNeill 5:89031b2f5316 738 }
Charles MacNeill 5:89031b2f5316 739
Charles MacNeill 5:89031b2f5316 740
Charles MacNeill 5:89031b2f5316 741 VL53LX_Error VL53LX_get_general_config(
Charles MacNeill 5:89031b2f5316 742 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 743 VL53LX_general_config_t *pdata)
Charles MacNeill 5:89031b2f5316 744 {
Charles MacNeill 5:89031b2f5316 745
Charles MacNeill 5:89031b2f5316 746
Charles MacNeill 5:89031b2f5316 747 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 748 uint8_t comms_buffer[VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 749
Charles MacNeill 5:89031b2f5316 750 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 751
Charles MacNeill 5:89031b2f5316 752 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 753 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 754 Dev,
Charles MacNeill 5:89031b2f5316 755 VL53LX_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE,
Charles MacNeill 5:89031b2f5316 756 comms_buffer,
Charles MacNeill 5:89031b2f5316 757 VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 758
Charles MacNeill 5:89031b2f5316 759 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 760 status = VL53LX_i2c_decode_general_config(
Charles MacNeill 5:89031b2f5316 761 VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 762 comms_buffer,
Charles MacNeill 5:89031b2f5316 763 pdata);
Charles MacNeill 5:89031b2f5316 764
Charles MacNeill 5:89031b2f5316 765 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 766
Charles MacNeill 5:89031b2f5316 767 return status;
Charles MacNeill 5:89031b2f5316 768 }
Charles MacNeill 5:89031b2f5316 769
Charles MacNeill 5:89031b2f5316 770
Charles MacNeill 5:89031b2f5316 771 VL53LX_Error VL53LX_i2c_encode_timing_config(
Charles MacNeill 5:89031b2f5316 772 VL53LX_timing_config_t *pdata,
Charles MacNeill 5:89031b2f5316 773 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 774 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 775 {
Charles MacNeill 5:89031b2f5316 776
Charles MacNeill 5:89031b2f5316 777
Charles MacNeill 5:89031b2f5316 778 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 779
Charles MacNeill 5:89031b2f5316 780 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 781
Charles MacNeill 5:89031b2f5316 782 if (buf_size < VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 783 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 784
Charles MacNeill 5:89031b2f5316 785 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 786 pdata->mm_config__timeout_macrop_a_hi & 0xF;
Charles MacNeill 5:89031b2f5316 787 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 788 pdata->mm_config__timeout_macrop_a_lo;
Charles MacNeill 5:89031b2f5316 789 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 790 pdata->mm_config__timeout_macrop_b_hi & 0xF;
Charles MacNeill 5:89031b2f5316 791 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 792 pdata->mm_config__timeout_macrop_b_lo;
Charles MacNeill 5:89031b2f5316 793 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 794 pdata->range_config__timeout_macrop_a_hi & 0xF;
Charles MacNeill 5:89031b2f5316 795 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 796 pdata->range_config__timeout_macrop_a_lo;
Charles MacNeill 5:89031b2f5316 797 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 798 pdata->range_config__vcsel_period_a & 0x3F;
Charles MacNeill 5:89031b2f5316 799 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 800 pdata->range_config__timeout_macrop_b_hi & 0xF;
Charles MacNeill 5:89031b2f5316 801 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 802 pdata->range_config__timeout_macrop_b_lo;
Charles MacNeill 5:89031b2f5316 803 *(pbuffer + 9) =
Charles MacNeill 5:89031b2f5316 804 pdata->range_config__vcsel_period_b & 0x3F;
Charles MacNeill 5:89031b2f5316 805 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 806 pdata->range_config__sigma_thresh,
Charles MacNeill 5:89031b2f5316 807 2,
Charles MacNeill 5:89031b2f5316 808 pbuffer + 10);
Charles MacNeill 5:89031b2f5316 809 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 810 pdata->range_config__min_count_rate_rtn_limit_mcps,
Charles MacNeill 5:89031b2f5316 811 2,
Charles MacNeill 5:89031b2f5316 812 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 813 *(pbuffer + 14) =
Charles MacNeill 5:89031b2f5316 814 pdata->range_config__valid_phase_low;
Charles MacNeill 5:89031b2f5316 815 *(pbuffer + 15) =
Charles MacNeill 5:89031b2f5316 816 pdata->range_config__valid_phase_high;
Charles MacNeill 5:89031b2f5316 817 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 818 pdata->system__intermeasurement_period,
Charles MacNeill 5:89031b2f5316 819 4,
Charles MacNeill 5:89031b2f5316 820 pbuffer + 18);
Charles MacNeill 5:89031b2f5316 821 *(pbuffer + 22) =
Charles MacNeill 5:89031b2f5316 822 pdata->system__fractional_enable & 0x1;
Charles MacNeill 5:89031b2f5316 823 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 824
Charles MacNeill 5:89031b2f5316 825
Charles MacNeill 5:89031b2f5316 826 return status;
Charles MacNeill 5:89031b2f5316 827 }
Charles MacNeill 5:89031b2f5316 828
Charles MacNeill 5:89031b2f5316 829
Charles MacNeill 5:89031b2f5316 830 VL53LX_Error VL53LX_i2c_decode_timing_config(
Charles MacNeill 5:89031b2f5316 831 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 832 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 833 VL53LX_timing_config_t *pdata)
Charles MacNeill 5:89031b2f5316 834 {
Charles MacNeill 5:89031b2f5316 835
Charles MacNeill 5:89031b2f5316 836
Charles MacNeill 5:89031b2f5316 837 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 838
Charles MacNeill 5:89031b2f5316 839 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 840
Charles MacNeill 5:89031b2f5316 841 if (buf_size < VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 842 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 843
Charles MacNeill 5:89031b2f5316 844 pdata->mm_config__timeout_macrop_a_hi =
Charles MacNeill 5:89031b2f5316 845 (*(pbuffer + 0)) & 0xF;
Charles MacNeill 5:89031b2f5316 846 pdata->mm_config__timeout_macrop_a_lo =
Charles MacNeill 5:89031b2f5316 847 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 848 pdata->mm_config__timeout_macrop_b_hi =
Charles MacNeill 5:89031b2f5316 849 (*(pbuffer + 2)) & 0xF;
Charles MacNeill 5:89031b2f5316 850 pdata->mm_config__timeout_macrop_b_lo =
Charles MacNeill 5:89031b2f5316 851 (*(pbuffer + 3));
Charles MacNeill 5:89031b2f5316 852 pdata->range_config__timeout_macrop_a_hi =
Charles MacNeill 5:89031b2f5316 853 (*(pbuffer + 4)) & 0xF;
Charles MacNeill 5:89031b2f5316 854 pdata->range_config__timeout_macrop_a_lo =
Charles MacNeill 5:89031b2f5316 855 (*(pbuffer + 5));
Charles MacNeill 5:89031b2f5316 856 pdata->range_config__vcsel_period_a =
Charles MacNeill 5:89031b2f5316 857 (*(pbuffer + 6)) & 0x3F;
Charles MacNeill 5:89031b2f5316 858 pdata->range_config__timeout_macrop_b_hi =
Charles MacNeill 5:89031b2f5316 859 (*(pbuffer + 7)) & 0xF;
Charles MacNeill 5:89031b2f5316 860 pdata->range_config__timeout_macrop_b_lo =
Charles MacNeill 5:89031b2f5316 861 (*(pbuffer + 8));
Charles MacNeill 5:89031b2f5316 862 pdata->range_config__vcsel_period_b =
Charles MacNeill 5:89031b2f5316 863 (*(pbuffer + 9)) & 0x3F;
Charles MacNeill 5:89031b2f5316 864 pdata->range_config__sigma_thresh =
Charles MacNeill 5:89031b2f5316 865 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 10));
Charles MacNeill 5:89031b2f5316 866 pdata->range_config__min_count_rate_rtn_limit_mcps =
Charles MacNeill 5:89031b2f5316 867 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 868 pdata->range_config__valid_phase_low =
Charles MacNeill 5:89031b2f5316 869 (*(pbuffer + 14));
Charles MacNeill 5:89031b2f5316 870 pdata->range_config__valid_phase_high =
Charles MacNeill 5:89031b2f5316 871 (*(pbuffer + 15));
Charles MacNeill 5:89031b2f5316 872 pdata->system__intermeasurement_period =
Charles MacNeill 5:89031b2f5316 873 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 18));
Charles MacNeill 5:89031b2f5316 874 pdata->system__fractional_enable =
Charles MacNeill 5:89031b2f5316 875 (*(pbuffer + 22)) & 0x1;
Charles MacNeill 5:89031b2f5316 876
Charles MacNeill 5:89031b2f5316 877 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 878
Charles MacNeill 5:89031b2f5316 879 return status;
Charles MacNeill 5:89031b2f5316 880 }
Charles MacNeill 5:89031b2f5316 881
Charles MacNeill 5:89031b2f5316 882
Charles MacNeill 5:89031b2f5316 883 VL53LX_Error VL53LX_set_timing_config(
Charles MacNeill 5:89031b2f5316 884 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 885 VL53LX_timing_config_t *pdata)
Charles MacNeill 5:89031b2f5316 886 {
Charles MacNeill 5:89031b2f5316 887
Charles MacNeill 5:89031b2f5316 888
Charles MacNeill 5:89031b2f5316 889 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 890 uint8_t comms_buffer[VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 891
Charles MacNeill 5:89031b2f5316 892 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 893
Charles MacNeill 5:89031b2f5316 894 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 895 status = VL53LX_i2c_encode_timing_config(
Charles MacNeill 5:89031b2f5316 896 pdata,
Charles MacNeill 5:89031b2f5316 897 VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 898 comms_buffer);
Charles MacNeill 5:89031b2f5316 899
Charles MacNeill 5:89031b2f5316 900 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 901 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 902 Dev,
Charles MacNeill 5:89031b2f5316 903 VL53LX_MM_CONFIG__TIMEOUT_MACROP_A_HI,
Charles MacNeill 5:89031b2f5316 904 comms_buffer,
Charles MacNeill 5:89031b2f5316 905 VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 906
Charles MacNeill 5:89031b2f5316 907 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 908
Charles MacNeill 5:89031b2f5316 909 return status;
Charles MacNeill 5:89031b2f5316 910 }
Charles MacNeill 5:89031b2f5316 911
Charles MacNeill 5:89031b2f5316 912
Charles MacNeill 5:89031b2f5316 913 VL53LX_Error VL53LX_get_timing_config(
Charles MacNeill 5:89031b2f5316 914 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 915 VL53LX_timing_config_t *pdata)
Charles MacNeill 5:89031b2f5316 916 {
Charles MacNeill 5:89031b2f5316 917
Charles MacNeill 5:89031b2f5316 918
Charles MacNeill 5:89031b2f5316 919 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 920 uint8_t comms_buffer[VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 921
Charles MacNeill 5:89031b2f5316 922 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 923
Charles MacNeill 5:89031b2f5316 924 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 925 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 926 Dev,
Charles MacNeill 5:89031b2f5316 927 VL53LX_MM_CONFIG__TIMEOUT_MACROP_A_HI,
Charles MacNeill 5:89031b2f5316 928 comms_buffer,
Charles MacNeill 5:89031b2f5316 929 VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 930
Charles MacNeill 5:89031b2f5316 931 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 932 status = VL53LX_i2c_decode_timing_config(
Charles MacNeill 5:89031b2f5316 933 VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 934 comms_buffer,
Charles MacNeill 5:89031b2f5316 935 pdata);
Charles MacNeill 5:89031b2f5316 936
Charles MacNeill 5:89031b2f5316 937 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 938
Charles MacNeill 5:89031b2f5316 939 return status;
Charles MacNeill 5:89031b2f5316 940 }
Charles MacNeill 5:89031b2f5316 941
Charles MacNeill 5:89031b2f5316 942
Charles MacNeill 5:89031b2f5316 943 VL53LX_Error VL53LX_i2c_encode_dynamic_config(
Charles MacNeill 5:89031b2f5316 944 VL53LX_dynamic_config_t *pdata,
Charles MacNeill 5:89031b2f5316 945 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 946 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 947 {
Charles MacNeill 5:89031b2f5316 948
Charles MacNeill 5:89031b2f5316 949
Charles MacNeill 5:89031b2f5316 950 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 951
Charles MacNeill 5:89031b2f5316 952 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 953
Charles MacNeill 5:89031b2f5316 954 if (buf_size < VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 955 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 956
Charles MacNeill 5:89031b2f5316 957 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 958 pdata->system__grouped_parameter_hold_0 & 0x3;
Charles MacNeill 5:89031b2f5316 959 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 960 pdata->system__thresh_high,
Charles MacNeill 5:89031b2f5316 961 2,
Charles MacNeill 5:89031b2f5316 962 pbuffer + 1);
Charles MacNeill 5:89031b2f5316 963 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 964 pdata->system__thresh_low,
Charles MacNeill 5:89031b2f5316 965 2,
Charles MacNeill 5:89031b2f5316 966 pbuffer + 3);
Charles MacNeill 5:89031b2f5316 967 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 968 pdata->system__enable_xtalk_per_quadrant & 0x1;
Charles MacNeill 5:89031b2f5316 969 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 970 pdata->system__seed_config & 0x7;
Charles MacNeill 5:89031b2f5316 971 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 972 pdata->sd_config__woi_sd0;
Charles MacNeill 5:89031b2f5316 973 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 974 pdata->sd_config__woi_sd1;
Charles MacNeill 5:89031b2f5316 975 *(pbuffer + 9) =
Charles MacNeill 5:89031b2f5316 976 pdata->sd_config__initial_phase_sd0 & 0x7F;
Charles MacNeill 5:89031b2f5316 977 *(pbuffer + 10) =
Charles MacNeill 5:89031b2f5316 978 pdata->sd_config__initial_phase_sd1 & 0x7F;
Charles MacNeill 5:89031b2f5316 979 *(pbuffer + 11) =
Charles MacNeill 5:89031b2f5316 980 pdata->system__grouped_parameter_hold_1 & 0x3;
Charles MacNeill 5:89031b2f5316 981 *(pbuffer + 12) =
Charles MacNeill 5:89031b2f5316 982 pdata->sd_config__first_order_select & 0x3;
Charles MacNeill 5:89031b2f5316 983 *(pbuffer + 13) =
Charles MacNeill 5:89031b2f5316 984 pdata->sd_config__quantifier & 0xF;
Charles MacNeill 5:89031b2f5316 985 *(pbuffer + 14) =
Charles MacNeill 5:89031b2f5316 986 pdata->roi_config__user_roi_centre_spad;
Charles MacNeill 5:89031b2f5316 987 *(pbuffer + 15) =
Charles MacNeill 5:89031b2f5316 988 pdata->roi_config__user_roi_requested_global_xy_size;
Charles MacNeill 5:89031b2f5316 989 *(pbuffer + 16) =
Charles MacNeill 5:89031b2f5316 990 pdata->system__sequence_config;
Charles MacNeill 5:89031b2f5316 991 *(pbuffer + 17) =
Charles MacNeill 5:89031b2f5316 992 pdata->system__grouped_parameter_hold & 0x3;
Charles MacNeill 5:89031b2f5316 993 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 994
Charles MacNeill 5:89031b2f5316 995
Charles MacNeill 5:89031b2f5316 996 return status;
Charles MacNeill 5:89031b2f5316 997 }
Charles MacNeill 5:89031b2f5316 998
Charles MacNeill 5:89031b2f5316 999
Charles MacNeill 5:89031b2f5316 1000 VL53LX_Error VL53LX_i2c_decode_dynamic_config(
Charles MacNeill 5:89031b2f5316 1001 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1002 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 1003 VL53LX_dynamic_config_t *pdata)
Charles MacNeill 5:89031b2f5316 1004 {
Charles MacNeill 5:89031b2f5316 1005
Charles MacNeill 5:89031b2f5316 1006
Charles MacNeill 5:89031b2f5316 1007 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1008
Charles MacNeill 5:89031b2f5316 1009 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1010
Charles MacNeill 5:89031b2f5316 1011 if (buf_size < VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1012 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1013
Charles MacNeill 5:89031b2f5316 1014 pdata->system__grouped_parameter_hold_0 =
Charles MacNeill 5:89031b2f5316 1015 (*(pbuffer + 0)) & 0x3;
Charles MacNeill 5:89031b2f5316 1016 pdata->system__thresh_high =
Charles MacNeill 5:89031b2f5316 1017 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 1));
Charles MacNeill 5:89031b2f5316 1018 pdata->system__thresh_low =
Charles MacNeill 5:89031b2f5316 1019 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 3));
Charles MacNeill 5:89031b2f5316 1020 pdata->system__enable_xtalk_per_quadrant =
Charles MacNeill 5:89031b2f5316 1021 (*(pbuffer + 5)) & 0x1;
Charles MacNeill 5:89031b2f5316 1022 pdata->system__seed_config =
Charles MacNeill 5:89031b2f5316 1023 (*(pbuffer + 6)) & 0x7;
Charles MacNeill 5:89031b2f5316 1024 pdata->sd_config__woi_sd0 =
Charles MacNeill 5:89031b2f5316 1025 (*(pbuffer + 7));
Charles MacNeill 5:89031b2f5316 1026 pdata->sd_config__woi_sd1 =
Charles MacNeill 5:89031b2f5316 1027 (*(pbuffer + 8));
Charles MacNeill 5:89031b2f5316 1028 pdata->sd_config__initial_phase_sd0 =
Charles MacNeill 5:89031b2f5316 1029 (*(pbuffer + 9)) & 0x7F;
Charles MacNeill 5:89031b2f5316 1030 pdata->sd_config__initial_phase_sd1 =
Charles MacNeill 5:89031b2f5316 1031 (*(pbuffer + 10)) & 0x7F;
Charles MacNeill 5:89031b2f5316 1032 pdata->system__grouped_parameter_hold_1 =
Charles MacNeill 5:89031b2f5316 1033 (*(pbuffer + 11)) & 0x3;
Charles MacNeill 5:89031b2f5316 1034 pdata->sd_config__first_order_select =
Charles MacNeill 5:89031b2f5316 1035 (*(pbuffer + 12)) & 0x3;
Charles MacNeill 5:89031b2f5316 1036 pdata->sd_config__quantifier =
Charles MacNeill 5:89031b2f5316 1037 (*(pbuffer + 13)) & 0xF;
Charles MacNeill 5:89031b2f5316 1038 pdata->roi_config__user_roi_centre_spad =
Charles MacNeill 5:89031b2f5316 1039 (*(pbuffer + 14));
Charles MacNeill 5:89031b2f5316 1040 pdata->roi_config__user_roi_requested_global_xy_size =
Charles MacNeill 5:89031b2f5316 1041 (*(pbuffer + 15));
Charles MacNeill 5:89031b2f5316 1042 pdata->system__sequence_config =
Charles MacNeill 5:89031b2f5316 1043 (*(pbuffer + 16));
Charles MacNeill 5:89031b2f5316 1044 pdata->system__grouped_parameter_hold =
Charles MacNeill 5:89031b2f5316 1045 (*(pbuffer + 17)) & 0x3;
Charles MacNeill 5:89031b2f5316 1046
Charles MacNeill 5:89031b2f5316 1047 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1048
Charles MacNeill 5:89031b2f5316 1049 return status;
Charles MacNeill 5:89031b2f5316 1050 }
Charles MacNeill 5:89031b2f5316 1051
Charles MacNeill 5:89031b2f5316 1052
Charles MacNeill 5:89031b2f5316 1053 VL53LX_Error VL53LX_set_dynamic_config(
Charles MacNeill 5:89031b2f5316 1054 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1055 VL53LX_dynamic_config_t *pdata)
Charles MacNeill 5:89031b2f5316 1056 {
Charles MacNeill 5:89031b2f5316 1057
Charles MacNeill 5:89031b2f5316 1058
Charles MacNeill 5:89031b2f5316 1059 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1060 uint8_t comms_buffer[VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1061
Charles MacNeill 5:89031b2f5316 1062 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1063
Charles MacNeill 5:89031b2f5316 1064 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1065 status = VL53LX_i2c_encode_dynamic_config(
Charles MacNeill 5:89031b2f5316 1066 pdata,
Charles MacNeill 5:89031b2f5316 1067 VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1068 comms_buffer);
Charles MacNeill 5:89031b2f5316 1069
Charles MacNeill 5:89031b2f5316 1070 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1071 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 1072 Dev,
Charles MacNeill 5:89031b2f5316 1073 VL53LX_SYSTEM__GROUPED_PARAMETER_HOLD_0,
Charles MacNeill 5:89031b2f5316 1074 comms_buffer,
Charles MacNeill 5:89031b2f5316 1075 VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1076
Charles MacNeill 5:89031b2f5316 1077 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1078
Charles MacNeill 5:89031b2f5316 1079 return status;
Charles MacNeill 5:89031b2f5316 1080 }
Charles MacNeill 5:89031b2f5316 1081
Charles MacNeill 5:89031b2f5316 1082
Charles MacNeill 5:89031b2f5316 1083 VL53LX_Error VL53LX_get_dynamic_config(
Charles MacNeill 5:89031b2f5316 1084 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1085 VL53LX_dynamic_config_t *pdata)
Charles MacNeill 5:89031b2f5316 1086 {
Charles MacNeill 5:89031b2f5316 1087
Charles MacNeill 5:89031b2f5316 1088
Charles MacNeill 5:89031b2f5316 1089 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1090 uint8_t comms_buffer[VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1091
Charles MacNeill 5:89031b2f5316 1092 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1093
Charles MacNeill 5:89031b2f5316 1094 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1095 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 1096 Dev,
Charles MacNeill 5:89031b2f5316 1097 VL53LX_SYSTEM__GROUPED_PARAMETER_HOLD_0,
Charles MacNeill 5:89031b2f5316 1098 comms_buffer,
Charles MacNeill 5:89031b2f5316 1099 VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1100
Charles MacNeill 5:89031b2f5316 1101 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1102 status = VL53LX_i2c_decode_dynamic_config(
Charles MacNeill 5:89031b2f5316 1103 VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1104 comms_buffer,
Charles MacNeill 5:89031b2f5316 1105 pdata);
Charles MacNeill 5:89031b2f5316 1106
Charles MacNeill 5:89031b2f5316 1107 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1108
Charles MacNeill 5:89031b2f5316 1109 return status;
Charles MacNeill 5:89031b2f5316 1110 }
Charles MacNeill 5:89031b2f5316 1111
Charles MacNeill 5:89031b2f5316 1112
Charles MacNeill 5:89031b2f5316 1113 VL53LX_Error VL53LX_i2c_encode_system_control(
Charles MacNeill 5:89031b2f5316 1114 VL53LX_system_control_t *pdata,
Charles MacNeill 5:89031b2f5316 1115 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1116 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 1117 {
Charles MacNeill 5:89031b2f5316 1118
Charles MacNeill 5:89031b2f5316 1119
Charles MacNeill 5:89031b2f5316 1120 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1121
Charles MacNeill 5:89031b2f5316 1122 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1123
Charles MacNeill 5:89031b2f5316 1124 if (buf_size < VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1125 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1126
Charles MacNeill 5:89031b2f5316 1127 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 1128 pdata->power_management__go1_power_force & 0x1;
Charles MacNeill 5:89031b2f5316 1129 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 1130 pdata->system__stream_count_ctrl & 0x1;
Charles MacNeill 5:89031b2f5316 1131 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 1132 pdata->firmware__enable & 0x1;
Charles MacNeill 5:89031b2f5316 1133 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 1134 pdata->system__interrupt_clear & 0x3;
Charles MacNeill 5:89031b2f5316 1135 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 1136 pdata->system__mode_start;
Charles MacNeill 5:89031b2f5316 1137 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1138
Charles MacNeill 5:89031b2f5316 1139
Charles MacNeill 5:89031b2f5316 1140 return status;
Charles MacNeill 5:89031b2f5316 1141 }
Charles MacNeill 5:89031b2f5316 1142
Charles MacNeill 5:89031b2f5316 1143
Charles MacNeill 5:89031b2f5316 1144 VL53LX_Error VL53LX_i2c_decode_system_control(
Charles MacNeill 5:89031b2f5316 1145 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1146 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 1147 VL53LX_system_control_t *pdata)
Charles MacNeill 5:89031b2f5316 1148 {
Charles MacNeill 5:89031b2f5316 1149
Charles MacNeill 5:89031b2f5316 1150
Charles MacNeill 5:89031b2f5316 1151 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1152
Charles MacNeill 5:89031b2f5316 1153 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1154
Charles MacNeill 5:89031b2f5316 1155 if (buf_size < VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1156 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1157
Charles MacNeill 5:89031b2f5316 1158 pdata->power_management__go1_power_force =
Charles MacNeill 5:89031b2f5316 1159 (*(pbuffer + 0)) & 0x1;
Charles MacNeill 5:89031b2f5316 1160 pdata->system__stream_count_ctrl =
Charles MacNeill 5:89031b2f5316 1161 (*(pbuffer + 1)) & 0x1;
Charles MacNeill 5:89031b2f5316 1162 pdata->firmware__enable =
Charles MacNeill 5:89031b2f5316 1163 (*(pbuffer + 2)) & 0x1;
Charles MacNeill 5:89031b2f5316 1164 pdata->system__interrupt_clear =
Charles MacNeill 5:89031b2f5316 1165 (*(pbuffer + 3)) & 0x3;
Charles MacNeill 5:89031b2f5316 1166 pdata->system__mode_start =
Charles MacNeill 5:89031b2f5316 1167 (*(pbuffer + 4));
Charles MacNeill 5:89031b2f5316 1168
Charles MacNeill 5:89031b2f5316 1169 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1170
Charles MacNeill 5:89031b2f5316 1171 return status;
Charles MacNeill 5:89031b2f5316 1172 }
Charles MacNeill 5:89031b2f5316 1173
Charles MacNeill 5:89031b2f5316 1174
Charles MacNeill 5:89031b2f5316 1175 VL53LX_Error VL53LX_set_system_control(
Charles MacNeill 5:89031b2f5316 1176 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1177 VL53LX_system_control_t *pdata)
Charles MacNeill 5:89031b2f5316 1178 {
Charles MacNeill 5:89031b2f5316 1179
Charles MacNeill 5:89031b2f5316 1180
Charles MacNeill 5:89031b2f5316 1181 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1182 uint8_t comms_buffer[VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1183
Charles MacNeill 5:89031b2f5316 1184 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1185
Charles MacNeill 5:89031b2f5316 1186 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1187 status = VL53LX_i2c_encode_system_control(
Charles MacNeill 5:89031b2f5316 1188 pdata,
Charles MacNeill 5:89031b2f5316 1189 VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1190 comms_buffer);
Charles MacNeill 5:89031b2f5316 1191
Charles MacNeill 5:89031b2f5316 1192 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1193 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 1194 Dev,
Charles MacNeill 5:89031b2f5316 1195 VL53LX_POWER_MANAGEMENT__GO1_POWER_FORCE,
Charles MacNeill 5:89031b2f5316 1196 comms_buffer,
Charles MacNeill 5:89031b2f5316 1197 VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1198
Charles MacNeill 5:89031b2f5316 1199 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1200
Charles MacNeill 5:89031b2f5316 1201 return status;
Charles MacNeill 5:89031b2f5316 1202 }
Charles MacNeill 5:89031b2f5316 1203
Charles MacNeill 5:89031b2f5316 1204
Charles MacNeill 5:89031b2f5316 1205 VL53LX_Error VL53LX_get_system_control(
Charles MacNeill 5:89031b2f5316 1206 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1207 VL53LX_system_control_t *pdata)
Charles MacNeill 5:89031b2f5316 1208 {
Charles MacNeill 5:89031b2f5316 1209
Charles MacNeill 5:89031b2f5316 1210
Charles MacNeill 5:89031b2f5316 1211 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1212 uint8_t comms_buffer[VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1213
Charles MacNeill 5:89031b2f5316 1214 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1215
Charles MacNeill 5:89031b2f5316 1216 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1217 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 1218 Dev,
Charles MacNeill 5:89031b2f5316 1219 VL53LX_POWER_MANAGEMENT__GO1_POWER_FORCE,
Charles MacNeill 5:89031b2f5316 1220 comms_buffer,
Charles MacNeill 5:89031b2f5316 1221 VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1222
Charles MacNeill 5:89031b2f5316 1223 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1224 status = VL53LX_i2c_decode_system_control(
Charles MacNeill 5:89031b2f5316 1225 VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1226 comms_buffer,
Charles MacNeill 5:89031b2f5316 1227 pdata);
Charles MacNeill 5:89031b2f5316 1228
Charles MacNeill 5:89031b2f5316 1229 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1230
Charles MacNeill 5:89031b2f5316 1231 return status;
Charles MacNeill 5:89031b2f5316 1232 }
Charles MacNeill 5:89031b2f5316 1233
Charles MacNeill 5:89031b2f5316 1234
Charles MacNeill 5:89031b2f5316 1235 VL53LX_Error VL53LX_i2c_encode_system_results(
Charles MacNeill 5:89031b2f5316 1236 VL53LX_system_results_t *pdata,
Charles MacNeill 5:89031b2f5316 1237 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1238 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 1239 {
Charles MacNeill 5:89031b2f5316 1240
Charles MacNeill 5:89031b2f5316 1241
Charles MacNeill 5:89031b2f5316 1242 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1243
Charles MacNeill 5:89031b2f5316 1244 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1245
Charles MacNeill 5:89031b2f5316 1246 if (buf_size < VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1247 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1248
Charles MacNeill 5:89031b2f5316 1249 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 1250 pdata->result__interrupt_status & 0x3F;
Charles MacNeill 5:89031b2f5316 1251 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 1252 pdata->result__range_status;
Charles MacNeill 5:89031b2f5316 1253 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 1254 pdata->result__report_status & 0xF;
Charles MacNeill 5:89031b2f5316 1255 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 1256 pdata->result__stream_count;
Charles MacNeill 5:89031b2f5316 1257 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1258 pdata->result__dss_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 1259 2,
Charles MacNeill 5:89031b2f5316 1260 pbuffer + 4);
Charles MacNeill 5:89031b2f5316 1261 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1262 pdata->result__peak_signal_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 1263 2,
Charles MacNeill 5:89031b2f5316 1264 pbuffer + 6);
Charles MacNeill 5:89031b2f5316 1265 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1266 pdata->result__ambient_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 1267 2,
Charles MacNeill 5:89031b2f5316 1268 pbuffer + 8);
Charles MacNeill 5:89031b2f5316 1269 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1270 pdata->result__sigma_sd0,
Charles MacNeill 5:89031b2f5316 1271 2,
Charles MacNeill 5:89031b2f5316 1272 pbuffer + 10);
Charles MacNeill 5:89031b2f5316 1273 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1274 pdata->result__phase_sd0,
Charles MacNeill 5:89031b2f5316 1275 2,
Charles MacNeill 5:89031b2f5316 1276 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 1277 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1278 pdata->result__final_crosstalk_corrected_range_mm_sd0,
Charles MacNeill 5:89031b2f5316 1279 2,
Charles MacNeill 5:89031b2f5316 1280 pbuffer + 14);
Charles MacNeill 5:89031b2f5316 1281 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1282 pdata->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0,
Charles MacNeill 5:89031b2f5316 1283 2,
Charles MacNeill 5:89031b2f5316 1284 pbuffer + 16);
Charles MacNeill 5:89031b2f5316 1285 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1286 pdata->result__mm_inner_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 1287 2,
Charles MacNeill 5:89031b2f5316 1288 pbuffer + 18);
Charles MacNeill 5:89031b2f5316 1289 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1290 pdata->result__mm_outer_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 1291 2,
Charles MacNeill 5:89031b2f5316 1292 pbuffer + 20);
Charles MacNeill 5:89031b2f5316 1293 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1294 pdata->result__avg_signal_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 1295 2,
Charles MacNeill 5:89031b2f5316 1296 pbuffer + 22);
Charles MacNeill 5:89031b2f5316 1297 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1298 pdata->result__dss_actual_effective_spads_sd1,
Charles MacNeill 5:89031b2f5316 1299 2,
Charles MacNeill 5:89031b2f5316 1300 pbuffer + 24);
Charles MacNeill 5:89031b2f5316 1301 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1302 pdata->result__peak_signal_count_rate_mcps_sd1,
Charles MacNeill 5:89031b2f5316 1303 2,
Charles MacNeill 5:89031b2f5316 1304 pbuffer + 26);
Charles MacNeill 5:89031b2f5316 1305 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1306 pdata->result__ambient_count_rate_mcps_sd1,
Charles MacNeill 5:89031b2f5316 1307 2,
Charles MacNeill 5:89031b2f5316 1308 pbuffer + 28);
Charles MacNeill 5:89031b2f5316 1309 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1310 pdata->result__sigma_sd1,
Charles MacNeill 5:89031b2f5316 1311 2,
Charles MacNeill 5:89031b2f5316 1312 pbuffer + 30);
Charles MacNeill 5:89031b2f5316 1313 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1314 pdata->result__phase_sd1,
Charles MacNeill 5:89031b2f5316 1315 2,
Charles MacNeill 5:89031b2f5316 1316 pbuffer + 32);
Charles MacNeill 5:89031b2f5316 1317 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1318 pdata->result__final_crosstalk_corrected_range_mm_sd1,
Charles MacNeill 5:89031b2f5316 1319 2,
Charles MacNeill 5:89031b2f5316 1320 pbuffer + 34);
Charles MacNeill 5:89031b2f5316 1321 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1322 pdata->result__spare_0_sd1,
Charles MacNeill 5:89031b2f5316 1323 2,
Charles MacNeill 5:89031b2f5316 1324 pbuffer + 36);
Charles MacNeill 5:89031b2f5316 1325 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1326 pdata->result__spare_1_sd1,
Charles MacNeill 5:89031b2f5316 1327 2,
Charles MacNeill 5:89031b2f5316 1328 pbuffer + 38);
Charles MacNeill 5:89031b2f5316 1329 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1330 pdata->result__spare_2_sd1,
Charles MacNeill 5:89031b2f5316 1331 2,
Charles MacNeill 5:89031b2f5316 1332 pbuffer + 40);
Charles MacNeill 5:89031b2f5316 1333 *(pbuffer + 42) =
Charles MacNeill 5:89031b2f5316 1334 pdata->result__spare_3_sd1;
Charles MacNeill 5:89031b2f5316 1335 *(pbuffer + 43) =
Charles MacNeill 5:89031b2f5316 1336 pdata->result__thresh_info;
Charles MacNeill 5:89031b2f5316 1337 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1338
Charles MacNeill 5:89031b2f5316 1339
Charles MacNeill 5:89031b2f5316 1340 return status;
Charles MacNeill 5:89031b2f5316 1341 }
Charles MacNeill 5:89031b2f5316 1342
Charles MacNeill 5:89031b2f5316 1343
Charles MacNeill 5:89031b2f5316 1344 VL53LX_Error VL53LX_i2c_decode_system_results(
Charles MacNeill 5:89031b2f5316 1345 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1346 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 1347 VL53LX_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1348 {
Charles MacNeill 5:89031b2f5316 1349
Charles MacNeill 5:89031b2f5316 1350
Charles MacNeill 5:89031b2f5316 1351 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1352
Charles MacNeill 5:89031b2f5316 1353 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1354
Charles MacNeill 5:89031b2f5316 1355 if (buf_size < VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1356 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1357
Charles MacNeill 5:89031b2f5316 1358 pdata->result__interrupt_status =
Charles MacNeill 5:89031b2f5316 1359 (*(pbuffer + 0)) & 0x3F;
Charles MacNeill 5:89031b2f5316 1360 pdata->result__range_status =
Charles MacNeill 5:89031b2f5316 1361 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 1362 pdata->result__report_status =
Charles MacNeill 5:89031b2f5316 1363 (*(pbuffer + 2)) & 0xF;
Charles MacNeill 5:89031b2f5316 1364 pdata->result__stream_count =
Charles MacNeill 5:89031b2f5316 1365 (*(pbuffer + 3));
Charles MacNeill 5:89031b2f5316 1366 pdata->result__dss_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 1367 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 4));
Charles MacNeill 5:89031b2f5316 1368 pdata->result__peak_signal_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 1369 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 6));
Charles MacNeill 5:89031b2f5316 1370 pdata->result__ambient_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 1371 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 8));
Charles MacNeill 5:89031b2f5316 1372 pdata->result__sigma_sd0 =
Charles MacNeill 5:89031b2f5316 1373 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 10));
Charles MacNeill 5:89031b2f5316 1374 pdata->result__phase_sd0 =
Charles MacNeill 5:89031b2f5316 1375 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 1376 pdata->result__final_crosstalk_corrected_range_mm_sd0 =
Charles MacNeill 5:89031b2f5316 1377 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 14));
Charles MacNeill 5:89031b2f5316 1378 pdata->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 1379 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 16));
Charles MacNeill 5:89031b2f5316 1380 pdata->result__mm_inner_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 1381 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 18));
Charles MacNeill 5:89031b2f5316 1382 pdata->result__mm_outer_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 1383 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 20));
Charles MacNeill 5:89031b2f5316 1384 pdata->result__avg_signal_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 1385 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 22));
Charles MacNeill 5:89031b2f5316 1386 pdata->result__dss_actual_effective_spads_sd1 =
Charles MacNeill 5:89031b2f5316 1387 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 24));
Charles MacNeill 5:89031b2f5316 1388 pdata->result__peak_signal_count_rate_mcps_sd1 =
Charles MacNeill 5:89031b2f5316 1389 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 26));
Charles MacNeill 5:89031b2f5316 1390 pdata->result__ambient_count_rate_mcps_sd1 =
Charles MacNeill 5:89031b2f5316 1391 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 28));
Charles MacNeill 5:89031b2f5316 1392 pdata->result__sigma_sd1 =
Charles MacNeill 5:89031b2f5316 1393 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 30));
Charles MacNeill 5:89031b2f5316 1394 pdata->result__phase_sd1 =
Charles MacNeill 5:89031b2f5316 1395 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 32));
Charles MacNeill 5:89031b2f5316 1396 pdata->result__final_crosstalk_corrected_range_mm_sd1 =
Charles MacNeill 5:89031b2f5316 1397 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 34));
Charles MacNeill 5:89031b2f5316 1398 pdata->result__spare_0_sd1 =
Charles MacNeill 5:89031b2f5316 1399 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 36));
Charles MacNeill 5:89031b2f5316 1400 pdata->result__spare_1_sd1 =
Charles MacNeill 5:89031b2f5316 1401 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 38));
Charles MacNeill 5:89031b2f5316 1402 pdata->result__spare_2_sd1 =
Charles MacNeill 5:89031b2f5316 1403 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 40));
Charles MacNeill 5:89031b2f5316 1404 pdata->result__spare_3_sd1 =
Charles MacNeill 5:89031b2f5316 1405 (*(pbuffer + 42));
Charles MacNeill 5:89031b2f5316 1406 pdata->result__thresh_info =
Charles MacNeill 5:89031b2f5316 1407 (*(pbuffer + 43));
Charles MacNeill 5:89031b2f5316 1408
Charles MacNeill 5:89031b2f5316 1409 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1410
Charles MacNeill 5:89031b2f5316 1411 return status;
Charles MacNeill 5:89031b2f5316 1412 }
Charles MacNeill 5:89031b2f5316 1413
Charles MacNeill 5:89031b2f5316 1414
Charles MacNeill 5:89031b2f5316 1415 VL53LX_Error VL53LX_set_system_results(
Charles MacNeill 5:89031b2f5316 1416 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1417 VL53LX_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1418 {
Charles MacNeill 5:89031b2f5316 1419
Charles MacNeill 5:89031b2f5316 1420
Charles MacNeill 5:89031b2f5316 1421 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1422 uint8_t comms_buffer[VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1423
Charles MacNeill 5:89031b2f5316 1424 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1425
Charles MacNeill 5:89031b2f5316 1426 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1427 status = VL53LX_i2c_encode_system_results(
Charles MacNeill 5:89031b2f5316 1428 pdata,
Charles MacNeill 5:89031b2f5316 1429 VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1430 comms_buffer);
Charles MacNeill 5:89031b2f5316 1431
Charles MacNeill 5:89031b2f5316 1432 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1433 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 1434 Dev,
Charles MacNeill 5:89031b2f5316 1435 VL53LX_RESULT__INTERRUPT_STATUS,
Charles MacNeill 5:89031b2f5316 1436 comms_buffer,
Charles MacNeill 5:89031b2f5316 1437 VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1438
Charles MacNeill 5:89031b2f5316 1439 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1440
Charles MacNeill 5:89031b2f5316 1441 return status;
Charles MacNeill 5:89031b2f5316 1442 }
Charles MacNeill 5:89031b2f5316 1443
Charles MacNeill 5:89031b2f5316 1444
Charles MacNeill 5:89031b2f5316 1445 VL53LX_Error VL53LX_get_system_results(
Charles MacNeill 5:89031b2f5316 1446 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1447 VL53LX_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1448 {
Charles MacNeill 5:89031b2f5316 1449
Charles MacNeill 5:89031b2f5316 1450
Charles MacNeill 5:89031b2f5316 1451 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1452 uint8_t comms_buffer[VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1453
Charles MacNeill 5:89031b2f5316 1454 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1455
Charles MacNeill 5:89031b2f5316 1456 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1457 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 1458 Dev,
Charles MacNeill 5:89031b2f5316 1459 VL53LX_RESULT__INTERRUPT_STATUS,
Charles MacNeill 5:89031b2f5316 1460 comms_buffer,
Charles MacNeill 5:89031b2f5316 1461 VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1462
Charles MacNeill 5:89031b2f5316 1463 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1464 status = VL53LX_i2c_decode_system_results(
Charles MacNeill 5:89031b2f5316 1465 VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1466 comms_buffer,
Charles MacNeill 5:89031b2f5316 1467 pdata);
Charles MacNeill 5:89031b2f5316 1468
Charles MacNeill 5:89031b2f5316 1469 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1470
Charles MacNeill 5:89031b2f5316 1471 return status;
Charles MacNeill 5:89031b2f5316 1472 }
Charles MacNeill 5:89031b2f5316 1473
Charles MacNeill 5:89031b2f5316 1474
Charles MacNeill 5:89031b2f5316 1475 VL53LX_Error VL53LX_i2c_encode_core_results(
Charles MacNeill 5:89031b2f5316 1476 VL53LX_core_results_t *pdata,
Charles MacNeill 5:89031b2f5316 1477 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1478 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 1479 {
Charles MacNeill 5:89031b2f5316 1480
Charles MacNeill 5:89031b2f5316 1481
Charles MacNeill 5:89031b2f5316 1482 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1483
Charles MacNeill 5:89031b2f5316 1484 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1485
Charles MacNeill 5:89031b2f5316 1486 if (buf_size < VL53LX_CORE_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1487 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1488
Charles MacNeill 5:89031b2f5316 1489 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 1490 pdata->result_core__ambient_window_events_sd0,
Charles MacNeill 5:89031b2f5316 1491 4,
Charles MacNeill 5:89031b2f5316 1492 pbuffer + 0);
Charles MacNeill 5:89031b2f5316 1493 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 1494 pdata->result_core__ranging_total_events_sd0,
Charles MacNeill 5:89031b2f5316 1495 4,
Charles MacNeill 5:89031b2f5316 1496 pbuffer + 4);
Charles MacNeill 5:89031b2f5316 1497 VL53LX_i2c_encode_int32_t(
Charles MacNeill 5:89031b2f5316 1498 pdata->result_core__signal_total_events_sd0,
Charles MacNeill 5:89031b2f5316 1499 4,
Charles MacNeill 5:89031b2f5316 1500 pbuffer + 8);
Charles MacNeill 5:89031b2f5316 1501 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 1502 pdata->result_core__total_periods_elapsed_sd0,
Charles MacNeill 5:89031b2f5316 1503 4,
Charles MacNeill 5:89031b2f5316 1504 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 1505 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 1506 pdata->result_core__ambient_window_events_sd1,
Charles MacNeill 5:89031b2f5316 1507 4,
Charles MacNeill 5:89031b2f5316 1508 pbuffer + 16);
Charles MacNeill 5:89031b2f5316 1509 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 1510 pdata->result_core__ranging_total_events_sd1,
Charles MacNeill 5:89031b2f5316 1511 4,
Charles MacNeill 5:89031b2f5316 1512 pbuffer + 20);
Charles MacNeill 5:89031b2f5316 1513 VL53LX_i2c_encode_int32_t(
Charles MacNeill 5:89031b2f5316 1514 pdata->result_core__signal_total_events_sd1,
Charles MacNeill 5:89031b2f5316 1515 4,
Charles MacNeill 5:89031b2f5316 1516 pbuffer + 24);
Charles MacNeill 5:89031b2f5316 1517 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 1518 pdata->result_core__total_periods_elapsed_sd1,
Charles MacNeill 5:89031b2f5316 1519 4,
Charles MacNeill 5:89031b2f5316 1520 pbuffer + 28);
Charles MacNeill 5:89031b2f5316 1521 *(pbuffer + 32) =
Charles MacNeill 5:89031b2f5316 1522 pdata->result_core__spare_0;
Charles MacNeill 5:89031b2f5316 1523 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1524
Charles MacNeill 5:89031b2f5316 1525
Charles MacNeill 5:89031b2f5316 1526 return status;
Charles MacNeill 5:89031b2f5316 1527 }
Charles MacNeill 5:89031b2f5316 1528
Charles MacNeill 5:89031b2f5316 1529
Charles MacNeill 5:89031b2f5316 1530 VL53LX_Error VL53LX_i2c_decode_core_results(
Charles MacNeill 5:89031b2f5316 1531 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1532 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 1533 VL53LX_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1534 {
Charles MacNeill 5:89031b2f5316 1535
Charles MacNeill 5:89031b2f5316 1536
Charles MacNeill 5:89031b2f5316 1537 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1538
Charles MacNeill 5:89031b2f5316 1539 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1540
Charles MacNeill 5:89031b2f5316 1541 if (buf_size < VL53LX_CORE_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1542 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1543
Charles MacNeill 5:89031b2f5316 1544 pdata->result_core__ambient_window_events_sd0 =
Charles MacNeill 5:89031b2f5316 1545 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 0));
Charles MacNeill 5:89031b2f5316 1546 pdata->result_core__ranging_total_events_sd0 =
Charles MacNeill 5:89031b2f5316 1547 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 4));
Charles MacNeill 5:89031b2f5316 1548 pdata->result_core__signal_total_events_sd0 =
Charles MacNeill 5:89031b2f5316 1549 (VL53LX_i2c_decode_int32_t(4, pbuffer + 8));
Charles MacNeill 5:89031b2f5316 1550 pdata->result_core__total_periods_elapsed_sd0 =
Charles MacNeill 5:89031b2f5316 1551 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 1552 pdata->result_core__ambient_window_events_sd1 =
Charles MacNeill 5:89031b2f5316 1553 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 16));
Charles MacNeill 5:89031b2f5316 1554 pdata->result_core__ranging_total_events_sd1 =
Charles MacNeill 5:89031b2f5316 1555 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 20));
Charles MacNeill 5:89031b2f5316 1556 pdata->result_core__signal_total_events_sd1 =
Charles MacNeill 5:89031b2f5316 1557 (VL53LX_i2c_decode_int32_t(4, pbuffer + 24));
Charles MacNeill 5:89031b2f5316 1558 pdata->result_core__total_periods_elapsed_sd1 =
Charles MacNeill 5:89031b2f5316 1559 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 28));
Charles MacNeill 5:89031b2f5316 1560 pdata->result_core__spare_0 =
Charles MacNeill 5:89031b2f5316 1561 (*(pbuffer + 32));
Charles MacNeill 5:89031b2f5316 1562
Charles MacNeill 5:89031b2f5316 1563 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1564
Charles MacNeill 5:89031b2f5316 1565 return status;
Charles MacNeill 5:89031b2f5316 1566 }
Charles MacNeill 5:89031b2f5316 1567
Charles MacNeill 5:89031b2f5316 1568
Charles MacNeill 5:89031b2f5316 1569 VL53LX_Error VL53LX_set_core_results(
Charles MacNeill 5:89031b2f5316 1570 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1571 VL53LX_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1572 {
Charles MacNeill 5:89031b2f5316 1573
Charles MacNeill 5:89031b2f5316 1574
Charles MacNeill 5:89031b2f5316 1575 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1576 uint8_t comms_buffer[VL53LX_CORE_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1577
Charles MacNeill 5:89031b2f5316 1578 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1579
Charles MacNeill 5:89031b2f5316 1580 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1581 status = VL53LX_i2c_encode_core_results(
Charles MacNeill 5:89031b2f5316 1582 pdata,
Charles MacNeill 5:89031b2f5316 1583 VL53LX_CORE_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1584 comms_buffer);
Charles MacNeill 5:89031b2f5316 1585
Charles MacNeill 5:89031b2f5316 1586 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1587 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 1588
Charles MacNeill 5:89031b2f5316 1589 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1590 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 1591 Dev,
Charles MacNeill 5:89031b2f5316 1592 VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
Charles MacNeill 5:89031b2f5316 1593 comms_buffer,
Charles MacNeill 5:89031b2f5316 1594 VL53LX_CORE_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1595
Charles MacNeill 5:89031b2f5316 1596 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1597 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 1598
Charles MacNeill 5:89031b2f5316 1599 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1600
Charles MacNeill 5:89031b2f5316 1601 return status;
Charles MacNeill 5:89031b2f5316 1602 }
Charles MacNeill 5:89031b2f5316 1603
Charles MacNeill 5:89031b2f5316 1604
Charles MacNeill 5:89031b2f5316 1605 VL53LX_Error VL53LX_get_core_results(
Charles MacNeill 5:89031b2f5316 1606 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1607 VL53LX_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1608 {
Charles MacNeill 5:89031b2f5316 1609
Charles MacNeill 5:89031b2f5316 1610
Charles MacNeill 5:89031b2f5316 1611 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1612 uint8_t comms_buffer[VL53LX_CORE_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1613
Charles MacNeill 5:89031b2f5316 1614 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1615
Charles MacNeill 5:89031b2f5316 1616 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1617 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 1618 Dev,
Charles MacNeill 5:89031b2f5316 1619 VL53LX_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
Charles MacNeill 5:89031b2f5316 1620 comms_buffer,
Charles MacNeill 5:89031b2f5316 1621 VL53LX_CORE_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1622
Charles MacNeill 5:89031b2f5316 1623 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1624 status = VL53LX_i2c_decode_core_results(
Charles MacNeill 5:89031b2f5316 1625 VL53LX_CORE_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1626 comms_buffer,
Charles MacNeill 5:89031b2f5316 1627 pdata);
Charles MacNeill 5:89031b2f5316 1628
Charles MacNeill 5:89031b2f5316 1629 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1630
Charles MacNeill 5:89031b2f5316 1631 return status;
Charles MacNeill 5:89031b2f5316 1632 }
Charles MacNeill 5:89031b2f5316 1633
Charles MacNeill 5:89031b2f5316 1634
Charles MacNeill 5:89031b2f5316 1635 VL53LX_Error VL53LX_i2c_encode_debug_results(
Charles MacNeill 5:89031b2f5316 1636 VL53LX_debug_results_t *pdata,
Charles MacNeill 5:89031b2f5316 1637 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1638 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 1639 {
Charles MacNeill 5:89031b2f5316 1640
Charles MacNeill 5:89031b2f5316 1641
Charles MacNeill 5:89031b2f5316 1642 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1643
Charles MacNeill 5:89031b2f5316 1644 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1645
Charles MacNeill 5:89031b2f5316 1646 if (buf_size < VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1647 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1648
Charles MacNeill 5:89031b2f5316 1649 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1650 pdata->phasecal_result__reference_phase,
Charles MacNeill 5:89031b2f5316 1651 2,
Charles MacNeill 5:89031b2f5316 1652 pbuffer + 0);
Charles MacNeill 5:89031b2f5316 1653 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 1654 pdata->phasecal_result__vcsel_start & 0x7F;
Charles MacNeill 5:89031b2f5316 1655 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 1656 pdata->ref_spad_char_result__num_actual_ref_spads & 0x3F;
Charles MacNeill 5:89031b2f5316 1657 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 1658 pdata->ref_spad_char_result__ref_location & 0x3;
Charles MacNeill 5:89031b2f5316 1659 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 1660 pdata->vhv_result__coldboot_status & 0x1;
Charles MacNeill 5:89031b2f5316 1661 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 1662 pdata->vhv_result__search_result & 0x3F;
Charles MacNeill 5:89031b2f5316 1663 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 1664 pdata->vhv_result__latest_setting & 0x3F;
Charles MacNeill 5:89031b2f5316 1665 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1666 pdata->result__osc_calibrate_val & 0x3FF,
Charles MacNeill 5:89031b2f5316 1667 2,
Charles MacNeill 5:89031b2f5316 1668 pbuffer + 8);
Charles MacNeill 5:89031b2f5316 1669 *(pbuffer + 10) =
Charles MacNeill 5:89031b2f5316 1670 pdata->ana_config__powerdown_go1 & 0x3;
Charles MacNeill 5:89031b2f5316 1671 *(pbuffer + 11) =
Charles MacNeill 5:89031b2f5316 1672 pdata->ana_config__ref_bg_ctrl & 0x3;
Charles MacNeill 5:89031b2f5316 1673 *(pbuffer + 12) =
Charles MacNeill 5:89031b2f5316 1674 pdata->ana_config__regdvdd1v2_ctrl & 0xF;
Charles MacNeill 5:89031b2f5316 1675 *(pbuffer + 13) =
Charles MacNeill 5:89031b2f5316 1676 pdata->ana_config__osc_slow_ctrl & 0x7;
Charles MacNeill 5:89031b2f5316 1677 *(pbuffer + 14) =
Charles MacNeill 5:89031b2f5316 1678 pdata->test_mode__status & 0x1;
Charles MacNeill 5:89031b2f5316 1679 *(pbuffer + 15) =
Charles MacNeill 5:89031b2f5316 1680 pdata->firmware__system_status & 0x3;
Charles MacNeill 5:89031b2f5316 1681 *(pbuffer + 16) =
Charles MacNeill 5:89031b2f5316 1682 pdata->firmware__mode_status;
Charles MacNeill 5:89031b2f5316 1683 *(pbuffer + 17) =
Charles MacNeill 5:89031b2f5316 1684 pdata->firmware__secondary_mode_status;
Charles MacNeill 5:89031b2f5316 1685 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1686 pdata->firmware__cal_repeat_rate_counter & 0xFFF,
Charles MacNeill 5:89031b2f5316 1687 2,
Charles MacNeill 5:89031b2f5316 1688 pbuffer + 18);
Charles MacNeill 5:89031b2f5316 1689 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1690 pdata->gph__system__thresh_high,
Charles MacNeill 5:89031b2f5316 1691 2,
Charles MacNeill 5:89031b2f5316 1692 pbuffer + 22);
Charles MacNeill 5:89031b2f5316 1693 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1694 pdata->gph__system__thresh_low,
Charles MacNeill 5:89031b2f5316 1695 2,
Charles MacNeill 5:89031b2f5316 1696 pbuffer + 24);
Charles MacNeill 5:89031b2f5316 1697 *(pbuffer + 26) =
Charles MacNeill 5:89031b2f5316 1698 pdata->gph__system__enable_xtalk_per_quadrant & 0x1;
Charles MacNeill 5:89031b2f5316 1699 *(pbuffer + 27) =
Charles MacNeill 5:89031b2f5316 1700 pdata->gph__spare_0 & 0x7;
Charles MacNeill 5:89031b2f5316 1701 *(pbuffer + 28) =
Charles MacNeill 5:89031b2f5316 1702 pdata->gph__sd_config__woi_sd0;
Charles MacNeill 5:89031b2f5316 1703 *(pbuffer + 29) =
Charles MacNeill 5:89031b2f5316 1704 pdata->gph__sd_config__woi_sd1;
Charles MacNeill 5:89031b2f5316 1705 *(pbuffer + 30) =
Charles MacNeill 5:89031b2f5316 1706 pdata->gph__sd_config__initial_phase_sd0 & 0x7F;
Charles MacNeill 5:89031b2f5316 1707 *(pbuffer + 31) =
Charles MacNeill 5:89031b2f5316 1708 pdata->gph__sd_config__initial_phase_sd1 & 0x7F;
Charles MacNeill 5:89031b2f5316 1709 *(pbuffer + 32) =
Charles MacNeill 5:89031b2f5316 1710 pdata->gph__sd_config__first_order_select & 0x3;
Charles MacNeill 5:89031b2f5316 1711 *(pbuffer + 33) =
Charles MacNeill 5:89031b2f5316 1712 pdata->gph__sd_config__quantifier & 0xF;
Charles MacNeill 5:89031b2f5316 1713 *(pbuffer + 34) =
Charles MacNeill 5:89031b2f5316 1714 pdata->gph__roi_config__user_roi_centre_spad;
Charles MacNeill 5:89031b2f5316 1715 *(pbuffer + 35) =
Charles MacNeill 5:89031b2f5316 1716 pdata->gph__roi_config__user_roi_requested_global_xy_size;
Charles MacNeill 5:89031b2f5316 1717 *(pbuffer + 36) =
Charles MacNeill 5:89031b2f5316 1718 pdata->gph__system__sequence_config;
Charles MacNeill 5:89031b2f5316 1719 *(pbuffer + 37) =
Charles MacNeill 5:89031b2f5316 1720 pdata->gph__gph_id & 0x1;
Charles MacNeill 5:89031b2f5316 1721 *(pbuffer + 38) =
Charles MacNeill 5:89031b2f5316 1722 pdata->system__interrupt_set & 0x3;
Charles MacNeill 5:89031b2f5316 1723 *(pbuffer + 39) =
Charles MacNeill 5:89031b2f5316 1724 pdata->interrupt_manager__enables & 0x1F;
Charles MacNeill 5:89031b2f5316 1725 *(pbuffer + 40) =
Charles MacNeill 5:89031b2f5316 1726 pdata->interrupt_manager__clear & 0x1F;
Charles MacNeill 5:89031b2f5316 1727 *(pbuffer + 41) =
Charles MacNeill 5:89031b2f5316 1728 pdata->interrupt_manager__status & 0x1F;
Charles MacNeill 5:89031b2f5316 1729 *(pbuffer + 42) =
Charles MacNeill 5:89031b2f5316 1730 pdata->mcu_to_host_bank__wr_access_en & 0x1;
Charles MacNeill 5:89031b2f5316 1731 *(pbuffer + 43) =
Charles MacNeill 5:89031b2f5316 1732 pdata->power_management__go1_reset_status & 0x1;
Charles MacNeill 5:89031b2f5316 1733 *(pbuffer + 44) =
Charles MacNeill 5:89031b2f5316 1734 pdata->pad_startup_mode__value_ro & 0x3;
Charles MacNeill 5:89031b2f5316 1735 *(pbuffer + 45) =
Charles MacNeill 5:89031b2f5316 1736 pdata->pad_startup_mode__value_ctrl & 0x3F;
Charles MacNeill 5:89031b2f5316 1737 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 1738 pdata->pll_period_us & 0x3FFFF,
Charles MacNeill 5:89031b2f5316 1739 4,
Charles MacNeill 5:89031b2f5316 1740 pbuffer + 46);
Charles MacNeill 5:89031b2f5316 1741 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 1742 pdata->interrupt_scheduler__data_out,
Charles MacNeill 5:89031b2f5316 1743 4,
Charles MacNeill 5:89031b2f5316 1744 pbuffer + 50);
Charles MacNeill 5:89031b2f5316 1745 *(pbuffer + 54) =
Charles MacNeill 5:89031b2f5316 1746 pdata->nvm_bist__complete & 0x1;
Charles MacNeill 5:89031b2f5316 1747 *(pbuffer + 55) =
Charles MacNeill 5:89031b2f5316 1748 pdata->nvm_bist__status & 0x1;
Charles MacNeill 5:89031b2f5316 1749 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1750
Charles MacNeill 5:89031b2f5316 1751
Charles MacNeill 5:89031b2f5316 1752 return status;
Charles MacNeill 5:89031b2f5316 1753 }
Charles MacNeill 5:89031b2f5316 1754
Charles MacNeill 5:89031b2f5316 1755
Charles MacNeill 5:89031b2f5316 1756 VL53LX_Error VL53LX_i2c_decode_debug_results(
Charles MacNeill 5:89031b2f5316 1757 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1758 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 1759 VL53LX_debug_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1760 {
Charles MacNeill 5:89031b2f5316 1761
Charles MacNeill 5:89031b2f5316 1762
Charles MacNeill 5:89031b2f5316 1763 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1764
Charles MacNeill 5:89031b2f5316 1765 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1766
Charles MacNeill 5:89031b2f5316 1767 if (buf_size < VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1768 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1769
Charles MacNeill 5:89031b2f5316 1770 pdata->phasecal_result__reference_phase =
Charles MacNeill 5:89031b2f5316 1771 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 0));
Charles MacNeill 5:89031b2f5316 1772 pdata->phasecal_result__vcsel_start =
Charles MacNeill 5:89031b2f5316 1773 (*(pbuffer + 2)) & 0x7F;
Charles MacNeill 5:89031b2f5316 1774 pdata->ref_spad_char_result__num_actual_ref_spads =
Charles MacNeill 5:89031b2f5316 1775 (*(pbuffer + 3)) & 0x3F;
Charles MacNeill 5:89031b2f5316 1776 pdata->ref_spad_char_result__ref_location =
Charles MacNeill 5:89031b2f5316 1777 (*(pbuffer + 4)) & 0x3;
Charles MacNeill 5:89031b2f5316 1778 pdata->vhv_result__coldboot_status =
Charles MacNeill 5:89031b2f5316 1779 (*(pbuffer + 5)) & 0x1;
Charles MacNeill 5:89031b2f5316 1780 pdata->vhv_result__search_result =
Charles MacNeill 5:89031b2f5316 1781 (*(pbuffer + 6)) & 0x3F;
Charles MacNeill 5:89031b2f5316 1782 pdata->vhv_result__latest_setting =
Charles MacNeill 5:89031b2f5316 1783 (*(pbuffer + 7)) & 0x3F;
Charles MacNeill 5:89031b2f5316 1784 pdata->result__osc_calibrate_val =
Charles MacNeill 5:89031b2f5316 1785 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 8)) & 0x3FF;
Charles MacNeill 5:89031b2f5316 1786 pdata->ana_config__powerdown_go1 =
Charles MacNeill 5:89031b2f5316 1787 (*(pbuffer + 10)) & 0x3;
Charles MacNeill 5:89031b2f5316 1788 pdata->ana_config__ref_bg_ctrl =
Charles MacNeill 5:89031b2f5316 1789 (*(pbuffer + 11)) & 0x3;
Charles MacNeill 5:89031b2f5316 1790 pdata->ana_config__regdvdd1v2_ctrl =
Charles MacNeill 5:89031b2f5316 1791 (*(pbuffer + 12)) & 0xF;
Charles MacNeill 5:89031b2f5316 1792 pdata->ana_config__osc_slow_ctrl =
Charles MacNeill 5:89031b2f5316 1793 (*(pbuffer + 13)) & 0x7;
Charles MacNeill 5:89031b2f5316 1794 pdata->test_mode__status =
Charles MacNeill 5:89031b2f5316 1795 (*(pbuffer + 14)) & 0x1;
Charles MacNeill 5:89031b2f5316 1796 pdata->firmware__system_status =
Charles MacNeill 5:89031b2f5316 1797 (*(pbuffer + 15)) & 0x3;
Charles MacNeill 5:89031b2f5316 1798 pdata->firmware__mode_status =
Charles MacNeill 5:89031b2f5316 1799 (*(pbuffer + 16));
Charles MacNeill 5:89031b2f5316 1800 pdata->firmware__secondary_mode_status =
Charles MacNeill 5:89031b2f5316 1801 (*(pbuffer + 17));
Charles MacNeill 5:89031b2f5316 1802 pdata->firmware__cal_repeat_rate_counter =
Charles MacNeill 5:89031b2f5316 1803 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 18)) & 0xFFF;
Charles MacNeill 5:89031b2f5316 1804 pdata->gph__system__thresh_high =
Charles MacNeill 5:89031b2f5316 1805 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 22));
Charles MacNeill 5:89031b2f5316 1806 pdata->gph__system__thresh_low =
Charles MacNeill 5:89031b2f5316 1807 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 24));
Charles MacNeill 5:89031b2f5316 1808 pdata->gph__system__enable_xtalk_per_quadrant =
Charles MacNeill 5:89031b2f5316 1809 (*(pbuffer + 26)) & 0x1;
Charles MacNeill 5:89031b2f5316 1810 pdata->gph__spare_0 =
Charles MacNeill 5:89031b2f5316 1811 (*(pbuffer + 27)) & 0x7;
Charles MacNeill 5:89031b2f5316 1812 pdata->gph__sd_config__woi_sd0 =
Charles MacNeill 5:89031b2f5316 1813 (*(pbuffer + 28));
Charles MacNeill 5:89031b2f5316 1814 pdata->gph__sd_config__woi_sd1 =
Charles MacNeill 5:89031b2f5316 1815 (*(pbuffer + 29));
Charles MacNeill 5:89031b2f5316 1816 pdata->gph__sd_config__initial_phase_sd0 =
Charles MacNeill 5:89031b2f5316 1817 (*(pbuffer + 30)) & 0x7F;
Charles MacNeill 5:89031b2f5316 1818 pdata->gph__sd_config__initial_phase_sd1 =
Charles MacNeill 5:89031b2f5316 1819 (*(pbuffer + 31)) & 0x7F;
Charles MacNeill 5:89031b2f5316 1820 pdata->gph__sd_config__first_order_select =
Charles MacNeill 5:89031b2f5316 1821 (*(pbuffer + 32)) & 0x3;
Charles MacNeill 5:89031b2f5316 1822 pdata->gph__sd_config__quantifier =
Charles MacNeill 5:89031b2f5316 1823 (*(pbuffer + 33)) & 0xF;
Charles MacNeill 5:89031b2f5316 1824 pdata->gph__roi_config__user_roi_centre_spad =
Charles MacNeill 5:89031b2f5316 1825 (*(pbuffer + 34));
Charles MacNeill 5:89031b2f5316 1826 pdata->gph__roi_config__user_roi_requested_global_xy_size =
Charles MacNeill 5:89031b2f5316 1827 (*(pbuffer + 35));
Charles MacNeill 5:89031b2f5316 1828 pdata->gph__system__sequence_config =
Charles MacNeill 5:89031b2f5316 1829 (*(pbuffer + 36));
Charles MacNeill 5:89031b2f5316 1830 pdata->gph__gph_id =
Charles MacNeill 5:89031b2f5316 1831 (*(pbuffer + 37)) & 0x1;
Charles MacNeill 5:89031b2f5316 1832 pdata->system__interrupt_set =
Charles MacNeill 5:89031b2f5316 1833 (*(pbuffer + 38)) & 0x3;
Charles MacNeill 5:89031b2f5316 1834 pdata->interrupt_manager__enables =
Charles MacNeill 5:89031b2f5316 1835 (*(pbuffer + 39)) & 0x1F;
Charles MacNeill 5:89031b2f5316 1836 pdata->interrupt_manager__clear =
Charles MacNeill 5:89031b2f5316 1837 (*(pbuffer + 40)) & 0x1F;
Charles MacNeill 5:89031b2f5316 1838 pdata->interrupt_manager__status =
Charles MacNeill 5:89031b2f5316 1839 (*(pbuffer + 41)) & 0x1F;
Charles MacNeill 5:89031b2f5316 1840 pdata->mcu_to_host_bank__wr_access_en =
Charles MacNeill 5:89031b2f5316 1841 (*(pbuffer + 42)) & 0x1;
Charles MacNeill 5:89031b2f5316 1842 pdata->power_management__go1_reset_status =
Charles MacNeill 5:89031b2f5316 1843 (*(pbuffer + 43)) & 0x1;
Charles MacNeill 5:89031b2f5316 1844 pdata->pad_startup_mode__value_ro =
Charles MacNeill 5:89031b2f5316 1845 (*(pbuffer + 44)) & 0x3;
Charles MacNeill 5:89031b2f5316 1846 pdata->pad_startup_mode__value_ctrl =
Charles MacNeill 5:89031b2f5316 1847 (*(pbuffer + 45)) & 0x3F;
Charles MacNeill 5:89031b2f5316 1848 pdata->pll_period_us =
Charles MacNeill 5:89031b2f5316 1849 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 46)) & 0x3FFFF;
Charles MacNeill 5:89031b2f5316 1850 pdata->interrupt_scheduler__data_out =
Charles MacNeill 5:89031b2f5316 1851 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 50));
Charles MacNeill 5:89031b2f5316 1852 pdata->nvm_bist__complete =
Charles MacNeill 5:89031b2f5316 1853 (*(pbuffer + 54)) & 0x1;
Charles MacNeill 5:89031b2f5316 1854 pdata->nvm_bist__status =
Charles MacNeill 5:89031b2f5316 1855 (*(pbuffer + 55)) & 0x1;
Charles MacNeill 5:89031b2f5316 1856
Charles MacNeill 5:89031b2f5316 1857 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1858
Charles MacNeill 5:89031b2f5316 1859 return status;
Charles MacNeill 5:89031b2f5316 1860 }
Charles MacNeill 5:89031b2f5316 1861
Charles MacNeill 5:89031b2f5316 1862
Charles MacNeill 5:89031b2f5316 1863 VL53LX_Error VL53LX_set_debug_results(
Charles MacNeill 5:89031b2f5316 1864 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1865 VL53LX_debug_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1866 {
Charles MacNeill 5:89031b2f5316 1867
Charles MacNeill 5:89031b2f5316 1868
Charles MacNeill 5:89031b2f5316 1869 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1870 uint8_t comms_buffer[VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1871
Charles MacNeill 5:89031b2f5316 1872 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1873
Charles MacNeill 5:89031b2f5316 1874 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1875 status = VL53LX_i2c_encode_debug_results(
Charles MacNeill 5:89031b2f5316 1876 pdata,
Charles MacNeill 5:89031b2f5316 1877 VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1878 comms_buffer);
Charles MacNeill 5:89031b2f5316 1879
Charles MacNeill 5:89031b2f5316 1880 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1881 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 1882
Charles MacNeill 5:89031b2f5316 1883 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1884 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 1885 Dev,
Charles MacNeill 5:89031b2f5316 1886 VL53LX_PHASECAL_RESULT__REFERENCE_PHASE,
Charles MacNeill 5:89031b2f5316 1887 comms_buffer,
Charles MacNeill 5:89031b2f5316 1888 VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1889
Charles MacNeill 5:89031b2f5316 1890 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1891 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 1892
Charles MacNeill 5:89031b2f5316 1893 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1894
Charles MacNeill 5:89031b2f5316 1895 return status;
Charles MacNeill 5:89031b2f5316 1896 }
Charles MacNeill 5:89031b2f5316 1897
Charles MacNeill 5:89031b2f5316 1898
Charles MacNeill 5:89031b2f5316 1899 VL53LX_Error VL53LX_get_debug_results(
Charles MacNeill 5:89031b2f5316 1900 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1901 VL53LX_debug_results_t *pdata)
Charles MacNeill 5:89031b2f5316 1902 {
Charles MacNeill 5:89031b2f5316 1903
Charles MacNeill 5:89031b2f5316 1904
Charles MacNeill 5:89031b2f5316 1905 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1906 uint8_t comms_buffer[VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1907
Charles MacNeill 5:89031b2f5316 1908 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1909
Charles MacNeill 5:89031b2f5316 1910 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1911 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 1912 Dev,
Charles MacNeill 5:89031b2f5316 1913 VL53LX_PHASECAL_RESULT__REFERENCE_PHASE,
Charles MacNeill 5:89031b2f5316 1914 comms_buffer,
Charles MacNeill 5:89031b2f5316 1915 VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 1916
Charles MacNeill 5:89031b2f5316 1917 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1918 status = VL53LX_i2c_decode_debug_results(
Charles MacNeill 5:89031b2f5316 1919 VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1920 comms_buffer,
Charles MacNeill 5:89031b2f5316 1921 pdata);
Charles MacNeill 5:89031b2f5316 1922
Charles MacNeill 5:89031b2f5316 1923 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1924
Charles MacNeill 5:89031b2f5316 1925 return status;
Charles MacNeill 5:89031b2f5316 1926 }
Charles MacNeill 5:89031b2f5316 1927
Charles MacNeill 5:89031b2f5316 1928
Charles MacNeill 5:89031b2f5316 1929 VL53LX_Error VL53LX_i2c_encode_nvm_copy_data(
Charles MacNeill 5:89031b2f5316 1930 VL53LX_nvm_copy_data_t *pdata,
Charles MacNeill 5:89031b2f5316 1931 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1932 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 1933 {
Charles MacNeill 5:89031b2f5316 1934
Charles MacNeill 5:89031b2f5316 1935
Charles MacNeill 5:89031b2f5316 1936 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1937
Charles MacNeill 5:89031b2f5316 1938 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1939
Charles MacNeill 5:89031b2f5316 1940 if (buf_size < VL53LX_NVM_COPY_DATA_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 1941 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1942
Charles MacNeill 5:89031b2f5316 1943 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 1944 pdata->identification__model_id;
Charles MacNeill 5:89031b2f5316 1945 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 1946 pdata->identification__module_type;
Charles MacNeill 5:89031b2f5316 1947 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 1948 pdata->identification__revision_id;
Charles MacNeill 5:89031b2f5316 1949 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 1950 pdata->identification__module_id,
Charles MacNeill 5:89031b2f5316 1951 2,
Charles MacNeill 5:89031b2f5316 1952 pbuffer + 3);
Charles MacNeill 5:89031b2f5316 1953 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 1954 pdata->ana_config__fast_osc__trim_max & 0x7F;
Charles MacNeill 5:89031b2f5316 1955 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 1956 pdata->ana_config__fast_osc__freq_set & 0x7;
Charles MacNeill 5:89031b2f5316 1957 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 1958 pdata->ana_config__vcsel_trim & 0x7;
Charles MacNeill 5:89031b2f5316 1959 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 1960 pdata->ana_config__vcsel_selion & 0x3F;
Charles MacNeill 5:89031b2f5316 1961 *(pbuffer + 9) =
Charles MacNeill 5:89031b2f5316 1962 pdata->ana_config__vcsel_selion_max & 0x3F;
Charles MacNeill 5:89031b2f5316 1963 *(pbuffer + 10) =
Charles MacNeill 5:89031b2f5316 1964 pdata->protected_laser_safety__lock_bit & 0x1;
Charles MacNeill 5:89031b2f5316 1965 *(pbuffer + 11) =
Charles MacNeill 5:89031b2f5316 1966 pdata->laser_safety__key & 0x7F;
Charles MacNeill 5:89031b2f5316 1967 *(pbuffer + 12) =
Charles MacNeill 5:89031b2f5316 1968 pdata->laser_safety__key_ro & 0x1;
Charles MacNeill 5:89031b2f5316 1969 *(pbuffer + 13) =
Charles MacNeill 5:89031b2f5316 1970 pdata->laser_safety__clip & 0x3F;
Charles MacNeill 5:89031b2f5316 1971 *(pbuffer + 14) =
Charles MacNeill 5:89031b2f5316 1972 pdata->laser_safety__mult & 0x3F;
Charles MacNeill 5:89031b2f5316 1973 *(pbuffer + 15) =
Charles MacNeill 5:89031b2f5316 1974 pdata->global_config__spad_enables_rtn_0;
Charles MacNeill 5:89031b2f5316 1975 *(pbuffer + 16) =
Charles MacNeill 5:89031b2f5316 1976 pdata->global_config__spad_enables_rtn_1;
Charles MacNeill 5:89031b2f5316 1977 *(pbuffer + 17) =
Charles MacNeill 5:89031b2f5316 1978 pdata->global_config__spad_enables_rtn_2;
Charles MacNeill 5:89031b2f5316 1979 *(pbuffer + 18) =
Charles MacNeill 5:89031b2f5316 1980 pdata->global_config__spad_enables_rtn_3;
Charles MacNeill 5:89031b2f5316 1981 *(pbuffer + 19) =
Charles MacNeill 5:89031b2f5316 1982 pdata->global_config__spad_enables_rtn_4;
Charles MacNeill 5:89031b2f5316 1983 *(pbuffer + 20) =
Charles MacNeill 5:89031b2f5316 1984 pdata->global_config__spad_enables_rtn_5;
Charles MacNeill 5:89031b2f5316 1985 *(pbuffer + 21) =
Charles MacNeill 5:89031b2f5316 1986 pdata->global_config__spad_enables_rtn_6;
Charles MacNeill 5:89031b2f5316 1987 *(pbuffer + 22) =
Charles MacNeill 5:89031b2f5316 1988 pdata->global_config__spad_enables_rtn_7;
Charles MacNeill 5:89031b2f5316 1989 *(pbuffer + 23) =
Charles MacNeill 5:89031b2f5316 1990 pdata->global_config__spad_enables_rtn_8;
Charles MacNeill 5:89031b2f5316 1991 *(pbuffer + 24) =
Charles MacNeill 5:89031b2f5316 1992 pdata->global_config__spad_enables_rtn_9;
Charles MacNeill 5:89031b2f5316 1993 *(pbuffer + 25) =
Charles MacNeill 5:89031b2f5316 1994 pdata->global_config__spad_enables_rtn_10;
Charles MacNeill 5:89031b2f5316 1995 *(pbuffer + 26) =
Charles MacNeill 5:89031b2f5316 1996 pdata->global_config__spad_enables_rtn_11;
Charles MacNeill 5:89031b2f5316 1997 *(pbuffer + 27) =
Charles MacNeill 5:89031b2f5316 1998 pdata->global_config__spad_enables_rtn_12;
Charles MacNeill 5:89031b2f5316 1999 *(pbuffer + 28) =
Charles MacNeill 5:89031b2f5316 2000 pdata->global_config__spad_enables_rtn_13;
Charles MacNeill 5:89031b2f5316 2001 *(pbuffer + 29) =
Charles MacNeill 5:89031b2f5316 2002 pdata->global_config__spad_enables_rtn_14;
Charles MacNeill 5:89031b2f5316 2003 *(pbuffer + 30) =
Charles MacNeill 5:89031b2f5316 2004 pdata->global_config__spad_enables_rtn_15;
Charles MacNeill 5:89031b2f5316 2005 *(pbuffer + 31) =
Charles MacNeill 5:89031b2f5316 2006 pdata->global_config__spad_enables_rtn_16;
Charles MacNeill 5:89031b2f5316 2007 *(pbuffer + 32) =
Charles MacNeill 5:89031b2f5316 2008 pdata->global_config__spad_enables_rtn_17;
Charles MacNeill 5:89031b2f5316 2009 *(pbuffer + 33) =
Charles MacNeill 5:89031b2f5316 2010 pdata->global_config__spad_enables_rtn_18;
Charles MacNeill 5:89031b2f5316 2011 *(pbuffer + 34) =
Charles MacNeill 5:89031b2f5316 2012 pdata->global_config__spad_enables_rtn_19;
Charles MacNeill 5:89031b2f5316 2013 *(pbuffer + 35) =
Charles MacNeill 5:89031b2f5316 2014 pdata->global_config__spad_enables_rtn_20;
Charles MacNeill 5:89031b2f5316 2015 *(pbuffer + 36) =
Charles MacNeill 5:89031b2f5316 2016 pdata->global_config__spad_enables_rtn_21;
Charles MacNeill 5:89031b2f5316 2017 *(pbuffer + 37) =
Charles MacNeill 5:89031b2f5316 2018 pdata->global_config__spad_enables_rtn_22;
Charles MacNeill 5:89031b2f5316 2019 *(pbuffer + 38) =
Charles MacNeill 5:89031b2f5316 2020 pdata->global_config__spad_enables_rtn_23;
Charles MacNeill 5:89031b2f5316 2021 *(pbuffer + 39) =
Charles MacNeill 5:89031b2f5316 2022 pdata->global_config__spad_enables_rtn_24;
Charles MacNeill 5:89031b2f5316 2023 *(pbuffer + 40) =
Charles MacNeill 5:89031b2f5316 2024 pdata->global_config__spad_enables_rtn_25;
Charles MacNeill 5:89031b2f5316 2025 *(pbuffer + 41) =
Charles MacNeill 5:89031b2f5316 2026 pdata->global_config__spad_enables_rtn_26;
Charles MacNeill 5:89031b2f5316 2027 *(pbuffer + 42) =
Charles MacNeill 5:89031b2f5316 2028 pdata->global_config__spad_enables_rtn_27;
Charles MacNeill 5:89031b2f5316 2029 *(pbuffer + 43) =
Charles MacNeill 5:89031b2f5316 2030 pdata->global_config__spad_enables_rtn_28;
Charles MacNeill 5:89031b2f5316 2031 *(pbuffer + 44) =
Charles MacNeill 5:89031b2f5316 2032 pdata->global_config__spad_enables_rtn_29;
Charles MacNeill 5:89031b2f5316 2033 *(pbuffer + 45) =
Charles MacNeill 5:89031b2f5316 2034 pdata->global_config__spad_enables_rtn_30;
Charles MacNeill 5:89031b2f5316 2035 *(pbuffer + 46) =
Charles MacNeill 5:89031b2f5316 2036 pdata->global_config__spad_enables_rtn_31;
Charles MacNeill 5:89031b2f5316 2037 *(pbuffer + 47) =
Charles MacNeill 5:89031b2f5316 2038 pdata->roi_config__mode_roi_centre_spad;
Charles MacNeill 5:89031b2f5316 2039 *(pbuffer + 48) =
Charles MacNeill 5:89031b2f5316 2040 pdata->roi_config__mode_roi_xy_size;
Charles MacNeill 5:89031b2f5316 2041 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2042
Charles MacNeill 5:89031b2f5316 2043
Charles MacNeill 5:89031b2f5316 2044 return status;
Charles MacNeill 5:89031b2f5316 2045 }
Charles MacNeill 5:89031b2f5316 2046
Charles MacNeill 5:89031b2f5316 2047
Charles MacNeill 5:89031b2f5316 2048 VL53LX_Error VL53LX_i2c_decode_nvm_copy_data(
Charles MacNeill 5:89031b2f5316 2049 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2050 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 2051 VL53LX_nvm_copy_data_t *pdata)
Charles MacNeill 5:89031b2f5316 2052 {
Charles MacNeill 5:89031b2f5316 2053
Charles MacNeill 5:89031b2f5316 2054
Charles MacNeill 5:89031b2f5316 2055 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2056
Charles MacNeill 5:89031b2f5316 2057 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2058
Charles MacNeill 5:89031b2f5316 2059 if (buf_size < VL53LX_NVM_COPY_DATA_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2060 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2061
Charles MacNeill 5:89031b2f5316 2062 pdata->identification__model_id =
Charles MacNeill 5:89031b2f5316 2063 (*(pbuffer + 0));
Charles MacNeill 5:89031b2f5316 2064 pdata->identification__module_type =
Charles MacNeill 5:89031b2f5316 2065 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 2066 pdata->identification__revision_id =
Charles MacNeill 5:89031b2f5316 2067 (*(pbuffer + 2));
Charles MacNeill 5:89031b2f5316 2068 pdata->identification__module_id =
Charles MacNeill 5:89031b2f5316 2069 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 3));
Charles MacNeill 5:89031b2f5316 2070 pdata->ana_config__fast_osc__trim_max =
Charles MacNeill 5:89031b2f5316 2071 (*(pbuffer + 5)) & 0x7F;
Charles MacNeill 5:89031b2f5316 2072 pdata->ana_config__fast_osc__freq_set =
Charles MacNeill 5:89031b2f5316 2073 (*(pbuffer + 6)) & 0x7;
Charles MacNeill 5:89031b2f5316 2074 pdata->ana_config__vcsel_trim =
Charles MacNeill 5:89031b2f5316 2075 (*(pbuffer + 7)) & 0x7;
Charles MacNeill 5:89031b2f5316 2076 pdata->ana_config__vcsel_selion =
Charles MacNeill 5:89031b2f5316 2077 (*(pbuffer + 8)) & 0x3F;
Charles MacNeill 5:89031b2f5316 2078 pdata->ana_config__vcsel_selion_max =
Charles MacNeill 5:89031b2f5316 2079 (*(pbuffer + 9)) & 0x3F;
Charles MacNeill 5:89031b2f5316 2080 pdata->protected_laser_safety__lock_bit =
Charles MacNeill 5:89031b2f5316 2081 (*(pbuffer + 10)) & 0x1;
Charles MacNeill 5:89031b2f5316 2082 pdata->laser_safety__key =
Charles MacNeill 5:89031b2f5316 2083 (*(pbuffer + 11)) & 0x7F;
Charles MacNeill 5:89031b2f5316 2084 pdata->laser_safety__key_ro =
Charles MacNeill 5:89031b2f5316 2085 (*(pbuffer + 12)) & 0x1;
Charles MacNeill 5:89031b2f5316 2086 pdata->laser_safety__clip =
Charles MacNeill 5:89031b2f5316 2087 (*(pbuffer + 13)) & 0x3F;
Charles MacNeill 5:89031b2f5316 2088 pdata->laser_safety__mult =
Charles MacNeill 5:89031b2f5316 2089 (*(pbuffer + 14)) & 0x3F;
Charles MacNeill 5:89031b2f5316 2090 pdata->global_config__spad_enables_rtn_0 =
Charles MacNeill 5:89031b2f5316 2091 (*(pbuffer + 15));
Charles MacNeill 5:89031b2f5316 2092 pdata->global_config__spad_enables_rtn_1 =
Charles MacNeill 5:89031b2f5316 2093 (*(pbuffer + 16));
Charles MacNeill 5:89031b2f5316 2094 pdata->global_config__spad_enables_rtn_2 =
Charles MacNeill 5:89031b2f5316 2095 (*(pbuffer + 17));
Charles MacNeill 5:89031b2f5316 2096 pdata->global_config__spad_enables_rtn_3 =
Charles MacNeill 5:89031b2f5316 2097 (*(pbuffer + 18));
Charles MacNeill 5:89031b2f5316 2098 pdata->global_config__spad_enables_rtn_4 =
Charles MacNeill 5:89031b2f5316 2099 (*(pbuffer + 19));
Charles MacNeill 5:89031b2f5316 2100 pdata->global_config__spad_enables_rtn_5 =
Charles MacNeill 5:89031b2f5316 2101 (*(pbuffer + 20));
Charles MacNeill 5:89031b2f5316 2102 pdata->global_config__spad_enables_rtn_6 =
Charles MacNeill 5:89031b2f5316 2103 (*(pbuffer + 21));
Charles MacNeill 5:89031b2f5316 2104 pdata->global_config__spad_enables_rtn_7 =
Charles MacNeill 5:89031b2f5316 2105 (*(pbuffer + 22));
Charles MacNeill 5:89031b2f5316 2106 pdata->global_config__spad_enables_rtn_8 =
Charles MacNeill 5:89031b2f5316 2107 (*(pbuffer + 23));
Charles MacNeill 5:89031b2f5316 2108 pdata->global_config__spad_enables_rtn_9 =
Charles MacNeill 5:89031b2f5316 2109 (*(pbuffer + 24));
Charles MacNeill 5:89031b2f5316 2110 pdata->global_config__spad_enables_rtn_10 =
Charles MacNeill 5:89031b2f5316 2111 (*(pbuffer + 25));
Charles MacNeill 5:89031b2f5316 2112 pdata->global_config__spad_enables_rtn_11 =
Charles MacNeill 5:89031b2f5316 2113 (*(pbuffer + 26));
Charles MacNeill 5:89031b2f5316 2114 pdata->global_config__spad_enables_rtn_12 =
Charles MacNeill 5:89031b2f5316 2115 (*(pbuffer + 27));
Charles MacNeill 5:89031b2f5316 2116 pdata->global_config__spad_enables_rtn_13 =
Charles MacNeill 5:89031b2f5316 2117 (*(pbuffer + 28));
Charles MacNeill 5:89031b2f5316 2118 pdata->global_config__spad_enables_rtn_14 =
Charles MacNeill 5:89031b2f5316 2119 (*(pbuffer + 29));
Charles MacNeill 5:89031b2f5316 2120 pdata->global_config__spad_enables_rtn_15 =
Charles MacNeill 5:89031b2f5316 2121 (*(pbuffer + 30));
Charles MacNeill 5:89031b2f5316 2122 pdata->global_config__spad_enables_rtn_16 =
Charles MacNeill 5:89031b2f5316 2123 (*(pbuffer + 31));
Charles MacNeill 5:89031b2f5316 2124 pdata->global_config__spad_enables_rtn_17 =
Charles MacNeill 5:89031b2f5316 2125 (*(pbuffer + 32));
Charles MacNeill 5:89031b2f5316 2126 pdata->global_config__spad_enables_rtn_18 =
Charles MacNeill 5:89031b2f5316 2127 (*(pbuffer + 33));
Charles MacNeill 5:89031b2f5316 2128 pdata->global_config__spad_enables_rtn_19 =
Charles MacNeill 5:89031b2f5316 2129 (*(pbuffer + 34));
Charles MacNeill 5:89031b2f5316 2130 pdata->global_config__spad_enables_rtn_20 =
Charles MacNeill 5:89031b2f5316 2131 (*(pbuffer + 35));
Charles MacNeill 5:89031b2f5316 2132 pdata->global_config__spad_enables_rtn_21 =
Charles MacNeill 5:89031b2f5316 2133 (*(pbuffer + 36));
Charles MacNeill 5:89031b2f5316 2134 pdata->global_config__spad_enables_rtn_22 =
Charles MacNeill 5:89031b2f5316 2135 (*(pbuffer + 37));
Charles MacNeill 5:89031b2f5316 2136 pdata->global_config__spad_enables_rtn_23 =
Charles MacNeill 5:89031b2f5316 2137 (*(pbuffer + 38));
Charles MacNeill 5:89031b2f5316 2138 pdata->global_config__spad_enables_rtn_24 =
Charles MacNeill 5:89031b2f5316 2139 (*(pbuffer + 39));
Charles MacNeill 5:89031b2f5316 2140 pdata->global_config__spad_enables_rtn_25 =
Charles MacNeill 5:89031b2f5316 2141 (*(pbuffer + 40));
Charles MacNeill 5:89031b2f5316 2142 pdata->global_config__spad_enables_rtn_26 =
Charles MacNeill 5:89031b2f5316 2143 (*(pbuffer + 41));
Charles MacNeill 5:89031b2f5316 2144 pdata->global_config__spad_enables_rtn_27 =
Charles MacNeill 5:89031b2f5316 2145 (*(pbuffer + 42));
Charles MacNeill 5:89031b2f5316 2146 pdata->global_config__spad_enables_rtn_28 =
Charles MacNeill 5:89031b2f5316 2147 (*(pbuffer + 43));
Charles MacNeill 5:89031b2f5316 2148 pdata->global_config__spad_enables_rtn_29 =
Charles MacNeill 5:89031b2f5316 2149 (*(pbuffer + 44));
Charles MacNeill 5:89031b2f5316 2150 pdata->global_config__spad_enables_rtn_30 =
Charles MacNeill 5:89031b2f5316 2151 (*(pbuffer + 45));
Charles MacNeill 5:89031b2f5316 2152 pdata->global_config__spad_enables_rtn_31 =
Charles MacNeill 5:89031b2f5316 2153 (*(pbuffer + 46));
Charles MacNeill 5:89031b2f5316 2154 pdata->roi_config__mode_roi_centre_spad =
Charles MacNeill 5:89031b2f5316 2155 (*(pbuffer + 47));
Charles MacNeill 5:89031b2f5316 2156 pdata->roi_config__mode_roi_xy_size =
Charles MacNeill 5:89031b2f5316 2157 (*(pbuffer + 48));
Charles MacNeill 5:89031b2f5316 2158
Charles MacNeill 5:89031b2f5316 2159 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2160
Charles MacNeill 5:89031b2f5316 2161 return status;
Charles MacNeill 5:89031b2f5316 2162 }
Charles MacNeill 5:89031b2f5316 2163
Charles MacNeill 5:89031b2f5316 2164
Charles MacNeill 5:89031b2f5316 2165 VL53LX_Error VL53LX_set_nvm_copy_data(
Charles MacNeill 5:89031b2f5316 2166 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2167 VL53LX_nvm_copy_data_t *pdata)
Charles MacNeill 5:89031b2f5316 2168 {
Charles MacNeill 5:89031b2f5316 2169
Charles MacNeill 5:89031b2f5316 2170
Charles MacNeill 5:89031b2f5316 2171 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2172 uint8_t comms_buffer[VL53LX_NVM_COPY_DATA_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2173
Charles MacNeill 5:89031b2f5316 2174 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2175
Charles MacNeill 5:89031b2f5316 2176 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2177 status = VL53LX_i2c_encode_nvm_copy_data(
Charles MacNeill 5:89031b2f5316 2178 pdata,
Charles MacNeill 5:89031b2f5316 2179 VL53LX_NVM_COPY_DATA_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2180 comms_buffer);
Charles MacNeill 5:89031b2f5316 2181
Charles MacNeill 5:89031b2f5316 2182 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2183 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2184
Charles MacNeill 5:89031b2f5316 2185 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2186 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 2187 Dev,
Charles MacNeill 5:89031b2f5316 2188 VL53LX_IDENTIFICATION__MODEL_ID,
Charles MacNeill 5:89031b2f5316 2189 comms_buffer,
Charles MacNeill 5:89031b2f5316 2190 VL53LX_NVM_COPY_DATA_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2191
Charles MacNeill 5:89031b2f5316 2192 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2193 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2194
Charles MacNeill 5:89031b2f5316 2195 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2196
Charles MacNeill 5:89031b2f5316 2197 return status;
Charles MacNeill 5:89031b2f5316 2198 }
Charles MacNeill 5:89031b2f5316 2199
Charles MacNeill 5:89031b2f5316 2200
Charles MacNeill 5:89031b2f5316 2201 VL53LX_Error VL53LX_get_nvm_copy_data(
Charles MacNeill 5:89031b2f5316 2202 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2203 VL53LX_nvm_copy_data_t *pdata)
Charles MacNeill 5:89031b2f5316 2204 {
Charles MacNeill 5:89031b2f5316 2205
Charles MacNeill 5:89031b2f5316 2206
Charles MacNeill 5:89031b2f5316 2207 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2208 uint8_t comms_buffer[VL53LX_NVM_COPY_DATA_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2209
Charles MacNeill 5:89031b2f5316 2210 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2211
Charles MacNeill 5:89031b2f5316 2212 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2213 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 2214 Dev,
Charles MacNeill 5:89031b2f5316 2215 VL53LX_IDENTIFICATION__MODEL_ID,
Charles MacNeill 5:89031b2f5316 2216 comms_buffer,
Charles MacNeill 5:89031b2f5316 2217 VL53LX_NVM_COPY_DATA_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2218
Charles MacNeill 5:89031b2f5316 2219 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2220 status = VL53LX_i2c_decode_nvm_copy_data(
Charles MacNeill 5:89031b2f5316 2221 VL53LX_NVM_COPY_DATA_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2222 comms_buffer,
Charles MacNeill 5:89031b2f5316 2223 pdata);
Charles MacNeill 5:89031b2f5316 2224
Charles MacNeill 5:89031b2f5316 2225 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2226
Charles MacNeill 5:89031b2f5316 2227 return status;
Charles MacNeill 5:89031b2f5316 2228 }
Charles MacNeill 5:89031b2f5316 2229
Charles MacNeill 5:89031b2f5316 2230
Charles MacNeill 5:89031b2f5316 2231 VL53LX_Error VL53LX_i2c_encode_prev_shadow_system_results(
Charles MacNeill 5:89031b2f5316 2232 VL53LX_prev_shadow_system_results_t *pdata,
Charles MacNeill 5:89031b2f5316 2233 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2234 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 2235 {
Charles MacNeill 5:89031b2f5316 2236
Charles MacNeill 5:89031b2f5316 2237
Charles MacNeill 5:89031b2f5316 2238 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2239
Charles MacNeill 5:89031b2f5316 2240 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2241
Charles MacNeill 5:89031b2f5316 2242 if (buf_size < VL53LX_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2243 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2244
Charles MacNeill 5:89031b2f5316 2245 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 2246 pdata->prev_shadow_result__interrupt_status & 0x3F;
Charles MacNeill 5:89031b2f5316 2247 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 2248 pdata->prev_shadow_result__range_status;
Charles MacNeill 5:89031b2f5316 2249 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 2250 pdata->prev_shadow_result__report_status & 0xF;
Charles MacNeill 5:89031b2f5316 2251 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 2252 pdata->prev_shadow_result__stream_count;
Charles MacNeill 5:89031b2f5316 2253 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2254 pdata->prev_shadow_result__dss_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 2255 2,
Charles MacNeill 5:89031b2f5316 2256 pbuffer + 4);
Charles MacNeill 5:89031b2f5316 2257 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2258 pdata->prev_shadow_result__peak_signal_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 2259 2,
Charles MacNeill 5:89031b2f5316 2260 pbuffer + 6);
Charles MacNeill 5:89031b2f5316 2261 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2262 pdata->prev_shadow_result__ambient_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 2263 2,
Charles MacNeill 5:89031b2f5316 2264 pbuffer + 8);
Charles MacNeill 5:89031b2f5316 2265 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2266 pdata->prev_shadow_result__sigma_sd0,
Charles MacNeill 5:89031b2f5316 2267 2,
Charles MacNeill 5:89031b2f5316 2268 pbuffer + 10);
Charles MacNeill 5:89031b2f5316 2269 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2270 pdata->prev_shadow_result__phase_sd0,
Charles MacNeill 5:89031b2f5316 2271 2,
Charles MacNeill 5:89031b2f5316 2272 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 2273 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2274 pdata->prev_shadow_result__final_crosstalk_corrected_range_mm_sd0,
Charles MacNeill 5:89031b2f5316 2275 2,
Charles MacNeill 5:89031b2f5316 2276 pbuffer + 14);
Charles MacNeill 5:89031b2f5316 2277 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2278 pdata->psr__peak_signal_count_rate_crosstalk_corrected_mcps_sd0,
Charles MacNeill 5:89031b2f5316 2279 2,
Charles MacNeill 5:89031b2f5316 2280 pbuffer + 16);
Charles MacNeill 5:89031b2f5316 2281 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2282 pdata->prev_shadow_result__mm_inner_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 2283 2,
Charles MacNeill 5:89031b2f5316 2284 pbuffer + 18);
Charles MacNeill 5:89031b2f5316 2285 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2286 pdata->prev_shadow_result__mm_outer_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 2287 2,
Charles MacNeill 5:89031b2f5316 2288 pbuffer + 20);
Charles MacNeill 5:89031b2f5316 2289 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2290 pdata->prev_shadow_result__avg_signal_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 2291 2,
Charles MacNeill 5:89031b2f5316 2292 pbuffer + 22);
Charles MacNeill 5:89031b2f5316 2293 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2294 pdata->prev_shadow_result__dss_actual_effective_spads_sd1,
Charles MacNeill 5:89031b2f5316 2295 2,
Charles MacNeill 5:89031b2f5316 2296 pbuffer + 24);
Charles MacNeill 5:89031b2f5316 2297 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2298 pdata->prev_shadow_result__peak_signal_count_rate_mcps_sd1,
Charles MacNeill 5:89031b2f5316 2299 2,
Charles MacNeill 5:89031b2f5316 2300 pbuffer + 26);
Charles MacNeill 5:89031b2f5316 2301 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2302 pdata->prev_shadow_result__ambient_count_rate_mcps_sd1,
Charles MacNeill 5:89031b2f5316 2303 2,
Charles MacNeill 5:89031b2f5316 2304 pbuffer + 28);
Charles MacNeill 5:89031b2f5316 2305 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2306 pdata->prev_shadow_result__sigma_sd1,
Charles MacNeill 5:89031b2f5316 2307 2,
Charles MacNeill 5:89031b2f5316 2308 pbuffer + 30);
Charles MacNeill 5:89031b2f5316 2309 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2310 pdata->prev_shadow_result__phase_sd1,
Charles MacNeill 5:89031b2f5316 2311 2,
Charles MacNeill 5:89031b2f5316 2312 pbuffer + 32);
Charles MacNeill 5:89031b2f5316 2313 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2314 pdata->prev_shadow_result__final_crosstalk_corrected_range_mm_sd1,
Charles MacNeill 5:89031b2f5316 2315 2,
Charles MacNeill 5:89031b2f5316 2316 pbuffer + 34);
Charles MacNeill 5:89031b2f5316 2317 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2318 pdata->prev_shadow_result__spare_0_sd1,
Charles MacNeill 5:89031b2f5316 2319 2,
Charles MacNeill 5:89031b2f5316 2320 pbuffer + 36);
Charles MacNeill 5:89031b2f5316 2321 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2322 pdata->prev_shadow_result__spare_1_sd1,
Charles MacNeill 5:89031b2f5316 2323 2,
Charles MacNeill 5:89031b2f5316 2324 pbuffer + 38);
Charles MacNeill 5:89031b2f5316 2325 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2326 pdata->prev_shadow_result__spare_2_sd1,
Charles MacNeill 5:89031b2f5316 2327 2,
Charles MacNeill 5:89031b2f5316 2328 pbuffer + 40);
Charles MacNeill 5:89031b2f5316 2329 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2330 pdata->prev_shadow_result__spare_3_sd1,
Charles MacNeill 5:89031b2f5316 2331 2,
Charles MacNeill 5:89031b2f5316 2332 pbuffer + 42);
Charles MacNeill 5:89031b2f5316 2333 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2334
Charles MacNeill 5:89031b2f5316 2335
Charles MacNeill 5:89031b2f5316 2336 return status;
Charles MacNeill 5:89031b2f5316 2337 }
Charles MacNeill 5:89031b2f5316 2338
Charles MacNeill 5:89031b2f5316 2339
Charles MacNeill 5:89031b2f5316 2340 VL53LX_Error VL53LX_i2c_decode_prev_shadow_system_results(
Charles MacNeill 5:89031b2f5316 2341 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2342 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 2343 VL53LX_prev_shadow_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 2344 {
Charles MacNeill 5:89031b2f5316 2345
Charles MacNeill 5:89031b2f5316 2346
Charles MacNeill 5:89031b2f5316 2347 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2348
Charles MacNeill 5:89031b2f5316 2349 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2350
Charles MacNeill 5:89031b2f5316 2351 if (buf_size < VL53LX_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2352 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2353
Charles MacNeill 5:89031b2f5316 2354 pdata->prev_shadow_result__interrupt_status =
Charles MacNeill 5:89031b2f5316 2355 (*(pbuffer + 0)) & 0x3F;
Charles MacNeill 5:89031b2f5316 2356 pdata->prev_shadow_result__range_status =
Charles MacNeill 5:89031b2f5316 2357 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 2358 pdata->prev_shadow_result__report_status =
Charles MacNeill 5:89031b2f5316 2359 (*(pbuffer + 2)) & 0xF;
Charles MacNeill 5:89031b2f5316 2360 pdata->prev_shadow_result__stream_count =
Charles MacNeill 5:89031b2f5316 2361 (*(pbuffer + 3));
Charles MacNeill 5:89031b2f5316 2362 pdata->prev_shadow_result__dss_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 2363 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 4));
Charles MacNeill 5:89031b2f5316 2364 pdata->prev_shadow_result__peak_signal_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 2365 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 6));
Charles MacNeill 5:89031b2f5316 2366 pdata->prev_shadow_result__ambient_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 2367 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 8));
Charles MacNeill 5:89031b2f5316 2368 pdata->prev_shadow_result__sigma_sd0 =
Charles MacNeill 5:89031b2f5316 2369 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 10));
Charles MacNeill 5:89031b2f5316 2370 pdata->prev_shadow_result__phase_sd0 =
Charles MacNeill 5:89031b2f5316 2371 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 2372 pdata->prev_shadow_result__final_crosstalk_corrected_range_mm_sd0 =
Charles MacNeill 5:89031b2f5316 2373 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 14));
Charles MacNeill 5:89031b2f5316 2374 pdata->psr__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 2375 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 16));
Charles MacNeill 5:89031b2f5316 2376 pdata->prev_shadow_result__mm_inner_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 2377 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 18));
Charles MacNeill 5:89031b2f5316 2378 pdata->prev_shadow_result__mm_outer_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 2379 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 20));
Charles MacNeill 5:89031b2f5316 2380 pdata->prev_shadow_result__avg_signal_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 2381 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 22));
Charles MacNeill 5:89031b2f5316 2382 pdata->prev_shadow_result__dss_actual_effective_spads_sd1 =
Charles MacNeill 5:89031b2f5316 2383 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 24));
Charles MacNeill 5:89031b2f5316 2384 pdata->prev_shadow_result__peak_signal_count_rate_mcps_sd1 =
Charles MacNeill 5:89031b2f5316 2385 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 26));
Charles MacNeill 5:89031b2f5316 2386 pdata->prev_shadow_result__ambient_count_rate_mcps_sd1 =
Charles MacNeill 5:89031b2f5316 2387 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 28));
Charles MacNeill 5:89031b2f5316 2388 pdata->prev_shadow_result__sigma_sd1 =
Charles MacNeill 5:89031b2f5316 2389 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 30));
Charles MacNeill 5:89031b2f5316 2390 pdata->prev_shadow_result__phase_sd1 =
Charles MacNeill 5:89031b2f5316 2391 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 32));
Charles MacNeill 5:89031b2f5316 2392 pdata->prev_shadow_result__final_crosstalk_corrected_range_mm_sd1 =
Charles MacNeill 5:89031b2f5316 2393 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 34));
Charles MacNeill 5:89031b2f5316 2394 pdata->prev_shadow_result__spare_0_sd1 =
Charles MacNeill 5:89031b2f5316 2395 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 36));
Charles MacNeill 5:89031b2f5316 2396 pdata->prev_shadow_result__spare_1_sd1 =
Charles MacNeill 5:89031b2f5316 2397 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 38));
Charles MacNeill 5:89031b2f5316 2398 pdata->prev_shadow_result__spare_2_sd1 =
Charles MacNeill 5:89031b2f5316 2399 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 40));
Charles MacNeill 5:89031b2f5316 2400 pdata->prev_shadow_result__spare_3_sd1 =
Charles MacNeill 5:89031b2f5316 2401 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 42));
Charles MacNeill 5:89031b2f5316 2402
Charles MacNeill 5:89031b2f5316 2403 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2404
Charles MacNeill 5:89031b2f5316 2405 return status;
Charles MacNeill 5:89031b2f5316 2406 }
Charles MacNeill 5:89031b2f5316 2407
Charles MacNeill 5:89031b2f5316 2408
Charles MacNeill 5:89031b2f5316 2409 VL53LX_Error VL53LX_set_prev_shadow_system_results(
Charles MacNeill 5:89031b2f5316 2410 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2411 VL53LX_prev_shadow_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 2412 {
Charles MacNeill 5:89031b2f5316 2413
Charles MacNeill 5:89031b2f5316 2414
Charles MacNeill 5:89031b2f5316 2415 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2416 uint8_t comms_buffer[VL53LX_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2417
Charles MacNeill 5:89031b2f5316 2418 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2419
Charles MacNeill 5:89031b2f5316 2420 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2421 status = VL53LX_i2c_encode_prev_shadow_system_results(
Charles MacNeill 5:89031b2f5316 2422 pdata,
Charles MacNeill 5:89031b2f5316 2423 VL53LX_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2424 comms_buffer);
Charles MacNeill 5:89031b2f5316 2425
Charles MacNeill 5:89031b2f5316 2426 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2427 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2428
Charles MacNeill 5:89031b2f5316 2429 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2430 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 2431 Dev,
Charles MacNeill 5:89031b2f5316 2432 VL53LX_PREV_SHADOW_RESULT__INTERRUPT_STATUS,
Charles MacNeill 5:89031b2f5316 2433 comms_buffer,
Charles MacNeill 5:89031b2f5316 2434 VL53LX_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2435
Charles MacNeill 5:89031b2f5316 2436 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2437 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2438
Charles MacNeill 5:89031b2f5316 2439 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2440
Charles MacNeill 5:89031b2f5316 2441 return status;
Charles MacNeill 5:89031b2f5316 2442 }
Charles MacNeill 5:89031b2f5316 2443
Charles MacNeill 5:89031b2f5316 2444
Charles MacNeill 5:89031b2f5316 2445 VL53LX_Error VL53LX_get_prev_shadow_system_results(
Charles MacNeill 5:89031b2f5316 2446 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2447 VL53LX_prev_shadow_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 2448 {
Charles MacNeill 5:89031b2f5316 2449
Charles MacNeill 5:89031b2f5316 2450
Charles MacNeill 5:89031b2f5316 2451 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2452 uint8_t comms_buffer[VL53LX_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2453
Charles MacNeill 5:89031b2f5316 2454 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2455
Charles MacNeill 5:89031b2f5316 2456 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2457 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2458
Charles MacNeill 5:89031b2f5316 2459 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2460 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 2461 Dev,
Charles MacNeill 5:89031b2f5316 2462 VL53LX_PREV_SHADOW_RESULT__INTERRUPT_STATUS,
Charles MacNeill 5:89031b2f5316 2463 comms_buffer,
Charles MacNeill 5:89031b2f5316 2464 VL53LX_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2465
Charles MacNeill 5:89031b2f5316 2466 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2467 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2468
Charles MacNeill 5:89031b2f5316 2469 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2470 status = VL53LX_i2c_decode_prev_shadow_system_results(
Charles MacNeill 5:89031b2f5316 2471 VL53LX_PREV_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2472 comms_buffer,
Charles MacNeill 5:89031b2f5316 2473 pdata);
Charles MacNeill 5:89031b2f5316 2474
Charles MacNeill 5:89031b2f5316 2475 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2476
Charles MacNeill 5:89031b2f5316 2477 return status;
Charles MacNeill 5:89031b2f5316 2478 }
Charles MacNeill 5:89031b2f5316 2479
Charles MacNeill 5:89031b2f5316 2480
Charles MacNeill 5:89031b2f5316 2481 VL53LX_Error VL53LX_i2c_encode_prev_shadow_core_results(
Charles MacNeill 5:89031b2f5316 2482 VL53LX_prev_shadow_core_results_t *pdata,
Charles MacNeill 5:89031b2f5316 2483 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2484 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 2485 {
Charles MacNeill 5:89031b2f5316 2486
Charles MacNeill 5:89031b2f5316 2487
Charles MacNeill 5:89031b2f5316 2488 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2489
Charles MacNeill 5:89031b2f5316 2490 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2491
Charles MacNeill 5:89031b2f5316 2492 if (buf_size < VL53LX_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2493 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2494
Charles MacNeill 5:89031b2f5316 2495 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 2496 pdata->prev_shadow_result_core__ambient_window_events_sd0,
Charles MacNeill 5:89031b2f5316 2497 4,
Charles MacNeill 5:89031b2f5316 2498 pbuffer + 0);
Charles MacNeill 5:89031b2f5316 2499 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 2500 pdata->prev_shadow_result_core__ranging_total_events_sd0,
Charles MacNeill 5:89031b2f5316 2501 4,
Charles MacNeill 5:89031b2f5316 2502 pbuffer + 4);
Charles MacNeill 5:89031b2f5316 2503 VL53LX_i2c_encode_int32_t(
Charles MacNeill 5:89031b2f5316 2504 pdata->prev_shadow_result_core__signal_total_events_sd0,
Charles MacNeill 5:89031b2f5316 2505 4,
Charles MacNeill 5:89031b2f5316 2506 pbuffer + 8);
Charles MacNeill 5:89031b2f5316 2507 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 2508 pdata->prev_shadow_result_core__total_periods_elapsed_sd0,
Charles MacNeill 5:89031b2f5316 2509 4,
Charles MacNeill 5:89031b2f5316 2510 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 2511 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 2512 pdata->prev_shadow_result_core__ambient_window_events_sd1,
Charles MacNeill 5:89031b2f5316 2513 4,
Charles MacNeill 5:89031b2f5316 2514 pbuffer + 16);
Charles MacNeill 5:89031b2f5316 2515 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 2516 pdata->prev_shadow_result_core__ranging_total_events_sd1,
Charles MacNeill 5:89031b2f5316 2517 4,
Charles MacNeill 5:89031b2f5316 2518 pbuffer + 20);
Charles MacNeill 5:89031b2f5316 2519 VL53LX_i2c_encode_int32_t(
Charles MacNeill 5:89031b2f5316 2520 pdata->prev_shadow_result_core__signal_total_events_sd1,
Charles MacNeill 5:89031b2f5316 2521 4,
Charles MacNeill 5:89031b2f5316 2522 pbuffer + 24);
Charles MacNeill 5:89031b2f5316 2523 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 2524 pdata->prev_shadow_result_core__total_periods_elapsed_sd1,
Charles MacNeill 5:89031b2f5316 2525 4,
Charles MacNeill 5:89031b2f5316 2526 pbuffer + 28);
Charles MacNeill 5:89031b2f5316 2527 *(pbuffer + 32) =
Charles MacNeill 5:89031b2f5316 2528 pdata->prev_shadow_result_core__spare_0;
Charles MacNeill 5:89031b2f5316 2529 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2530
Charles MacNeill 5:89031b2f5316 2531
Charles MacNeill 5:89031b2f5316 2532 return status;
Charles MacNeill 5:89031b2f5316 2533 }
Charles MacNeill 5:89031b2f5316 2534
Charles MacNeill 5:89031b2f5316 2535
Charles MacNeill 5:89031b2f5316 2536 VL53LX_Error VL53LX_i2c_decode_prev_shadow_core_results(
Charles MacNeill 5:89031b2f5316 2537 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2538 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 2539 VL53LX_prev_shadow_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 2540 {
Charles MacNeill 5:89031b2f5316 2541
Charles MacNeill 5:89031b2f5316 2542
Charles MacNeill 5:89031b2f5316 2543 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2544
Charles MacNeill 5:89031b2f5316 2545 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2546
Charles MacNeill 5:89031b2f5316 2547 if (buf_size < VL53LX_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2548 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2549
Charles MacNeill 5:89031b2f5316 2550 pdata->prev_shadow_result_core__ambient_window_events_sd0 =
Charles MacNeill 5:89031b2f5316 2551 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 0));
Charles MacNeill 5:89031b2f5316 2552 pdata->prev_shadow_result_core__ranging_total_events_sd0 =
Charles MacNeill 5:89031b2f5316 2553 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 4));
Charles MacNeill 5:89031b2f5316 2554 pdata->prev_shadow_result_core__signal_total_events_sd0 =
Charles MacNeill 5:89031b2f5316 2555 (VL53LX_i2c_decode_int32_t(4, pbuffer + 8));
Charles MacNeill 5:89031b2f5316 2556 pdata->prev_shadow_result_core__total_periods_elapsed_sd0 =
Charles MacNeill 5:89031b2f5316 2557 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 2558 pdata->prev_shadow_result_core__ambient_window_events_sd1 =
Charles MacNeill 5:89031b2f5316 2559 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 16));
Charles MacNeill 5:89031b2f5316 2560 pdata->prev_shadow_result_core__ranging_total_events_sd1 =
Charles MacNeill 5:89031b2f5316 2561 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 20));
Charles MacNeill 5:89031b2f5316 2562 pdata->prev_shadow_result_core__signal_total_events_sd1 =
Charles MacNeill 5:89031b2f5316 2563 (VL53LX_i2c_decode_int32_t(4, pbuffer + 24));
Charles MacNeill 5:89031b2f5316 2564 pdata->prev_shadow_result_core__total_periods_elapsed_sd1 =
Charles MacNeill 5:89031b2f5316 2565 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 28));
Charles MacNeill 5:89031b2f5316 2566 pdata->prev_shadow_result_core__spare_0 =
Charles MacNeill 5:89031b2f5316 2567 (*(pbuffer + 32));
Charles MacNeill 5:89031b2f5316 2568
Charles MacNeill 5:89031b2f5316 2569 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2570
Charles MacNeill 5:89031b2f5316 2571 return status;
Charles MacNeill 5:89031b2f5316 2572 }
Charles MacNeill 5:89031b2f5316 2573
Charles MacNeill 5:89031b2f5316 2574
Charles MacNeill 5:89031b2f5316 2575 VL53LX_Error VL53LX_set_prev_shadow_core_results(
Charles MacNeill 5:89031b2f5316 2576 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2577 VL53LX_prev_shadow_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 2578 {
Charles MacNeill 5:89031b2f5316 2579
Charles MacNeill 5:89031b2f5316 2580
Charles MacNeill 5:89031b2f5316 2581 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2582 uint8_t comms_buffer[VL53LX_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2583
Charles MacNeill 5:89031b2f5316 2584 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2585
Charles MacNeill 5:89031b2f5316 2586 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2587 status = VL53LX_i2c_encode_prev_shadow_core_results(
Charles MacNeill 5:89031b2f5316 2588 pdata,
Charles MacNeill 5:89031b2f5316 2589 VL53LX_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2590 comms_buffer);
Charles MacNeill 5:89031b2f5316 2591
Charles MacNeill 5:89031b2f5316 2592 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2593 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2594
Charles MacNeill 5:89031b2f5316 2595 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2596 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 2597 Dev,
Charles MacNeill 5:89031b2f5316 2598 VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
Charles MacNeill 5:89031b2f5316 2599 comms_buffer,
Charles MacNeill 5:89031b2f5316 2600 VL53LX_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2601
Charles MacNeill 5:89031b2f5316 2602 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2603 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2604
Charles MacNeill 5:89031b2f5316 2605 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2606
Charles MacNeill 5:89031b2f5316 2607 return status;
Charles MacNeill 5:89031b2f5316 2608 }
Charles MacNeill 5:89031b2f5316 2609
Charles MacNeill 5:89031b2f5316 2610
Charles MacNeill 5:89031b2f5316 2611 VL53LX_Error VL53LX_get_prev_shadow_core_results(
Charles MacNeill 5:89031b2f5316 2612 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2613 VL53LX_prev_shadow_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 2614 {
Charles MacNeill 5:89031b2f5316 2615
Charles MacNeill 5:89031b2f5316 2616
Charles MacNeill 5:89031b2f5316 2617 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2618 uint8_t comms_buffer[VL53LX_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2619
Charles MacNeill 5:89031b2f5316 2620 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2621
Charles MacNeill 5:89031b2f5316 2622 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2623 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2624
Charles MacNeill 5:89031b2f5316 2625 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2626 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 2627 Dev,
Charles MacNeill 5:89031b2f5316 2628 VL53LX_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
Charles MacNeill 5:89031b2f5316 2629 comms_buffer,
Charles MacNeill 5:89031b2f5316 2630 VL53LX_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2631
Charles MacNeill 5:89031b2f5316 2632 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2633 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2634
Charles MacNeill 5:89031b2f5316 2635 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2636 status = VL53LX_i2c_decode_prev_shadow_core_results(
Charles MacNeill 5:89031b2f5316 2637 VL53LX_PREV_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2638 comms_buffer,
Charles MacNeill 5:89031b2f5316 2639 pdata);
Charles MacNeill 5:89031b2f5316 2640
Charles MacNeill 5:89031b2f5316 2641 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2642
Charles MacNeill 5:89031b2f5316 2643 return status;
Charles MacNeill 5:89031b2f5316 2644 }
Charles MacNeill 5:89031b2f5316 2645
Charles MacNeill 5:89031b2f5316 2646
Charles MacNeill 5:89031b2f5316 2647 VL53LX_Error VL53LX_i2c_encode_patch_debug(
Charles MacNeill 5:89031b2f5316 2648 VL53LX_patch_debug_t *pdata,
Charles MacNeill 5:89031b2f5316 2649 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2650 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 2651 {
Charles MacNeill 5:89031b2f5316 2652
Charles MacNeill 5:89031b2f5316 2653
Charles MacNeill 5:89031b2f5316 2654 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2655
Charles MacNeill 5:89031b2f5316 2656 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2657
Charles MacNeill 5:89031b2f5316 2658 if (buf_size < VL53LX_PATCH_DEBUG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2659 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2660
Charles MacNeill 5:89031b2f5316 2661 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 2662 pdata->result__debug_status;
Charles MacNeill 5:89031b2f5316 2663 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 2664 pdata->result__debug_stage;
Charles MacNeill 5:89031b2f5316 2665 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2666
Charles MacNeill 5:89031b2f5316 2667
Charles MacNeill 5:89031b2f5316 2668 return status;
Charles MacNeill 5:89031b2f5316 2669 }
Charles MacNeill 5:89031b2f5316 2670
Charles MacNeill 5:89031b2f5316 2671
Charles MacNeill 5:89031b2f5316 2672 VL53LX_Error VL53LX_i2c_decode_patch_debug(
Charles MacNeill 5:89031b2f5316 2673 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2674 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 2675 VL53LX_patch_debug_t *pdata)
Charles MacNeill 5:89031b2f5316 2676 {
Charles MacNeill 5:89031b2f5316 2677
Charles MacNeill 5:89031b2f5316 2678
Charles MacNeill 5:89031b2f5316 2679 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2680
Charles MacNeill 5:89031b2f5316 2681 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2682
Charles MacNeill 5:89031b2f5316 2683 if (buf_size < VL53LX_PATCH_DEBUG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2684 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2685
Charles MacNeill 5:89031b2f5316 2686 pdata->result__debug_status =
Charles MacNeill 5:89031b2f5316 2687 (*(pbuffer + 0));
Charles MacNeill 5:89031b2f5316 2688 pdata->result__debug_stage =
Charles MacNeill 5:89031b2f5316 2689 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 2690
Charles MacNeill 5:89031b2f5316 2691 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2692
Charles MacNeill 5:89031b2f5316 2693 return status;
Charles MacNeill 5:89031b2f5316 2694 }
Charles MacNeill 5:89031b2f5316 2695
Charles MacNeill 5:89031b2f5316 2696
Charles MacNeill 5:89031b2f5316 2697 VL53LX_Error VL53LX_set_patch_debug(
Charles MacNeill 5:89031b2f5316 2698 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2699 VL53LX_patch_debug_t *pdata)
Charles MacNeill 5:89031b2f5316 2700 {
Charles MacNeill 5:89031b2f5316 2701
Charles MacNeill 5:89031b2f5316 2702
Charles MacNeill 5:89031b2f5316 2703 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2704 uint8_t comms_buffer[VL53LX_PATCH_DEBUG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2705
Charles MacNeill 5:89031b2f5316 2706 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2707
Charles MacNeill 5:89031b2f5316 2708 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2709 status = VL53LX_i2c_encode_patch_debug(
Charles MacNeill 5:89031b2f5316 2710 pdata,
Charles MacNeill 5:89031b2f5316 2711 VL53LX_PATCH_DEBUG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2712 comms_buffer);
Charles MacNeill 5:89031b2f5316 2713
Charles MacNeill 5:89031b2f5316 2714 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2715 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2716
Charles MacNeill 5:89031b2f5316 2717 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2718 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 2719 Dev,
Charles MacNeill 5:89031b2f5316 2720 VL53LX_RESULT__DEBUG_STATUS,
Charles MacNeill 5:89031b2f5316 2721 comms_buffer,
Charles MacNeill 5:89031b2f5316 2722 VL53LX_PATCH_DEBUG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2723
Charles MacNeill 5:89031b2f5316 2724 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2725 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2726
Charles MacNeill 5:89031b2f5316 2727 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2728
Charles MacNeill 5:89031b2f5316 2729 return status;
Charles MacNeill 5:89031b2f5316 2730 }
Charles MacNeill 5:89031b2f5316 2731
Charles MacNeill 5:89031b2f5316 2732
Charles MacNeill 5:89031b2f5316 2733 VL53LX_Error VL53LX_get_patch_debug(
Charles MacNeill 5:89031b2f5316 2734 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2735 VL53LX_patch_debug_t *pdata)
Charles MacNeill 5:89031b2f5316 2736 {
Charles MacNeill 5:89031b2f5316 2737
Charles MacNeill 5:89031b2f5316 2738
Charles MacNeill 5:89031b2f5316 2739 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2740 uint8_t comms_buffer[VL53LX_PATCH_DEBUG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2741
Charles MacNeill 5:89031b2f5316 2742 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2743
Charles MacNeill 5:89031b2f5316 2744 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2745 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2746
Charles MacNeill 5:89031b2f5316 2747 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2748 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 2749 Dev,
Charles MacNeill 5:89031b2f5316 2750 VL53LX_RESULT__DEBUG_STATUS,
Charles MacNeill 5:89031b2f5316 2751 comms_buffer,
Charles MacNeill 5:89031b2f5316 2752 VL53LX_PATCH_DEBUG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2753
Charles MacNeill 5:89031b2f5316 2754 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2755 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2756
Charles MacNeill 5:89031b2f5316 2757 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2758 status = VL53LX_i2c_decode_patch_debug(
Charles MacNeill 5:89031b2f5316 2759 VL53LX_PATCH_DEBUG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2760 comms_buffer,
Charles MacNeill 5:89031b2f5316 2761 pdata);
Charles MacNeill 5:89031b2f5316 2762
Charles MacNeill 5:89031b2f5316 2763 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2764
Charles MacNeill 5:89031b2f5316 2765 return status;
Charles MacNeill 5:89031b2f5316 2766 }
Charles MacNeill 5:89031b2f5316 2767
Charles MacNeill 5:89031b2f5316 2768
Charles MacNeill 5:89031b2f5316 2769 VL53LX_Error VL53LX_i2c_encode_gph_general_config(
Charles MacNeill 5:89031b2f5316 2770 VL53LX_gph_general_config_t *pdata,
Charles MacNeill 5:89031b2f5316 2771 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2772 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 2773 {
Charles MacNeill 5:89031b2f5316 2774
Charles MacNeill 5:89031b2f5316 2775
Charles MacNeill 5:89031b2f5316 2776 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2777
Charles MacNeill 5:89031b2f5316 2778 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2779
Charles MacNeill 5:89031b2f5316 2780 if (buf_size < VL53LX_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2781 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2782
Charles MacNeill 5:89031b2f5316 2783 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2784 pdata->gph__system__thresh_rate_high,
Charles MacNeill 5:89031b2f5316 2785 2,
Charles MacNeill 5:89031b2f5316 2786 pbuffer + 0);
Charles MacNeill 5:89031b2f5316 2787 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2788 pdata->gph__system__thresh_rate_low,
Charles MacNeill 5:89031b2f5316 2789 2,
Charles MacNeill 5:89031b2f5316 2790 pbuffer + 2);
Charles MacNeill 5:89031b2f5316 2791 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 2792 pdata->gph__system__interrupt_config_gpio;
Charles MacNeill 5:89031b2f5316 2793 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2794
Charles MacNeill 5:89031b2f5316 2795
Charles MacNeill 5:89031b2f5316 2796 return status;
Charles MacNeill 5:89031b2f5316 2797 }
Charles MacNeill 5:89031b2f5316 2798
Charles MacNeill 5:89031b2f5316 2799
Charles MacNeill 5:89031b2f5316 2800 VL53LX_Error VL53LX_i2c_decode_gph_general_config(
Charles MacNeill 5:89031b2f5316 2801 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2802 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 2803 VL53LX_gph_general_config_t *pdata)
Charles MacNeill 5:89031b2f5316 2804 {
Charles MacNeill 5:89031b2f5316 2805
Charles MacNeill 5:89031b2f5316 2806
Charles MacNeill 5:89031b2f5316 2807 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2808
Charles MacNeill 5:89031b2f5316 2809 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2810
Charles MacNeill 5:89031b2f5316 2811 if (buf_size < VL53LX_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2812 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2813
Charles MacNeill 5:89031b2f5316 2814 pdata->gph__system__thresh_rate_high =
Charles MacNeill 5:89031b2f5316 2815 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 0));
Charles MacNeill 5:89031b2f5316 2816 pdata->gph__system__thresh_rate_low =
Charles MacNeill 5:89031b2f5316 2817 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 2));
Charles MacNeill 5:89031b2f5316 2818 pdata->gph__system__interrupt_config_gpio =
Charles MacNeill 5:89031b2f5316 2819 (*(pbuffer + 4));
Charles MacNeill 5:89031b2f5316 2820
Charles MacNeill 5:89031b2f5316 2821 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2822
Charles MacNeill 5:89031b2f5316 2823 return status;
Charles MacNeill 5:89031b2f5316 2824 }
Charles MacNeill 5:89031b2f5316 2825
Charles MacNeill 5:89031b2f5316 2826
Charles MacNeill 5:89031b2f5316 2827 VL53LX_Error VL53LX_set_gph_general_config(
Charles MacNeill 5:89031b2f5316 2828 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2829 VL53LX_gph_general_config_t *pdata)
Charles MacNeill 5:89031b2f5316 2830 {
Charles MacNeill 5:89031b2f5316 2831
Charles MacNeill 5:89031b2f5316 2832
Charles MacNeill 5:89031b2f5316 2833 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2834 uint8_t comms_buffer[VL53LX_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2835
Charles MacNeill 5:89031b2f5316 2836 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2837
Charles MacNeill 5:89031b2f5316 2838 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2839 status = VL53LX_i2c_encode_gph_general_config(
Charles MacNeill 5:89031b2f5316 2840 pdata,
Charles MacNeill 5:89031b2f5316 2841 VL53LX_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2842 comms_buffer);
Charles MacNeill 5:89031b2f5316 2843
Charles MacNeill 5:89031b2f5316 2844 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2845 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2846
Charles MacNeill 5:89031b2f5316 2847 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2848 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 2849 Dev,
Charles MacNeill 5:89031b2f5316 2850 VL53LX_GPH__SYSTEM__THRESH_RATE_HIGH,
Charles MacNeill 5:89031b2f5316 2851 comms_buffer,
Charles MacNeill 5:89031b2f5316 2852 VL53LX_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2853
Charles MacNeill 5:89031b2f5316 2854 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2855 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2856
Charles MacNeill 5:89031b2f5316 2857 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2858
Charles MacNeill 5:89031b2f5316 2859 return status;
Charles MacNeill 5:89031b2f5316 2860 }
Charles MacNeill 5:89031b2f5316 2861
Charles MacNeill 5:89031b2f5316 2862
Charles MacNeill 5:89031b2f5316 2863 VL53LX_Error VL53LX_get_gph_general_config(
Charles MacNeill 5:89031b2f5316 2864 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2865 VL53LX_gph_general_config_t *pdata)
Charles MacNeill 5:89031b2f5316 2866 {
Charles MacNeill 5:89031b2f5316 2867
Charles MacNeill 5:89031b2f5316 2868
Charles MacNeill 5:89031b2f5316 2869 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2870 uint8_t comms_buffer[VL53LX_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2871
Charles MacNeill 5:89031b2f5316 2872 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2873
Charles MacNeill 5:89031b2f5316 2874 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2875 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2876
Charles MacNeill 5:89031b2f5316 2877 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2878 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 2879 Dev,
Charles MacNeill 5:89031b2f5316 2880 VL53LX_GPH__SYSTEM__THRESH_RATE_HIGH,
Charles MacNeill 5:89031b2f5316 2881 comms_buffer,
Charles MacNeill 5:89031b2f5316 2882 VL53LX_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2883
Charles MacNeill 5:89031b2f5316 2884 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2885 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2886
Charles MacNeill 5:89031b2f5316 2887 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2888 status = VL53LX_i2c_decode_gph_general_config(
Charles MacNeill 5:89031b2f5316 2889 VL53LX_GPH_GENERAL_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2890 comms_buffer,
Charles MacNeill 5:89031b2f5316 2891 pdata);
Charles MacNeill 5:89031b2f5316 2892
Charles MacNeill 5:89031b2f5316 2893 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2894
Charles MacNeill 5:89031b2f5316 2895 return status;
Charles MacNeill 5:89031b2f5316 2896 }
Charles MacNeill 5:89031b2f5316 2897
Charles MacNeill 5:89031b2f5316 2898
Charles MacNeill 5:89031b2f5316 2899 VL53LX_Error VL53LX_i2c_encode_gph_static_config(
Charles MacNeill 5:89031b2f5316 2900 VL53LX_gph_static_config_t *pdata,
Charles MacNeill 5:89031b2f5316 2901 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2902 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 2903 {
Charles MacNeill 5:89031b2f5316 2904
Charles MacNeill 5:89031b2f5316 2905
Charles MacNeill 5:89031b2f5316 2906 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2907
Charles MacNeill 5:89031b2f5316 2908 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2909
Charles MacNeill 5:89031b2f5316 2910 if (buf_size < VL53LX_GPH_STATIC_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2911 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2912
Charles MacNeill 5:89031b2f5316 2913 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 2914 pdata->gph__dss_config__roi_mode_control & 0x7;
Charles MacNeill 5:89031b2f5316 2915 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 2916 pdata->gph__dss_config__manual_effective_spads_select,
Charles MacNeill 5:89031b2f5316 2917 2,
Charles MacNeill 5:89031b2f5316 2918 pbuffer + 1);
Charles MacNeill 5:89031b2f5316 2919 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 2920 pdata->gph__dss_config__manual_block_select;
Charles MacNeill 5:89031b2f5316 2921 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 2922 pdata->gph__dss_config__max_spads_limit;
Charles MacNeill 5:89031b2f5316 2923 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 2924 pdata->gph__dss_config__min_spads_limit;
Charles MacNeill 5:89031b2f5316 2925 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2926
Charles MacNeill 5:89031b2f5316 2927
Charles MacNeill 5:89031b2f5316 2928 return status;
Charles MacNeill 5:89031b2f5316 2929 }
Charles MacNeill 5:89031b2f5316 2930
Charles MacNeill 5:89031b2f5316 2931
Charles MacNeill 5:89031b2f5316 2932 VL53LX_Error VL53LX_i2c_decode_gph_static_config(
Charles MacNeill 5:89031b2f5316 2933 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 2934 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 2935 VL53LX_gph_static_config_t *pdata)
Charles MacNeill 5:89031b2f5316 2936 {
Charles MacNeill 5:89031b2f5316 2937
Charles MacNeill 5:89031b2f5316 2938
Charles MacNeill 5:89031b2f5316 2939 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2940
Charles MacNeill 5:89031b2f5316 2941 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2942
Charles MacNeill 5:89031b2f5316 2943 if (buf_size < VL53LX_GPH_STATIC_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 2944 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 2945
Charles MacNeill 5:89031b2f5316 2946 pdata->gph__dss_config__roi_mode_control =
Charles MacNeill 5:89031b2f5316 2947 (*(pbuffer + 0)) & 0x7;
Charles MacNeill 5:89031b2f5316 2948 pdata->gph__dss_config__manual_effective_spads_select =
Charles MacNeill 5:89031b2f5316 2949 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 1));
Charles MacNeill 5:89031b2f5316 2950 pdata->gph__dss_config__manual_block_select =
Charles MacNeill 5:89031b2f5316 2951 (*(pbuffer + 3));
Charles MacNeill 5:89031b2f5316 2952 pdata->gph__dss_config__max_spads_limit =
Charles MacNeill 5:89031b2f5316 2953 (*(pbuffer + 4));
Charles MacNeill 5:89031b2f5316 2954 pdata->gph__dss_config__min_spads_limit =
Charles MacNeill 5:89031b2f5316 2955 (*(pbuffer + 5));
Charles MacNeill 5:89031b2f5316 2956
Charles MacNeill 5:89031b2f5316 2957 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2958
Charles MacNeill 5:89031b2f5316 2959 return status;
Charles MacNeill 5:89031b2f5316 2960 }
Charles MacNeill 5:89031b2f5316 2961
Charles MacNeill 5:89031b2f5316 2962
Charles MacNeill 5:89031b2f5316 2963 VL53LX_Error VL53LX_set_gph_static_config(
Charles MacNeill 5:89031b2f5316 2964 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2965 VL53LX_gph_static_config_t *pdata)
Charles MacNeill 5:89031b2f5316 2966 {
Charles MacNeill 5:89031b2f5316 2967
Charles MacNeill 5:89031b2f5316 2968
Charles MacNeill 5:89031b2f5316 2969 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2970 uint8_t comms_buffer[VL53LX_GPH_STATIC_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 2971
Charles MacNeill 5:89031b2f5316 2972 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2973
Charles MacNeill 5:89031b2f5316 2974 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2975 status = VL53LX_i2c_encode_gph_static_config(
Charles MacNeill 5:89031b2f5316 2976 pdata,
Charles MacNeill 5:89031b2f5316 2977 VL53LX_GPH_STATIC_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2978 comms_buffer);
Charles MacNeill 5:89031b2f5316 2979
Charles MacNeill 5:89031b2f5316 2980 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2981 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2982
Charles MacNeill 5:89031b2f5316 2983 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2984 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 2985 Dev,
Charles MacNeill 5:89031b2f5316 2986 VL53LX_GPH__DSS_CONFIG__ROI_MODE_CONTROL,
Charles MacNeill 5:89031b2f5316 2987 comms_buffer,
Charles MacNeill 5:89031b2f5316 2988 VL53LX_GPH_STATIC_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2989
Charles MacNeill 5:89031b2f5316 2990 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2991 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 2992
Charles MacNeill 5:89031b2f5316 2993 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2994
Charles MacNeill 5:89031b2f5316 2995 return status;
Charles MacNeill 5:89031b2f5316 2996 }
Charles MacNeill 5:89031b2f5316 2997
Charles MacNeill 5:89031b2f5316 2998
Charles MacNeill 5:89031b2f5316 2999 VL53LX_Error VL53LX_get_gph_static_config(
Charles MacNeill 5:89031b2f5316 3000 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3001 VL53LX_gph_static_config_t *pdata)
Charles MacNeill 5:89031b2f5316 3002 {
Charles MacNeill 5:89031b2f5316 3003
Charles MacNeill 5:89031b2f5316 3004
Charles MacNeill 5:89031b2f5316 3005 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3006 uint8_t comms_buffer[VL53LX_GPH_STATIC_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3007
Charles MacNeill 5:89031b2f5316 3008 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3009
Charles MacNeill 5:89031b2f5316 3010 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3011 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3012
Charles MacNeill 5:89031b2f5316 3013 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3014 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 3015 Dev,
Charles MacNeill 5:89031b2f5316 3016 VL53LX_GPH__DSS_CONFIG__ROI_MODE_CONTROL,
Charles MacNeill 5:89031b2f5316 3017 comms_buffer,
Charles MacNeill 5:89031b2f5316 3018 VL53LX_GPH_STATIC_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3019
Charles MacNeill 5:89031b2f5316 3020 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3021 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3022
Charles MacNeill 5:89031b2f5316 3023 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3024 status = VL53LX_i2c_decode_gph_static_config(
Charles MacNeill 5:89031b2f5316 3025 VL53LX_GPH_STATIC_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3026 comms_buffer,
Charles MacNeill 5:89031b2f5316 3027 pdata);
Charles MacNeill 5:89031b2f5316 3028
Charles MacNeill 5:89031b2f5316 3029 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3030
Charles MacNeill 5:89031b2f5316 3031 return status;
Charles MacNeill 5:89031b2f5316 3032 }
Charles MacNeill 5:89031b2f5316 3033
Charles MacNeill 5:89031b2f5316 3034
Charles MacNeill 5:89031b2f5316 3035 VL53LX_Error VL53LX_i2c_encode_gph_timing_config(
Charles MacNeill 5:89031b2f5316 3036 VL53LX_gph_timing_config_t *pdata,
Charles MacNeill 5:89031b2f5316 3037 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3038 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 3039 {
Charles MacNeill 5:89031b2f5316 3040
Charles MacNeill 5:89031b2f5316 3041
Charles MacNeill 5:89031b2f5316 3042 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3043
Charles MacNeill 5:89031b2f5316 3044 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3045
Charles MacNeill 5:89031b2f5316 3046 if (buf_size < VL53LX_GPH_TIMING_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3047 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3048
Charles MacNeill 5:89031b2f5316 3049 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 3050 pdata->gph__mm_config__timeout_macrop_a_hi & 0xF;
Charles MacNeill 5:89031b2f5316 3051 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 3052 pdata->gph__mm_config__timeout_macrop_a_lo;
Charles MacNeill 5:89031b2f5316 3053 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 3054 pdata->gph__mm_config__timeout_macrop_b_hi & 0xF;
Charles MacNeill 5:89031b2f5316 3055 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 3056 pdata->gph__mm_config__timeout_macrop_b_lo;
Charles MacNeill 5:89031b2f5316 3057 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 3058 pdata->gph__range_config__timeout_macrop_a_hi & 0xF;
Charles MacNeill 5:89031b2f5316 3059 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 3060 pdata->gph__range_config__timeout_macrop_a_lo;
Charles MacNeill 5:89031b2f5316 3061 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 3062 pdata->gph__range_config__vcsel_period_a & 0x3F;
Charles MacNeill 5:89031b2f5316 3063 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 3064 pdata->gph__range_config__vcsel_period_b & 0x3F;
Charles MacNeill 5:89031b2f5316 3065 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 3066 pdata->gph__range_config__timeout_macrop_b_hi & 0xF;
Charles MacNeill 5:89031b2f5316 3067 *(pbuffer + 9) =
Charles MacNeill 5:89031b2f5316 3068 pdata->gph__range_config__timeout_macrop_b_lo;
Charles MacNeill 5:89031b2f5316 3069 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3070 pdata->gph__range_config__sigma_thresh,
Charles MacNeill 5:89031b2f5316 3071 2,
Charles MacNeill 5:89031b2f5316 3072 pbuffer + 10);
Charles MacNeill 5:89031b2f5316 3073 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3074 pdata->gph__range_config__min_count_rate_rtn_limit_mcps,
Charles MacNeill 5:89031b2f5316 3075 2,
Charles MacNeill 5:89031b2f5316 3076 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 3077 *(pbuffer + 14) =
Charles MacNeill 5:89031b2f5316 3078 pdata->gph__range_config__valid_phase_low;
Charles MacNeill 5:89031b2f5316 3079 *(pbuffer + 15) =
Charles MacNeill 5:89031b2f5316 3080 pdata->gph__range_config__valid_phase_high;
Charles MacNeill 5:89031b2f5316 3081 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3082
Charles MacNeill 5:89031b2f5316 3083
Charles MacNeill 5:89031b2f5316 3084 return status;
Charles MacNeill 5:89031b2f5316 3085 }
Charles MacNeill 5:89031b2f5316 3086
Charles MacNeill 5:89031b2f5316 3087
Charles MacNeill 5:89031b2f5316 3088 VL53LX_Error VL53LX_i2c_decode_gph_timing_config(
Charles MacNeill 5:89031b2f5316 3089 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3090 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 3091 VL53LX_gph_timing_config_t *pdata)
Charles MacNeill 5:89031b2f5316 3092 {
Charles MacNeill 5:89031b2f5316 3093
Charles MacNeill 5:89031b2f5316 3094
Charles MacNeill 5:89031b2f5316 3095 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3096
Charles MacNeill 5:89031b2f5316 3097 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3098
Charles MacNeill 5:89031b2f5316 3099 if (buf_size < VL53LX_GPH_TIMING_CONFIG_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3100 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3101
Charles MacNeill 5:89031b2f5316 3102 pdata->gph__mm_config__timeout_macrop_a_hi =
Charles MacNeill 5:89031b2f5316 3103 (*(pbuffer + 0)) & 0xF;
Charles MacNeill 5:89031b2f5316 3104 pdata->gph__mm_config__timeout_macrop_a_lo =
Charles MacNeill 5:89031b2f5316 3105 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 3106 pdata->gph__mm_config__timeout_macrop_b_hi =
Charles MacNeill 5:89031b2f5316 3107 (*(pbuffer + 2)) & 0xF;
Charles MacNeill 5:89031b2f5316 3108 pdata->gph__mm_config__timeout_macrop_b_lo =
Charles MacNeill 5:89031b2f5316 3109 (*(pbuffer + 3));
Charles MacNeill 5:89031b2f5316 3110 pdata->gph__range_config__timeout_macrop_a_hi =
Charles MacNeill 5:89031b2f5316 3111 (*(pbuffer + 4)) & 0xF;
Charles MacNeill 5:89031b2f5316 3112 pdata->gph__range_config__timeout_macrop_a_lo =
Charles MacNeill 5:89031b2f5316 3113 (*(pbuffer + 5));
Charles MacNeill 5:89031b2f5316 3114 pdata->gph__range_config__vcsel_period_a =
Charles MacNeill 5:89031b2f5316 3115 (*(pbuffer + 6)) & 0x3F;
Charles MacNeill 5:89031b2f5316 3116 pdata->gph__range_config__vcsel_period_b =
Charles MacNeill 5:89031b2f5316 3117 (*(pbuffer + 7)) & 0x3F;
Charles MacNeill 5:89031b2f5316 3118 pdata->gph__range_config__timeout_macrop_b_hi =
Charles MacNeill 5:89031b2f5316 3119 (*(pbuffer + 8)) & 0xF;
Charles MacNeill 5:89031b2f5316 3120 pdata->gph__range_config__timeout_macrop_b_lo =
Charles MacNeill 5:89031b2f5316 3121 (*(pbuffer + 9));
Charles MacNeill 5:89031b2f5316 3122 pdata->gph__range_config__sigma_thresh =
Charles MacNeill 5:89031b2f5316 3123 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 10));
Charles MacNeill 5:89031b2f5316 3124 pdata->gph__range_config__min_count_rate_rtn_limit_mcps =
Charles MacNeill 5:89031b2f5316 3125 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 3126 pdata->gph__range_config__valid_phase_low =
Charles MacNeill 5:89031b2f5316 3127 (*(pbuffer + 14));
Charles MacNeill 5:89031b2f5316 3128 pdata->gph__range_config__valid_phase_high =
Charles MacNeill 5:89031b2f5316 3129 (*(pbuffer + 15));
Charles MacNeill 5:89031b2f5316 3130
Charles MacNeill 5:89031b2f5316 3131 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3132
Charles MacNeill 5:89031b2f5316 3133 return status;
Charles MacNeill 5:89031b2f5316 3134 }
Charles MacNeill 5:89031b2f5316 3135
Charles MacNeill 5:89031b2f5316 3136
Charles MacNeill 5:89031b2f5316 3137 VL53LX_Error VL53LX_set_gph_timing_config(
Charles MacNeill 5:89031b2f5316 3138 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3139 VL53LX_gph_timing_config_t *pdata)
Charles MacNeill 5:89031b2f5316 3140 {
Charles MacNeill 5:89031b2f5316 3141
Charles MacNeill 5:89031b2f5316 3142
Charles MacNeill 5:89031b2f5316 3143 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3144 uint8_t comms_buffer[VL53LX_GPH_TIMING_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3145
Charles MacNeill 5:89031b2f5316 3146 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3147
Charles MacNeill 5:89031b2f5316 3148 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3149 status = VL53LX_i2c_encode_gph_timing_config(
Charles MacNeill 5:89031b2f5316 3150 pdata,
Charles MacNeill 5:89031b2f5316 3151 VL53LX_GPH_TIMING_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3152 comms_buffer);
Charles MacNeill 5:89031b2f5316 3153
Charles MacNeill 5:89031b2f5316 3154 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3155 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3156
Charles MacNeill 5:89031b2f5316 3157 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3158 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 3159 Dev,
Charles MacNeill 5:89031b2f5316 3160 VL53LX_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI,
Charles MacNeill 5:89031b2f5316 3161 comms_buffer,
Charles MacNeill 5:89031b2f5316 3162 VL53LX_GPH_TIMING_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3163
Charles MacNeill 5:89031b2f5316 3164 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3165 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3166
Charles MacNeill 5:89031b2f5316 3167 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3168
Charles MacNeill 5:89031b2f5316 3169 return status;
Charles MacNeill 5:89031b2f5316 3170 }
Charles MacNeill 5:89031b2f5316 3171
Charles MacNeill 5:89031b2f5316 3172
Charles MacNeill 5:89031b2f5316 3173 VL53LX_Error VL53LX_get_gph_timing_config(
Charles MacNeill 5:89031b2f5316 3174 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3175 VL53LX_gph_timing_config_t *pdata)
Charles MacNeill 5:89031b2f5316 3176 {
Charles MacNeill 5:89031b2f5316 3177
Charles MacNeill 5:89031b2f5316 3178
Charles MacNeill 5:89031b2f5316 3179 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3180 uint8_t comms_buffer[VL53LX_GPH_TIMING_CONFIG_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3181
Charles MacNeill 5:89031b2f5316 3182 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3183
Charles MacNeill 5:89031b2f5316 3184 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3185 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3186
Charles MacNeill 5:89031b2f5316 3187 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3188 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 3189 Dev,
Charles MacNeill 5:89031b2f5316 3190 VL53LX_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI,
Charles MacNeill 5:89031b2f5316 3191 comms_buffer,
Charles MacNeill 5:89031b2f5316 3192 VL53LX_GPH_TIMING_CONFIG_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3193
Charles MacNeill 5:89031b2f5316 3194 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3195 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3196
Charles MacNeill 5:89031b2f5316 3197 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3198 status = VL53LX_i2c_decode_gph_timing_config(
Charles MacNeill 5:89031b2f5316 3199 VL53LX_GPH_TIMING_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3200 comms_buffer,
Charles MacNeill 5:89031b2f5316 3201 pdata);
Charles MacNeill 5:89031b2f5316 3202
Charles MacNeill 5:89031b2f5316 3203 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3204
Charles MacNeill 5:89031b2f5316 3205 return status;
Charles MacNeill 5:89031b2f5316 3206 }
Charles MacNeill 5:89031b2f5316 3207
Charles MacNeill 5:89031b2f5316 3208
Charles MacNeill 5:89031b2f5316 3209 VL53LX_Error VL53LX_i2c_encode_fw_internal(
Charles MacNeill 5:89031b2f5316 3210 VL53LX_fw_internal_t *pdata,
Charles MacNeill 5:89031b2f5316 3211 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3212 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 3213 {
Charles MacNeill 5:89031b2f5316 3214
Charles MacNeill 5:89031b2f5316 3215
Charles MacNeill 5:89031b2f5316 3216 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3217
Charles MacNeill 5:89031b2f5316 3218 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3219
Charles MacNeill 5:89031b2f5316 3220 if (buf_size < VL53LX_FW_INTERNAL_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3221 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3222
Charles MacNeill 5:89031b2f5316 3223 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 3224 pdata->firmware__internal_stream_count_div;
Charles MacNeill 5:89031b2f5316 3225 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 3226 pdata->firmware__internal_stream_counter_val;
Charles MacNeill 5:89031b2f5316 3227 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3228
Charles MacNeill 5:89031b2f5316 3229
Charles MacNeill 5:89031b2f5316 3230 return status;
Charles MacNeill 5:89031b2f5316 3231 }
Charles MacNeill 5:89031b2f5316 3232
Charles MacNeill 5:89031b2f5316 3233
Charles MacNeill 5:89031b2f5316 3234 VL53LX_Error VL53LX_i2c_decode_fw_internal(
Charles MacNeill 5:89031b2f5316 3235 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3236 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 3237 VL53LX_fw_internal_t *pdata)
Charles MacNeill 5:89031b2f5316 3238 {
Charles MacNeill 5:89031b2f5316 3239
Charles MacNeill 5:89031b2f5316 3240
Charles MacNeill 5:89031b2f5316 3241 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3242
Charles MacNeill 5:89031b2f5316 3243 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3244
Charles MacNeill 5:89031b2f5316 3245 if (buf_size < VL53LX_FW_INTERNAL_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3246 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3247
Charles MacNeill 5:89031b2f5316 3248 pdata->firmware__internal_stream_count_div =
Charles MacNeill 5:89031b2f5316 3249 (*(pbuffer + 0));
Charles MacNeill 5:89031b2f5316 3250 pdata->firmware__internal_stream_counter_val =
Charles MacNeill 5:89031b2f5316 3251 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 3252
Charles MacNeill 5:89031b2f5316 3253 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3254
Charles MacNeill 5:89031b2f5316 3255 return status;
Charles MacNeill 5:89031b2f5316 3256 }
Charles MacNeill 5:89031b2f5316 3257
Charles MacNeill 5:89031b2f5316 3258
Charles MacNeill 5:89031b2f5316 3259 VL53LX_Error VL53LX_set_fw_internal(
Charles MacNeill 5:89031b2f5316 3260 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3261 VL53LX_fw_internal_t *pdata)
Charles MacNeill 5:89031b2f5316 3262 {
Charles MacNeill 5:89031b2f5316 3263
Charles MacNeill 5:89031b2f5316 3264
Charles MacNeill 5:89031b2f5316 3265 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3266 uint8_t comms_buffer[VL53LX_FW_INTERNAL_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3267
Charles MacNeill 5:89031b2f5316 3268 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3269
Charles MacNeill 5:89031b2f5316 3270 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3271 status = VL53LX_i2c_encode_fw_internal(
Charles MacNeill 5:89031b2f5316 3272 pdata,
Charles MacNeill 5:89031b2f5316 3273 VL53LX_FW_INTERNAL_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3274 comms_buffer);
Charles MacNeill 5:89031b2f5316 3275
Charles MacNeill 5:89031b2f5316 3276 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3277 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3278
Charles MacNeill 5:89031b2f5316 3279 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3280 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 3281 Dev,
Charles MacNeill 5:89031b2f5316 3282 VL53LX_FIRMWARE__INTERNAL_STREAM_COUNT_DIV,
Charles MacNeill 5:89031b2f5316 3283 comms_buffer,
Charles MacNeill 5:89031b2f5316 3284 VL53LX_FW_INTERNAL_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3285
Charles MacNeill 5:89031b2f5316 3286 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3287 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3288
Charles MacNeill 5:89031b2f5316 3289 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3290
Charles MacNeill 5:89031b2f5316 3291 return status;
Charles MacNeill 5:89031b2f5316 3292 }
Charles MacNeill 5:89031b2f5316 3293
Charles MacNeill 5:89031b2f5316 3294
Charles MacNeill 5:89031b2f5316 3295 VL53LX_Error VL53LX_get_fw_internal(
Charles MacNeill 5:89031b2f5316 3296 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3297 VL53LX_fw_internal_t *pdata)
Charles MacNeill 5:89031b2f5316 3298 {
Charles MacNeill 5:89031b2f5316 3299
Charles MacNeill 5:89031b2f5316 3300
Charles MacNeill 5:89031b2f5316 3301 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3302 uint8_t comms_buffer[VL53LX_FW_INTERNAL_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3303
Charles MacNeill 5:89031b2f5316 3304 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3305
Charles MacNeill 5:89031b2f5316 3306 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3307 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3308
Charles MacNeill 5:89031b2f5316 3309 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3310 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 3311 Dev,
Charles MacNeill 5:89031b2f5316 3312 VL53LX_FIRMWARE__INTERNAL_STREAM_COUNT_DIV,
Charles MacNeill 5:89031b2f5316 3313 comms_buffer,
Charles MacNeill 5:89031b2f5316 3314 VL53LX_FW_INTERNAL_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3315
Charles MacNeill 5:89031b2f5316 3316 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3317 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3318
Charles MacNeill 5:89031b2f5316 3319 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3320 status = VL53LX_i2c_decode_fw_internal(
Charles MacNeill 5:89031b2f5316 3321 VL53LX_FW_INTERNAL_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3322 comms_buffer,
Charles MacNeill 5:89031b2f5316 3323 pdata);
Charles MacNeill 5:89031b2f5316 3324
Charles MacNeill 5:89031b2f5316 3325 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3326
Charles MacNeill 5:89031b2f5316 3327 return status;
Charles MacNeill 5:89031b2f5316 3328 }
Charles MacNeill 5:89031b2f5316 3329
Charles MacNeill 5:89031b2f5316 3330
Charles MacNeill 5:89031b2f5316 3331 VL53LX_Error VL53LX_i2c_encode_patch_results(
Charles MacNeill 5:89031b2f5316 3332 VL53LX_patch_results_t *pdata,
Charles MacNeill 5:89031b2f5316 3333 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3334 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 3335 {
Charles MacNeill 5:89031b2f5316 3336
Charles MacNeill 5:89031b2f5316 3337
Charles MacNeill 5:89031b2f5316 3338 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3339
Charles MacNeill 5:89031b2f5316 3340 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3341
Charles MacNeill 5:89031b2f5316 3342 if (buf_size < VL53LX_PATCH_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3343 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3344
Charles MacNeill 5:89031b2f5316 3345 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 3346 pdata->dss_calc__roi_ctrl & 0x3;
Charles MacNeill 5:89031b2f5316 3347 *(pbuffer + 1) =
Charles MacNeill 5:89031b2f5316 3348 pdata->dss_calc__spare_1;
Charles MacNeill 5:89031b2f5316 3349 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 3350 pdata->dss_calc__spare_2;
Charles MacNeill 5:89031b2f5316 3351 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 3352 pdata->dss_calc__spare_3;
Charles MacNeill 5:89031b2f5316 3353 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 3354 pdata->dss_calc__spare_4;
Charles MacNeill 5:89031b2f5316 3355 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 3356 pdata->dss_calc__spare_5;
Charles MacNeill 5:89031b2f5316 3357 *(pbuffer + 6) =
Charles MacNeill 5:89031b2f5316 3358 pdata->dss_calc__spare_6;
Charles MacNeill 5:89031b2f5316 3359 *(pbuffer + 7) =
Charles MacNeill 5:89031b2f5316 3360 pdata->dss_calc__spare_7;
Charles MacNeill 5:89031b2f5316 3361 *(pbuffer + 8) =
Charles MacNeill 5:89031b2f5316 3362 pdata->dss_calc__user_roi_spad_en_0;
Charles MacNeill 5:89031b2f5316 3363 *(pbuffer + 9) =
Charles MacNeill 5:89031b2f5316 3364 pdata->dss_calc__user_roi_spad_en_1;
Charles MacNeill 5:89031b2f5316 3365 *(pbuffer + 10) =
Charles MacNeill 5:89031b2f5316 3366 pdata->dss_calc__user_roi_spad_en_2;
Charles MacNeill 5:89031b2f5316 3367 *(pbuffer + 11) =
Charles MacNeill 5:89031b2f5316 3368 pdata->dss_calc__user_roi_spad_en_3;
Charles MacNeill 5:89031b2f5316 3369 *(pbuffer + 12) =
Charles MacNeill 5:89031b2f5316 3370 pdata->dss_calc__user_roi_spad_en_4;
Charles MacNeill 5:89031b2f5316 3371 *(pbuffer + 13) =
Charles MacNeill 5:89031b2f5316 3372 pdata->dss_calc__user_roi_spad_en_5;
Charles MacNeill 5:89031b2f5316 3373 *(pbuffer + 14) =
Charles MacNeill 5:89031b2f5316 3374 pdata->dss_calc__user_roi_spad_en_6;
Charles MacNeill 5:89031b2f5316 3375 *(pbuffer + 15) =
Charles MacNeill 5:89031b2f5316 3376 pdata->dss_calc__user_roi_spad_en_7;
Charles MacNeill 5:89031b2f5316 3377 *(pbuffer + 16) =
Charles MacNeill 5:89031b2f5316 3378 pdata->dss_calc__user_roi_spad_en_8;
Charles MacNeill 5:89031b2f5316 3379 *(pbuffer + 17) =
Charles MacNeill 5:89031b2f5316 3380 pdata->dss_calc__user_roi_spad_en_9;
Charles MacNeill 5:89031b2f5316 3381 *(pbuffer + 18) =
Charles MacNeill 5:89031b2f5316 3382 pdata->dss_calc__user_roi_spad_en_10;
Charles MacNeill 5:89031b2f5316 3383 *(pbuffer + 19) =
Charles MacNeill 5:89031b2f5316 3384 pdata->dss_calc__user_roi_spad_en_11;
Charles MacNeill 5:89031b2f5316 3385 *(pbuffer + 20) =
Charles MacNeill 5:89031b2f5316 3386 pdata->dss_calc__user_roi_spad_en_12;
Charles MacNeill 5:89031b2f5316 3387 *(pbuffer + 21) =
Charles MacNeill 5:89031b2f5316 3388 pdata->dss_calc__user_roi_spad_en_13;
Charles MacNeill 5:89031b2f5316 3389 *(pbuffer + 22) =
Charles MacNeill 5:89031b2f5316 3390 pdata->dss_calc__user_roi_spad_en_14;
Charles MacNeill 5:89031b2f5316 3391 *(pbuffer + 23) =
Charles MacNeill 5:89031b2f5316 3392 pdata->dss_calc__user_roi_spad_en_15;
Charles MacNeill 5:89031b2f5316 3393 *(pbuffer + 24) =
Charles MacNeill 5:89031b2f5316 3394 pdata->dss_calc__user_roi_spad_en_16;
Charles MacNeill 5:89031b2f5316 3395 *(pbuffer + 25) =
Charles MacNeill 5:89031b2f5316 3396 pdata->dss_calc__user_roi_spad_en_17;
Charles MacNeill 5:89031b2f5316 3397 *(pbuffer + 26) =
Charles MacNeill 5:89031b2f5316 3398 pdata->dss_calc__user_roi_spad_en_18;
Charles MacNeill 5:89031b2f5316 3399 *(pbuffer + 27) =
Charles MacNeill 5:89031b2f5316 3400 pdata->dss_calc__user_roi_spad_en_19;
Charles MacNeill 5:89031b2f5316 3401 *(pbuffer + 28) =
Charles MacNeill 5:89031b2f5316 3402 pdata->dss_calc__user_roi_spad_en_20;
Charles MacNeill 5:89031b2f5316 3403 *(pbuffer + 29) =
Charles MacNeill 5:89031b2f5316 3404 pdata->dss_calc__user_roi_spad_en_21;
Charles MacNeill 5:89031b2f5316 3405 *(pbuffer + 30) =
Charles MacNeill 5:89031b2f5316 3406 pdata->dss_calc__user_roi_spad_en_22;
Charles MacNeill 5:89031b2f5316 3407 *(pbuffer + 31) =
Charles MacNeill 5:89031b2f5316 3408 pdata->dss_calc__user_roi_spad_en_23;
Charles MacNeill 5:89031b2f5316 3409 *(pbuffer + 32) =
Charles MacNeill 5:89031b2f5316 3410 pdata->dss_calc__user_roi_spad_en_24;
Charles MacNeill 5:89031b2f5316 3411 *(pbuffer + 33) =
Charles MacNeill 5:89031b2f5316 3412 pdata->dss_calc__user_roi_spad_en_25;
Charles MacNeill 5:89031b2f5316 3413 *(pbuffer + 34) =
Charles MacNeill 5:89031b2f5316 3414 pdata->dss_calc__user_roi_spad_en_26;
Charles MacNeill 5:89031b2f5316 3415 *(pbuffer + 35) =
Charles MacNeill 5:89031b2f5316 3416 pdata->dss_calc__user_roi_spad_en_27;
Charles MacNeill 5:89031b2f5316 3417 *(pbuffer + 36) =
Charles MacNeill 5:89031b2f5316 3418 pdata->dss_calc__user_roi_spad_en_28;
Charles MacNeill 5:89031b2f5316 3419 *(pbuffer + 37) =
Charles MacNeill 5:89031b2f5316 3420 pdata->dss_calc__user_roi_spad_en_29;
Charles MacNeill 5:89031b2f5316 3421 *(pbuffer + 38) =
Charles MacNeill 5:89031b2f5316 3422 pdata->dss_calc__user_roi_spad_en_30;
Charles MacNeill 5:89031b2f5316 3423 *(pbuffer + 39) =
Charles MacNeill 5:89031b2f5316 3424 pdata->dss_calc__user_roi_spad_en_31;
Charles MacNeill 5:89031b2f5316 3425 *(pbuffer + 40) =
Charles MacNeill 5:89031b2f5316 3426 pdata->dss_calc__user_roi_0;
Charles MacNeill 5:89031b2f5316 3427 *(pbuffer + 41) =
Charles MacNeill 5:89031b2f5316 3428 pdata->dss_calc__user_roi_1;
Charles MacNeill 5:89031b2f5316 3429 *(pbuffer + 42) =
Charles MacNeill 5:89031b2f5316 3430 pdata->dss_calc__mode_roi_0;
Charles MacNeill 5:89031b2f5316 3431 *(pbuffer + 43) =
Charles MacNeill 5:89031b2f5316 3432 pdata->dss_calc__mode_roi_1;
Charles MacNeill 5:89031b2f5316 3433 *(pbuffer + 44) =
Charles MacNeill 5:89031b2f5316 3434 pdata->sigma_estimator_calc__spare_0;
Charles MacNeill 5:89031b2f5316 3435 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3436 pdata->vhv_result__peak_signal_rate_mcps,
Charles MacNeill 5:89031b2f5316 3437 2,
Charles MacNeill 5:89031b2f5316 3438 pbuffer + 46);
Charles MacNeill 5:89031b2f5316 3439 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 3440 pdata->vhv_result__signal_total_events_ref,
Charles MacNeill 5:89031b2f5316 3441 4,
Charles MacNeill 5:89031b2f5316 3442 pbuffer + 48);
Charles MacNeill 5:89031b2f5316 3443 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3444 pdata->phasecal_result__phase_output_ref,
Charles MacNeill 5:89031b2f5316 3445 2,
Charles MacNeill 5:89031b2f5316 3446 pbuffer + 52);
Charles MacNeill 5:89031b2f5316 3447 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3448 pdata->dss_result__total_rate_per_spad,
Charles MacNeill 5:89031b2f5316 3449 2,
Charles MacNeill 5:89031b2f5316 3450 pbuffer + 54);
Charles MacNeill 5:89031b2f5316 3451 *(pbuffer + 56) =
Charles MacNeill 5:89031b2f5316 3452 pdata->dss_result__enabled_blocks;
Charles MacNeill 5:89031b2f5316 3453 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3454 pdata->dss_result__num_requested_spads,
Charles MacNeill 5:89031b2f5316 3455 2,
Charles MacNeill 5:89031b2f5316 3456 pbuffer + 58);
Charles MacNeill 5:89031b2f5316 3457 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3458 pdata->mm_result__inner_intersection_rate,
Charles MacNeill 5:89031b2f5316 3459 2,
Charles MacNeill 5:89031b2f5316 3460 pbuffer + 62);
Charles MacNeill 5:89031b2f5316 3461 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3462 pdata->mm_result__outer_complement_rate,
Charles MacNeill 5:89031b2f5316 3463 2,
Charles MacNeill 5:89031b2f5316 3464 pbuffer + 64);
Charles MacNeill 5:89031b2f5316 3465 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3466 pdata->mm_result__total_offset,
Charles MacNeill 5:89031b2f5316 3467 2,
Charles MacNeill 5:89031b2f5316 3468 pbuffer + 66);
Charles MacNeill 5:89031b2f5316 3469 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 3470 pdata->xtalk_calc__xtalk_for_enabled_spads & 0xFFFFFF,
Charles MacNeill 5:89031b2f5316 3471 4,
Charles MacNeill 5:89031b2f5316 3472 pbuffer + 68);
Charles MacNeill 5:89031b2f5316 3473 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 3474 pdata->xtalk_result__avg_xtalk_user_roi_kcps & 0xFFFFFF,
Charles MacNeill 5:89031b2f5316 3475 4,
Charles MacNeill 5:89031b2f5316 3476 pbuffer + 72);
Charles MacNeill 5:89031b2f5316 3477 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 3478 pdata->xtalk_result__avg_xtalk_mm_inner_roi_kcps & 0xFFFFFF,
Charles MacNeill 5:89031b2f5316 3479 4,
Charles MacNeill 5:89031b2f5316 3480 pbuffer + 76);
Charles MacNeill 5:89031b2f5316 3481 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 3482 pdata->xtalk_result__avg_xtalk_mm_outer_roi_kcps & 0xFFFFFF,
Charles MacNeill 5:89031b2f5316 3483 4,
Charles MacNeill 5:89031b2f5316 3484 pbuffer + 80);
Charles MacNeill 5:89031b2f5316 3485 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 3486 pdata->range_result__accum_phase,
Charles MacNeill 5:89031b2f5316 3487 4,
Charles MacNeill 5:89031b2f5316 3488 pbuffer + 84);
Charles MacNeill 5:89031b2f5316 3489 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3490 pdata->range_result__offset_corrected_range,
Charles MacNeill 5:89031b2f5316 3491 2,
Charles MacNeill 5:89031b2f5316 3492 pbuffer + 88);
Charles MacNeill 5:89031b2f5316 3493 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3494
Charles MacNeill 5:89031b2f5316 3495
Charles MacNeill 5:89031b2f5316 3496 return status;
Charles MacNeill 5:89031b2f5316 3497 }
Charles MacNeill 5:89031b2f5316 3498
Charles MacNeill 5:89031b2f5316 3499
Charles MacNeill 5:89031b2f5316 3500 VL53LX_Error VL53LX_i2c_decode_patch_results(
Charles MacNeill 5:89031b2f5316 3501 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3502 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 3503 VL53LX_patch_results_t *pdata)
Charles MacNeill 5:89031b2f5316 3504 {
Charles MacNeill 5:89031b2f5316 3505
Charles MacNeill 5:89031b2f5316 3506
Charles MacNeill 5:89031b2f5316 3507 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3508
Charles MacNeill 5:89031b2f5316 3509 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3510
Charles MacNeill 5:89031b2f5316 3511 if (buf_size < VL53LX_PATCH_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3512 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3513
Charles MacNeill 5:89031b2f5316 3514 pdata->dss_calc__roi_ctrl =
Charles MacNeill 5:89031b2f5316 3515 (*(pbuffer + 0)) & 0x3;
Charles MacNeill 5:89031b2f5316 3516 pdata->dss_calc__spare_1 =
Charles MacNeill 5:89031b2f5316 3517 (*(pbuffer + 1));
Charles MacNeill 5:89031b2f5316 3518 pdata->dss_calc__spare_2 =
Charles MacNeill 5:89031b2f5316 3519 (*(pbuffer + 2));
Charles MacNeill 5:89031b2f5316 3520 pdata->dss_calc__spare_3 =
Charles MacNeill 5:89031b2f5316 3521 (*(pbuffer + 3));
Charles MacNeill 5:89031b2f5316 3522 pdata->dss_calc__spare_4 =
Charles MacNeill 5:89031b2f5316 3523 (*(pbuffer + 4));
Charles MacNeill 5:89031b2f5316 3524 pdata->dss_calc__spare_5 =
Charles MacNeill 5:89031b2f5316 3525 (*(pbuffer + 5));
Charles MacNeill 5:89031b2f5316 3526 pdata->dss_calc__spare_6 =
Charles MacNeill 5:89031b2f5316 3527 (*(pbuffer + 6));
Charles MacNeill 5:89031b2f5316 3528 pdata->dss_calc__spare_7 =
Charles MacNeill 5:89031b2f5316 3529 (*(pbuffer + 7));
Charles MacNeill 5:89031b2f5316 3530 pdata->dss_calc__user_roi_spad_en_0 =
Charles MacNeill 5:89031b2f5316 3531 (*(pbuffer + 8));
Charles MacNeill 5:89031b2f5316 3532 pdata->dss_calc__user_roi_spad_en_1 =
Charles MacNeill 5:89031b2f5316 3533 (*(pbuffer + 9));
Charles MacNeill 5:89031b2f5316 3534 pdata->dss_calc__user_roi_spad_en_2 =
Charles MacNeill 5:89031b2f5316 3535 (*(pbuffer + 10));
Charles MacNeill 5:89031b2f5316 3536 pdata->dss_calc__user_roi_spad_en_3 =
Charles MacNeill 5:89031b2f5316 3537 (*(pbuffer + 11));
Charles MacNeill 5:89031b2f5316 3538 pdata->dss_calc__user_roi_spad_en_4 =
Charles MacNeill 5:89031b2f5316 3539 (*(pbuffer + 12));
Charles MacNeill 5:89031b2f5316 3540 pdata->dss_calc__user_roi_spad_en_5 =
Charles MacNeill 5:89031b2f5316 3541 (*(pbuffer + 13));
Charles MacNeill 5:89031b2f5316 3542 pdata->dss_calc__user_roi_spad_en_6 =
Charles MacNeill 5:89031b2f5316 3543 (*(pbuffer + 14));
Charles MacNeill 5:89031b2f5316 3544 pdata->dss_calc__user_roi_spad_en_7 =
Charles MacNeill 5:89031b2f5316 3545 (*(pbuffer + 15));
Charles MacNeill 5:89031b2f5316 3546 pdata->dss_calc__user_roi_spad_en_8 =
Charles MacNeill 5:89031b2f5316 3547 (*(pbuffer + 16));
Charles MacNeill 5:89031b2f5316 3548 pdata->dss_calc__user_roi_spad_en_9 =
Charles MacNeill 5:89031b2f5316 3549 (*(pbuffer + 17));
Charles MacNeill 5:89031b2f5316 3550 pdata->dss_calc__user_roi_spad_en_10 =
Charles MacNeill 5:89031b2f5316 3551 (*(pbuffer + 18));
Charles MacNeill 5:89031b2f5316 3552 pdata->dss_calc__user_roi_spad_en_11 =
Charles MacNeill 5:89031b2f5316 3553 (*(pbuffer + 19));
Charles MacNeill 5:89031b2f5316 3554 pdata->dss_calc__user_roi_spad_en_12 =
Charles MacNeill 5:89031b2f5316 3555 (*(pbuffer + 20));
Charles MacNeill 5:89031b2f5316 3556 pdata->dss_calc__user_roi_spad_en_13 =
Charles MacNeill 5:89031b2f5316 3557 (*(pbuffer + 21));
Charles MacNeill 5:89031b2f5316 3558 pdata->dss_calc__user_roi_spad_en_14 =
Charles MacNeill 5:89031b2f5316 3559 (*(pbuffer + 22));
Charles MacNeill 5:89031b2f5316 3560 pdata->dss_calc__user_roi_spad_en_15 =
Charles MacNeill 5:89031b2f5316 3561 (*(pbuffer + 23));
Charles MacNeill 5:89031b2f5316 3562 pdata->dss_calc__user_roi_spad_en_16 =
Charles MacNeill 5:89031b2f5316 3563 (*(pbuffer + 24));
Charles MacNeill 5:89031b2f5316 3564 pdata->dss_calc__user_roi_spad_en_17 =
Charles MacNeill 5:89031b2f5316 3565 (*(pbuffer + 25));
Charles MacNeill 5:89031b2f5316 3566 pdata->dss_calc__user_roi_spad_en_18 =
Charles MacNeill 5:89031b2f5316 3567 (*(pbuffer + 26));
Charles MacNeill 5:89031b2f5316 3568 pdata->dss_calc__user_roi_spad_en_19 =
Charles MacNeill 5:89031b2f5316 3569 (*(pbuffer + 27));
Charles MacNeill 5:89031b2f5316 3570 pdata->dss_calc__user_roi_spad_en_20 =
Charles MacNeill 5:89031b2f5316 3571 (*(pbuffer + 28));
Charles MacNeill 5:89031b2f5316 3572 pdata->dss_calc__user_roi_spad_en_21 =
Charles MacNeill 5:89031b2f5316 3573 (*(pbuffer + 29));
Charles MacNeill 5:89031b2f5316 3574 pdata->dss_calc__user_roi_spad_en_22 =
Charles MacNeill 5:89031b2f5316 3575 (*(pbuffer + 30));
Charles MacNeill 5:89031b2f5316 3576 pdata->dss_calc__user_roi_spad_en_23 =
Charles MacNeill 5:89031b2f5316 3577 (*(pbuffer + 31));
Charles MacNeill 5:89031b2f5316 3578 pdata->dss_calc__user_roi_spad_en_24 =
Charles MacNeill 5:89031b2f5316 3579 (*(pbuffer + 32));
Charles MacNeill 5:89031b2f5316 3580 pdata->dss_calc__user_roi_spad_en_25 =
Charles MacNeill 5:89031b2f5316 3581 (*(pbuffer + 33));
Charles MacNeill 5:89031b2f5316 3582 pdata->dss_calc__user_roi_spad_en_26 =
Charles MacNeill 5:89031b2f5316 3583 (*(pbuffer + 34));
Charles MacNeill 5:89031b2f5316 3584 pdata->dss_calc__user_roi_spad_en_27 =
Charles MacNeill 5:89031b2f5316 3585 (*(pbuffer + 35));
Charles MacNeill 5:89031b2f5316 3586 pdata->dss_calc__user_roi_spad_en_28 =
Charles MacNeill 5:89031b2f5316 3587 (*(pbuffer + 36));
Charles MacNeill 5:89031b2f5316 3588 pdata->dss_calc__user_roi_spad_en_29 =
Charles MacNeill 5:89031b2f5316 3589 (*(pbuffer + 37));
Charles MacNeill 5:89031b2f5316 3590 pdata->dss_calc__user_roi_spad_en_30 =
Charles MacNeill 5:89031b2f5316 3591 (*(pbuffer + 38));
Charles MacNeill 5:89031b2f5316 3592 pdata->dss_calc__user_roi_spad_en_31 =
Charles MacNeill 5:89031b2f5316 3593 (*(pbuffer + 39));
Charles MacNeill 5:89031b2f5316 3594 pdata->dss_calc__user_roi_0 =
Charles MacNeill 5:89031b2f5316 3595 (*(pbuffer + 40));
Charles MacNeill 5:89031b2f5316 3596 pdata->dss_calc__user_roi_1 =
Charles MacNeill 5:89031b2f5316 3597 (*(pbuffer + 41));
Charles MacNeill 5:89031b2f5316 3598 pdata->dss_calc__mode_roi_0 =
Charles MacNeill 5:89031b2f5316 3599 (*(pbuffer + 42));
Charles MacNeill 5:89031b2f5316 3600 pdata->dss_calc__mode_roi_1 =
Charles MacNeill 5:89031b2f5316 3601 (*(pbuffer + 43));
Charles MacNeill 5:89031b2f5316 3602 pdata->sigma_estimator_calc__spare_0 =
Charles MacNeill 5:89031b2f5316 3603 (*(pbuffer + 44));
Charles MacNeill 5:89031b2f5316 3604 pdata->vhv_result__peak_signal_rate_mcps =
Charles MacNeill 5:89031b2f5316 3605 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 46));
Charles MacNeill 5:89031b2f5316 3606 pdata->vhv_result__signal_total_events_ref =
Charles MacNeill 5:89031b2f5316 3607 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 48));
Charles MacNeill 5:89031b2f5316 3608 pdata->phasecal_result__phase_output_ref =
Charles MacNeill 5:89031b2f5316 3609 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 52));
Charles MacNeill 5:89031b2f5316 3610 pdata->dss_result__total_rate_per_spad =
Charles MacNeill 5:89031b2f5316 3611 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 54));
Charles MacNeill 5:89031b2f5316 3612 pdata->dss_result__enabled_blocks =
Charles MacNeill 5:89031b2f5316 3613 (*(pbuffer + 56));
Charles MacNeill 5:89031b2f5316 3614 pdata->dss_result__num_requested_spads =
Charles MacNeill 5:89031b2f5316 3615 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 58));
Charles MacNeill 5:89031b2f5316 3616 pdata->mm_result__inner_intersection_rate =
Charles MacNeill 5:89031b2f5316 3617 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 62));
Charles MacNeill 5:89031b2f5316 3618 pdata->mm_result__outer_complement_rate =
Charles MacNeill 5:89031b2f5316 3619 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 64));
Charles MacNeill 5:89031b2f5316 3620 pdata->mm_result__total_offset =
Charles MacNeill 5:89031b2f5316 3621 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 66));
Charles MacNeill 5:89031b2f5316 3622 pdata->xtalk_calc__xtalk_for_enabled_spads =
Charles MacNeill 5:89031b2f5316 3623 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 68)) & 0xFFFFFF;
Charles MacNeill 5:89031b2f5316 3624 pdata->xtalk_result__avg_xtalk_user_roi_kcps =
Charles MacNeill 5:89031b2f5316 3625 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 72)) & 0xFFFFFF;
Charles MacNeill 5:89031b2f5316 3626 pdata->xtalk_result__avg_xtalk_mm_inner_roi_kcps =
Charles MacNeill 5:89031b2f5316 3627 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 76)) & 0xFFFFFF;
Charles MacNeill 5:89031b2f5316 3628 pdata->xtalk_result__avg_xtalk_mm_outer_roi_kcps =
Charles MacNeill 5:89031b2f5316 3629 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 80)) & 0xFFFFFF;
Charles MacNeill 5:89031b2f5316 3630 pdata->range_result__accum_phase =
Charles MacNeill 5:89031b2f5316 3631 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 84));
Charles MacNeill 5:89031b2f5316 3632 pdata->range_result__offset_corrected_range =
Charles MacNeill 5:89031b2f5316 3633 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 88));
Charles MacNeill 5:89031b2f5316 3634
Charles MacNeill 5:89031b2f5316 3635 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3636
Charles MacNeill 5:89031b2f5316 3637 return status;
Charles MacNeill 5:89031b2f5316 3638 }
Charles MacNeill 5:89031b2f5316 3639
Charles MacNeill 5:89031b2f5316 3640
Charles MacNeill 5:89031b2f5316 3641 VL53LX_Error VL53LX_set_patch_results(
Charles MacNeill 5:89031b2f5316 3642 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3643 VL53LX_patch_results_t *pdata)
Charles MacNeill 5:89031b2f5316 3644 {
Charles MacNeill 5:89031b2f5316 3645
Charles MacNeill 5:89031b2f5316 3646
Charles MacNeill 5:89031b2f5316 3647 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3648 uint8_t comms_buffer[VL53LX_PATCH_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3649
Charles MacNeill 5:89031b2f5316 3650 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3651
Charles MacNeill 5:89031b2f5316 3652 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3653 status = VL53LX_i2c_encode_patch_results(
Charles MacNeill 5:89031b2f5316 3654 pdata,
Charles MacNeill 5:89031b2f5316 3655 VL53LX_PATCH_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3656 comms_buffer);
Charles MacNeill 5:89031b2f5316 3657
Charles MacNeill 5:89031b2f5316 3658 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3659 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3660
Charles MacNeill 5:89031b2f5316 3661 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3662 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 3663 Dev,
Charles MacNeill 5:89031b2f5316 3664 VL53LX_DSS_CALC__ROI_CTRL,
Charles MacNeill 5:89031b2f5316 3665 comms_buffer,
Charles MacNeill 5:89031b2f5316 3666 VL53LX_PATCH_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3667
Charles MacNeill 5:89031b2f5316 3668 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3669 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3670
Charles MacNeill 5:89031b2f5316 3671 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3672
Charles MacNeill 5:89031b2f5316 3673 return status;
Charles MacNeill 5:89031b2f5316 3674 }
Charles MacNeill 5:89031b2f5316 3675
Charles MacNeill 5:89031b2f5316 3676
Charles MacNeill 5:89031b2f5316 3677 VL53LX_Error VL53LX_get_patch_results(
Charles MacNeill 5:89031b2f5316 3678 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3679 VL53LX_patch_results_t *pdata)
Charles MacNeill 5:89031b2f5316 3680 {
Charles MacNeill 5:89031b2f5316 3681
Charles MacNeill 5:89031b2f5316 3682
Charles MacNeill 5:89031b2f5316 3683 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3684 uint8_t comms_buffer[VL53LX_PATCH_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3685
Charles MacNeill 5:89031b2f5316 3686 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3687
Charles MacNeill 5:89031b2f5316 3688 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3689 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3690
Charles MacNeill 5:89031b2f5316 3691 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3692 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 3693 Dev,
Charles MacNeill 5:89031b2f5316 3694 VL53LX_DSS_CALC__ROI_CTRL,
Charles MacNeill 5:89031b2f5316 3695 comms_buffer,
Charles MacNeill 5:89031b2f5316 3696 VL53LX_PATCH_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3697
Charles MacNeill 5:89031b2f5316 3698 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3699 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3700
Charles MacNeill 5:89031b2f5316 3701 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3702 status = VL53LX_i2c_decode_patch_results(
Charles MacNeill 5:89031b2f5316 3703 VL53LX_PATCH_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3704 comms_buffer,
Charles MacNeill 5:89031b2f5316 3705 pdata);
Charles MacNeill 5:89031b2f5316 3706
Charles MacNeill 5:89031b2f5316 3707 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3708
Charles MacNeill 5:89031b2f5316 3709 return status;
Charles MacNeill 5:89031b2f5316 3710 }
Charles MacNeill 5:89031b2f5316 3711
Charles MacNeill 5:89031b2f5316 3712
Charles MacNeill 5:89031b2f5316 3713 VL53LX_Error VL53LX_i2c_encode_shadow_system_results(
Charles MacNeill 5:89031b2f5316 3714 VL53LX_shadow_system_results_t *pdata,
Charles MacNeill 5:89031b2f5316 3715 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3716 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 3717 {
Charles MacNeill 5:89031b2f5316 3718
Charles MacNeill 5:89031b2f5316 3719
Charles MacNeill 5:89031b2f5316 3720 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3721
Charles MacNeill 5:89031b2f5316 3722 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3723
Charles MacNeill 5:89031b2f5316 3724 if (buf_size < VL53LX_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3725 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3726
Charles MacNeill 5:89031b2f5316 3727 *(pbuffer + 0) =
Charles MacNeill 5:89031b2f5316 3728 pdata->shadow_phasecal_result__vcsel_start;
Charles MacNeill 5:89031b2f5316 3729 *(pbuffer + 2) =
Charles MacNeill 5:89031b2f5316 3730 pdata->shadow_result__interrupt_status & 0x3F;
Charles MacNeill 5:89031b2f5316 3731 *(pbuffer + 3) =
Charles MacNeill 5:89031b2f5316 3732 pdata->shadow_result__range_status;
Charles MacNeill 5:89031b2f5316 3733 *(pbuffer + 4) =
Charles MacNeill 5:89031b2f5316 3734 pdata->shadow_result__report_status & 0xF;
Charles MacNeill 5:89031b2f5316 3735 *(pbuffer + 5) =
Charles MacNeill 5:89031b2f5316 3736 pdata->shadow_result__stream_count;
Charles MacNeill 5:89031b2f5316 3737 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3738 pdata->shadow_result__dss_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 3739 2,
Charles MacNeill 5:89031b2f5316 3740 pbuffer + 6);
Charles MacNeill 5:89031b2f5316 3741 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3742 pdata->shadow_result__peak_signal_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 3743 2,
Charles MacNeill 5:89031b2f5316 3744 pbuffer + 8);
Charles MacNeill 5:89031b2f5316 3745 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3746 pdata->shadow_result__ambient_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 3747 2,
Charles MacNeill 5:89031b2f5316 3748 pbuffer + 10);
Charles MacNeill 5:89031b2f5316 3749 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3750 pdata->shadow_result__sigma_sd0,
Charles MacNeill 5:89031b2f5316 3751 2,
Charles MacNeill 5:89031b2f5316 3752 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 3753 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3754 pdata->shadow_result__phase_sd0,
Charles MacNeill 5:89031b2f5316 3755 2,
Charles MacNeill 5:89031b2f5316 3756 pbuffer + 14);
Charles MacNeill 5:89031b2f5316 3757 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3758 pdata->shadow_result__final_crosstalk_corrected_range_mm_sd0,
Charles MacNeill 5:89031b2f5316 3759 2,
Charles MacNeill 5:89031b2f5316 3760 pbuffer + 16);
Charles MacNeill 5:89031b2f5316 3761 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3762 pdata->shr__peak_signal_count_rate_crosstalk_corrected_mcps_sd0,
Charles MacNeill 5:89031b2f5316 3763 2,
Charles MacNeill 5:89031b2f5316 3764 pbuffer + 18);
Charles MacNeill 5:89031b2f5316 3765 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3766 pdata->shadow_result__mm_inner_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 3767 2,
Charles MacNeill 5:89031b2f5316 3768 pbuffer + 20);
Charles MacNeill 5:89031b2f5316 3769 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3770 pdata->shadow_result__mm_outer_actual_effective_spads_sd0,
Charles MacNeill 5:89031b2f5316 3771 2,
Charles MacNeill 5:89031b2f5316 3772 pbuffer + 22);
Charles MacNeill 5:89031b2f5316 3773 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3774 pdata->shadow_result__avg_signal_count_rate_mcps_sd0,
Charles MacNeill 5:89031b2f5316 3775 2,
Charles MacNeill 5:89031b2f5316 3776 pbuffer + 24);
Charles MacNeill 5:89031b2f5316 3777 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3778 pdata->shadow_result__dss_actual_effective_spads_sd1,
Charles MacNeill 5:89031b2f5316 3779 2,
Charles MacNeill 5:89031b2f5316 3780 pbuffer + 26);
Charles MacNeill 5:89031b2f5316 3781 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3782 pdata->shadow_result__peak_signal_count_rate_mcps_sd1,
Charles MacNeill 5:89031b2f5316 3783 2,
Charles MacNeill 5:89031b2f5316 3784 pbuffer + 28);
Charles MacNeill 5:89031b2f5316 3785 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3786 pdata->shadow_result__ambient_count_rate_mcps_sd1,
Charles MacNeill 5:89031b2f5316 3787 2,
Charles MacNeill 5:89031b2f5316 3788 pbuffer + 30);
Charles MacNeill 5:89031b2f5316 3789 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3790 pdata->shadow_result__sigma_sd1,
Charles MacNeill 5:89031b2f5316 3791 2,
Charles MacNeill 5:89031b2f5316 3792 pbuffer + 32);
Charles MacNeill 5:89031b2f5316 3793 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3794 pdata->shadow_result__phase_sd1,
Charles MacNeill 5:89031b2f5316 3795 2,
Charles MacNeill 5:89031b2f5316 3796 pbuffer + 34);
Charles MacNeill 5:89031b2f5316 3797 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3798 pdata->shadow_result__final_crosstalk_corrected_range_mm_sd1,
Charles MacNeill 5:89031b2f5316 3799 2,
Charles MacNeill 5:89031b2f5316 3800 pbuffer + 36);
Charles MacNeill 5:89031b2f5316 3801 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3802 pdata->shadow_result__spare_0_sd1,
Charles MacNeill 5:89031b2f5316 3803 2,
Charles MacNeill 5:89031b2f5316 3804 pbuffer + 38);
Charles MacNeill 5:89031b2f5316 3805 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3806 pdata->shadow_result__spare_1_sd1,
Charles MacNeill 5:89031b2f5316 3807 2,
Charles MacNeill 5:89031b2f5316 3808 pbuffer + 40);
Charles MacNeill 5:89031b2f5316 3809 VL53LX_i2c_encode_uint16_t(
Charles MacNeill 5:89031b2f5316 3810 pdata->shadow_result__spare_2_sd1,
Charles MacNeill 5:89031b2f5316 3811 2,
Charles MacNeill 5:89031b2f5316 3812 pbuffer + 42);
Charles MacNeill 5:89031b2f5316 3813 *(pbuffer + 44) =
Charles MacNeill 5:89031b2f5316 3814 pdata->shadow_result__spare_3_sd1;
Charles MacNeill 5:89031b2f5316 3815 *(pbuffer + 45) =
Charles MacNeill 5:89031b2f5316 3816 pdata->shadow_result__thresh_info;
Charles MacNeill 5:89031b2f5316 3817 *(pbuffer + 80) =
Charles MacNeill 5:89031b2f5316 3818 pdata->shadow_phasecal_result__reference_phase_hi;
Charles MacNeill 5:89031b2f5316 3819 *(pbuffer + 81) =
Charles MacNeill 5:89031b2f5316 3820 pdata->shadow_phasecal_result__reference_phase_lo;
Charles MacNeill 5:89031b2f5316 3821 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3822
Charles MacNeill 5:89031b2f5316 3823
Charles MacNeill 5:89031b2f5316 3824 return status;
Charles MacNeill 5:89031b2f5316 3825 }
Charles MacNeill 5:89031b2f5316 3826
Charles MacNeill 5:89031b2f5316 3827
Charles MacNeill 5:89031b2f5316 3828 VL53LX_Error VL53LX_i2c_decode_shadow_system_results(
Charles MacNeill 5:89031b2f5316 3829 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3830 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 3831 VL53LX_shadow_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 3832 {
Charles MacNeill 5:89031b2f5316 3833
Charles MacNeill 5:89031b2f5316 3834
Charles MacNeill 5:89031b2f5316 3835 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3836
Charles MacNeill 5:89031b2f5316 3837 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3838
Charles MacNeill 5:89031b2f5316 3839 if (buf_size < VL53LX_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3840 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3841
Charles MacNeill 5:89031b2f5316 3842 pdata->shadow_phasecal_result__vcsel_start =
Charles MacNeill 5:89031b2f5316 3843 (*(pbuffer + 0));
Charles MacNeill 5:89031b2f5316 3844 pdata->shadow_result__interrupt_status =
Charles MacNeill 5:89031b2f5316 3845 (*(pbuffer + 2)) & 0x3F;
Charles MacNeill 5:89031b2f5316 3846 pdata->shadow_result__range_status =
Charles MacNeill 5:89031b2f5316 3847 (*(pbuffer + 3));
Charles MacNeill 5:89031b2f5316 3848 pdata->shadow_result__report_status =
Charles MacNeill 5:89031b2f5316 3849 (*(pbuffer + 4)) & 0xF;
Charles MacNeill 5:89031b2f5316 3850 pdata->shadow_result__stream_count =
Charles MacNeill 5:89031b2f5316 3851 (*(pbuffer + 5));
Charles MacNeill 5:89031b2f5316 3852 pdata->shadow_result__dss_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 3853 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 6));
Charles MacNeill 5:89031b2f5316 3854 pdata->shadow_result__peak_signal_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 3855 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 8));
Charles MacNeill 5:89031b2f5316 3856 pdata->shadow_result__ambient_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 3857 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 10));
Charles MacNeill 5:89031b2f5316 3858 pdata->shadow_result__sigma_sd0 =
Charles MacNeill 5:89031b2f5316 3859 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 3860 pdata->shadow_result__phase_sd0 =
Charles MacNeill 5:89031b2f5316 3861 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 14));
Charles MacNeill 5:89031b2f5316 3862 pdata->shadow_result__final_crosstalk_corrected_range_mm_sd0 =
Charles MacNeill 5:89031b2f5316 3863 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 16));
Charles MacNeill 5:89031b2f5316 3864 pdata->shr__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 3865 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 18));
Charles MacNeill 5:89031b2f5316 3866 pdata->shadow_result__mm_inner_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 3867 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 20));
Charles MacNeill 5:89031b2f5316 3868 pdata->shadow_result__mm_outer_actual_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 3869 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 22));
Charles MacNeill 5:89031b2f5316 3870 pdata->shadow_result__avg_signal_count_rate_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 3871 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 24));
Charles MacNeill 5:89031b2f5316 3872 pdata->shadow_result__dss_actual_effective_spads_sd1 =
Charles MacNeill 5:89031b2f5316 3873 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 26));
Charles MacNeill 5:89031b2f5316 3874 pdata->shadow_result__peak_signal_count_rate_mcps_sd1 =
Charles MacNeill 5:89031b2f5316 3875 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 28));
Charles MacNeill 5:89031b2f5316 3876 pdata->shadow_result__ambient_count_rate_mcps_sd1 =
Charles MacNeill 5:89031b2f5316 3877 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 30));
Charles MacNeill 5:89031b2f5316 3878 pdata->shadow_result__sigma_sd1 =
Charles MacNeill 5:89031b2f5316 3879 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 32));
Charles MacNeill 5:89031b2f5316 3880 pdata->shadow_result__phase_sd1 =
Charles MacNeill 5:89031b2f5316 3881 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 34));
Charles MacNeill 5:89031b2f5316 3882 pdata->shadow_result__final_crosstalk_corrected_range_mm_sd1 =
Charles MacNeill 5:89031b2f5316 3883 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 36));
Charles MacNeill 5:89031b2f5316 3884 pdata->shadow_result__spare_0_sd1 =
Charles MacNeill 5:89031b2f5316 3885 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 38));
Charles MacNeill 5:89031b2f5316 3886 pdata->shadow_result__spare_1_sd1 =
Charles MacNeill 5:89031b2f5316 3887 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 40));
Charles MacNeill 5:89031b2f5316 3888 pdata->shadow_result__spare_2_sd1 =
Charles MacNeill 5:89031b2f5316 3889 (VL53LX_i2c_decode_uint16_t(2, pbuffer + 42));
Charles MacNeill 5:89031b2f5316 3890 pdata->shadow_result__spare_3_sd1 =
Charles MacNeill 5:89031b2f5316 3891 (*(pbuffer + 44));
Charles MacNeill 5:89031b2f5316 3892 pdata->shadow_result__thresh_info =
Charles MacNeill 5:89031b2f5316 3893 (*(pbuffer + 45));
Charles MacNeill 5:89031b2f5316 3894 pdata->shadow_phasecal_result__reference_phase_hi =
Charles MacNeill 5:89031b2f5316 3895 (*(pbuffer + 80));
Charles MacNeill 5:89031b2f5316 3896 pdata->shadow_phasecal_result__reference_phase_lo =
Charles MacNeill 5:89031b2f5316 3897 (*(pbuffer + 81));
Charles MacNeill 5:89031b2f5316 3898
Charles MacNeill 5:89031b2f5316 3899 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3900
Charles MacNeill 5:89031b2f5316 3901 return status;
Charles MacNeill 5:89031b2f5316 3902 }
Charles MacNeill 5:89031b2f5316 3903
Charles MacNeill 5:89031b2f5316 3904
Charles MacNeill 5:89031b2f5316 3905 VL53LX_Error VL53LX_set_shadow_system_results(
Charles MacNeill 5:89031b2f5316 3906 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3907 VL53LX_shadow_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 3908 {
Charles MacNeill 5:89031b2f5316 3909
Charles MacNeill 5:89031b2f5316 3910
Charles MacNeill 5:89031b2f5316 3911 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3912 uint8_t comms_buffer[VL53LX_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3913
Charles MacNeill 5:89031b2f5316 3914 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3915
Charles MacNeill 5:89031b2f5316 3916 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3917 status = VL53LX_i2c_encode_shadow_system_results(
Charles MacNeill 5:89031b2f5316 3918 pdata,
Charles MacNeill 5:89031b2f5316 3919 VL53LX_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3920 comms_buffer);
Charles MacNeill 5:89031b2f5316 3921
Charles MacNeill 5:89031b2f5316 3922 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3923 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3924
Charles MacNeill 5:89031b2f5316 3925 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3926 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 3927 Dev,
Charles MacNeill 5:89031b2f5316 3928 VL53LX_SHADOW_PHASECAL_RESULT__VCSEL_START,
Charles MacNeill 5:89031b2f5316 3929 comms_buffer,
Charles MacNeill 5:89031b2f5316 3930 VL53LX_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3931
Charles MacNeill 5:89031b2f5316 3932 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3933 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3934
Charles MacNeill 5:89031b2f5316 3935 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3936
Charles MacNeill 5:89031b2f5316 3937 return status;
Charles MacNeill 5:89031b2f5316 3938 }
Charles MacNeill 5:89031b2f5316 3939
Charles MacNeill 5:89031b2f5316 3940
Charles MacNeill 5:89031b2f5316 3941 VL53LX_Error VL53LX_get_shadow_system_results(
Charles MacNeill 5:89031b2f5316 3942 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3943 VL53LX_shadow_system_results_t *pdata)
Charles MacNeill 5:89031b2f5316 3944 {
Charles MacNeill 5:89031b2f5316 3945
Charles MacNeill 5:89031b2f5316 3946
Charles MacNeill 5:89031b2f5316 3947 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3948 uint8_t comms_buffer[VL53LX_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 3949
Charles MacNeill 5:89031b2f5316 3950 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3951
Charles MacNeill 5:89031b2f5316 3952 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3953 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3954
Charles MacNeill 5:89031b2f5316 3955 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3956 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 3957 Dev,
Charles MacNeill 5:89031b2f5316 3958 VL53LX_SHADOW_PHASECAL_RESULT__VCSEL_START,
Charles MacNeill 5:89031b2f5316 3959 comms_buffer,
Charles MacNeill 5:89031b2f5316 3960 VL53LX_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 3961
Charles MacNeill 5:89031b2f5316 3962 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3963 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 3964
Charles MacNeill 5:89031b2f5316 3965 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 3966 status = VL53LX_i2c_decode_shadow_system_results(
Charles MacNeill 5:89031b2f5316 3967 VL53LX_SHADOW_SYSTEM_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 3968 comms_buffer,
Charles MacNeill 5:89031b2f5316 3969 pdata);
Charles MacNeill 5:89031b2f5316 3970
Charles MacNeill 5:89031b2f5316 3971 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3972
Charles MacNeill 5:89031b2f5316 3973 return status;
Charles MacNeill 5:89031b2f5316 3974 }
Charles MacNeill 5:89031b2f5316 3975
Charles MacNeill 5:89031b2f5316 3976
Charles MacNeill 5:89031b2f5316 3977 VL53LX_Error VL53LX_i2c_encode_shadow_core_results(
Charles MacNeill 5:89031b2f5316 3978 VL53LX_shadow_core_results_t *pdata,
Charles MacNeill 5:89031b2f5316 3979 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 3980 uint8_t *pbuffer)
Charles MacNeill 5:89031b2f5316 3981 {
Charles MacNeill 5:89031b2f5316 3982
Charles MacNeill 5:89031b2f5316 3983
Charles MacNeill 5:89031b2f5316 3984 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3985
Charles MacNeill 5:89031b2f5316 3986 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3987
Charles MacNeill 5:89031b2f5316 3988 if (buf_size < VL53LX_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 3989 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 3990
Charles MacNeill 5:89031b2f5316 3991 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 3992 pdata->shadow_result_core__ambient_window_events_sd0,
Charles MacNeill 5:89031b2f5316 3993 4,
Charles MacNeill 5:89031b2f5316 3994 pbuffer + 0);
Charles MacNeill 5:89031b2f5316 3995 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 3996 pdata->shadow_result_core__ranging_total_events_sd0,
Charles MacNeill 5:89031b2f5316 3997 4,
Charles MacNeill 5:89031b2f5316 3998 pbuffer + 4);
Charles MacNeill 5:89031b2f5316 3999 VL53LX_i2c_encode_int32_t(
Charles MacNeill 5:89031b2f5316 4000 pdata->shadow_result_core__signal_total_events_sd0,
Charles MacNeill 5:89031b2f5316 4001 4,
Charles MacNeill 5:89031b2f5316 4002 pbuffer + 8);
Charles MacNeill 5:89031b2f5316 4003 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 4004 pdata->shadow_result_core__total_periods_elapsed_sd0,
Charles MacNeill 5:89031b2f5316 4005 4,
Charles MacNeill 5:89031b2f5316 4006 pbuffer + 12);
Charles MacNeill 5:89031b2f5316 4007 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 4008 pdata->shadow_result_core__ambient_window_events_sd1,
Charles MacNeill 5:89031b2f5316 4009 4,
Charles MacNeill 5:89031b2f5316 4010 pbuffer + 16);
Charles MacNeill 5:89031b2f5316 4011 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 4012 pdata->shadow_result_core__ranging_total_events_sd1,
Charles MacNeill 5:89031b2f5316 4013 4,
Charles MacNeill 5:89031b2f5316 4014 pbuffer + 20);
Charles MacNeill 5:89031b2f5316 4015 VL53LX_i2c_encode_int32_t(
Charles MacNeill 5:89031b2f5316 4016 pdata->shadow_result_core__signal_total_events_sd1,
Charles MacNeill 5:89031b2f5316 4017 4,
Charles MacNeill 5:89031b2f5316 4018 pbuffer + 24);
Charles MacNeill 5:89031b2f5316 4019 VL53LX_i2c_encode_uint32_t(
Charles MacNeill 5:89031b2f5316 4020 pdata->shadow_result_core__total_periods_elapsed_sd1,
Charles MacNeill 5:89031b2f5316 4021 4,
Charles MacNeill 5:89031b2f5316 4022 pbuffer + 28);
Charles MacNeill 5:89031b2f5316 4023 *(pbuffer + 32) =
Charles MacNeill 5:89031b2f5316 4024 pdata->shadow_result_core__spare_0;
Charles MacNeill 5:89031b2f5316 4025 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 4026
Charles MacNeill 5:89031b2f5316 4027
Charles MacNeill 5:89031b2f5316 4028 return status;
Charles MacNeill 5:89031b2f5316 4029 }
Charles MacNeill 5:89031b2f5316 4030
Charles MacNeill 5:89031b2f5316 4031
Charles MacNeill 5:89031b2f5316 4032 VL53LX_Error VL53LX_i2c_decode_shadow_core_results(
Charles MacNeill 5:89031b2f5316 4033 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 4034 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 4035 VL53LX_shadow_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 4036 {
Charles MacNeill 5:89031b2f5316 4037
Charles MacNeill 5:89031b2f5316 4038
Charles MacNeill 5:89031b2f5316 4039 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 4040
Charles MacNeill 5:89031b2f5316 4041 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 4042
Charles MacNeill 5:89031b2f5316 4043 if (buf_size < VL53LX_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 4044 return VL53LX_ERROR_COMMS_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 4045
Charles MacNeill 5:89031b2f5316 4046 pdata->shadow_result_core__ambient_window_events_sd0 =
Charles MacNeill 5:89031b2f5316 4047 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 0));
Charles MacNeill 5:89031b2f5316 4048 pdata->shadow_result_core__ranging_total_events_sd0 =
Charles MacNeill 5:89031b2f5316 4049 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 4));
Charles MacNeill 5:89031b2f5316 4050 pdata->shadow_result_core__signal_total_events_sd0 =
Charles MacNeill 5:89031b2f5316 4051 (VL53LX_i2c_decode_int32_t(4, pbuffer + 8));
Charles MacNeill 5:89031b2f5316 4052 pdata->shadow_result_core__total_periods_elapsed_sd0 =
Charles MacNeill 5:89031b2f5316 4053 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 12));
Charles MacNeill 5:89031b2f5316 4054 pdata->shadow_result_core__ambient_window_events_sd1 =
Charles MacNeill 5:89031b2f5316 4055 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 16));
Charles MacNeill 5:89031b2f5316 4056 pdata->shadow_result_core__ranging_total_events_sd1 =
Charles MacNeill 5:89031b2f5316 4057 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 20));
Charles MacNeill 5:89031b2f5316 4058 pdata->shadow_result_core__signal_total_events_sd1 =
Charles MacNeill 5:89031b2f5316 4059 (VL53LX_i2c_decode_int32_t(4, pbuffer + 24));
Charles MacNeill 5:89031b2f5316 4060 pdata->shadow_result_core__total_periods_elapsed_sd1 =
Charles MacNeill 5:89031b2f5316 4061 (VL53LX_i2c_decode_uint32_t(4, pbuffer + 28));
Charles MacNeill 5:89031b2f5316 4062 pdata->shadow_result_core__spare_0 =
Charles MacNeill 5:89031b2f5316 4063 (*(pbuffer + 32));
Charles MacNeill 5:89031b2f5316 4064
Charles MacNeill 5:89031b2f5316 4065 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 4066
Charles MacNeill 5:89031b2f5316 4067 return status;
Charles MacNeill 5:89031b2f5316 4068 }
Charles MacNeill 5:89031b2f5316 4069
Charles MacNeill 5:89031b2f5316 4070
Charles MacNeill 5:89031b2f5316 4071 VL53LX_Error VL53LX_set_shadow_core_results(
Charles MacNeill 5:89031b2f5316 4072 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 4073 VL53LX_shadow_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 4074 {
Charles MacNeill 5:89031b2f5316 4075
Charles MacNeill 5:89031b2f5316 4076
Charles MacNeill 5:89031b2f5316 4077 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 4078 uint8_t comms_buffer[VL53LX_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 4079
Charles MacNeill 5:89031b2f5316 4080 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 4081
Charles MacNeill 5:89031b2f5316 4082 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 4083 status = VL53LX_i2c_encode_shadow_core_results(
Charles MacNeill 5:89031b2f5316 4084 pdata,
Charles MacNeill 5:89031b2f5316 4085 VL53LX_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 4086 comms_buffer);
Charles MacNeill 5:89031b2f5316 4087
Charles MacNeill 5:89031b2f5316 4088 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 4089 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 4090
Charles MacNeill 5:89031b2f5316 4091 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 4092 status = VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 4093 Dev,
Charles MacNeill 5:89031b2f5316 4094 VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
Charles MacNeill 5:89031b2f5316 4095 comms_buffer,
Charles MacNeill 5:89031b2f5316 4096 VL53LX_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 4097
Charles MacNeill 5:89031b2f5316 4098 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 4099 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 4100
Charles MacNeill 5:89031b2f5316 4101 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 4102
Charles MacNeill 5:89031b2f5316 4103 return status;
Charles MacNeill 5:89031b2f5316 4104 }
Charles MacNeill 5:89031b2f5316 4105
Charles MacNeill 5:89031b2f5316 4106
Charles MacNeill 5:89031b2f5316 4107 VL53LX_Error VL53LX_get_shadow_core_results(
Charles MacNeill 5:89031b2f5316 4108 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 4109 VL53LX_shadow_core_results_t *pdata)
Charles MacNeill 5:89031b2f5316 4110 {
Charles MacNeill 5:89031b2f5316 4111
Charles MacNeill 5:89031b2f5316 4112
Charles MacNeill 5:89031b2f5316 4113 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 4114 uint8_t comms_buffer[VL53LX_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 4115
Charles MacNeill 5:89031b2f5316 4116 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 4117
Charles MacNeill 5:89031b2f5316 4118 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 4119 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 4120
Charles MacNeill 5:89031b2f5316 4121 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 4122 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 4123 Dev,
Charles MacNeill 5:89031b2f5316 4124 VL53LX_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0,
Charles MacNeill 5:89031b2f5316 4125 comms_buffer,
Charles MacNeill 5:89031b2f5316 4126 VL53LX_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 4127
Charles MacNeill 5:89031b2f5316 4128 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 4129 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 4130
Charles MacNeill 5:89031b2f5316 4131 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 4132 status = VL53LX_i2c_decode_shadow_core_results(
Charles MacNeill 5:89031b2f5316 4133 VL53LX_SHADOW_CORE_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 4134 comms_buffer,
Charles MacNeill 5:89031b2f5316 4135 pdata);
Charles MacNeill 5:89031b2f5316 4136
Charles MacNeill 5:89031b2f5316 4137 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 4138
Charles MacNeill 5:89031b2f5316 4139 return status;
Charles MacNeill 5:89031b2f5316 4140 }
Charles MacNeill 5:89031b2f5316 4141
Charles MacNeill 5:89031b2f5316 4142