ST Expansion SW Team / VL53L3CX_mbed

Rename library

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L3CX_NoShield_1Sensor_poll_Mb06x VL53L3_NoShield_1Sensor_polling_Mb63 X_NUCLEO_53L3A2 53L3A2_Ranging

modules/vl53lx_nvm.c@7:7f1bbf370283, 2021-07-21 (annotated)

Committer:
charlesmn
Date:
Wed Jul 21 14:07:59 2021 +0000
Revision:
7:7f1bbf370283
Parent:
5:89031b2f5316 
Moved vl53l3cx_class.cpp and .h to 53l3a2_RangingClass

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Charles MacNeill 5:89031b2f5316 1
Charles MacNeill 5:89031b2f5316 2 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Charles MacNeill 5:89031b2f5316 3 /******************************************************************************
Charles MacNeill 5:89031b2f5316 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
Charles MacNeill 5:89031b2f5316 5
Charles MacNeill 5:89031b2f5316 6 This file is part of VL53LX and is dual licensed,
Charles MacNeill 5:89031b2f5316 7 either GPL-2.0+
Charles MacNeill 5:89031b2f5316 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 5:89031b2f5316 9 ******************************************************************************
Charles MacNeill 5:89031b2f5316 10 */
Charles MacNeill 5:89031b2f5316 11
Charles MacNeill 5:89031b2f5316 12
Charles MacNeill 5:89031b2f5316 13
Charles MacNeill 5:89031b2f5316 14
Charles MacNeill 5:89031b2f5316 15
Charles MacNeill 5:89031b2f5316 16 #ifdef _MSC_VER
Charles MacNeill 5:89031b2f5316 17 #define snprintf _snprintf
Charles MacNeill 5:89031b2f5316 18 #endif
Charles MacNeill 5:89031b2f5316 19
Charles MacNeill 5:89031b2f5316 20
Charles MacNeill 5:89031b2f5316 21
Charles MacNeill 5:89031b2f5316 22 #include "vl53lx_ll_def.h"
Charles MacNeill 5:89031b2f5316 23 #include "vl53lx_platform.h"
Charles MacNeill 5:89031b2f5316 24 #include <vl53lx_platform_log.h>
Charles MacNeill 5:89031b2f5316 25 #include "vl53lx_register_map.h"
Charles MacNeill 5:89031b2f5316 26 #include "vl53lx_core.h"
Charles MacNeill 5:89031b2f5316 27 #include "vl53lx_nvm_structs.h"
Charles MacNeill 5:89031b2f5316 28 #include "vl53lx_nvm_map.h"
Charles MacNeill 5:89031b2f5316 29 #include "vl53lx_nvm.h"
Charles MacNeill 5:89031b2f5316 30
Charles MacNeill 5:89031b2f5316 31
Charles MacNeill 5:89031b2f5316 32
Charles MacNeill 5:89031b2f5316 33 #define LOG_FUNCTION_START(fmt, ...) \
Charles MacNeill 5:89031b2f5316 34 _LOG_FUNCTION_START(VL53LX_TRACE_MODULE_NVM, fmt, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 35 #define LOG_FUNCTION_END(status, ...) \
Charles MacNeill 5:89031b2f5316 36 _LOG_FUNCTION_END(VL53LX_TRACE_MODULE_NVM, status, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 37 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
Charles MacNeill 5:89031b2f5316 38 _LOG_FUNCTION_END_FMT(VL53LX_TRACE_MODULE_NVM,\
Charles MacNeill 5:89031b2f5316 39 status, fmt, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 40
Charles MacNeill 5:89031b2f5316 41 #define trace_print(level, ...) \
Charles MacNeill 5:89031b2f5316 42 _LOG_TRACE_PRINT(VL53LX_TRACE_MODULE_NVM, \
Charles MacNeill 5:89031b2f5316 43 level, VL53LX_TRACE_FUNCTION_NONE, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 44
Charles MacNeill 5:89031b2f5316 45
Charles MacNeill 5:89031b2f5316 46 VL53LX_Error VL53LX_nvm_enable(
Charles MacNeill 5:89031b2f5316 47 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 48 uint16_t nvm_ctrl_pulse_width,
Charles MacNeill 5:89031b2f5316 49 int32_t nvm_power_up_delay_us)
Charles MacNeill 5:89031b2f5316 50 {
Charles MacNeill 5:89031b2f5316 51
Charles MacNeill 5:89031b2f5316 52
Charles MacNeill 5:89031b2f5316 53 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 54
Charles MacNeill 5:89031b2f5316 55 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 56
Charles MacNeill 5:89031b2f5316 57
Charles MacNeill 5:89031b2f5316 58
Charles MacNeill 5:89031b2f5316 59
Charles MacNeill 5:89031b2f5316 60 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 61 status = VL53LX_disable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 62
Charles MacNeill 5:89031b2f5316 63
Charles MacNeill 5:89031b2f5316 64
Charles MacNeill 5:89031b2f5316 65
Charles MacNeill 5:89031b2f5316 66 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 67 status = VL53LX_enable_powerforce(Dev);
Charles MacNeill 5:89031b2f5316 68
Charles MacNeill 5:89031b2f5316 69
Charles MacNeill 5:89031b2f5316 70
Charles MacNeill 5:89031b2f5316 71 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 72 status = VL53LX_WaitUs(
Charles MacNeill 5:89031b2f5316 73 Dev,
Charles MacNeill 5:89031b2f5316 74 VL53LX_ENABLE_POWERFORCE_SETTLING_TIME_US);
Charles MacNeill 5:89031b2f5316 75
Charles MacNeill 5:89031b2f5316 76
Charles MacNeill 5:89031b2f5316 77
Charles MacNeill 5:89031b2f5316 78 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 79 status = VL53LX_WrByte(
Charles MacNeill 5:89031b2f5316 80 Dev,
Charles MacNeill 5:89031b2f5316 81 VL53LX_RANGING_CORE__NVM_CTRL__PDN,
Charles MacNeill 5:89031b2f5316 82 0x01);
Charles MacNeill 5:89031b2f5316 83
Charles MacNeill 5:89031b2f5316 84
Charles MacNeill 5:89031b2f5316 85
Charles MacNeill 5:89031b2f5316 86 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 87 status = VL53LX_WrByte(
Charles MacNeill 5:89031b2f5316 88 Dev,
Charles MacNeill 5:89031b2f5316 89 VL53LX_RANGING_CORE__CLK_CTRL1,
Charles MacNeill 5:89031b2f5316 90 0x05);
Charles MacNeill 5:89031b2f5316 91
Charles MacNeill 5:89031b2f5316 92
Charles MacNeill 5:89031b2f5316 93
Charles MacNeill 5:89031b2f5316 94 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 95 status = VL53LX_WaitUs(
Charles MacNeill 5:89031b2f5316 96 Dev,
Charles MacNeill 5:89031b2f5316 97 nvm_power_up_delay_us);
Charles MacNeill 5:89031b2f5316 98
Charles MacNeill 5:89031b2f5316 99
Charles MacNeill 5:89031b2f5316 100
Charles MacNeill 5:89031b2f5316 101 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 102 status = VL53LX_WrByte(
Charles MacNeill 5:89031b2f5316 103 Dev,
Charles MacNeill 5:89031b2f5316 104 VL53LX_RANGING_CORE__NVM_CTRL__MODE,
Charles MacNeill 5:89031b2f5316 105 0x01);
Charles MacNeill 5:89031b2f5316 106
Charles MacNeill 5:89031b2f5316 107 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 108 status = VL53LX_WrWord(
Charles MacNeill 5:89031b2f5316 109 Dev,
Charles MacNeill 5:89031b2f5316 110 VL53LX_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB,
Charles MacNeill 5:89031b2f5316 111 nvm_ctrl_pulse_width);
Charles MacNeill 5:89031b2f5316 112
Charles MacNeill 5:89031b2f5316 113 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 114
Charles MacNeill 5:89031b2f5316 115 return status;
Charles MacNeill 5:89031b2f5316 116
Charles MacNeill 5:89031b2f5316 117 }
Charles MacNeill 5:89031b2f5316 118
Charles MacNeill 5:89031b2f5316 119
Charles MacNeill 5:89031b2f5316 120 VL53LX_Error VL53LX_nvm_read(
Charles MacNeill 5:89031b2f5316 121 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 122 uint8_t start_address,
Charles MacNeill 5:89031b2f5316 123 uint8_t count,
Charles MacNeill 5:89031b2f5316 124 uint8_t *pdata)
Charles MacNeill 5:89031b2f5316 125 {
Charles MacNeill 5:89031b2f5316 126
Charles MacNeill 5:89031b2f5316 127
Charles MacNeill 5:89031b2f5316 128 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 129 uint8_t nvm_addr = 0;
Charles MacNeill 5:89031b2f5316 130
Charles MacNeill 5:89031b2f5316 131 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 132
Charles MacNeill 5:89031b2f5316 133 trace_print(
Charles MacNeill 5:89031b2f5316 134 VL53LX_TRACE_LEVEL_INFO,
Charles MacNeill 5:89031b2f5316 135 "%-12s = 0x%02X (%3u)\n",
Charles MacNeill 5:89031b2f5316 136 "nvm_addr", nvm_addr, nvm_addr);
Charles MacNeill 5:89031b2f5316 137
Charles MacNeill 5:89031b2f5316 138 trace_print(
Charles MacNeill 5:89031b2f5316 139 VL53LX_TRACE_LEVEL_INFO,
Charles MacNeill 5:89031b2f5316 140 "%-12s = 0x%02X (%3u)\n",
Charles MacNeill 5:89031b2f5316 141 "count", count, count);
Charles MacNeill 5:89031b2f5316 142
Charles MacNeill 5:89031b2f5316 143 for (nvm_addr = start_address;
Charles MacNeill 5:89031b2f5316 144 nvm_addr < (start_address+count) ; nvm_addr++) {
Charles MacNeill 5:89031b2f5316 145
Charles MacNeill 5:89031b2f5316 146
Charles MacNeill 5:89031b2f5316 147
Charles MacNeill 5:89031b2f5316 148 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 149 status = VL53LX_WrByte(
Charles MacNeill 5:89031b2f5316 150 Dev,
Charles MacNeill 5:89031b2f5316 151 VL53LX_RANGING_CORE__NVM_CTRL__ADDR,
Charles MacNeill 5:89031b2f5316 152 nvm_addr);
Charles MacNeill 5:89031b2f5316 153
Charles MacNeill 5:89031b2f5316 154
Charles MacNeill 5:89031b2f5316 155
Charles MacNeill 5:89031b2f5316 156 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 157 status = VL53LX_WrByte(
Charles MacNeill 5:89031b2f5316 158 Dev,
Charles MacNeill 5:89031b2f5316 159 VL53LX_RANGING_CORE__NVM_CTRL__READN,
Charles MacNeill 5:89031b2f5316 160 0x00);
Charles MacNeill 5:89031b2f5316 161
Charles MacNeill 5:89031b2f5316 162
Charles MacNeill 5:89031b2f5316 163
Charles MacNeill 5:89031b2f5316 164 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 165 status = VL53LX_WaitUs(
Charles MacNeill 5:89031b2f5316 166 Dev,
Charles MacNeill 5:89031b2f5316 167 VL53LX_NVM_READ_TRIGGER_DELAY_US);
Charles MacNeill 5:89031b2f5316 168
Charles MacNeill 5:89031b2f5316 169 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 170 status = VL53LX_WrByte(
Charles MacNeill 5:89031b2f5316 171 Dev,
Charles MacNeill 5:89031b2f5316 172 VL53LX_RANGING_CORE__NVM_CTRL__READN,
Charles MacNeill 5:89031b2f5316 173 0x01);
Charles MacNeill 5:89031b2f5316 174
Charles MacNeill 5:89031b2f5316 175
Charles MacNeill 5:89031b2f5316 176 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 177 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 178 Dev,
Charles MacNeill 5:89031b2f5316 179 VL53LX_RANGING_CORE__NVM_CTRL__DATAOUT_MMM,
Charles MacNeill 5:89031b2f5316 180 pdata,
Charles MacNeill 5:89031b2f5316 181 4);
Charles MacNeill 5:89031b2f5316 182
Charles MacNeill 5:89031b2f5316 183 trace_print(
Charles MacNeill 5:89031b2f5316 184 VL53LX_TRACE_LEVEL_INFO,
Charles MacNeill 5:89031b2f5316 185 "NVM address : 0x%02X = 0x%02X%02X%02X%02X\n",
Charles MacNeill 5:89031b2f5316 186 nvm_addr, *pdata, *(pdata+1), *(pdata+2), *(pdata+3));
Charles MacNeill 5:89031b2f5316 187
Charles MacNeill 5:89031b2f5316 188
Charles MacNeill 5:89031b2f5316 189
Charles MacNeill 5:89031b2f5316 190 pdata = pdata + 4;
Charles MacNeill 5:89031b2f5316 191
Charles MacNeill 5:89031b2f5316 192
Charles MacNeill 5:89031b2f5316 193 }
Charles MacNeill 5:89031b2f5316 194
Charles MacNeill 5:89031b2f5316 195 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 196
Charles MacNeill 5:89031b2f5316 197 return status;
Charles MacNeill 5:89031b2f5316 198 }
Charles MacNeill 5:89031b2f5316 199
Charles MacNeill 5:89031b2f5316 200
Charles MacNeill 5:89031b2f5316 201 VL53LX_Error VL53LX_nvm_disable(
Charles MacNeill 5:89031b2f5316 202 VL53LX_DEV Dev)
Charles MacNeill 5:89031b2f5316 203 {
Charles MacNeill 5:89031b2f5316 204
Charles MacNeill 5:89031b2f5316 205
Charles MacNeill 5:89031b2f5316 206 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 207
Charles MacNeill 5:89031b2f5316 208 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 209
Charles MacNeill 5:89031b2f5316 210 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 211 status = VL53LX_WrByte(
Charles MacNeill 5:89031b2f5316 212 Dev,
Charles MacNeill 5:89031b2f5316 213 VL53LX_RANGING_CORE__NVM_CTRL__READN,
Charles MacNeill 5:89031b2f5316 214 0x01);
Charles MacNeill 5:89031b2f5316 215
Charles MacNeill 5:89031b2f5316 216
Charles MacNeill 5:89031b2f5316 217
Charles MacNeill 5:89031b2f5316 218 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 219 status = VL53LX_WrByte(
Charles MacNeill 5:89031b2f5316 220 Dev,
Charles MacNeill 5:89031b2f5316 221 VL53LX_RANGING_CORE__NVM_CTRL__PDN,
Charles MacNeill 5:89031b2f5316 222 0x00);
Charles MacNeill 5:89031b2f5316 223
Charles MacNeill 5:89031b2f5316 224
Charles MacNeill 5:89031b2f5316 225
Charles MacNeill 5:89031b2f5316 226 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 227 status = VL53LX_disable_powerforce(Dev);
Charles MacNeill 5:89031b2f5316 228
Charles MacNeill 5:89031b2f5316 229
Charles MacNeill 5:89031b2f5316 230
Charles MacNeill 5:89031b2f5316 231 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 232 status = VL53LX_enable_firmware(Dev);
Charles MacNeill 5:89031b2f5316 233
Charles MacNeill 5:89031b2f5316 234 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 235
Charles MacNeill 5:89031b2f5316 236 return status;
Charles MacNeill 5:89031b2f5316 237
Charles MacNeill 5:89031b2f5316 238 }
Charles MacNeill 5:89031b2f5316 239
Charles MacNeill 5:89031b2f5316 240
Charles MacNeill 5:89031b2f5316 241 VL53LX_Error VL53LX_nvm_format_decode(
Charles MacNeill 5:89031b2f5316 242 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 243 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 244 VL53LX_decoded_nvm_data_t *pdata)
Charles MacNeill 5:89031b2f5316 245 {
Charles MacNeill 5:89031b2f5316 246
Charles MacNeill 5:89031b2f5316 247
Charles MacNeill 5:89031b2f5316 248
Charles MacNeill 5:89031b2f5316 249 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 250
Charles MacNeill 5:89031b2f5316 251 uint8_t i = 0;
Charles MacNeill 5:89031b2f5316 252 uint8_t *ptmp = NULL;
Charles MacNeill 5:89031b2f5316 253 int pptmp[VL53LX_NVM_MAX_FMT_RANGE_DATA];
Charles MacNeill 5:89031b2f5316 254
Charles MacNeill 5:89031b2f5316 255 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 256
Charles MacNeill 5:89031b2f5316 257 if (buf_size < VL53LX_NVM_SIZE_IN_BYTES)
Charles MacNeill 5:89031b2f5316 258 return VL53LX_ERROR_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 259
Charles MacNeill 5:89031b2f5316 260 pdata->nvm__identification_model_id =
Charles MacNeill 5:89031b2f5316 261 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 262 1,
Charles MacNeill 5:89031b2f5316 263 pbuffer + VL53LX_NVM__IDENTIFICATION__MODEL_ID,
Charles MacNeill 5:89031b2f5316 264 0x000000FF,
Charles MacNeill 5:89031b2f5316 265 0,
Charles MacNeill 5:89031b2f5316 266 0);
Charles MacNeill 5:89031b2f5316 267 pdata->nvm__identification_module_type =
Charles MacNeill 5:89031b2f5316 268 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 269 1,
Charles MacNeill 5:89031b2f5316 270 pbuffer + VL53LX_NVM__IDENTIFICATION__MODULE_TYPE,
Charles MacNeill 5:89031b2f5316 271 0x000000FF,
Charles MacNeill 5:89031b2f5316 272 0,
Charles MacNeill 5:89031b2f5316 273 0);
Charles MacNeill 5:89031b2f5316 274 pdata->nvm__identification_revision_id =
Charles MacNeill 5:89031b2f5316 275 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 276 1,
Charles MacNeill 5:89031b2f5316 277 pbuffer + VL53LX_NVM__IDENTIFICATION__REVISION_ID,
Charles MacNeill 5:89031b2f5316 278 0x0000000F,
Charles MacNeill 5:89031b2f5316 279 0,
Charles MacNeill 5:89031b2f5316 280 0);
Charles MacNeill 5:89031b2f5316 281 pdata->nvm__identification_module_id =
Charles MacNeill 5:89031b2f5316 282 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 283 2,
Charles MacNeill 5:89031b2f5316 284 pbuffer + VL53LX_NVM__IDENTIFICATION__MODULE_ID,
Charles MacNeill 5:89031b2f5316 285 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 286 0,
Charles MacNeill 5:89031b2f5316 287 0);
Charles MacNeill 5:89031b2f5316 288 pdata->nvm__i2c_valid =
Charles MacNeill 5:89031b2f5316 289 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 290 1,
Charles MacNeill 5:89031b2f5316 291 pbuffer + VL53LX_NVM__I2C_VALID,
Charles MacNeill 5:89031b2f5316 292 0x000000FF,
Charles MacNeill 5:89031b2f5316 293 0,
Charles MacNeill 5:89031b2f5316 294 0);
Charles MacNeill 5:89031b2f5316 295 pdata->nvm__i2c_device_address_ews =
Charles MacNeill 5:89031b2f5316 296 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 297 1,
Charles MacNeill 5:89031b2f5316 298 pbuffer + VL53LX_NVM__I2C_SLAVE__DEVICE_ADDRESS,
Charles MacNeill 5:89031b2f5316 299 0x000000FF,
Charles MacNeill 5:89031b2f5316 300 0,
Charles MacNeill 5:89031b2f5316 301 0);
Charles MacNeill 5:89031b2f5316 302 pdata->nvm__ews__fast_osc_frequency =
Charles MacNeill 5:89031b2f5316 303 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 304 2,
Charles MacNeill 5:89031b2f5316 305 pbuffer +
Charles MacNeill 5:89031b2f5316 306 VL53LX_NVM__EWS__OSC_MEASURED__FAST_OSC_FREQUENCY,
Charles MacNeill 5:89031b2f5316 307 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 308 0,
Charles MacNeill 5:89031b2f5316 309 0);
Charles MacNeill 5:89031b2f5316 310 pdata->nvm__ews__fast_osc_trim_max =
Charles MacNeill 5:89031b2f5316 311 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 312 1,
Charles MacNeill 5:89031b2f5316 313 pbuffer + VL53LX_NVM__EWS__FAST_OSC_TRIM_MAX,
Charles MacNeill 5:89031b2f5316 314 0x0000007F,
Charles MacNeill 5:89031b2f5316 315 0,
Charles MacNeill 5:89031b2f5316 316 0);
Charles MacNeill 5:89031b2f5316 317 pdata->nvm__ews__fast_osc_freq_set =
Charles MacNeill 5:89031b2f5316 318 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 319 1,
Charles MacNeill 5:89031b2f5316 320 pbuffer + VL53LX_NVM__EWS__FAST_OSC_FREQ_SET,
Charles MacNeill 5:89031b2f5316 321 0x00000007,
Charles MacNeill 5:89031b2f5316 322 0,
Charles MacNeill 5:89031b2f5316 323 0);
Charles MacNeill 5:89031b2f5316 324 pdata->nvm__ews__slow_osc_calibration =
Charles MacNeill 5:89031b2f5316 325 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 326 2,
Charles MacNeill 5:89031b2f5316 327 pbuffer + VL53LX_NVM__EWS__SLOW_OSC_CALIBRATION,
Charles MacNeill 5:89031b2f5316 328 0x000003FF,
Charles MacNeill 5:89031b2f5316 329 0,
Charles MacNeill 5:89031b2f5316 330 0);
Charles MacNeill 5:89031b2f5316 331 pdata->nvm__fmt__fast_osc_frequency =
Charles MacNeill 5:89031b2f5316 332 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 333 2,
Charles MacNeill 5:89031b2f5316 334 pbuffer +
Charles MacNeill 5:89031b2f5316 335 VL53LX_NVM__FMT__OSC_MEASURED__FAST_OSC_FREQUENCY,
Charles MacNeill 5:89031b2f5316 336 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 337 0,
Charles MacNeill 5:89031b2f5316 338 0);
Charles MacNeill 5:89031b2f5316 339 pdata->nvm__fmt__fast_osc_trim_max =
Charles MacNeill 5:89031b2f5316 340 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 341 1,
Charles MacNeill 5:89031b2f5316 342 pbuffer + VL53LX_NVM__FMT__FAST_OSC_TRIM_MAX,
Charles MacNeill 5:89031b2f5316 343 0x0000007F,
Charles MacNeill 5:89031b2f5316 344 0,
Charles MacNeill 5:89031b2f5316 345 0);
Charles MacNeill 5:89031b2f5316 346 pdata->nvm__fmt__fast_osc_freq_set =
Charles MacNeill 5:89031b2f5316 347 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 348 1,
Charles MacNeill 5:89031b2f5316 349 pbuffer + VL53LX_NVM__FMT__FAST_OSC_FREQ_SET,
Charles MacNeill 5:89031b2f5316 350 0x00000007,
Charles MacNeill 5:89031b2f5316 351 0,
Charles MacNeill 5:89031b2f5316 352 0);
Charles MacNeill 5:89031b2f5316 353 pdata->nvm__fmt__slow_osc_calibration =
Charles MacNeill 5:89031b2f5316 354 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 355 2,
Charles MacNeill 5:89031b2f5316 356 pbuffer + VL53LX_NVM__FMT__SLOW_OSC_CALIBRATION,
Charles MacNeill 5:89031b2f5316 357 0x000003FF,
Charles MacNeill 5:89031b2f5316 358 0,
Charles MacNeill 5:89031b2f5316 359 0);
Charles MacNeill 5:89031b2f5316 360 pdata->nvm__vhv_config_unlock =
Charles MacNeill 5:89031b2f5316 361 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 362 1,
Charles MacNeill 5:89031b2f5316 363 pbuffer + VL53LX_NVM__VHV_CONFIG_UNLOCK,
Charles MacNeill 5:89031b2f5316 364 0x000000FF,
Charles MacNeill 5:89031b2f5316 365 0,
Charles MacNeill 5:89031b2f5316 366 0);
Charles MacNeill 5:89031b2f5316 367 pdata->nvm__ref_selvddpix =
Charles MacNeill 5:89031b2f5316 368 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 369 1,
Charles MacNeill 5:89031b2f5316 370 pbuffer + VL53LX_NVM__REF_SELVDDPIX,
Charles MacNeill 5:89031b2f5316 371 0x0000000F,
Charles MacNeill 5:89031b2f5316 372 0,
Charles MacNeill 5:89031b2f5316 373 0);
Charles MacNeill 5:89031b2f5316 374 pdata->nvm__ref_selvquench =
Charles MacNeill 5:89031b2f5316 375 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 376 1,
Charles MacNeill 5:89031b2f5316 377 pbuffer + VL53LX_NVM__REF_SELVQUENCH,
Charles MacNeill 5:89031b2f5316 378 0x00000078,
Charles MacNeill 5:89031b2f5316 379 3,
Charles MacNeill 5:89031b2f5316 380 0);
Charles MacNeill 5:89031b2f5316 381 pdata->nvm__regavdd1v2_sel =
Charles MacNeill 5:89031b2f5316 382 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 383 1,
Charles MacNeill 5:89031b2f5316 384 pbuffer + VL53LX_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL,
Charles MacNeill 5:89031b2f5316 385 0x0000000C,
Charles MacNeill 5:89031b2f5316 386 2,
Charles MacNeill 5:89031b2f5316 387 0);
Charles MacNeill 5:89031b2f5316 388 pdata->nvm__regdvdd1v2_sel =
Charles MacNeill 5:89031b2f5316 389 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 390 1,
Charles MacNeill 5:89031b2f5316 391 pbuffer + VL53LX_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL,
Charles MacNeill 5:89031b2f5316 392 0x00000003,
Charles MacNeill 5:89031b2f5316 393 0,
Charles MacNeill 5:89031b2f5316 394 0);
Charles MacNeill 5:89031b2f5316 395 pdata->nvm__vhv_timeout__macrop =
Charles MacNeill 5:89031b2f5316 396 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 397 1,
Charles MacNeill 5:89031b2f5316 398 pbuffer +
Charles MacNeill 5:89031b2f5316 399 VL53LX_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND,
Charles MacNeill 5:89031b2f5316 400 0x00000003,
Charles MacNeill 5:89031b2f5316 401 0,
Charles MacNeill 5:89031b2f5316 402 0);
Charles MacNeill 5:89031b2f5316 403 pdata->nvm__vhv_loop_bound =
Charles MacNeill 5:89031b2f5316 404 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 405 1,
Charles MacNeill 5:89031b2f5316 406 pbuffer +
Charles MacNeill 5:89031b2f5316 407 VL53LX_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND,
Charles MacNeill 5:89031b2f5316 408 0x000000FC,
Charles MacNeill 5:89031b2f5316 409 2,
Charles MacNeill 5:89031b2f5316 410 0);
Charles MacNeill 5:89031b2f5316 411 pdata->nvm__vhv_count_threshold =
Charles MacNeill 5:89031b2f5316 412 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 413 1,
Charles MacNeill 5:89031b2f5316 414 pbuffer + VL53LX_NVM__VHV_CONFIG__COUNT_THRESH,
Charles MacNeill 5:89031b2f5316 415 0x000000FF,
Charles MacNeill 5:89031b2f5316 416 0,
Charles MacNeill 5:89031b2f5316 417 0);
Charles MacNeill 5:89031b2f5316 418 pdata->nvm__vhv_offset =
Charles MacNeill 5:89031b2f5316 419 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 420 1,
Charles MacNeill 5:89031b2f5316 421 pbuffer + VL53LX_NVM__VHV_CONFIG__OFFSET,
Charles MacNeill 5:89031b2f5316 422 0x0000003F,
Charles MacNeill 5:89031b2f5316 423 0,
Charles MacNeill 5:89031b2f5316 424 0);
Charles MacNeill 5:89031b2f5316 425 pdata->nvm__vhv_init_enable =
Charles MacNeill 5:89031b2f5316 426 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 427 1,
Charles MacNeill 5:89031b2f5316 428 pbuffer + VL53LX_NVM__VHV_CONFIG__INIT,
Charles MacNeill 5:89031b2f5316 429 0x00000080,
Charles MacNeill 5:89031b2f5316 430 7,
Charles MacNeill 5:89031b2f5316 431 0);
Charles MacNeill 5:89031b2f5316 432 pdata->nvm__vhv_init_value =
Charles MacNeill 5:89031b2f5316 433 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 434 1,
Charles MacNeill 5:89031b2f5316 435 pbuffer + VL53LX_NVM__VHV_CONFIG__INIT,
Charles MacNeill 5:89031b2f5316 436 0x0000003F,
Charles MacNeill 5:89031b2f5316 437 0,
Charles MacNeill 5:89031b2f5316 438 0);
Charles MacNeill 5:89031b2f5316 439 pdata->nvm__laser_safety_vcsel_trim_ll =
Charles MacNeill 5:89031b2f5316 440 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 441 1,
Charles MacNeill 5:89031b2f5316 442 pbuffer + VL53LX_NVM__LASER_SAFETY__VCSEL_TRIM_LL,
Charles MacNeill 5:89031b2f5316 443 0x00000007,
Charles MacNeill 5:89031b2f5316 444 0,
Charles MacNeill 5:89031b2f5316 445 0);
Charles MacNeill 5:89031b2f5316 446 pdata->nvm__laser_safety_vcsel_selion_ll =
Charles MacNeill 5:89031b2f5316 447 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 448 1,
Charles MacNeill 5:89031b2f5316 449 pbuffer + VL53LX_NVM__LASER_SAFETY__VCSEL_SELION_LL,
Charles MacNeill 5:89031b2f5316 450 0x0000003F,
Charles MacNeill 5:89031b2f5316 451 0,
Charles MacNeill 5:89031b2f5316 452 0);
Charles MacNeill 5:89031b2f5316 453 pdata->nvm__laser_safety_vcsel_selion_max_ll =
Charles MacNeill 5:89031b2f5316 454 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 455 1,
Charles MacNeill 5:89031b2f5316 456 pbuffer + VL53LX_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LL,
Charles MacNeill 5:89031b2f5316 457 0x0000003F,
Charles MacNeill 5:89031b2f5316 458 0,
Charles MacNeill 5:89031b2f5316 459 0);
Charles MacNeill 5:89031b2f5316 460 pdata->nvm__laser_safety_mult_ll =
Charles MacNeill 5:89031b2f5316 461 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 462 1,
Charles MacNeill 5:89031b2f5316 463 pbuffer + VL53LX_NVM__LASER_SAFETY__MULT_LL,
Charles MacNeill 5:89031b2f5316 464 0x0000003F,
Charles MacNeill 5:89031b2f5316 465 0,
Charles MacNeill 5:89031b2f5316 466 0);
Charles MacNeill 5:89031b2f5316 467 pdata->nvm__laser_safety_clip_ll =
Charles MacNeill 5:89031b2f5316 468 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 469 1,
Charles MacNeill 5:89031b2f5316 470 pbuffer + VL53LX_NVM__LASER_SAFETY__CLIP_LL,
Charles MacNeill 5:89031b2f5316 471 0x0000003F,
Charles MacNeill 5:89031b2f5316 472 0,
Charles MacNeill 5:89031b2f5316 473 0);
Charles MacNeill 5:89031b2f5316 474 pdata->nvm__laser_safety_vcsel_trim_ld =
Charles MacNeill 5:89031b2f5316 475 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 476 1,
Charles MacNeill 5:89031b2f5316 477 pbuffer + VL53LX_NVM__LASER_SAFETY__VCSEL_TRIM_LD,
Charles MacNeill 5:89031b2f5316 478 0x00000007,
Charles MacNeill 5:89031b2f5316 479 0,
Charles MacNeill 5:89031b2f5316 480 0);
Charles MacNeill 5:89031b2f5316 481 pdata->nvm__laser_safety_vcsel_selion_ld =
Charles MacNeill 5:89031b2f5316 482 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 483 1,
Charles MacNeill 5:89031b2f5316 484 pbuffer + VL53LX_NVM__LASER_SAFETY__VCSEL_SELION_LD,
Charles MacNeill 5:89031b2f5316 485 0x0000003F,
Charles MacNeill 5:89031b2f5316 486 0,
Charles MacNeill 5:89031b2f5316 487 0);
Charles MacNeill 5:89031b2f5316 488 pdata->nvm__laser_safety_vcsel_selion_max_ld =
Charles MacNeill 5:89031b2f5316 489 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 490 1,
Charles MacNeill 5:89031b2f5316 491 pbuffer + VL53LX_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LD,
Charles MacNeill 5:89031b2f5316 492 0x0000003F,
Charles MacNeill 5:89031b2f5316 493 0,
Charles MacNeill 5:89031b2f5316 494 0);
Charles MacNeill 5:89031b2f5316 495 pdata->nvm__laser_safety_mult_ld =
Charles MacNeill 5:89031b2f5316 496 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 497 1,
Charles MacNeill 5:89031b2f5316 498 pbuffer + VL53LX_NVM__LASER_SAFETY__MULT_LD,
Charles MacNeill 5:89031b2f5316 499 0x0000003F,
Charles MacNeill 5:89031b2f5316 500 0,
Charles MacNeill 5:89031b2f5316 501 0);
Charles MacNeill 5:89031b2f5316 502 pdata->nvm__laser_safety_clip_ld =
Charles MacNeill 5:89031b2f5316 503 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 504 1,
Charles MacNeill 5:89031b2f5316 505 pbuffer + VL53LX_NVM__LASER_SAFETY__CLIP_LD,
Charles MacNeill 5:89031b2f5316 506 0x0000003F,
Charles MacNeill 5:89031b2f5316 507 0,
Charles MacNeill 5:89031b2f5316 508 0);
Charles MacNeill 5:89031b2f5316 509 pdata->nvm__laser_safety_lock_byte =
Charles MacNeill 5:89031b2f5316 510 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 511 1,
Charles MacNeill 5:89031b2f5316 512 pbuffer + VL53LX_NVM__LASER_SAFETY_LOCK_BYTE,
Charles MacNeill 5:89031b2f5316 513 0x000000FF,
Charles MacNeill 5:89031b2f5316 514 0,
Charles MacNeill 5:89031b2f5316 515 0);
Charles MacNeill 5:89031b2f5316 516 pdata->nvm__laser_safety_unlock_byte =
Charles MacNeill 5:89031b2f5316 517 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 518 1,
Charles MacNeill 5:89031b2f5316 519 pbuffer + VL53LX_NVM__LASER_SAFETY_UNLOCK_BYTE,
Charles MacNeill 5:89031b2f5316 520 0x000000FF,
Charles MacNeill 5:89031b2f5316 521 0,
Charles MacNeill 5:89031b2f5316 522 0);
Charles MacNeill 5:89031b2f5316 523
Charles MacNeill 5:89031b2f5316 524
Charles MacNeill 5:89031b2f5316 525
Charles MacNeill 5:89031b2f5316 526 ptmp = pbuffer + VL53LX_NVM__EWS__SPAD_ENABLES_RTN_0_;
Charles MacNeill 5:89031b2f5316 527 for (i = 0 ; i < VL53LX_RTN_SPAD_BUFFER_SIZE ; i++)
Charles MacNeill 5:89031b2f5316 528 pdata->nvm__ews__spad_enables_rtn[i] = *ptmp++;
Charles MacNeill 5:89031b2f5316 529
Charles MacNeill 5:89031b2f5316 530 ptmp = pbuffer + VL53LX_NVM__EWS__SPAD_ENABLES_REF__LOC1_0_;
Charles MacNeill 5:89031b2f5316 531 for (i = 0 ; i < VL53LX_REF_SPAD_BUFFER_SIZE ; i++)
Charles MacNeill 5:89031b2f5316 532 pdata->nvm__ews__spad_enables_ref__loc1[i] = *ptmp++;
Charles MacNeill 5:89031b2f5316 533
Charles MacNeill 5:89031b2f5316 534 ptmp = pbuffer + VL53LX_NVM__EWS__SPAD_ENABLES_REF__LOC2_0_;
Charles MacNeill 5:89031b2f5316 535 for (i = 0 ; i < VL53LX_REF_SPAD_BUFFER_SIZE ; i++)
Charles MacNeill 5:89031b2f5316 536 pdata->nvm__ews__spad_enables_ref__loc2[i] = *ptmp++;
Charles MacNeill 5:89031b2f5316 537
Charles MacNeill 5:89031b2f5316 538 ptmp = pbuffer + VL53LX_NVM__EWS__SPAD_ENABLES_REF__LOC3_0_;
Charles MacNeill 5:89031b2f5316 539 for (i = 0 ; i < VL53LX_REF_SPAD_BUFFER_SIZE ; i++)
Charles MacNeill 5:89031b2f5316 540 pdata->nvm__ews__spad_enables_ref__loc3[i] = *ptmp++;
Charles MacNeill 5:89031b2f5316 541
Charles MacNeill 5:89031b2f5316 542
Charles MacNeill 5:89031b2f5316 543
Charles MacNeill 5:89031b2f5316 544 ptmp = pbuffer + VL53LX_NVM__FMT__SPAD_ENABLES_RTN_0_;
Charles MacNeill 5:89031b2f5316 545 for (i = 0 ; i < VL53LX_RTN_SPAD_BUFFER_SIZE ; i++)
Charles MacNeill 5:89031b2f5316 546 pdata->nvm__fmt__spad_enables_rtn[i] = *ptmp++;
Charles MacNeill 5:89031b2f5316 547
Charles MacNeill 5:89031b2f5316 548 ptmp = pbuffer + VL53LX_NVM__FMT__SPAD_ENABLES_REF__LOC1_0_;
Charles MacNeill 5:89031b2f5316 549 for (i = 0 ; i < VL53LX_REF_SPAD_BUFFER_SIZE ; i++)
Charles MacNeill 5:89031b2f5316 550 pdata->nvm__fmt__spad_enables_ref__loc1[i] = *ptmp++;
Charles MacNeill 5:89031b2f5316 551
Charles MacNeill 5:89031b2f5316 552 ptmp = pbuffer + VL53LX_NVM__FMT__SPAD_ENABLES_REF__LOC2_0_;
Charles MacNeill 5:89031b2f5316 553 for (i = 0 ; i < VL53LX_REF_SPAD_BUFFER_SIZE ; i++)
Charles MacNeill 5:89031b2f5316 554 pdata->nvm__fmt__spad_enables_ref__loc2[i] = *ptmp++;
Charles MacNeill 5:89031b2f5316 555
Charles MacNeill 5:89031b2f5316 556 ptmp = pbuffer + VL53LX_NVM__FMT__SPAD_ENABLES_REF__LOC3_0_;
Charles MacNeill 5:89031b2f5316 557 for (i = 0 ; i < VL53LX_REF_SPAD_BUFFER_SIZE ; i++)
Charles MacNeill 5:89031b2f5316 558 pdata->nvm__fmt__spad_enables_ref__loc3[i] = *ptmp++;
Charles MacNeill 5:89031b2f5316 559
Charles MacNeill 5:89031b2f5316 560
Charles MacNeill 5:89031b2f5316 561 pdata->nvm__fmt__roi_config__mode_roi_centre_spad =
Charles MacNeill 5:89031b2f5316 562 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 563 1,
Charles MacNeill 5:89031b2f5316 564 pbuffer +
Charles MacNeill 5:89031b2f5316 565 VL53LX_NVM__FMT__ROI_CONFIG__MODE_ROI_CENTRE_SPAD,
Charles MacNeill 5:89031b2f5316 566 0x000000FF,
Charles MacNeill 5:89031b2f5316 567 0,
Charles MacNeill 5:89031b2f5316 568 0);
Charles MacNeill 5:89031b2f5316 569 pdata->nvm__fmt__roi_config__mode_roi_x_size =
Charles MacNeill 5:89031b2f5316 570 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 571 1,
Charles MacNeill 5:89031b2f5316 572 pbuffer +
Charles MacNeill 5:89031b2f5316 573 VL53LX_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE,
Charles MacNeill 5:89031b2f5316 574 0x000000F0,
Charles MacNeill 5:89031b2f5316 575 4,
Charles MacNeill 5:89031b2f5316 576 0);
Charles MacNeill 5:89031b2f5316 577 pdata->nvm__fmt__roi_config__mode_roi_y_size =
Charles MacNeill 5:89031b2f5316 578 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 579 1,
Charles MacNeill 5:89031b2f5316 580 pbuffer + VL53LX_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE,
Charles MacNeill 5:89031b2f5316 581 0x0000000F,
Charles MacNeill 5:89031b2f5316 582 0,
Charles MacNeill 5:89031b2f5316 583 0);
Charles MacNeill 5:89031b2f5316 584 pdata->nvm__fmt__ref_spad_apply__num_requested_ref_spad =
Charles MacNeill 5:89031b2f5316 585 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 586 1,
Charles MacNeill 5:89031b2f5316 587 pbuffer +
Charles MacNeill 5:89031b2f5316 588 VL53LX_NVM__FMT__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD,
Charles MacNeill 5:89031b2f5316 589 0x000000FF,
Charles MacNeill 5:89031b2f5316 590 0,
Charles MacNeill 5:89031b2f5316 591 0);
Charles MacNeill 5:89031b2f5316 592 pdata->nvm__fmt__ref_spad_man__ref_location =
Charles MacNeill 5:89031b2f5316 593 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 594 1,
Charles MacNeill 5:89031b2f5316 595 pbuffer + VL53LX_NVM__FMT__REF_SPAD_MAN__REF_LOCATION,
Charles MacNeill 5:89031b2f5316 596 0x00000003,
Charles MacNeill 5:89031b2f5316 597 0,
Charles MacNeill 5:89031b2f5316 598 0);
Charles MacNeill 5:89031b2f5316 599 pdata->nvm__fmt__mm_config__inner_offset_mm =
Charles MacNeill 5:89031b2f5316 600 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 601 2,
Charles MacNeill 5:89031b2f5316 602 pbuffer + VL53LX_NVM__FMT__MM_CONFIG__INNER_OFFSET_MM,
Charles MacNeill 5:89031b2f5316 603 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 604 0,
Charles MacNeill 5:89031b2f5316 605 0);
Charles MacNeill 5:89031b2f5316 606 pdata->nvm__fmt__mm_config__outer_offset_mm =
Charles MacNeill 5:89031b2f5316 607 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 608 2,
Charles MacNeill 5:89031b2f5316 609 pbuffer + VL53LX_NVM__FMT__MM_CONFIG__OUTER_OFFSET_MM,
Charles MacNeill 5:89031b2f5316 610 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 611 0,
Charles MacNeill 5:89031b2f5316 612 0);
Charles MacNeill 5:89031b2f5316 613 pdata->nvm__fmt__algo_part_to_part_range_offset_mm =
Charles MacNeill 5:89031b2f5316 614 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 615 2,
Charles MacNeill 5:89031b2f5316 616 pbuffer +
Charles MacNeill 5:89031b2f5316 617 VL53LX_NVM__FMT__ALGO__PART_TO_PART_RANGE_OFFSET_MM,
Charles MacNeill 5:89031b2f5316 618 0x00000FFF,
Charles MacNeill 5:89031b2f5316 619 0,
Charles MacNeill 5:89031b2f5316 620 0);
Charles MacNeill 5:89031b2f5316 621 pdata->nvm__fmt__algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 622 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 623 2,
Charles MacNeill 5:89031b2f5316 624 pbuffer +
Charles MacNeill 5:89031b2f5316 625 VL53LX_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS,
Charles MacNeill 5:89031b2f5316 626 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 627 0,
Charles MacNeill 5:89031b2f5316 628 0);
Charles MacNeill 5:89031b2f5316 629 pdata->nvm__fmt__algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 630 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 631 2,
Charles MacNeill 5:89031b2f5316 632 pbuffer +
Charles MacNeill 5:89031b2f5316 633 VL53LX_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS,
Charles MacNeill 5:89031b2f5316 634 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 635 0,
Charles MacNeill 5:89031b2f5316 636 0);
Charles MacNeill 5:89031b2f5316 637 pdata->nvm__fmt__algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 638 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 639 2,
Charles MacNeill 5:89031b2f5316 640 pbuffer +
Charles MacNeill 5:89031b2f5316 641 VL53LX_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS,
Charles MacNeill 5:89031b2f5316 642 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 643 0,
Charles MacNeill 5:89031b2f5316 644 0);
Charles MacNeill 5:89031b2f5316 645 pdata->nvm__fmt__spare__host_config__nvm_config_spare_0 =
Charles MacNeill 5:89031b2f5316 646 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 647 1,
Charles MacNeill 5:89031b2f5316 648 pbuffer +
Charles MacNeill 5:89031b2f5316 649 VL53LX_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0,
Charles MacNeill 5:89031b2f5316 650 0x000000FF,
Charles MacNeill 5:89031b2f5316 651 0,
Charles MacNeill 5:89031b2f5316 652 0);
Charles MacNeill 5:89031b2f5316 653 pdata->nvm__fmt__spare__host_config__nvm_config_spare_1 =
Charles MacNeill 5:89031b2f5316 654 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 655 1,
Charles MacNeill 5:89031b2f5316 656 pbuffer +
Charles MacNeill 5:89031b2f5316 657 VL53LX_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1,
Charles MacNeill 5:89031b2f5316 658 0x000000FF,
Charles MacNeill 5:89031b2f5316 659 0,
Charles MacNeill 5:89031b2f5316 660 0);
Charles MacNeill 5:89031b2f5316 661 pdata->nvm__customer_space_programmed =
Charles MacNeill 5:89031b2f5316 662 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 663 1,
Charles MacNeill 5:89031b2f5316 664 pbuffer + VL53LX_NVM__CUSTOMER_NVM_SPACE_PROGRAMMED,
Charles MacNeill 5:89031b2f5316 665 0x000000FF,
Charles MacNeill 5:89031b2f5316 666 0,
Charles MacNeill 5:89031b2f5316 667 0);
Charles MacNeill 5:89031b2f5316 668 pdata->nvm__cust__i2c_device_address =
Charles MacNeill 5:89031b2f5316 669 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 670 1,
Charles MacNeill 5:89031b2f5316 671 pbuffer + VL53LX_NVM__CUST__I2C_SLAVE__DEVICE_ADDRESS,
Charles MacNeill 5:89031b2f5316 672 0x000000FF,
Charles MacNeill 5:89031b2f5316 673 0,
Charles MacNeill 5:89031b2f5316 674 0);
Charles MacNeill 5:89031b2f5316 675 pdata->nvm__cust__ref_spad_apply__num_requested_ref_spad =
Charles MacNeill 5:89031b2f5316 676 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 677 1,
Charles MacNeill 5:89031b2f5316 678 pbuffer +
Charles MacNeill 5:89031b2f5316 679 VL53LX_NVM__CUST__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD,
Charles MacNeill 5:89031b2f5316 680 0x000000FF,
Charles MacNeill 5:89031b2f5316 681 0,
Charles MacNeill 5:89031b2f5316 682 0);
Charles MacNeill 5:89031b2f5316 683 pdata->nvm__cust__ref_spad_man__ref_location =
Charles MacNeill 5:89031b2f5316 684 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 685 1,
Charles MacNeill 5:89031b2f5316 686 pbuffer + VL53LX_NVM__CUST__REF_SPAD_MAN__REF_LOCATION,
Charles MacNeill 5:89031b2f5316 687 0x00000003,
Charles MacNeill 5:89031b2f5316 688 0,
Charles MacNeill 5:89031b2f5316 689 0);
Charles MacNeill 5:89031b2f5316 690 pdata->nvm__cust__mm_config__inner_offset_mm =
Charles MacNeill 5:89031b2f5316 691 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 692 2,
Charles MacNeill 5:89031b2f5316 693 pbuffer + VL53LX_NVM__CUST__MM_CONFIG__INNER_OFFSET_MM,
Charles MacNeill 5:89031b2f5316 694 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 695 0,
Charles MacNeill 5:89031b2f5316 696 0);
Charles MacNeill 5:89031b2f5316 697 pdata->nvm__cust__mm_config__outer_offset_mm =
Charles MacNeill 5:89031b2f5316 698 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 699 2,
Charles MacNeill 5:89031b2f5316 700 pbuffer + VL53LX_NVM__CUST__MM_CONFIG__OUTER_OFFSET_MM,
Charles MacNeill 5:89031b2f5316 701 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 702 0,
Charles MacNeill 5:89031b2f5316 703 0);
Charles MacNeill 5:89031b2f5316 704 pdata->nvm__cust__algo_part_to_part_range_offset_mm =
Charles MacNeill 5:89031b2f5316 705 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 706 2,
Charles MacNeill 5:89031b2f5316 707 pbuffer +
Charles MacNeill 5:89031b2f5316 708 VL53LX_NVM__CUST__ALGO__PART_TO_PART_RANGE_OFFSET_MM,
Charles MacNeill 5:89031b2f5316 709 0x00000FFF,
Charles MacNeill 5:89031b2f5316 710 0,
Charles MacNeill 5:89031b2f5316 711 0);
Charles MacNeill 5:89031b2f5316 712 pdata->nvm__cust__algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 713 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 714 2,
Charles MacNeill 5:89031b2f5316 715 pbuffer +
Charles MacNeill 5:89031b2f5316 716 VL53LX_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS,
Charles MacNeill 5:89031b2f5316 717 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 718 0,
Charles MacNeill 5:89031b2f5316 719 0);
Charles MacNeill 5:89031b2f5316 720 pdata->nvm__cust__algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 721 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 722 2,
Charles MacNeill 5:89031b2f5316 723 pbuffer +
Charles MacNeill 5:89031b2f5316 724 VL53LX_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS,
Charles MacNeill 5:89031b2f5316 725 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 726 0,
Charles MacNeill 5:89031b2f5316 727 0);
Charles MacNeill 5:89031b2f5316 728 pdata->nvm__cust__algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 729 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 730 2,
Charles MacNeill 5:89031b2f5316 731 pbuffer +
Charles MacNeill 5:89031b2f5316 732 VL53LX_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS,
Charles MacNeill 5:89031b2f5316 733 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 734 0,
Charles MacNeill 5:89031b2f5316 735 0);
Charles MacNeill 5:89031b2f5316 736 pdata->nvm__cust__spare__host_config__nvm_config_spare_0 =
Charles MacNeill 5:89031b2f5316 737 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 738 1,
Charles MacNeill 5:89031b2f5316 739 pbuffer + VL53LX_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0,
Charles MacNeill 5:89031b2f5316 740 0x000000FF,
Charles MacNeill 5:89031b2f5316 741 0,
Charles MacNeill 5:89031b2f5316 742 0);
Charles MacNeill 5:89031b2f5316 743 pdata->nvm__cust__spare__host_config__nvm_config_spare_1 =
Charles MacNeill 5:89031b2f5316 744 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 745 1,
Charles MacNeill 5:89031b2f5316 746 pbuffer +
Charles MacNeill 5:89031b2f5316 747 VL53LX_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1,
Charles MacNeill 5:89031b2f5316 748 0x000000FF,
Charles MacNeill 5:89031b2f5316 749 0,
Charles MacNeill 5:89031b2f5316 750 0);
Charles MacNeill 5:89031b2f5316 751
Charles MacNeill 5:89031b2f5316 752
Charles MacNeill 5:89031b2f5316 753
Charles MacNeill 5:89031b2f5316 754 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 755 status =
Charles MacNeill 5:89031b2f5316 756 VL53LX_nvm_decode_optical_centre(
Charles MacNeill 5:89031b2f5316 757 buf_size,
Charles MacNeill 5:89031b2f5316 758 pbuffer + VL53LX_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX,
Charles MacNeill 5:89031b2f5316 759 &(pdata->fmt_optical_centre));
Charles MacNeill 5:89031b2f5316 760
Charles MacNeill 5:89031b2f5316 761
Charles MacNeill 5:89031b2f5316 762
Charles MacNeill 5:89031b2f5316 763 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 764 status =
Charles MacNeill 5:89031b2f5316 765 VL53LX_nvm_decode_cal_peak_rate_map(
Charles MacNeill 5:89031b2f5316 766 buf_size,
Charles MacNeill 5:89031b2f5316 767 pbuffer + VL53LX_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX,
Charles MacNeill 5:89031b2f5316 768 &(pdata->fmt_peak_rate_map));
Charles MacNeill 5:89031b2f5316 769
Charles MacNeill 5:89031b2f5316 770
Charles MacNeill 5:89031b2f5316 771
Charles MacNeill 5:89031b2f5316 772 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 773 status =
Charles MacNeill 5:89031b2f5316 774 VL53LX_nvm_decode_additional_offset_cal_data(
Charles MacNeill 5:89031b2f5316 775 buf_size,
Charles MacNeill 5:89031b2f5316 776 pbuffer +
Charles MacNeill 5:89031b2f5316 777 VL53LX_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX,
Charles MacNeill 5:89031b2f5316 778 &(pdata->fmt_add_offset_data));
Charles MacNeill 5:89031b2f5316 779
Charles MacNeill 5:89031b2f5316 780
Charles MacNeill 5:89031b2f5316 781
Charles MacNeill 5:89031b2f5316 782 pptmp[0] = VL53LX_NVM__FMT__RANGE_RESULTS__140MM_MM_PRE_RANGE;
Charles MacNeill 5:89031b2f5316 783 pptmp[1] = VL53LX_NVM__FMT__RANGE_RESULTS__140MM_DARK;
Charles MacNeill 5:89031b2f5316 784 pptmp[2] = VL53LX_NVM__FMT__RANGE_RESULTS__400MM_DARK;
Charles MacNeill 5:89031b2f5316 785 pptmp[3] = VL53LX_NVM__FMT__RANGE_RESULTS__400MM_AMBIENT;
Charles MacNeill 5:89031b2f5316 786
Charles MacNeill 5:89031b2f5316 787 for (i = 0 ; i < VL53LX_NVM_MAX_FMT_RANGE_DATA ; i++) {
Charles MacNeill 5:89031b2f5316 788 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 789 status =
Charles MacNeill 5:89031b2f5316 790 VL53LX_nvm_decode_fmt_range_results_data(
Charles MacNeill 5:89031b2f5316 791 buf_size,
Charles MacNeill 5:89031b2f5316 792 pbuffer + pptmp[i],
Charles MacNeill 5:89031b2f5316 793 &(pdata->fmt_range_data[i]));
Charles MacNeill 5:89031b2f5316 794 }
Charles MacNeill 5:89031b2f5316 795
Charles MacNeill 5:89031b2f5316 796
Charles MacNeill 5:89031b2f5316 797 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 798 status =
Charles MacNeill 5:89031b2f5316 799 VL53LX_nvm_decode_fmt_info(
Charles MacNeill 5:89031b2f5316 800 buf_size,
Charles MacNeill 5:89031b2f5316 801 pbuffer,
Charles MacNeill 5:89031b2f5316 802 &(pdata->fmt_info));
Charles MacNeill 5:89031b2f5316 803
Charles MacNeill 5:89031b2f5316 804 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 805 status =
Charles MacNeill 5:89031b2f5316 806 VL53LX_nvm_decode_ews_info(
Charles MacNeill 5:89031b2f5316 807 buf_size,
Charles MacNeill 5:89031b2f5316 808 pbuffer,
Charles MacNeill 5:89031b2f5316 809 &(pdata->ews_info));
Charles MacNeill 5:89031b2f5316 810
Charles MacNeill 5:89031b2f5316 811 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 812
Charles MacNeill 5:89031b2f5316 813 return status;
Charles MacNeill 5:89031b2f5316 814
Charles MacNeill 5:89031b2f5316 815 }
Charles MacNeill 5:89031b2f5316 816
Charles MacNeill 5:89031b2f5316 817
Charles MacNeill 5:89031b2f5316 818 VL53LX_Error VL53LX_nvm_decode_optical_centre(
Charles MacNeill 5:89031b2f5316 819 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 820 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 821 VL53LX_optical_centre_t *pdata)
Charles MacNeill 5:89031b2f5316 822 {
Charles MacNeill 5:89031b2f5316 823
Charles MacNeill 5:89031b2f5316 824 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 825
Charles MacNeill 5:89031b2f5316 826 uint16_t tmp = 0;
Charles MacNeill 5:89031b2f5316 827
Charles MacNeill 5:89031b2f5316 828 if (buf_size < VL53LX_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE)
Charles MacNeill 5:89031b2f5316 829 return VL53LX_ERROR_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 830
Charles MacNeill 5:89031b2f5316 831
Charles MacNeill 5:89031b2f5316 832 tmp = 0x0100;
Charles MacNeill 5:89031b2f5316 833 tmp -= (uint16_t)*(pbuffer + 2);
Charles MacNeill 5:89031b2f5316 834 if (tmp > 0x0FF)
Charles MacNeill 5:89031b2f5316 835 tmp = 0;
Charles MacNeill 5:89031b2f5316 836
Charles MacNeill 5:89031b2f5316 837 pdata->x_centre = (uint8_t)tmp;
Charles MacNeill 5:89031b2f5316 838 pdata->y_centre = *(pbuffer + 3);
Charles MacNeill 5:89031b2f5316 839
Charles MacNeill 5:89031b2f5316 840 return status;
Charles MacNeill 5:89031b2f5316 841 }
Charles MacNeill 5:89031b2f5316 842
Charles MacNeill 5:89031b2f5316 843
Charles MacNeill 5:89031b2f5316 844 VL53LX_Error VL53LX_nvm_decode_cal_peak_rate_map(
Charles MacNeill 5:89031b2f5316 845 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 846 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 847 VL53LX_cal_peak_rate_map_t *pdata)
Charles MacNeill 5:89031b2f5316 848 {
Charles MacNeill 5:89031b2f5316 849
Charles MacNeill 5:89031b2f5316 850 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 851
Charles MacNeill 5:89031b2f5316 852 uint8_t *ptmp = NULL;
Charles MacNeill 5:89031b2f5316 853 uint8_t i = 0;
Charles MacNeill 5:89031b2f5316 854
Charles MacNeill 5:89031b2f5316 855 if (buf_size < VL53LX_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE)
Charles MacNeill 5:89031b2f5316 856 return VL53LX_ERROR_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 857
Charles MacNeill 5:89031b2f5316 858 pdata->cal_distance_mm =
Charles MacNeill 5:89031b2f5316 859 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer);
Charles MacNeill 5:89031b2f5316 860
Charles MacNeill 5:89031b2f5316 861 pdata->cal_reflectance_pc =
Charles MacNeill 5:89031b2f5316 862 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 2);
Charles MacNeill 5:89031b2f5316 863 pdata->cal_reflectance_pc =
Charles MacNeill 5:89031b2f5316 864 pdata->cal_reflectance_pc >> 6;
Charles MacNeill 5:89031b2f5316 865
Charles MacNeill 5:89031b2f5316 866 pdata->max_samples = VL53LX_NVM_PEAK_RATE_MAP_SAMPLES;
Charles MacNeill 5:89031b2f5316 867 pdata->width = VL53LX_NVM_PEAK_RATE_MAP_WIDTH;
Charles MacNeill 5:89031b2f5316 868 pdata->height = VL53LX_NVM_PEAK_RATE_MAP_HEIGHT;
Charles MacNeill 5:89031b2f5316 869
Charles MacNeill 5:89031b2f5316 870 ptmp = pbuffer + 4;
Charles MacNeill 5:89031b2f5316 871 for (i = 0 ; i < VL53LX_NVM_PEAK_RATE_MAP_SAMPLES ; i++) {
Charles MacNeill 5:89031b2f5316 872 pdata->peak_rate_mcps[i] =
Charles MacNeill 5:89031b2f5316 873 (uint16_t)VL53LX_i2c_decode_uint16_t(2, ptmp);
Charles MacNeill 5:89031b2f5316 874 ptmp += 2;
Charles MacNeill 5:89031b2f5316 875 }
Charles MacNeill 5:89031b2f5316 876
Charles MacNeill 5:89031b2f5316 877 return status;
Charles MacNeill 5:89031b2f5316 878 }
Charles MacNeill 5:89031b2f5316 879
Charles MacNeill 5:89031b2f5316 880
Charles MacNeill 5:89031b2f5316 881 VL53LX_Error VL53LX_nvm_decode_additional_offset_cal_data(
Charles MacNeill 5:89031b2f5316 882 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 883 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 884 VL53LX_additional_offset_cal_data_t *pdata)
Charles MacNeill 5:89031b2f5316 885 {
Charles MacNeill 5:89031b2f5316 886
Charles MacNeill 5:89031b2f5316 887 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 888
Charles MacNeill 5:89031b2f5316 889 if (buf_size < VL53LX_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE)
Charles MacNeill 5:89031b2f5316 890 return VL53LX_ERROR_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 891
Charles MacNeill 5:89031b2f5316 892 pdata->result__mm_inner_actual_effective_spads =
Charles MacNeill 5:89031b2f5316 893 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer);
Charles MacNeill 5:89031b2f5316 894
Charles MacNeill 5:89031b2f5316 895 pdata->result__mm_outer_actual_effective_spads =
Charles MacNeill 5:89031b2f5316 896 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 2);
Charles MacNeill 5:89031b2f5316 897
Charles MacNeill 5:89031b2f5316 898 pdata->result__mm_inner_peak_signal_count_rtn_mcps =
Charles MacNeill 5:89031b2f5316 899 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 4);
Charles MacNeill 5:89031b2f5316 900
Charles MacNeill 5:89031b2f5316 901 pdata->result__mm_outer_peak_signal_count_rtn_mcps =
Charles MacNeill 5:89031b2f5316 902 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 6);
Charles MacNeill 5:89031b2f5316 903
Charles MacNeill 5:89031b2f5316 904 return status;
Charles MacNeill 5:89031b2f5316 905 }
Charles MacNeill 5:89031b2f5316 906
Charles MacNeill 5:89031b2f5316 907
Charles MacNeill 5:89031b2f5316 908 VL53LX_Error VL53LX_nvm_decode_fmt_range_results_data(
Charles MacNeill 5:89031b2f5316 909 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 910 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 911 VL53LX_decoded_nvm_fmt_range_data_t *pdata)
Charles MacNeill 5:89031b2f5316 912 {
Charles MacNeill 5:89031b2f5316 913
Charles MacNeill 5:89031b2f5316 914 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 915
Charles MacNeill 5:89031b2f5316 916 if (buf_size < VL53LX_NVM__FMT__RANGE_RESULTS__SIZE_BYTES)
Charles MacNeill 5:89031b2f5316 917 return VL53LX_ERROR_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 918
Charles MacNeill 5:89031b2f5316 919 pdata->result__actual_effective_rtn_spads =
Charles MacNeill 5:89031b2f5316 920 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer);
Charles MacNeill 5:89031b2f5316 921
Charles MacNeill 5:89031b2f5316 922 pdata->ref_spad_array__num_requested_ref_spads =
Charles MacNeill 5:89031b2f5316 923 *(pbuffer+2);
Charles MacNeill 5:89031b2f5316 924
Charles MacNeill 5:89031b2f5316 925 pdata->ref_spad_array__ref_location =
Charles MacNeill 5:89031b2f5316 926 *(pbuffer+3);
Charles MacNeill 5:89031b2f5316 927
Charles MacNeill 5:89031b2f5316 928 pdata->result__peak_signal_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 929 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 4);
Charles MacNeill 5:89031b2f5316 930
Charles MacNeill 5:89031b2f5316 931 pdata->result__ambient_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 932 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 6);
Charles MacNeill 5:89031b2f5316 933
Charles MacNeill 5:89031b2f5316 934 pdata->result__peak_signal_count_rate_ref_mcps =
Charles MacNeill 5:89031b2f5316 935 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 8);
Charles MacNeill 5:89031b2f5316 936
Charles MacNeill 5:89031b2f5316 937 pdata->result__ambient_count_rate_ref_mcps =
Charles MacNeill 5:89031b2f5316 938 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 10);
Charles MacNeill 5:89031b2f5316 939
Charles MacNeill 5:89031b2f5316 940 pdata->measured_distance_mm =
Charles MacNeill 5:89031b2f5316 941 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 12);
Charles MacNeill 5:89031b2f5316 942
Charles MacNeill 5:89031b2f5316 943 pdata->measured_distance_stdev_mm =
Charles MacNeill 5:89031b2f5316 944 (uint16_t)VL53LX_i2c_decode_uint16_t(2, pbuffer + 14);
Charles MacNeill 5:89031b2f5316 945
Charles MacNeill 5:89031b2f5316 946 return status;
Charles MacNeill 5:89031b2f5316 947 }
Charles MacNeill 5:89031b2f5316 948
Charles MacNeill 5:89031b2f5316 949
Charles MacNeill 5:89031b2f5316 950 VL53LX_Error VL53LX_nvm_decode_fmt_info(
Charles MacNeill 5:89031b2f5316 951 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 952 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 953 VL53LX_decoded_nvm_fmt_info_t *pdata)
Charles MacNeill 5:89031b2f5316 954 {
Charles MacNeill 5:89031b2f5316 955
Charles MacNeill 5:89031b2f5316 956 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 957
Charles MacNeill 5:89031b2f5316 958 if (buf_size < VL53LX_NVM_SIZE_IN_BYTES)
Charles MacNeill 5:89031b2f5316 959 return VL53LX_ERROR_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 960
Charles MacNeill 5:89031b2f5316 961 pdata->nvm__fmt__fgc[0] =
Charles MacNeill 5:89031b2f5316 962 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 963 1,
Charles MacNeill 5:89031b2f5316 964 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_0,
Charles MacNeill 5:89031b2f5316 965 0x000000FE,
Charles MacNeill 5:89031b2f5316 966 1,
Charles MacNeill 5:89031b2f5316 967 0);
Charles MacNeill 5:89031b2f5316 968 pdata->nvm__fmt__fgc[1] =
Charles MacNeill 5:89031b2f5316 969 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 970 1,
Charles MacNeill 5:89031b2f5316 971 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_1,
Charles MacNeill 5:89031b2f5316 972 0x000001FC,
Charles MacNeill 5:89031b2f5316 973 2,
Charles MacNeill 5:89031b2f5316 974 0);
Charles MacNeill 5:89031b2f5316 975 pdata->nvm__fmt__fgc[2] =
Charles MacNeill 5:89031b2f5316 976 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 977 1,
Charles MacNeill 5:89031b2f5316 978 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_2 - 1,
Charles MacNeill 5:89031b2f5316 979 0x000003F8,
Charles MacNeill 5:89031b2f5316 980 3,
Charles MacNeill 5:89031b2f5316 981 0);
Charles MacNeill 5:89031b2f5316 982 pdata->nvm__fmt__fgc[3] =
Charles MacNeill 5:89031b2f5316 983 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 984 1,
Charles MacNeill 5:89031b2f5316 985 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_3 - 1,
Charles MacNeill 5:89031b2f5316 986 0x000007F0,
Charles MacNeill 5:89031b2f5316 987 4,
Charles MacNeill 5:89031b2f5316 988 0);
Charles MacNeill 5:89031b2f5316 989 pdata->nvm__fmt__fgc[4] =
Charles MacNeill 5:89031b2f5316 990 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 991 1,
Charles MacNeill 5:89031b2f5316 992 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_4 - 1,
Charles MacNeill 5:89031b2f5316 993 0x00000FE0,
Charles MacNeill 5:89031b2f5316 994 5,
Charles MacNeill 5:89031b2f5316 995 0);
Charles MacNeill 5:89031b2f5316 996 pdata->nvm__fmt__fgc[5] =
Charles MacNeill 5:89031b2f5316 997 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 998 1,
Charles MacNeill 5:89031b2f5316 999 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_5 - 1,
Charles MacNeill 5:89031b2f5316 1000 0x00001FC0,
Charles MacNeill 5:89031b2f5316 1001 6,
Charles MacNeill 5:89031b2f5316 1002 0);
Charles MacNeill 5:89031b2f5316 1003 pdata->nvm__fmt__fgc[6] =
Charles MacNeill 5:89031b2f5316 1004 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1005 1,
Charles MacNeill 5:89031b2f5316 1006 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_6 - 1,
Charles MacNeill 5:89031b2f5316 1007 0x00003F80,
Charles MacNeill 5:89031b2f5316 1008 7,
Charles MacNeill 5:89031b2f5316 1009 0);
Charles MacNeill 5:89031b2f5316 1010 pdata->nvm__fmt__fgc[7] =
Charles MacNeill 5:89031b2f5316 1011 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1012 1,
Charles MacNeill 5:89031b2f5316 1013 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_6,
Charles MacNeill 5:89031b2f5316 1014 0x0000007F,
Charles MacNeill 5:89031b2f5316 1015 0,
Charles MacNeill 5:89031b2f5316 1016 0);
Charles MacNeill 5:89031b2f5316 1017 pdata->nvm__fmt__fgc[8] =
Charles MacNeill 5:89031b2f5316 1018 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1019 1,
Charles MacNeill 5:89031b2f5316 1020 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_7,
Charles MacNeill 5:89031b2f5316 1021 0x000000FE,
Charles MacNeill 5:89031b2f5316 1022 1,
Charles MacNeill 5:89031b2f5316 1023 0);
Charles MacNeill 5:89031b2f5316 1024 pdata->nvm__fmt__fgc[9] =
Charles MacNeill 5:89031b2f5316 1025 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1026 1,
Charles MacNeill 5:89031b2f5316 1027 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_8,
Charles MacNeill 5:89031b2f5316 1028 0x000001FC,
Charles MacNeill 5:89031b2f5316 1029 2,
Charles MacNeill 5:89031b2f5316 1030 0);
Charles MacNeill 5:89031b2f5316 1031 pdata->nvm__fmt__fgc[10] =
Charles MacNeill 5:89031b2f5316 1032 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1033 1,
Charles MacNeill 5:89031b2f5316 1034 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_9 - 1,
Charles MacNeill 5:89031b2f5316 1035 0x000003F8,
Charles MacNeill 5:89031b2f5316 1036 3,
Charles MacNeill 5:89031b2f5316 1037 0);
Charles MacNeill 5:89031b2f5316 1038 pdata->nvm__fmt__fgc[11] =
Charles MacNeill 5:89031b2f5316 1039 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1040 1,
Charles MacNeill 5:89031b2f5316 1041 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_10 - 1,
Charles MacNeill 5:89031b2f5316 1042 0x000007F0,
Charles MacNeill 5:89031b2f5316 1043 4,
Charles MacNeill 5:89031b2f5316 1044 0);
Charles MacNeill 5:89031b2f5316 1045 pdata->nvm__fmt__fgc[12] =
Charles MacNeill 5:89031b2f5316 1046 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1047 1,
Charles MacNeill 5:89031b2f5316 1048 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_11 - 1,
Charles MacNeill 5:89031b2f5316 1049 0x00000FE0,
Charles MacNeill 5:89031b2f5316 1050 5,
Charles MacNeill 5:89031b2f5316 1051 0);
Charles MacNeill 5:89031b2f5316 1052 pdata->nvm__fmt__fgc[13] =
Charles MacNeill 5:89031b2f5316 1053 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1054 1,
Charles MacNeill 5:89031b2f5316 1055 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_12 - 1,
Charles MacNeill 5:89031b2f5316 1056 0x00001FC0,
Charles MacNeill 5:89031b2f5316 1057 6,
Charles MacNeill 5:89031b2f5316 1058 0);
Charles MacNeill 5:89031b2f5316 1059 pdata->nvm__fmt__fgc[14] =
Charles MacNeill 5:89031b2f5316 1060 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1061 1,
Charles MacNeill 5:89031b2f5316 1062 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_13 - 1,
Charles MacNeill 5:89031b2f5316 1063 0x00003F80,
Charles MacNeill 5:89031b2f5316 1064 7,
Charles MacNeill 5:89031b2f5316 1065 0);
Charles MacNeill 5:89031b2f5316 1066 pdata->nvm__fmt__fgc[15] =
Charles MacNeill 5:89031b2f5316 1067 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1068 1,
Charles MacNeill 5:89031b2f5316 1069 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_13,
Charles MacNeill 5:89031b2f5316 1070 0x0000007F,
Charles MacNeill 5:89031b2f5316 1071 0,
Charles MacNeill 5:89031b2f5316 1072 0);
Charles MacNeill 5:89031b2f5316 1073 pdata->nvm__fmt__fgc[16] =
Charles MacNeill 5:89031b2f5316 1074 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1075 1,
Charles MacNeill 5:89031b2f5316 1076 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_14,
Charles MacNeill 5:89031b2f5316 1077 0x000000FE,
Charles MacNeill 5:89031b2f5316 1078 1,
Charles MacNeill 5:89031b2f5316 1079 0);
Charles MacNeill 5:89031b2f5316 1080 pdata->nvm__fmt__fgc[17] =
Charles MacNeill 5:89031b2f5316 1081 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1082 1,
Charles MacNeill 5:89031b2f5316 1083 pbuffer + VL53LX_NVM__FMT__FGC__BYTE_15,
Charles MacNeill 5:89031b2f5316 1084 0x000001FC,
Charles MacNeill 5:89031b2f5316 1085 2,
Charles MacNeill 5:89031b2f5316 1086 0);
Charles MacNeill 5:89031b2f5316 1087 pdata->nvm__fmt__fgc[18] = 0x00;
Charles MacNeill 5:89031b2f5316 1088
Charles MacNeill 5:89031b2f5316 1089 pdata->nvm__fmt__test_program_major =
Charles MacNeill 5:89031b2f5316 1090 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1091 1,
Charles MacNeill 5:89031b2f5316 1092 pbuffer + VL53LX_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR,
Charles MacNeill 5:89031b2f5316 1093 0x000000E0,
Charles MacNeill 5:89031b2f5316 1094 5,
Charles MacNeill 5:89031b2f5316 1095 0);
Charles MacNeill 5:89031b2f5316 1096 pdata->nvm__fmt__test_program_minor =
Charles MacNeill 5:89031b2f5316 1097 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1098 1,
Charles MacNeill 5:89031b2f5316 1099 pbuffer + VL53LX_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR,
Charles MacNeill 5:89031b2f5316 1100 0x0000001F,
Charles MacNeill 5:89031b2f5316 1101 0,
Charles MacNeill 5:89031b2f5316 1102 0);
Charles MacNeill 5:89031b2f5316 1103 pdata->nvm__fmt__map_major =
Charles MacNeill 5:89031b2f5316 1104 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1105 1,
Charles MacNeill 5:89031b2f5316 1106 pbuffer + VL53LX_NVM__FMT__MAP_MAJOR_MINOR,
Charles MacNeill 5:89031b2f5316 1107 0x000000E0,
Charles MacNeill 5:89031b2f5316 1108 5,
Charles MacNeill 5:89031b2f5316 1109 0);
Charles MacNeill 5:89031b2f5316 1110 pdata->nvm__fmt__map_minor =
Charles MacNeill 5:89031b2f5316 1111 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1112 1,
Charles MacNeill 5:89031b2f5316 1113 pbuffer + VL53LX_NVM__FMT__MAP_MAJOR_MINOR,
Charles MacNeill 5:89031b2f5316 1114 0x0000001F,
Charles MacNeill 5:89031b2f5316 1115 0,
Charles MacNeill 5:89031b2f5316 1116 0);
Charles MacNeill 5:89031b2f5316 1117 pdata->nvm__fmt__year =
Charles MacNeill 5:89031b2f5316 1118 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1119 1,
Charles MacNeill 5:89031b2f5316 1120 pbuffer + VL53LX_NVM__FMT__YEAR_MONTH,
Charles MacNeill 5:89031b2f5316 1121 0x000000F0,
Charles MacNeill 5:89031b2f5316 1122 4,
Charles MacNeill 5:89031b2f5316 1123 0);
Charles MacNeill 5:89031b2f5316 1124 pdata->nvm__fmt__month =
Charles MacNeill 5:89031b2f5316 1125 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1126 1,
Charles MacNeill 5:89031b2f5316 1127 pbuffer + VL53LX_NVM__FMT__YEAR_MONTH,
Charles MacNeill 5:89031b2f5316 1128 0x0000000F,
Charles MacNeill 5:89031b2f5316 1129 0,
Charles MacNeill 5:89031b2f5316 1130 0);
Charles MacNeill 5:89031b2f5316 1131 pdata->nvm__fmt__day =
Charles MacNeill 5:89031b2f5316 1132 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1133 1,
Charles MacNeill 5:89031b2f5316 1134 pbuffer + VL53LX_NVM__FMT__DAY_MODULE_DATE_PHASE,
Charles MacNeill 5:89031b2f5316 1135 0x000000F8,
Charles MacNeill 5:89031b2f5316 1136 3,
Charles MacNeill 5:89031b2f5316 1137 0);
Charles MacNeill 5:89031b2f5316 1138 pdata->nvm__fmt__module_date_phase =
Charles MacNeill 5:89031b2f5316 1139 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1140 1,
Charles MacNeill 5:89031b2f5316 1141 pbuffer + VL53LX_NVM__FMT__DAY_MODULE_DATE_PHASE,
Charles MacNeill 5:89031b2f5316 1142 0x00000007,
Charles MacNeill 5:89031b2f5316 1143 0,
Charles MacNeill 5:89031b2f5316 1144 0);
Charles MacNeill 5:89031b2f5316 1145 pdata->nvm__fmt__time =
Charles MacNeill 5:89031b2f5316 1146 (uint16_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1147 2,
Charles MacNeill 5:89031b2f5316 1148 pbuffer + VL53LX_NVM__FMT__TIME,
Charles MacNeill 5:89031b2f5316 1149 0x0000FFFF,
Charles MacNeill 5:89031b2f5316 1150 0,
Charles MacNeill 5:89031b2f5316 1151 0);
Charles MacNeill 5:89031b2f5316 1152 pdata->nvm__fmt__tester_id =
Charles MacNeill 5:89031b2f5316 1153 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1154 1,
Charles MacNeill 5:89031b2f5316 1155 pbuffer + VL53LX_NVM__FMT__TESTER_ID,
Charles MacNeill 5:89031b2f5316 1156 0x000000FF,
Charles MacNeill 5:89031b2f5316 1157 0,
Charles MacNeill 5:89031b2f5316 1158 0);
Charles MacNeill 5:89031b2f5316 1159 pdata->nvm__fmt__site_id =
Charles MacNeill 5:89031b2f5316 1160 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1161 1,
Charles MacNeill 5:89031b2f5316 1162 pbuffer + VL53LX_NVM__FMT__SITE_ID,
Charles MacNeill 5:89031b2f5316 1163 0x000000FF,
Charles MacNeill 5:89031b2f5316 1164 0,
Charles MacNeill 5:89031b2f5316 1165 0);
Charles MacNeill 5:89031b2f5316 1166
Charles MacNeill 5:89031b2f5316 1167 return status;
Charles MacNeill 5:89031b2f5316 1168 }
Charles MacNeill 5:89031b2f5316 1169
Charles MacNeill 5:89031b2f5316 1170
Charles MacNeill 5:89031b2f5316 1171 VL53LX_Error VL53LX_nvm_decode_ews_info(
Charles MacNeill 5:89031b2f5316 1172 uint16_t buf_size,
Charles MacNeill 5:89031b2f5316 1173 uint8_t *pbuffer,
Charles MacNeill 5:89031b2f5316 1174 VL53LX_decoded_nvm_ews_info_t *pdata)
Charles MacNeill 5:89031b2f5316 1175 {
Charles MacNeill 5:89031b2f5316 1176
Charles MacNeill 5:89031b2f5316 1177 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1178
Charles MacNeill 5:89031b2f5316 1179 if (buf_size < VL53LX_NVM_SIZE_IN_BYTES)
Charles MacNeill 5:89031b2f5316 1180 return VL53LX_ERROR_BUFFER_TOO_SMALL;
Charles MacNeill 5:89031b2f5316 1181
Charles MacNeill 5:89031b2f5316 1182 pdata->nvm__ews__test_program_major =
Charles MacNeill 5:89031b2f5316 1183 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1184 1,
Charles MacNeill 5:89031b2f5316 1185 pbuffer + VL53LX_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR,
Charles MacNeill 5:89031b2f5316 1186 0x000000E0,
Charles MacNeill 5:89031b2f5316 1187 5,
Charles MacNeill 5:89031b2f5316 1188 0);
Charles MacNeill 5:89031b2f5316 1189 pdata->nvm__ews__test_program_minor =
Charles MacNeill 5:89031b2f5316 1190 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1191 1,
Charles MacNeill 5:89031b2f5316 1192 pbuffer + VL53LX_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR,
Charles MacNeill 5:89031b2f5316 1193 0x0000001F,
Charles MacNeill 5:89031b2f5316 1194 0,
Charles MacNeill 5:89031b2f5316 1195 0);
Charles MacNeill 5:89031b2f5316 1196 pdata->nvm__ews__probe_card_major =
Charles MacNeill 5:89031b2f5316 1197 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1198 1,
Charles MacNeill 5:89031b2f5316 1199 pbuffer + VL53LX_NVM__EWS__PROBE_CARD_MAJOR_MINOR,
Charles MacNeill 5:89031b2f5316 1200 0x000000F0,
Charles MacNeill 5:89031b2f5316 1201 4,
Charles MacNeill 5:89031b2f5316 1202 0);
Charles MacNeill 5:89031b2f5316 1203 pdata->nvm__ews__probe_card_minor =
Charles MacNeill 5:89031b2f5316 1204 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1205 1,
Charles MacNeill 5:89031b2f5316 1206 pbuffer + VL53LX_NVM__EWS__PROBE_CARD_MAJOR_MINOR,
Charles MacNeill 5:89031b2f5316 1207 0x0000000F,
Charles MacNeill 5:89031b2f5316 1208 0,
Charles MacNeill 5:89031b2f5316 1209 0);
Charles MacNeill 5:89031b2f5316 1210 pdata->nvm__ews__tester_id =
Charles MacNeill 5:89031b2f5316 1211 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1212 1,
Charles MacNeill 5:89031b2f5316 1213 pbuffer + VL53LX_NVM__EWS__TESTER_ID,
Charles MacNeill 5:89031b2f5316 1214 0x000000FF,
Charles MacNeill 5:89031b2f5316 1215 0,
Charles MacNeill 5:89031b2f5316 1216 0);
Charles MacNeill 5:89031b2f5316 1217 pdata->nvm__ews__lot[0] =
Charles MacNeill 5:89031b2f5316 1218 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1219 1,
Charles MacNeill 5:89031b2f5316 1220 pbuffer + VL53LX_NVM__EWS__LOT__BYTE_0,
Charles MacNeill 5:89031b2f5316 1221 0x000000FC,
Charles MacNeill 5:89031b2f5316 1222 2,
Charles MacNeill 5:89031b2f5316 1223 32);
Charles MacNeill 5:89031b2f5316 1224 pdata->nvm__ews__lot[1] =
Charles MacNeill 5:89031b2f5316 1225 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1226 2,
Charles MacNeill 5:89031b2f5316 1227 pbuffer + VL53LX_NVM__EWS__LOT__BYTE_1 - 1,
Charles MacNeill 5:89031b2f5316 1228 0x000003F0,
Charles MacNeill 5:89031b2f5316 1229 4,
Charles MacNeill 5:89031b2f5316 1230 32);
Charles MacNeill 5:89031b2f5316 1231 pdata->nvm__ews__lot[2] =
Charles MacNeill 5:89031b2f5316 1232 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1233 2,
Charles MacNeill 5:89031b2f5316 1234 pbuffer + VL53LX_NVM__EWS__LOT__BYTE_2 - 1,
Charles MacNeill 5:89031b2f5316 1235 0x00000FC0,
Charles MacNeill 5:89031b2f5316 1236 6,
Charles MacNeill 5:89031b2f5316 1237 32);
Charles MacNeill 5:89031b2f5316 1238 pdata->nvm__ews__lot[3] =
Charles MacNeill 5:89031b2f5316 1239 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1240 1,
Charles MacNeill 5:89031b2f5316 1241 pbuffer + VL53LX_NVM__EWS__LOT__BYTE_2,
Charles MacNeill 5:89031b2f5316 1242 0x0000003F,
Charles MacNeill 5:89031b2f5316 1243 0,
Charles MacNeill 5:89031b2f5316 1244 32);
Charles MacNeill 5:89031b2f5316 1245 pdata->nvm__ews__lot[4] =
Charles MacNeill 5:89031b2f5316 1246 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1247 1,
Charles MacNeill 5:89031b2f5316 1248 pbuffer + VL53LX_NVM__EWS__LOT__BYTE_3,
Charles MacNeill 5:89031b2f5316 1249 0x000000FC,
Charles MacNeill 5:89031b2f5316 1250 2,
Charles MacNeill 5:89031b2f5316 1251 32);
Charles MacNeill 5:89031b2f5316 1252 pdata->nvm__ews__lot[5] =
Charles MacNeill 5:89031b2f5316 1253 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1254 2,
Charles MacNeill 5:89031b2f5316 1255 pbuffer + VL53LX_NVM__EWS__LOT__BYTE_4 - 1,
Charles MacNeill 5:89031b2f5316 1256 0x000003F0,
Charles MacNeill 5:89031b2f5316 1257 4,
Charles MacNeill 5:89031b2f5316 1258 32);
Charles MacNeill 5:89031b2f5316 1259 pdata->nvm__ews__lot[6] =
Charles MacNeill 5:89031b2f5316 1260 (char)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1261 2,
Charles MacNeill 5:89031b2f5316 1262 pbuffer + VL53LX_NVM__EWS__LOT__BYTE_5 - 1,
Charles MacNeill 5:89031b2f5316 1263 0x00000FC0,
Charles MacNeill 5:89031b2f5316 1264 6,
Charles MacNeill 5:89031b2f5316 1265 32);
Charles MacNeill 5:89031b2f5316 1266
Charles MacNeill 5:89031b2f5316 1267 pdata->nvm__ews__lot[7] = 0x00;
Charles MacNeill 5:89031b2f5316 1268
Charles MacNeill 5:89031b2f5316 1269 pdata->nvm__ews__wafer =
Charles MacNeill 5:89031b2f5316 1270 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1271 1,
Charles MacNeill 5:89031b2f5316 1272 pbuffer + VL53LX_NVM__EWS__WAFER,
Charles MacNeill 5:89031b2f5316 1273 0x0000001F,
Charles MacNeill 5:89031b2f5316 1274 0,
Charles MacNeill 5:89031b2f5316 1275 0);
Charles MacNeill 5:89031b2f5316 1276 pdata->nvm__ews__xcoord =
Charles MacNeill 5:89031b2f5316 1277 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1278 1,
Charles MacNeill 5:89031b2f5316 1279 pbuffer + VL53LX_NVM__EWS__XCOORD,
Charles MacNeill 5:89031b2f5316 1280 0x000000FF,
Charles MacNeill 5:89031b2f5316 1281 0,
Charles MacNeill 5:89031b2f5316 1282 0);
Charles MacNeill 5:89031b2f5316 1283 pdata->nvm__ews__ycoord =
Charles MacNeill 5:89031b2f5316 1284 (uint8_t)VL53LX_i2c_decode_with_mask(
Charles MacNeill 5:89031b2f5316 1285 1,
Charles MacNeill 5:89031b2f5316 1286 pbuffer + VL53LX_NVM__EWS__YCOORD,
Charles MacNeill 5:89031b2f5316 1287 0x000000FF,
Charles MacNeill 5:89031b2f5316 1288 0,
Charles MacNeill 5:89031b2f5316 1289 0);
Charles MacNeill 5:89031b2f5316 1290
Charles MacNeill 5:89031b2f5316 1291 return status;
Charles MacNeill 5:89031b2f5316 1292
Charles MacNeill 5:89031b2f5316 1293 }
Charles MacNeill 5:89031b2f5316 1294
Charles MacNeill 5:89031b2f5316 1295
Charles MacNeill 5:89031b2f5316 1296 void VL53LX_nvm_format_encode(
Charles MacNeill 5:89031b2f5316 1297 VL53LX_decoded_nvm_data_t *pnvm_info,
Charles MacNeill 5:89031b2f5316 1298 uint8_t *pnvm_data)
Charles MacNeill 5:89031b2f5316 1299 {
Charles MacNeill 5:89031b2f5316 1300 SUPPRESS_UNUSED_WARNING(pnvm_info);
Charles MacNeill 5:89031b2f5316 1301 SUPPRESS_UNUSED_WARNING(pnvm_data);
Charles MacNeill 5:89031b2f5316 1302 }
Charles MacNeill 5:89031b2f5316 1303
Charles MacNeill 5:89031b2f5316 1304
Charles MacNeill 5:89031b2f5316 1305 VL53LX_Error VL53LX_read_nvm_raw_data(
Charles MacNeill 5:89031b2f5316 1306 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1307 uint8_t start_address,
Charles MacNeill 5:89031b2f5316 1308 uint8_t count,
Charles MacNeill 5:89031b2f5316 1309 uint8_t *pnvm_raw_data)
Charles MacNeill 5:89031b2f5316 1310 {
Charles MacNeill 5:89031b2f5316 1311
Charles MacNeill 5:89031b2f5316 1312
Charles MacNeill 5:89031b2f5316 1313
Charles MacNeill 5:89031b2f5316 1314 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1315
Charles MacNeill 5:89031b2f5316 1316 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1317
Charles MacNeill 5:89031b2f5316 1318
Charles MacNeill 5:89031b2f5316 1319
Charles MacNeill 5:89031b2f5316 1320 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1321 status = VL53LX_nvm_enable(
Charles MacNeill 5:89031b2f5316 1322 Dev,
Charles MacNeill 5:89031b2f5316 1323 0x0004,
Charles MacNeill 5:89031b2f5316 1324 VL53LX_NVM_POWER_UP_DELAY_US);
Charles MacNeill 5:89031b2f5316 1325
Charles MacNeill 5:89031b2f5316 1326
Charles MacNeill 5:89031b2f5316 1327
Charles MacNeill 5:89031b2f5316 1328 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1329 status = VL53LX_nvm_read(
Charles MacNeill 5:89031b2f5316 1330 Dev,
Charles MacNeill 5:89031b2f5316 1331 start_address,
Charles MacNeill 5:89031b2f5316 1332 count,
Charles MacNeill 5:89031b2f5316 1333 pnvm_raw_data);
Charles MacNeill 5:89031b2f5316 1334
Charles MacNeill 5:89031b2f5316 1335
Charles MacNeill 5:89031b2f5316 1336
Charles MacNeill 5:89031b2f5316 1337 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1338 status = VL53LX_nvm_disable(Dev);
Charles MacNeill 5:89031b2f5316 1339
Charles MacNeill 5:89031b2f5316 1340 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1341
Charles MacNeill 5:89031b2f5316 1342 return status;
Charles MacNeill 5:89031b2f5316 1343
Charles MacNeill 5:89031b2f5316 1344 }
Charles MacNeill 5:89031b2f5316 1345
Charles MacNeill 5:89031b2f5316 1346
Charles MacNeill 5:89031b2f5316 1347 VL53LX_Error VL53LX_read_nvm(
Charles MacNeill 5:89031b2f5316 1348 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1349 uint8_t nvm_format,
Charles MacNeill 5:89031b2f5316 1350 VL53LX_decoded_nvm_data_t *pnvm_info)
Charles MacNeill 5:89031b2f5316 1351 {
Charles MacNeill 5:89031b2f5316 1352
Charles MacNeill 5:89031b2f5316 1353
Charles MacNeill 5:89031b2f5316 1354
Charles MacNeill 5:89031b2f5316 1355 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1356
Charles MacNeill 5:89031b2f5316 1357 uint8_t nvm_data[VL53LX_NVM_SIZE_IN_BYTES];
Charles MacNeill 5:89031b2f5316 1358
Charles MacNeill 5:89031b2f5316 1359 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1360
Charles MacNeill 5:89031b2f5316 1361 SUPPRESS_UNUSED_WARNING(nvm_format);
Charles MacNeill 5:89031b2f5316 1362
Charles MacNeill 5:89031b2f5316 1363
Charles MacNeill 5:89031b2f5316 1364
Charles MacNeill 5:89031b2f5316 1365 status = VL53LX_read_nvm_raw_data(
Charles MacNeill 5:89031b2f5316 1366 Dev,
Charles MacNeill 5:89031b2f5316 1367 0,
Charles MacNeill 5:89031b2f5316 1368 VL53LX_NVM_SIZE_IN_BYTES >> 2,
Charles MacNeill 5:89031b2f5316 1369 nvm_data);
Charles MacNeill 5:89031b2f5316 1370
Charles MacNeill 5:89031b2f5316 1371
Charles MacNeill 5:89031b2f5316 1372
Charles MacNeill 5:89031b2f5316 1373
Charles MacNeill 5:89031b2f5316 1374
Charles MacNeill 5:89031b2f5316 1375 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1376 status = VL53LX_nvm_format_decode(
Charles MacNeill 5:89031b2f5316 1377 VL53LX_NVM_SIZE_IN_BYTES,
Charles MacNeill 5:89031b2f5316 1378 nvm_data,
Charles MacNeill 5:89031b2f5316 1379 pnvm_info);
Charles MacNeill 5:89031b2f5316 1380
Charles MacNeill 5:89031b2f5316 1381 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1382
Charles MacNeill 5:89031b2f5316 1383 return status;
Charles MacNeill 5:89031b2f5316 1384
Charles MacNeill 5:89031b2f5316 1385 }
Charles MacNeill 5:89031b2f5316 1386
Charles MacNeill 5:89031b2f5316 1387
Charles MacNeill 5:89031b2f5316 1388 VL53LX_Error VL53LX_read_nvm_optical_centre(
Charles MacNeill 5:89031b2f5316 1389 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1390 VL53LX_optical_centre_t *pcentre)
Charles MacNeill 5:89031b2f5316 1391 {
Charles MacNeill 5:89031b2f5316 1392
Charles MacNeill 5:89031b2f5316 1393
Charles MacNeill 5:89031b2f5316 1394 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1395
Charles MacNeill 5:89031b2f5316 1396 uint8_t nvm_data[VL53LX_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE];
Charles MacNeill 5:89031b2f5316 1397
Charles MacNeill 5:89031b2f5316 1398 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1399
Charles MacNeill 5:89031b2f5316 1400
Charles MacNeill 5:89031b2f5316 1401
Charles MacNeill 5:89031b2f5316 1402 status =
Charles MacNeill 5:89031b2f5316 1403 VL53LX_read_nvm_raw_data(
Charles MacNeill 5:89031b2f5316 1404 Dev,
Charles MacNeill 5:89031b2f5316 1405 (uint8_t)(VL53LX_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX
Charles MacNeill 5:89031b2f5316 1406 >> 2),
Charles MacNeill 5:89031b2f5316 1407 (uint8_t)(VL53LX_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE
Charles MacNeill 5:89031b2f5316 1408 >> 2),
Charles MacNeill 5:89031b2f5316 1409 nvm_data);
Charles MacNeill 5:89031b2f5316 1410
Charles MacNeill 5:89031b2f5316 1411
Charles MacNeill 5:89031b2f5316 1412
Charles MacNeill 5:89031b2f5316 1413 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1414 status =
Charles MacNeill 5:89031b2f5316 1415 VL53LX_nvm_decode_optical_centre(
Charles MacNeill 5:89031b2f5316 1416 VL53LX_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE,
Charles MacNeill 5:89031b2f5316 1417 nvm_data,
Charles MacNeill 5:89031b2f5316 1418 pcentre);
Charles MacNeill 5:89031b2f5316 1419
Charles MacNeill 5:89031b2f5316 1420 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1421
Charles MacNeill 5:89031b2f5316 1422 return status;
Charles MacNeill 5:89031b2f5316 1423 }
Charles MacNeill 5:89031b2f5316 1424
Charles MacNeill 5:89031b2f5316 1425
Charles MacNeill 5:89031b2f5316 1426 VL53LX_Error VL53LX_read_nvm_cal_peak_rate_map(
Charles MacNeill 5:89031b2f5316 1427 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1428 VL53LX_cal_peak_rate_map_t *pcal_data)
Charles MacNeill 5:89031b2f5316 1429 {
Charles MacNeill 5:89031b2f5316 1430
Charles MacNeill 5:89031b2f5316 1431
Charles MacNeill 5:89031b2f5316 1432 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1433
Charles MacNeill 5:89031b2f5316 1434 uint8_t nvm_data[VL53LX_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE];
Charles MacNeill 5:89031b2f5316 1435
Charles MacNeill 5:89031b2f5316 1436 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1437
Charles MacNeill 5:89031b2f5316 1438
Charles MacNeill 5:89031b2f5316 1439
Charles MacNeill 5:89031b2f5316 1440 status =
Charles MacNeill 5:89031b2f5316 1441 VL53LX_read_nvm_raw_data(
Charles MacNeill 5:89031b2f5316 1442 Dev,
Charles MacNeill 5:89031b2f5316 1443 (uint8_t)(VL53LX_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX
Charles MacNeill 5:89031b2f5316 1444 >> 2),
Charles MacNeill 5:89031b2f5316 1445 (uint8_t)(VL53LX_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE
Charles MacNeill 5:89031b2f5316 1446 >> 2),
Charles MacNeill 5:89031b2f5316 1447 nvm_data);
Charles MacNeill 5:89031b2f5316 1448
Charles MacNeill 5:89031b2f5316 1449
Charles MacNeill 5:89031b2f5316 1450
Charles MacNeill 5:89031b2f5316 1451 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1452 status =
Charles MacNeill 5:89031b2f5316 1453 VL53LX_nvm_decode_cal_peak_rate_map(
Charles MacNeill 5:89031b2f5316 1454 VL53LX_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE,
Charles MacNeill 5:89031b2f5316 1455 nvm_data,
Charles MacNeill 5:89031b2f5316 1456 pcal_data);
Charles MacNeill 5:89031b2f5316 1457
Charles MacNeill 5:89031b2f5316 1458 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1459
Charles MacNeill 5:89031b2f5316 1460 return status;
Charles MacNeill 5:89031b2f5316 1461 }
Charles MacNeill 5:89031b2f5316 1462
Charles MacNeill 5:89031b2f5316 1463
Charles MacNeill 5:89031b2f5316 1464 VL53LX_Error VL53LX_read_nvm_additional_offset_cal_data(
Charles MacNeill 5:89031b2f5316 1465 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1466 VL53LX_additional_offset_cal_data_t *pcal_data)
Charles MacNeill 5:89031b2f5316 1467 {
Charles MacNeill 5:89031b2f5316 1468
Charles MacNeill 5:89031b2f5316 1469
Charles MacNeill 5:89031b2f5316 1470
Charles MacNeill 5:89031b2f5316 1471 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1472
Charles MacNeill 5:89031b2f5316 1473 uint8_t nvm_data[VL53LX_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE];
Charles MacNeill 5:89031b2f5316 1474
Charles MacNeill 5:89031b2f5316 1475 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1476
Charles MacNeill 5:89031b2f5316 1477
Charles MacNeill 5:89031b2f5316 1478
Charles MacNeill 5:89031b2f5316 1479 status =
Charles MacNeill 5:89031b2f5316 1480 VL53LX_read_nvm_raw_data(
Charles MacNeill 5:89031b2f5316 1481 Dev,
Charles MacNeill 5:89031b2f5316 1482 (uint8_t)(
Charles MacNeill 5:89031b2f5316 1483 VL53LX_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX >> 2),
Charles MacNeill 5:89031b2f5316 1484 (uint8_t)(
Charles MacNeill 5:89031b2f5316 1485 VL53LX_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE >> 2),
Charles MacNeill 5:89031b2f5316 1486 nvm_data);
Charles MacNeill 5:89031b2f5316 1487
Charles MacNeill 5:89031b2f5316 1488
Charles MacNeill 5:89031b2f5316 1489
Charles MacNeill 5:89031b2f5316 1490 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1491 status = VL53LX_nvm_decode_additional_offset_cal_data(
Charles MacNeill 5:89031b2f5316 1492 VL53LX_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE,
Charles MacNeill 5:89031b2f5316 1493 nvm_data,
Charles MacNeill 5:89031b2f5316 1494 pcal_data);
Charles MacNeill 5:89031b2f5316 1495
Charles MacNeill 5:89031b2f5316 1496 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1497
Charles MacNeill 5:89031b2f5316 1498 return status;
Charles MacNeill 5:89031b2f5316 1499
Charles MacNeill 5:89031b2f5316 1500 }
Charles MacNeill 5:89031b2f5316 1501
Charles MacNeill 5:89031b2f5316 1502
Charles MacNeill 5:89031b2f5316 1503 VL53LX_Error VL53LX_read_nvm_fmt_range_results_data(
Charles MacNeill 5:89031b2f5316 1504 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1505 uint16_t range_results_select,
Charles MacNeill 5:89031b2f5316 1506 VL53LX_decoded_nvm_fmt_range_data_t *prange_data)
Charles MacNeill 5:89031b2f5316 1507 {
Charles MacNeill 5:89031b2f5316 1508
Charles MacNeill 5:89031b2f5316 1509
Charles MacNeill 5:89031b2f5316 1510
Charles MacNeill 5:89031b2f5316 1511 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1512
Charles MacNeill 5:89031b2f5316 1513 uint8_t nvm_data[VL53LX_NVM__FMT__RANGE_RESULTS__SIZE_BYTES];
Charles MacNeill 5:89031b2f5316 1514
Charles MacNeill 5:89031b2f5316 1515 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1516
Charles MacNeill 5:89031b2f5316 1517
Charles MacNeill 5:89031b2f5316 1518
Charles MacNeill 5:89031b2f5316 1519 status = VL53LX_read_nvm_raw_data(
Charles MacNeill 5:89031b2f5316 1520 Dev,
Charles MacNeill 5:89031b2f5316 1521 (uint8_t)(range_results_select >> 2),
Charles MacNeill 5:89031b2f5316 1522 (uint8_t)(VL53LX_NVM__FMT__RANGE_RESULTS__SIZE_BYTES >> 2),
Charles MacNeill 5:89031b2f5316 1523 nvm_data);
Charles MacNeill 5:89031b2f5316 1524
Charles MacNeill 5:89031b2f5316 1525
Charles MacNeill 5:89031b2f5316 1526
Charles MacNeill 5:89031b2f5316 1527 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1528 status =
Charles MacNeill 5:89031b2f5316 1529 VL53LX_nvm_decode_fmt_range_results_data(
Charles MacNeill 5:89031b2f5316 1530 VL53LX_NVM__FMT__RANGE_RESULTS__SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1531 nvm_data,
Charles MacNeill 5:89031b2f5316 1532 prange_data);
Charles MacNeill 5:89031b2f5316 1533
Charles MacNeill 5:89031b2f5316 1534 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1535
Charles MacNeill 5:89031b2f5316 1536 return status;
Charles MacNeill 5:89031b2f5316 1537
Charles MacNeill 5:89031b2f5316 1538 }
Charles MacNeill 5:89031b2f5316 1539
Charles MacNeill 5:89031b2f5316 1540