Rename library

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L3CX_NoShield_1Sensor_poll_Mb06x VL53L3_NoShield_1Sensor_polling_Mb63 X_NUCLEO_53L3A2 53L3A2_Ranging

Committer:
charlesmn
Date:
Wed Jul 21 14:07:59 2021 +0000
Revision:
7:7f1bbf370283
Parent:
5:89031b2f5316
Moved vl53l3cx_class.cpp and .h to 53l3a2_RangingClass

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Charles MacNeill 5:89031b2f5316 1
Charles MacNeill 5:89031b2f5316 2 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Charles MacNeill 5:89031b2f5316 3 /******************************************************************************
Charles MacNeill 5:89031b2f5316 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
Charles MacNeill 5:89031b2f5316 5
Charles MacNeill 5:89031b2f5316 6 This file is part of VL53LX and is dual licensed,
Charles MacNeill 5:89031b2f5316 7 either GPL-2.0+
Charles MacNeill 5:89031b2f5316 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 5:89031b2f5316 9 ******************************************************************************
Charles MacNeill 5:89031b2f5316 10 */
Charles MacNeill 5:89031b2f5316 11
Charles MacNeill 5:89031b2f5316 12
Charles MacNeill 5:89031b2f5316 13
Charles MacNeill 5:89031b2f5316 14
Charles MacNeill 5:89031b2f5316 15 #include <vl53lx_platform_log.h>
Charles MacNeill 5:89031b2f5316 16 #include "vl53lx_ll_def.h"
Charles MacNeill 5:89031b2f5316 17 #include "vl53lx_register_structs.h"
Charles MacNeill 5:89031b2f5316 18 #include "vl53lx_register_settings.h"
Charles MacNeill 5:89031b2f5316 19 #include "vl53lx_hist_structs.h"
Charles MacNeill 5:89031b2f5316 20 #include "vl53lx_core.h"
Charles MacNeill 5:89031b2f5316 21 #include "vl53lx_api_preset_modes.h"
Charles MacNeill 5:89031b2f5316 22 #include "vl53lx_tuning_parm_defaults.h"
Charles MacNeill 5:89031b2f5316 23
Charles MacNeill 5:89031b2f5316 24
Charles MacNeill 5:89031b2f5316 25 #define LOG_FUNCTION_START(fmt, ...) \
Charles MacNeill 5:89031b2f5316 26 _LOG_FUNCTION_START(VL53LX_TRACE_MODULE_API, fmt, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 27 #define LOG_FUNCTION_END(status, ...) \
Charles MacNeill 5:89031b2f5316 28 _LOG_FUNCTION_END(VL53LX_TRACE_MODULE_API, status, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 29 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
Charles MacNeill 5:89031b2f5316 30 _LOG_FUNCTION_END_FMT(VL53LX_TRACE_MODULE_API,\
Charles MacNeill 5:89031b2f5316 31 status, fmt, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 32
Charles MacNeill 5:89031b2f5316 33
Charles MacNeill 5:89031b2f5316 34 VL53LX_Error VL53LX_init_refspadchar_config_struct(
Charles MacNeill 5:89031b2f5316 35 VL53LX_refspadchar_config_t *pdata)
Charles MacNeill 5:89031b2f5316 36 {
Charles MacNeill 5:89031b2f5316 37
Charles MacNeill 5:89031b2f5316 38
Charles MacNeill 5:89031b2f5316 39 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 40
Charles MacNeill 5:89031b2f5316 41 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 42
Charles MacNeill 5:89031b2f5316 43
Charles MacNeill 5:89031b2f5316 44
Charles MacNeill 5:89031b2f5316 45 pdata->device_test_mode =
Charles MacNeill 5:89031b2f5316 46 VL53LX_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE_DEFAULT;
Charles MacNeill 5:89031b2f5316 47 pdata->VL53LX_p_005 =
Charles MacNeill 5:89031b2f5316 48 VL53LX_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD_DEFAULT;
Charles MacNeill 5:89031b2f5316 49 pdata->timeout_us =
Charles MacNeill 5:89031b2f5316 50 VL53LX_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 51 pdata->target_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 52 VL53LX_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 53 pdata->min_count_rate_limit_mcps =
Charles MacNeill 5:89031b2f5316 54 VL53LX_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 55 pdata->max_count_rate_limit_mcps =
Charles MacNeill 5:89031b2f5316 56 VL53LX_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 57
Charles MacNeill 5:89031b2f5316 58 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 59
Charles MacNeill 5:89031b2f5316 60 return status;
Charles MacNeill 5:89031b2f5316 61 }
Charles MacNeill 5:89031b2f5316 62
Charles MacNeill 5:89031b2f5316 63
Charles MacNeill 5:89031b2f5316 64 VL53LX_Error VL53LX_init_ssc_config_struct(
Charles MacNeill 5:89031b2f5316 65 VL53LX_ssc_config_t *pdata)
Charles MacNeill 5:89031b2f5316 66 {
Charles MacNeill 5:89031b2f5316 67
Charles MacNeill 5:89031b2f5316 68
Charles MacNeill 5:89031b2f5316 69 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 70
Charles MacNeill 5:89031b2f5316 71 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 72
Charles MacNeill 5:89031b2f5316 73
Charles MacNeill 5:89031b2f5316 74
Charles MacNeill 5:89031b2f5316 75
Charles MacNeill 5:89031b2f5316 76 pdata->array_select = VL53LX_DEVICESSCARRAY_RTN;
Charles MacNeill 5:89031b2f5316 77
Charles MacNeill 5:89031b2f5316 78
Charles MacNeill 5:89031b2f5316 79 pdata->VL53LX_p_005 =
Charles MacNeill 5:89031b2f5316 80 VL53LX_TUNINGPARM_SPADMAP_VCSEL_PERIOD_DEFAULT;
Charles MacNeill 5:89031b2f5316 81
Charles MacNeill 5:89031b2f5316 82
Charles MacNeill 5:89031b2f5316 83 pdata->vcsel_start =
Charles MacNeill 5:89031b2f5316 84 VL53LX_TUNINGPARM_SPADMAP_VCSEL_START_DEFAULT;
Charles MacNeill 5:89031b2f5316 85
Charles MacNeill 5:89031b2f5316 86
Charles MacNeill 5:89031b2f5316 87 pdata->vcsel_width = 0x02;
Charles MacNeill 5:89031b2f5316 88
Charles MacNeill 5:89031b2f5316 89
Charles MacNeill 5:89031b2f5316 90 pdata->timeout_us = 36000;
Charles MacNeill 5:89031b2f5316 91
Charles MacNeill 5:89031b2f5316 92
Charles MacNeill 5:89031b2f5316 93 pdata->rate_limit_mcps =
Charles MacNeill 5:89031b2f5316 94 VL53LX_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 95
Charles MacNeill 5:89031b2f5316 96 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 97
Charles MacNeill 5:89031b2f5316 98 return status;
Charles MacNeill 5:89031b2f5316 99 }
Charles MacNeill 5:89031b2f5316 100
Charles MacNeill 5:89031b2f5316 101
Charles MacNeill 5:89031b2f5316 102 VL53LX_Error VL53LX_init_xtalk_config_struct(
Charles MacNeill 5:89031b2f5316 103 VL53LX_customer_nvm_managed_t *pnvm,
Charles MacNeill 5:89031b2f5316 104 VL53LX_xtalk_config_t *pdata)
Charles MacNeill 5:89031b2f5316 105 {
Charles MacNeill 5:89031b2f5316 106
Charles MacNeill 5:89031b2f5316 107
Charles MacNeill 5:89031b2f5316 108 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 109
Charles MacNeill 5:89031b2f5316 110 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 111
Charles MacNeill 5:89031b2f5316 112
Charles MacNeill 5:89031b2f5316 113
Charles MacNeill 5:89031b2f5316 114
Charles MacNeill 5:89031b2f5316 115
Charles MacNeill 5:89031b2f5316 116 pdata->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 117 pnvm->algo__crosstalk_compensation_plane_offset_kcps;
Charles MacNeill 5:89031b2f5316 118 pdata->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 119 pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 120 pdata->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 121 pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 122
Charles MacNeill 5:89031b2f5316 123
Charles MacNeill 5:89031b2f5316 124
Charles MacNeill 5:89031b2f5316 125 pdata->nvm_default__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 126 (uint32_t)pnvm->algo__crosstalk_compensation_plane_offset_kcps;
Charles MacNeill 5:89031b2f5316 127 pdata->nvm_default__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 128 pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 129 pdata->nvm_default__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 130 pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 131
Charles MacNeill 5:89031b2f5316 132 pdata->histogram_mode_crosstalk_margin_kcps =
Charles MacNeill 5:89031b2f5316 133 VL53LX_TUNINGPARM_HIST_XTALK_MARGIN_KCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 134 pdata->lite_mode_crosstalk_margin_kcps =
Charles MacNeill 5:89031b2f5316 135 VL53LX_TUNINGPARM_LITE_XTALK_MARGIN_KCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 136
Charles MacNeill 5:89031b2f5316 137
Charles MacNeill 5:89031b2f5316 138
Charles MacNeill 5:89031b2f5316 139 pdata->crosstalk_range_ignore_threshold_mult =
Charles MacNeill 5:89031b2f5316 140 VL53LX_TUNINGPARM_LITE_RIT_MULT_DEFAULT;
Charles MacNeill 5:89031b2f5316 141
Charles MacNeill 5:89031b2f5316 142 if ((pdata->algo__crosstalk_compensation_plane_offset_kcps == 0x00)
Charles MacNeill 5:89031b2f5316 143 && (pdata->algo__crosstalk_compensation_x_plane_gradient_kcps
Charles MacNeill 5:89031b2f5316 144 == 0x00)
Charles MacNeill 5:89031b2f5316 145 && (pdata->algo__crosstalk_compensation_y_plane_gradient_kcps
Charles MacNeill 5:89031b2f5316 146 == 0x00))
Charles MacNeill 5:89031b2f5316 147 pdata->global_crosstalk_compensation_enable = 0x00;
Charles MacNeill 5:89031b2f5316 148 else
Charles MacNeill 5:89031b2f5316 149 pdata->global_crosstalk_compensation_enable = 0x01;
Charles MacNeill 5:89031b2f5316 150
Charles MacNeill 5:89031b2f5316 151
Charles MacNeill 5:89031b2f5316 152 if ((status == VL53LX_ERROR_NONE) &&
Charles MacNeill 5:89031b2f5316 153 (pdata->global_crosstalk_compensation_enable == 0x01)) {
Charles MacNeill 5:89031b2f5316 154 pdata->crosstalk_range_ignore_threshold_rate_mcps =
Charles MacNeill 5:89031b2f5316 155 VL53LX_calc_range_ignore_threshold(
Charles MacNeill 5:89031b2f5316 156 pdata->algo__crosstalk_compensation_plane_offset_kcps,
Charles MacNeill 5:89031b2f5316 157 pdata->algo__crosstalk_compensation_x_plane_gradient_kcps,
Charles MacNeill 5:89031b2f5316 158 pdata->algo__crosstalk_compensation_y_plane_gradient_kcps,
Charles MacNeill 5:89031b2f5316 159 pdata->crosstalk_range_ignore_threshold_mult);
Charles MacNeill 5:89031b2f5316 160 } else {
Charles MacNeill 5:89031b2f5316 161 pdata->crosstalk_range_ignore_threshold_rate_mcps = 0;
Charles MacNeill 5:89031b2f5316 162 }
Charles MacNeill 5:89031b2f5316 163
Charles MacNeill 5:89031b2f5316 164
Charles MacNeill 5:89031b2f5316 165
Charles MacNeill 5:89031b2f5316 166
Charles MacNeill 5:89031b2f5316 167 pdata->algo__crosstalk_detect_min_valid_range_mm =
Charles MacNeill 5:89031b2f5316 168 VL53LX_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 169 pdata->algo__crosstalk_detect_max_valid_range_mm =
Charles MacNeill 5:89031b2f5316 170 VL53LX_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 171 pdata->algo__crosstalk_detect_max_valid_rate_kcps =
Charles MacNeill 5:89031b2f5316 172 VL53LX_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 173 pdata->algo__crosstalk_detect_max_sigma_mm =
Charles MacNeill 5:89031b2f5316 174 VL53LX_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 175
Charles MacNeill 5:89031b2f5316 176 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 177
Charles MacNeill 5:89031b2f5316 178 return status;
Charles MacNeill 5:89031b2f5316 179 }
Charles MacNeill 5:89031b2f5316 180
Charles MacNeill 5:89031b2f5316 181 VL53LX_Error VL53LX_init_xtalk_extract_config_struct(
Charles MacNeill 5:89031b2f5316 182 VL53LX_xtalkextract_config_t *pdata)
Charles MacNeill 5:89031b2f5316 183 {
Charles MacNeill 5:89031b2f5316 184
Charles MacNeill 5:89031b2f5316 185
Charles MacNeill 5:89031b2f5316 186 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 187
Charles MacNeill 5:89031b2f5316 188 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 189
Charles MacNeill 5:89031b2f5316 190
Charles MacNeill 5:89031b2f5316 191
Charles MacNeill 5:89031b2f5316 192 pdata->dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 193 VL53LX_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 194
Charles MacNeill 5:89031b2f5316 195 pdata->mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 196 VL53LX_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 197
Charles MacNeill 5:89031b2f5316 198 pdata->num_of_samples =
Charles MacNeill 5:89031b2f5316 199 VL53LX_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES_DEFAULT;
Charles MacNeill 5:89031b2f5316 200
Charles MacNeill 5:89031b2f5316 201 pdata->phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 202 VL53LX_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 203
Charles MacNeill 5:89031b2f5316 204 pdata->range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 205 VL53LX_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 206
Charles MacNeill 5:89031b2f5316 207
Charles MacNeill 5:89031b2f5316 208
Charles MacNeill 5:89031b2f5316 209
Charles MacNeill 5:89031b2f5316 210 pdata->algo__crosstalk_extract_min_valid_range_mm =
Charles MacNeill 5:89031b2f5316 211 VL53LX_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 212 pdata->algo__crosstalk_extract_max_valid_range_mm =
Charles MacNeill 5:89031b2f5316 213 VL53LX_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 214 pdata->algo__crosstalk_extract_max_valid_rate_kcps =
Charles MacNeill 5:89031b2f5316 215 VL53LX_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 216 pdata->algo__crosstalk_extract_max_sigma_mm =
Charles MacNeill 5:89031b2f5316 217 VL53LX_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 218
Charles MacNeill 5:89031b2f5316 219
Charles MacNeill 5:89031b2f5316 220 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 221
Charles MacNeill 5:89031b2f5316 222 return status;
Charles MacNeill 5:89031b2f5316 223 }
Charles MacNeill 5:89031b2f5316 224
Charles MacNeill 5:89031b2f5316 225
Charles MacNeill 5:89031b2f5316 226 VL53LX_Error VL53LX_init_offset_cal_config_struct(
Charles MacNeill 5:89031b2f5316 227 VL53LX_offsetcal_config_t *pdata)
Charles MacNeill 5:89031b2f5316 228 {
Charles MacNeill 5:89031b2f5316 229
Charles MacNeill 5:89031b2f5316 230
Charles MacNeill 5:89031b2f5316 231 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 232
Charles MacNeill 5:89031b2f5316 233 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 234
Charles MacNeill 5:89031b2f5316 235
Charles MacNeill 5:89031b2f5316 236
Charles MacNeill 5:89031b2f5316 237 pdata->dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 238 VL53LX_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 239
Charles MacNeill 5:89031b2f5316 240 pdata->phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 241 VL53LX_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 242
Charles MacNeill 5:89031b2f5316 243 pdata->range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 244 VL53LX_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 245
Charles MacNeill 5:89031b2f5316 246 pdata->mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 247 VL53LX_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 248
Charles MacNeill 5:89031b2f5316 249
Charles MacNeill 5:89031b2f5316 250
Charles MacNeill 5:89031b2f5316 251
Charles MacNeill 5:89031b2f5316 252 pdata->pre_num_of_samples =
Charles MacNeill 5:89031b2f5316 253 VL53LX_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES_DEFAULT;
Charles MacNeill 5:89031b2f5316 254 pdata->mm1_num_of_samples =
Charles MacNeill 5:89031b2f5316 255 VL53LX_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES_DEFAULT;
Charles MacNeill 5:89031b2f5316 256 pdata->mm2_num_of_samples =
Charles MacNeill 5:89031b2f5316 257 VL53LX_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES_DEFAULT;
Charles MacNeill 5:89031b2f5316 258
Charles MacNeill 5:89031b2f5316 259 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 260
Charles MacNeill 5:89031b2f5316 261 return status;
Charles MacNeill 5:89031b2f5316 262 }
Charles MacNeill 5:89031b2f5316 263
Charles MacNeill 5:89031b2f5316 264 VL53LX_Error VL53LX_init_zone_cal_config_struct(
Charles MacNeill 5:89031b2f5316 265 VL53LX_zonecal_config_t *pdata)
Charles MacNeill 5:89031b2f5316 266 {
Charles MacNeill 5:89031b2f5316 267
Charles MacNeill 5:89031b2f5316 268
Charles MacNeill 5:89031b2f5316 269 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 270
Charles MacNeill 5:89031b2f5316 271 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 272
Charles MacNeill 5:89031b2f5316 273
Charles MacNeill 5:89031b2f5316 274
Charles MacNeill 5:89031b2f5316 275 pdata->dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 276 VL53LX_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 277
Charles MacNeill 5:89031b2f5316 278 pdata->phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 279 VL53LX_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 280
Charles MacNeill 5:89031b2f5316 281 pdata->range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 282 VL53LX_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 283
Charles MacNeill 5:89031b2f5316 284 pdata->mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 285 VL53LX_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 286
Charles MacNeill 5:89031b2f5316 287
Charles MacNeill 5:89031b2f5316 288
Charles MacNeill 5:89031b2f5316 289
Charles MacNeill 5:89031b2f5316 290 pdata->phasecal_num_of_samples =
Charles MacNeill 5:89031b2f5316 291 VL53LX_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES_DEFAULT;
Charles MacNeill 5:89031b2f5316 292 pdata->zone_num_of_samples =
Charles MacNeill 5:89031b2f5316 293 VL53LX_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES_DEFAULT;
Charles MacNeill 5:89031b2f5316 294
Charles MacNeill 5:89031b2f5316 295 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 296
Charles MacNeill 5:89031b2f5316 297 return status;
Charles MacNeill 5:89031b2f5316 298 }
Charles MacNeill 5:89031b2f5316 299
Charles MacNeill 5:89031b2f5316 300
Charles MacNeill 5:89031b2f5316 301 VL53LX_Error VL53LX_init_hist_post_process_config_struct(
Charles MacNeill 5:89031b2f5316 302 uint8_t xtalk_compensation_enable,
Charles MacNeill 5:89031b2f5316 303 VL53LX_hist_post_process_config_t *pdata)
Charles MacNeill 5:89031b2f5316 304 {
Charles MacNeill 5:89031b2f5316 305
Charles MacNeill 5:89031b2f5316 306
Charles MacNeill 5:89031b2f5316 307 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 308
Charles MacNeill 5:89031b2f5316 309 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 310
Charles MacNeill 5:89031b2f5316 311
Charles MacNeill 5:89031b2f5316 312
Charles MacNeill 5:89031b2f5316 313 pdata->hist_algo_select =
Charles MacNeill 5:89031b2f5316 314 VL53LX_TUNINGPARM_HIST_ALGO_SELECT_DEFAULT;
Charles MacNeill 5:89031b2f5316 315
Charles MacNeill 5:89031b2f5316 316
Charles MacNeill 5:89031b2f5316 317
Charles MacNeill 5:89031b2f5316 318 pdata->hist_target_order =
Charles MacNeill 5:89031b2f5316 319 VL53LX_TUNINGPARM_HIST_TARGET_ORDER_DEFAULT;
Charles MacNeill 5:89031b2f5316 320
Charles MacNeill 5:89031b2f5316 321
Charles MacNeill 5:89031b2f5316 322
Charles MacNeill 5:89031b2f5316 323 pdata->filter_woi0 =
Charles MacNeill 5:89031b2f5316 324 VL53LX_TUNINGPARM_HIST_FILTER_WOI_0_DEFAULT;
Charles MacNeill 5:89031b2f5316 325 pdata->filter_woi1 =
Charles MacNeill 5:89031b2f5316 326 VL53LX_TUNINGPARM_HIST_FILTER_WOI_1_DEFAULT;
Charles MacNeill 5:89031b2f5316 327
Charles MacNeill 5:89031b2f5316 328
Charles MacNeill 5:89031b2f5316 329 pdata->hist_amb_est_method =
Charles MacNeill 5:89031b2f5316 330 VL53LX_TUNINGPARM_HIST_AMB_EST_METHOD_DEFAULT;
Charles MacNeill 5:89031b2f5316 331
Charles MacNeill 5:89031b2f5316 332 pdata->ambient_thresh_sigma0 =
Charles MacNeill 5:89031b2f5316 333 VL53LX_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0_DEFAULT;
Charles MacNeill 5:89031b2f5316 334 pdata->ambient_thresh_sigma1 =
Charles MacNeill 5:89031b2f5316 335 VL53LX_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1_DEFAULT;
Charles MacNeill 5:89031b2f5316 336
Charles MacNeill 5:89031b2f5316 337
Charles MacNeill 5:89031b2f5316 338 pdata->ambient_thresh_events_scaler =
Charles MacNeill 5:89031b2f5316 339 VL53LX_TUNINGPARM_HIST_AMB_EVENTS_SCALER_DEFAULT;
Charles MacNeill 5:89031b2f5316 340
Charles MacNeill 5:89031b2f5316 341
Charles MacNeill 5:89031b2f5316 342 pdata->min_ambient_thresh_events =
Charles MacNeill 5:89031b2f5316 343 VL53LX_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS_DEFAULT;
Charles MacNeill 5:89031b2f5316 344
Charles MacNeill 5:89031b2f5316 345 pdata->noise_threshold =
Charles MacNeill 5:89031b2f5316 346 VL53LX_TUNINGPARM_HIST_NOISE_THRESHOLD_DEFAULT;
Charles MacNeill 5:89031b2f5316 347
Charles MacNeill 5:89031b2f5316 348 pdata->signal_total_events_limit =
Charles MacNeill 5:89031b2f5316 349 VL53LX_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT_DEFAULT;
Charles MacNeill 5:89031b2f5316 350 pdata->sigma_estimator__sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 351 VL53LX_TUNINGPARM_HIST_SIGMA_EST_REF_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 352
Charles MacNeill 5:89031b2f5316 353
Charles MacNeill 5:89031b2f5316 354 pdata->sigma_thresh =
Charles MacNeill 5:89031b2f5316 355 VL53LX_TUNINGPARM_HIST_SIGMA_THRESH_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 356
Charles MacNeill 5:89031b2f5316 357 pdata->range_offset_mm = 0;
Charles MacNeill 5:89031b2f5316 358
Charles MacNeill 5:89031b2f5316 359 pdata->gain_factor =
Charles MacNeill 5:89031b2f5316 360 VL53LX_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT;
Charles MacNeill 5:89031b2f5316 361
Charles MacNeill 5:89031b2f5316 362
Charles MacNeill 5:89031b2f5316 363
Charles MacNeill 5:89031b2f5316 364 pdata->valid_phase_low = 0x08;
Charles MacNeill 5:89031b2f5316 365 pdata->valid_phase_high = 0x88;
Charles MacNeill 5:89031b2f5316 366
Charles MacNeill 5:89031b2f5316 367
Charles MacNeill 5:89031b2f5316 368
Charles MacNeill 5:89031b2f5316 369 pdata->algo__consistency_check__phase_tolerance =
Charles MacNeill 5:89031b2f5316 370 VL53LX_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE_DEFAULT;
Charles MacNeill 5:89031b2f5316 371
Charles MacNeill 5:89031b2f5316 372
Charles MacNeill 5:89031b2f5316 373
Charles MacNeill 5:89031b2f5316 374 pdata->algo__consistency_check__event_sigma =
Charles MacNeill 5:89031b2f5316 375 VL53LX_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_DEFAULT;
Charles MacNeill 5:89031b2f5316 376
Charles MacNeill 5:89031b2f5316 377
Charles MacNeill 5:89031b2f5316 378 pdata->algo__consistency_check__event_min_spad_count =
Charles MacNeill 5:89031b2f5316 379 VL53LX_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT_DEFAULT;
Charles MacNeill 5:89031b2f5316 380
Charles MacNeill 5:89031b2f5316 381
Charles MacNeill 5:89031b2f5316 382
Charles MacNeill 5:89031b2f5316 383 pdata->algo__consistency_check__min_max_tolerance =
Charles MacNeill 5:89031b2f5316 384 VL53LX_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 385
Charles MacNeill 5:89031b2f5316 386
Charles MacNeill 5:89031b2f5316 387 pdata->algo__crosstalk_compensation_enable = xtalk_compensation_enable;
Charles MacNeill 5:89031b2f5316 388
Charles MacNeill 5:89031b2f5316 389
Charles MacNeill 5:89031b2f5316 390 pdata->algo__crosstalk_detect_min_valid_range_mm =
Charles MacNeill 5:89031b2f5316 391 VL53LX_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 392 pdata->algo__crosstalk_detect_max_valid_range_mm =
Charles MacNeill 5:89031b2f5316 393 VL53LX_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 394 pdata->algo__crosstalk_detect_max_valid_rate_kcps =
Charles MacNeill 5:89031b2f5316 395 VL53LX_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 396 pdata->algo__crosstalk_detect_max_sigma_mm =
Charles MacNeill 5:89031b2f5316 397 VL53LX_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 398
Charles MacNeill 5:89031b2f5316 399
Charles MacNeill 5:89031b2f5316 400
Charles MacNeill 5:89031b2f5316 401
Charles MacNeill 5:89031b2f5316 402
Charles MacNeill 5:89031b2f5316 403 pdata->algo__crosstalk_detect_event_sigma =
Charles MacNeill 5:89031b2f5316 404 VL53LX_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA_DEFAULT;
Charles MacNeill 5:89031b2f5316 405
Charles MacNeill 5:89031b2f5316 406
Charles MacNeill 5:89031b2f5316 407
Charles MacNeill 5:89031b2f5316 408 pdata->algo__crosstalk_detect_min_max_tolerance =
Charles MacNeill 5:89031b2f5316 409 VL53LX_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE_DEFAULT;
Charles MacNeill 5:89031b2f5316 410
Charles MacNeill 5:89031b2f5316 411
Charles MacNeill 5:89031b2f5316 412
Charles MacNeill 5:89031b2f5316 413 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 414
Charles MacNeill 5:89031b2f5316 415 return status;
Charles MacNeill 5:89031b2f5316 416 }
Charles MacNeill 5:89031b2f5316 417
Charles MacNeill 5:89031b2f5316 418
Charles MacNeill 5:89031b2f5316 419 VL53LX_Error VL53LX_init_dmax_calibration_data_struct(
Charles MacNeill 5:89031b2f5316 420 VL53LX_dmax_calibration_data_t *pdata)
Charles MacNeill 5:89031b2f5316 421 {
Charles MacNeill 5:89031b2f5316 422
Charles MacNeill 5:89031b2f5316 423
Charles MacNeill 5:89031b2f5316 424 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 425
Charles MacNeill 5:89031b2f5316 426 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 427
Charles MacNeill 5:89031b2f5316 428
Charles MacNeill 5:89031b2f5316 429
Charles MacNeill 5:89031b2f5316 430
Charles MacNeill 5:89031b2f5316 431 pdata->ref__actual_effective_spads = 0x5F2D;
Charles MacNeill 5:89031b2f5316 432
Charles MacNeill 5:89031b2f5316 433 pdata->ref__peak_signal_count_rate_mcps = 0x0844;
Charles MacNeill 5:89031b2f5316 434
Charles MacNeill 5:89031b2f5316 435 pdata->ref__distance_mm = 0x08A5;
Charles MacNeill 5:89031b2f5316 436
Charles MacNeill 5:89031b2f5316 437
Charles MacNeill 5:89031b2f5316 438 pdata->ref_reflectance_pc = 0x0014;
Charles MacNeill 5:89031b2f5316 439
Charles MacNeill 5:89031b2f5316 440
Charles MacNeill 5:89031b2f5316 441 pdata->coverglass_transmission = 0x0100;
Charles MacNeill 5:89031b2f5316 442
Charles MacNeill 5:89031b2f5316 443 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 444
Charles MacNeill 5:89031b2f5316 445 return status;
Charles MacNeill 5:89031b2f5316 446 }
Charles MacNeill 5:89031b2f5316 447
Charles MacNeill 5:89031b2f5316 448
Charles MacNeill 5:89031b2f5316 449 VL53LX_Error VL53LX_init_tuning_parm_storage_struct(
Charles MacNeill 5:89031b2f5316 450 VL53LX_tuning_parm_storage_t *pdata)
Charles MacNeill 5:89031b2f5316 451 {
Charles MacNeill 5:89031b2f5316 452
Charles MacNeill 5:89031b2f5316 453
Charles MacNeill 5:89031b2f5316 454 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 455
Charles MacNeill 5:89031b2f5316 456 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 457
Charles MacNeill 5:89031b2f5316 458
Charles MacNeill 5:89031b2f5316 459
Charles MacNeill 5:89031b2f5316 460 pdata->tp_tuning_parm_version =
Charles MacNeill 5:89031b2f5316 461 VL53LX_TUNINGPARM_VERSION_DEFAULT;
Charles MacNeill 5:89031b2f5316 462 pdata->tp_tuning_parm_key_table_version =
Charles MacNeill 5:89031b2f5316 463 VL53LX_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT;
Charles MacNeill 5:89031b2f5316 464 pdata->tp_tuning_parm_lld_version =
Charles MacNeill 5:89031b2f5316 465 VL53LX_TUNINGPARM_LLD_VERSION_DEFAULT;
Charles MacNeill 5:89031b2f5316 466 pdata->tp_init_phase_rtn_lite_long =
Charles MacNeill 5:89031b2f5316 467 VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 468 pdata->tp_init_phase_rtn_lite_med =
Charles MacNeill 5:89031b2f5316 469 VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 470 pdata->tp_init_phase_rtn_lite_short =
Charles MacNeill 5:89031b2f5316 471 VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 472 pdata->tp_init_phase_ref_lite_long =
Charles MacNeill 5:89031b2f5316 473 VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 474 pdata->tp_init_phase_ref_lite_med =
Charles MacNeill 5:89031b2f5316 475 VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 476 pdata->tp_init_phase_ref_lite_short =
Charles MacNeill 5:89031b2f5316 477 VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 478 pdata->tp_init_phase_rtn_hist_long =
Charles MacNeill 5:89031b2f5316 479 VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 480 pdata->tp_init_phase_rtn_hist_med =
Charles MacNeill 5:89031b2f5316 481 VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 482 pdata->tp_init_phase_rtn_hist_short =
Charles MacNeill 5:89031b2f5316 483 VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 484 pdata->tp_init_phase_ref_hist_long =
Charles MacNeill 5:89031b2f5316 485 VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 486 pdata->tp_init_phase_ref_hist_med =
Charles MacNeill 5:89031b2f5316 487 VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 488 pdata->tp_init_phase_ref_hist_short =
Charles MacNeill 5:89031b2f5316 489 VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 490 pdata->tp_consistency_lite_phase_tolerance =
Charles MacNeill 5:89031b2f5316 491 VL53LX_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE_DEFAULT;
Charles MacNeill 5:89031b2f5316 492 pdata->tp_phasecal_target =
Charles MacNeill 5:89031b2f5316 493 VL53LX_TUNINGPARM_PHASECAL_TARGET_DEFAULT;
Charles MacNeill 5:89031b2f5316 494 pdata->tp_cal_repeat_rate =
Charles MacNeill 5:89031b2f5316 495 VL53LX_TUNINGPARM_LITE_CAL_REPEAT_RATE_DEFAULT;
Charles MacNeill 5:89031b2f5316 496 pdata->tp_lite_min_clip =
Charles MacNeill 5:89031b2f5316 497 VL53LX_TUNINGPARM_LITE_MIN_CLIP_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 498 pdata->tp_lite_long_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 499 VL53LX_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 500 pdata->tp_lite_med_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 501 VL53LX_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 502 pdata->tp_lite_short_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 503 VL53LX_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 504 pdata->tp_lite_long_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 505 VL53LX_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 506 pdata->tp_lite_med_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 507 VL53LX_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 508 pdata->tp_lite_short_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 509 VL53LX_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 510 pdata->tp_lite_sigma_est_pulse_width_ns =
Charles MacNeill 5:89031b2f5316 511 VL53LX_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH_DEFAULT;
Charles MacNeill 5:89031b2f5316 512 pdata->tp_lite_sigma_est_amb_width_ns =
Charles MacNeill 5:89031b2f5316 513 VL53LX_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS_DEFAULT;
Charles MacNeill 5:89031b2f5316 514 pdata->tp_lite_sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 515 VL53LX_TUNINGPARM_LITE_SIGMA_REF_MM_DEFAULT;
Charles MacNeill 5:89031b2f5316 516 pdata->tp_lite_seed_cfg =
Charles MacNeill 5:89031b2f5316 517 VL53LX_TUNINGPARM_LITE_SEED_CONFIG_DEFAULT;
Charles MacNeill 5:89031b2f5316 518 pdata->tp_timed_seed_cfg =
Charles MacNeill 5:89031b2f5316 519 VL53LX_TUNINGPARM_TIMED_SEED_CONFIG_DEFAULT;
Charles MacNeill 5:89031b2f5316 520 pdata->tp_lite_quantifier =
Charles MacNeill 5:89031b2f5316 521 VL53LX_TUNINGPARM_LITE_QUANTIFIER_DEFAULT;
Charles MacNeill 5:89031b2f5316 522 pdata->tp_lite_first_order_select =
Charles MacNeill 5:89031b2f5316 523 VL53LX_TUNINGPARM_LITE_FIRST_ORDER_SELECT_DEFAULT;
Charles MacNeill 5:89031b2f5316 524 pdata->tp_uwr_enable =
Charles MacNeill 5:89031b2f5316 525 VL53LX_TUNINGPARM_UWR_ENABLE_DEFAULT;
Charles MacNeill 5:89031b2f5316 526 pdata->tp_uwr_med_z_1_min =
Charles MacNeill 5:89031b2f5316 527 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 528 pdata->tp_uwr_med_z_1_max =
Charles MacNeill 5:89031b2f5316 529 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 530 pdata->tp_uwr_med_z_2_min =
Charles MacNeill 5:89031b2f5316 531 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 532 pdata->tp_uwr_med_z_2_max =
Charles MacNeill 5:89031b2f5316 533 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 534 pdata->tp_uwr_med_z_3_min =
Charles MacNeill 5:89031b2f5316 535 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 536 pdata->tp_uwr_med_z_3_max =
Charles MacNeill 5:89031b2f5316 537 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 538 pdata->tp_uwr_med_z_4_min =
Charles MacNeill 5:89031b2f5316 539 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 540 pdata->tp_uwr_med_z_4_max =
Charles MacNeill 5:89031b2f5316 541 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 542 pdata->tp_uwr_med_z_5_min =
Charles MacNeill 5:89031b2f5316 543 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 544 pdata->tp_uwr_med_z_5_max =
Charles MacNeill 5:89031b2f5316 545 VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 546 pdata->tp_uwr_med_corr_z_1_rangea =
Charles MacNeill 5:89031b2f5316 547 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 548 pdata->tp_uwr_med_corr_z_1_rangeb =
Charles MacNeill 5:89031b2f5316 549 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 550 pdata->tp_uwr_med_corr_z_2_rangea =
Charles MacNeill 5:89031b2f5316 551 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 552 pdata->tp_uwr_med_corr_z_2_rangeb =
Charles MacNeill 5:89031b2f5316 553 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 554 pdata->tp_uwr_med_corr_z_3_rangea =
Charles MacNeill 5:89031b2f5316 555 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 556 pdata->tp_uwr_med_corr_z_3_rangeb =
Charles MacNeill 5:89031b2f5316 557 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 558 pdata->tp_uwr_med_corr_z_4_rangea =
Charles MacNeill 5:89031b2f5316 559 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 560 pdata->tp_uwr_med_corr_z_4_rangeb =
Charles MacNeill 5:89031b2f5316 561 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 562 pdata->tp_uwr_med_corr_z_5_rangea =
Charles MacNeill 5:89031b2f5316 563 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 564 pdata->tp_uwr_med_corr_z_5_rangeb =
Charles MacNeill 5:89031b2f5316 565 VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 566 pdata->tp_uwr_lng_z_1_min =
Charles MacNeill 5:89031b2f5316 567 VL53LX_TUNINGPARM_UWR_LONG_ZONE_1_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 568 pdata->tp_uwr_lng_z_1_max =
Charles MacNeill 5:89031b2f5316 569 VL53LX_TUNINGPARM_UWR_LONG_ZONE_1_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 570 pdata->tp_uwr_lng_z_2_min =
Charles MacNeill 5:89031b2f5316 571 VL53LX_TUNINGPARM_UWR_LONG_ZONE_2_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 572 pdata->tp_uwr_lng_z_2_max =
Charles MacNeill 5:89031b2f5316 573 VL53LX_TUNINGPARM_UWR_LONG_ZONE_2_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 574 pdata->tp_uwr_lng_z_3_min =
Charles MacNeill 5:89031b2f5316 575 VL53LX_TUNINGPARM_UWR_LONG_ZONE_3_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 576 pdata->tp_uwr_lng_z_3_max =
Charles MacNeill 5:89031b2f5316 577 VL53LX_TUNINGPARM_UWR_LONG_ZONE_3_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 578 pdata->tp_uwr_lng_z_4_min =
Charles MacNeill 5:89031b2f5316 579 VL53LX_TUNINGPARM_UWR_LONG_ZONE_4_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 580 pdata->tp_uwr_lng_z_4_max =
Charles MacNeill 5:89031b2f5316 581 VL53LX_TUNINGPARM_UWR_LONG_ZONE_4_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 582 pdata->tp_uwr_lng_z_5_min =
Charles MacNeill 5:89031b2f5316 583 VL53LX_TUNINGPARM_UWR_LONG_ZONE_5_MIN_DEFAULT;
Charles MacNeill 5:89031b2f5316 584 pdata->tp_uwr_lng_z_5_max =
Charles MacNeill 5:89031b2f5316 585 VL53LX_TUNINGPARM_UWR_LONG_ZONE_5_MAX_DEFAULT;
Charles MacNeill 5:89031b2f5316 586 pdata->tp_uwr_lng_corr_z_1_rangea =
Charles MacNeill 5:89031b2f5316 587 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 588 pdata->tp_uwr_lng_corr_z_1_rangeb =
Charles MacNeill 5:89031b2f5316 589 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 590 pdata->tp_uwr_lng_corr_z_2_rangea =
Charles MacNeill 5:89031b2f5316 591 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 592 pdata->tp_uwr_lng_corr_z_2_rangeb =
Charles MacNeill 5:89031b2f5316 593 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 594 pdata->tp_uwr_lng_corr_z_3_rangea =
Charles MacNeill 5:89031b2f5316 595 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 596 pdata->tp_uwr_lng_corr_z_3_rangeb =
Charles MacNeill 5:89031b2f5316 597 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 598 pdata->tp_uwr_lng_corr_z_4_rangea =
Charles MacNeill 5:89031b2f5316 599 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 600 pdata->tp_uwr_lng_corr_z_4_rangeb =
Charles MacNeill 5:89031b2f5316 601 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 602 pdata->tp_uwr_lng_corr_z_5_rangea =
Charles MacNeill 5:89031b2f5316 603 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA_DEFAULT;
Charles MacNeill 5:89031b2f5316 604 pdata->tp_uwr_lng_corr_z_5_rangeb =
Charles MacNeill 5:89031b2f5316 605 VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB_DEFAULT;
Charles MacNeill 5:89031b2f5316 606
Charles MacNeill 5:89031b2f5316 607
Charles MacNeill 5:89031b2f5316 608
Charles MacNeill 5:89031b2f5316 609
Charles MacNeill 5:89031b2f5316 610 pdata->tp_dss_target_lite_mcps =
Charles MacNeill 5:89031b2f5316 611 VL53LX_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 612 pdata->tp_dss_target_histo_mcps =
Charles MacNeill 5:89031b2f5316 613 VL53LX_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 614 pdata->tp_dss_target_histo_mz_mcps =
Charles MacNeill 5:89031b2f5316 615 VL53LX_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 616 pdata->tp_dss_target_timed_mcps =
Charles MacNeill 5:89031b2f5316 617 VL53LX_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 618 pdata->tp_phasecal_timeout_lite_us =
Charles MacNeill 5:89031b2f5316 619 VL53LX_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 620 pdata->tp_phasecal_timeout_hist_long_us =
Charles MacNeill 5:89031b2f5316 621 VL53LX_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 622 pdata->tp_phasecal_timeout_hist_med_us =
Charles MacNeill 5:89031b2f5316 623 VL53LX_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 624 pdata->tp_phasecal_timeout_hist_short_us =
Charles MacNeill 5:89031b2f5316 625 VL53LX_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 626 pdata->tp_phasecal_timeout_mz_long_us =
Charles MacNeill 5:89031b2f5316 627 VL53LX_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 628 pdata->tp_phasecal_timeout_mz_med_us =
Charles MacNeill 5:89031b2f5316 629 VL53LX_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 630 pdata->tp_phasecal_timeout_mz_short_us =
Charles MacNeill 5:89031b2f5316 631 VL53LX_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 632 pdata->tp_phasecal_timeout_timed_us =
Charles MacNeill 5:89031b2f5316 633 VL53LX_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 634 pdata->tp_mm_timeout_lite_us =
Charles MacNeill 5:89031b2f5316 635 VL53LX_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 636 pdata->tp_mm_timeout_histo_us =
Charles MacNeill 5:89031b2f5316 637 VL53LX_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 638 pdata->tp_mm_timeout_mz_us =
Charles MacNeill 5:89031b2f5316 639 VL53LX_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 640 pdata->tp_mm_timeout_timed_us =
Charles MacNeill 5:89031b2f5316 641 VL53LX_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 642 pdata->tp_range_timeout_lite_us =
Charles MacNeill 5:89031b2f5316 643 VL53LX_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 644 pdata->tp_range_timeout_histo_us =
Charles MacNeill 5:89031b2f5316 645 VL53LX_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 646 pdata->tp_range_timeout_mz_us =
Charles MacNeill 5:89031b2f5316 647 VL53LX_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 648 pdata->tp_range_timeout_timed_us =
Charles MacNeill 5:89031b2f5316 649 VL53LX_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 650
Charles MacNeill 5:89031b2f5316 651
Charles MacNeill 5:89031b2f5316 652
Charles MacNeill 5:89031b2f5316 653 pdata->tp_mm_timeout_lpa_us =
Charles MacNeill 5:89031b2f5316 654 VL53LX_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 655 pdata->tp_range_timeout_lpa_us =
Charles MacNeill 5:89031b2f5316 656 VL53LX_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
Charles MacNeill 5:89031b2f5316 657
Charles MacNeill 5:89031b2f5316 658 pdata->tp_dss_target_very_short_mcps =
Charles MacNeill 5:89031b2f5316 659 VL53LX_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS_DEFAULT;
Charles MacNeill 5:89031b2f5316 660
Charles MacNeill 5:89031b2f5316 661 pdata->tp_phasecal_patch_power =
Charles MacNeill 5:89031b2f5316 662 VL53LX_TUNINGPARM_PHASECAL_PATCH_POWER_DEFAULT;
Charles MacNeill 5:89031b2f5316 663
Charles MacNeill 5:89031b2f5316 664 pdata->tp_hist_merge =
Charles MacNeill 5:89031b2f5316 665 VL53LX_TUNINGPARM_HIST_MERGE_DEFAULT;
Charles MacNeill 5:89031b2f5316 666
Charles MacNeill 5:89031b2f5316 667 pdata->tp_reset_merge_threshold =
Charles MacNeill 5:89031b2f5316 668 VL53LX_TUNINGPARM_RESET_MERGE_THRESHOLD_DEFAULT;
Charles MacNeill 5:89031b2f5316 669
Charles MacNeill 5:89031b2f5316 670 pdata->tp_hist_merge_max_size =
Charles MacNeill 5:89031b2f5316 671 VL53LX_TUNINGPARM_HIST_MERGE_MAX_SIZE_DEFAULT;
Charles MacNeill 5:89031b2f5316 672
Charles MacNeill 5:89031b2f5316 673 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 674
Charles MacNeill 5:89031b2f5316 675 return status;
Charles MacNeill 5:89031b2f5316 676 }
Charles MacNeill 5:89031b2f5316 677
Charles MacNeill 5:89031b2f5316 678
Charles MacNeill 5:89031b2f5316 679 VL53LX_Error VL53LX_init_hist_gen3_dmax_config_struct(
Charles MacNeill 5:89031b2f5316 680 VL53LX_hist_gen3_dmax_config_t *pdata)
Charles MacNeill 5:89031b2f5316 681 {
Charles MacNeill 5:89031b2f5316 682
Charles MacNeill 5:89031b2f5316 683
Charles MacNeill 5:89031b2f5316 684 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 685
Charles MacNeill 5:89031b2f5316 686 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 687
Charles MacNeill 5:89031b2f5316 688
Charles MacNeill 5:89031b2f5316 689 pdata->dss_config__target_total_rate_mcps = 0x1400;
Charles MacNeill 5:89031b2f5316 690 pdata->dss_config__aperture_attenuation = 0x38;
Charles MacNeill 5:89031b2f5316 691
Charles MacNeill 5:89031b2f5316 692 pdata->signal_thresh_sigma =
Charles MacNeill 5:89031b2f5316 693 VL53LX_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA_DEFAULT;
Charles MacNeill 5:89031b2f5316 694 pdata->ambient_thresh_sigma = 0x70;
Charles MacNeill 5:89031b2f5316 695 pdata->min_ambient_thresh_events = 16;
Charles MacNeill 5:89031b2f5316 696 pdata->signal_total_events_limit = 100;
Charles MacNeill 5:89031b2f5316 697 pdata->max_effective_spads = 0xFFFF;
Charles MacNeill 5:89031b2f5316 698
Charles MacNeill 5:89031b2f5316 699
Charles MacNeill 5:89031b2f5316 700
Charles MacNeill 5:89031b2f5316 701 pdata->target_reflectance_for_dmax_calc[0] =
Charles MacNeill 5:89031b2f5316 702 VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0_DEFAULT;
Charles MacNeill 5:89031b2f5316 703 pdata->target_reflectance_for_dmax_calc[1] =
Charles MacNeill 5:89031b2f5316 704 VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1_DEFAULT;
Charles MacNeill 5:89031b2f5316 705 pdata->target_reflectance_for_dmax_calc[2] =
Charles MacNeill 5:89031b2f5316 706 VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2_DEFAULT;
Charles MacNeill 5:89031b2f5316 707 pdata->target_reflectance_for_dmax_calc[3] =
Charles MacNeill 5:89031b2f5316 708 VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3_DEFAULT;
Charles MacNeill 5:89031b2f5316 709 pdata->target_reflectance_for_dmax_calc[4] =
Charles MacNeill 5:89031b2f5316 710 VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4_DEFAULT;
Charles MacNeill 5:89031b2f5316 711
Charles MacNeill 5:89031b2f5316 712 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 713
Charles MacNeill 5:89031b2f5316 714 return status;
Charles MacNeill 5:89031b2f5316 715 }
Charles MacNeill 5:89031b2f5316 716
Charles MacNeill 5:89031b2f5316 717
Charles MacNeill 5:89031b2f5316 718 VL53LX_Error VL53LX_preset_mode_standard_ranging(
Charles MacNeill 5:89031b2f5316 719 VL53LX_static_config_t *pstatic,
Charles MacNeill 5:89031b2f5316 720 VL53LX_histogram_config_t *phistogram,
Charles MacNeill 5:89031b2f5316 721 VL53LX_general_config_t *pgeneral,
Charles MacNeill 5:89031b2f5316 722 VL53LX_timing_config_t *ptiming,
Charles MacNeill 5:89031b2f5316 723 VL53LX_dynamic_config_t *pdynamic,
Charles MacNeill 5:89031b2f5316 724 VL53LX_system_control_t *psystem,
Charles MacNeill 5:89031b2f5316 725 VL53LX_tuning_parm_storage_t *ptuning_parms,
Charles MacNeill 5:89031b2f5316 726 VL53LX_zone_config_t *pzone_cfg)
Charles MacNeill 5:89031b2f5316 727 {
Charles MacNeill 5:89031b2f5316 728
Charles MacNeill 5:89031b2f5316 729
Charles MacNeill 5:89031b2f5316 730 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 731
Charles MacNeill 5:89031b2f5316 732 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 733
Charles MacNeill 5:89031b2f5316 734
Charles MacNeill 5:89031b2f5316 735
Charles MacNeill 5:89031b2f5316 736
Charles MacNeill 5:89031b2f5316 737 pstatic->dss_config__target_total_rate_mcps = 0x0A00;
Charles MacNeill 5:89031b2f5316 738 pstatic->debug__ctrl = 0x00;
Charles MacNeill 5:89031b2f5316 739 pstatic->test_mode__ctrl = 0x00;
Charles MacNeill 5:89031b2f5316 740 pstatic->clk_gating__ctrl = 0x00;
Charles MacNeill 5:89031b2f5316 741 pstatic->nvm_bist__ctrl = 0x00;
Charles MacNeill 5:89031b2f5316 742 pstatic->nvm_bist__num_nvm_words = 0x00;
Charles MacNeill 5:89031b2f5316 743 pstatic->nvm_bist__start_address = 0x00;
Charles MacNeill 5:89031b2f5316 744 pstatic->host_if__status = 0x00;
Charles MacNeill 5:89031b2f5316 745 pstatic->pad_i2c_hv__config = 0x00;
Charles MacNeill 5:89031b2f5316 746 pstatic->pad_i2c_hv__extsup_config = 0x00;
Charles MacNeill 5:89031b2f5316 747
Charles MacNeill 5:89031b2f5316 748
Charles MacNeill 5:89031b2f5316 749 pstatic->gpio_hv_pad__ctrl = 0x00;
Charles MacNeill 5:89031b2f5316 750
Charles MacNeill 5:89031b2f5316 751
Charles MacNeill 5:89031b2f5316 752 pstatic->gpio_hv_mux__ctrl =
Charles MacNeill 5:89031b2f5316 753 VL53LX_DEVICEINTERRUPTPOLARITY_ACTIVE_LOW |
Charles MacNeill 5:89031b2f5316 754 VL53LX_DEVICEGPIOMODE_OUTPUT_RANGE_AND_ERROR_INTERRUPTS;
Charles MacNeill 5:89031b2f5316 755
Charles MacNeill 5:89031b2f5316 756 pstatic->gpio__tio_hv_status = 0x02;
Charles MacNeill 5:89031b2f5316 757 pstatic->gpio__fio_hv_status = 0x00;
Charles MacNeill 5:89031b2f5316 758 pstatic->ana_config__spad_sel_pswidth = 0x02;
Charles MacNeill 5:89031b2f5316 759 pstatic->ana_config__vcsel_pulse_width_offset = 0x08;
Charles MacNeill 5:89031b2f5316 760 pstatic->ana_config__fast_osc__config_ctrl = 0x00;
Charles MacNeill 5:89031b2f5316 761
Charles MacNeill 5:89031b2f5316 762 pstatic->sigma_estimator__effective_pulse_width_ns =
Charles MacNeill 5:89031b2f5316 763 ptuning_parms->tp_lite_sigma_est_pulse_width_ns;
Charles MacNeill 5:89031b2f5316 764 pstatic->sigma_estimator__effective_ambient_width_ns =
Charles MacNeill 5:89031b2f5316 765 ptuning_parms->tp_lite_sigma_est_amb_width_ns;
Charles MacNeill 5:89031b2f5316 766 pstatic->sigma_estimator__sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 767 ptuning_parms->tp_lite_sigma_ref_mm;
Charles MacNeill 5:89031b2f5316 768
Charles MacNeill 5:89031b2f5316 769 pstatic->algo__crosstalk_compensation_valid_height_mm = 0x01;
Charles MacNeill 5:89031b2f5316 770 pstatic->spare_host_config__static_config_spare_0 = 0x00;
Charles MacNeill 5:89031b2f5316 771 pstatic->spare_host_config__static_config_spare_1 = 0x00;
Charles MacNeill 5:89031b2f5316 772
Charles MacNeill 5:89031b2f5316 773 pstatic->algo__range_ignore_threshold_mcps = 0x0000;
Charles MacNeill 5:89031b2f5316 774
Charles MacNeill 5:89031b2f5316 775
Charles MacNeill 5:89031b2f5316 776 pstatic->algo__range_ignore_valid_height_mm = 0xff;
Charles MacNeill 5:89031b2f5316 777 pstatic->algo__range_min_clip =
Charles MacNeill 5:89031b2f5316 778 ptuning_parms->tp_lite_min_clip;
Charles MacNeill 5:89031b2f5316 779
Charles MacNeill 5:89031b2f5316 780 pstatic->algo__consistency_check__tolerance =
Charles MacNeill 5:89031b2f5316 781 ptuning_parms->tp_consistency_lite_phase_tolerance;
Charles MacNeill 5:89031b2f5316 782 pstatic->spare_host_config__static_config_spare_2 = 0x00;
Charles MacNeill 5:89031b2f5316 783 pstatic->sd_config__reset_stages_msb = 0x00;
Charles MacNeill 5:89031b2f5316 784 pstatic->sd_config__reset_stages_lsb = 0x00;
Charles MacNeill 5:89031b2f5316 785
Charles MacNeill 5:89031b2f5316 786 pgeneral->gph_config__stream_count_update_value = 0x00;
Charles MacNeill 5:89031b2f5316 787 pgeneral->global_config__stream_divider = 0x00;
Charles MacNeill 5:89031b2f5316 788 pgeneral->system__interrupt_config_gpio =
Charles MacNeill 5:89031b2f5316 789 VL53LX_INTERRUPT_CONFIG_NEW_SAMPLE_READY;
Charles MacNeill 5:89031b2f5316 790 pgeneral->cal_config__vcsel_start = 0x0B;
Charles MacNeill 5:89031b2f5316 791
Charles MacNeill 5:89031b2f5316 792
Charles MacNeill 5:89031b2f5316 793 pgeneral->cal_config__repeat_rate =
Charles MacNeill 5:89031b2f5316 794 ptuning_parms->tp_cal_repeat_rate;
Charles MacNeill 5:89031b2f5316 795 pgeneral->global_config__vcsel_width = 0x02;
Charles MacNeill 5:89031b2f5316 796
Charles MacNeill 5:89031b2f5316 797 pgeneral->phasecal_config__timeout_macrop = 0x0D;
Charles MacNeill 5:89031b2f5316 798
Charles MacNeill 5:89031b2f5316 799 pgeneral->phasecal_config__target =
Charles MacNeill 5:89031b2f5316 800 ptuning_parms->tp_phasecal_target;
Charles MacNeill 5:89031b2f5316 801 pgeneral->phasecal_config__override = 0x00;
Charles MacNeill 5:89031b2f5316 802 pgeneral->dss_config__roi_mode_control =
Charles MacNeill 5:89031b2f5316 803 VL53LX_DEVICEDSSMODE__TARGET_RATE;
Charles MacNeill 5:89031b2f5316 804
Charles MacNeill 5:89031b2f5316 805 pgeneral->system__thresh_rate_high = 0x0000;
Charles MacNeill 5:89031b2f5316 806 pgeneral->system__thresh_rate_low = 0x0000;
Charles MacNeill 5:89031b2f5316 807
Charles MacNeill 5:89031b2f5316 808 pgeneral->dss_config__manual_effective_spads_select = 0x8C00;
Charles MacNeill 5:89031b2f5316 809 pgeneral->dss_config__manual_block_select = 0x00;
Charles MacNeill 5:89031b2f5316 810
Charles MacNeill 5:89031b2f5316 811
Charles MacNeill 5:89031b2f5316 812 pgeneral->dss_config__aperture_attenuation = 0x38;
Charles MacNeill 5:89031b2f5316 813 pgeneral->dss_config__max_spads_limit = 0xFF;
Charles MacNeill 5:89031b2f5316 814 pgeneral->dss_config__min_spads_limit = 0x01;
Charles MacNeill 5:89031b2f5316 815
Charles MacNeill 5:89031b2f5316 816
Charles MacNeill 5:89031b2f5316 817
Charles MacNeill 5:89031b2f5316 818
Charles MacNeill 5:89031b2f5316 819 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 820 ptiming->mm_config__timeout_macrop_a_lo = 0x1a;
Charles MacNeill 5:89031b2f5316 821 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 822 ptiming->mm_config__timeout_macrop_b_lo = 0x20;
Charles MacNeill 5:89031b2f5316 823
Charles MacNeill 5:89031b2f5316 824 ptiming->range_config__timeout_macrop_a_hi = 0x01;
Charles MacNeill 5:89031b2f5316 825 ptiming->range_config__timeout_macrop_a_lo = 0xCC;
Charles MacNeill 5:89031b2f5316 826
Charles MacNeill 5:89031b2f5316 827 ptiming->range_config__vcsel_period_a = 0x0B;
Charles MacNeill 5:89031b2f5316 828
Charles MacNeill 5:89031b2f5316 829 ptiming->range_config__timeout_macrop_b_hi = 0x01;
Charles MacNeill 5:89031b2f5316 830 ptiming->range_config__timeout_macrop_b_lo = 0xF5;
Charles MacNeill 5:89031b2f5316 831
Charles MacNeill 5:89031b2f5316 832 ptiming->range_config__vcsel_period_b = 0x09;
Charles MacNeill 5:89031b2f5316 833
Charles MacNeill 5:89031b2f5316 834 ptiming->range_config__sigma_thresh =
Charles MacNeill 5:89031b2f5316 835 ptuning_parms->tp_lite_med_sigma_thresh_mm;
Charles MacNeill 5:89031b2f5316 836
Charles MacNeill 5:89031b2f5316 837 ptiming->range_config__min_count_rate_rtn_limit_mcps =
Charles MacNeill 5:89031b2f5316 838 ptuning_parms->tp_lite_med_min_count_rate_rtn_mcps;
Charles MacNeill 5:89031b2f5316 839
Charles MacNeill 5:89031b2f5316 840
Charles MacNeill 5:89031b2f5316 841 ptiming->range_config__valid_phase_low = 0x08;
Charles MacNeill 5:89031b2f5316 842 ptiming->range_config__valid_phase_high = 0x78;
Charles MacNeill 5:89031b2f5316 843 ptiming->system__intermeasurement_period = 0x00000000;
Charles MacNeill 5:89031b2f5316 844 ptiming->system__fractional_enable = 0x00;
Charles MacNeill 5:89031b2f5316 845
Charles MacNeill 5:89031b2f5316 846
Charles MacNeill 5:89031b2f5316 847
Charles MacNeill 5:89031b2f5316 848 phistogram->histogram_config__low_amb_even_bin_0_1 = 0x07;
Charles MacNeill 5:89031b2f5316 849 phistogram->histogram_config__low_amb_even_bin_2_3 = 0x21;
Charles MacNeill 5:89031b2f5316 850 phistogram->histogram_config__low_amb_even_bin_4_5 = 0x43;
Charles MacNeill 5:89031b2f5316 851
Charles MacNeill 5:89031b2f5316 852 phistogram->histogram_config__low_amb_odd_bin_0_1 = 0x10;
Charles MacNeill 5:89031b2f5316 853 phistogram->histogram_config__low_amb_odd_bin_2_3 = 0x32;
Charles MacNeill 5:89031b2f5316 854 phistogram->histogram_config__low_amb_odd_bin_4_5 = 0x54;
Charles MacNeill 5:89031b2f5316 855
Charles MacNeill 5:89031b2f5316 856 phistogram->histogram_config__mid_amb_even_bin_0_1 = 0x07;
Charles MacNeill 5:89031b2f5316 857 phistogram->histogram_config__mid_amb_even_bin_2_3 = 0x21;
Charles MacNeill 5:89031b2f5316 858 phistogram->histogram_config__mid_amb_even_bin_4_5 = 0x43;
Charles MacNeill 5:89031b2f5316 859
Charles MacNeill 5:89031b2f5316 860 phistogram->histogram_config__mid_amb_odd_bin_0_1 = 0x10;
Charles MacNeill 5:89031b2f5316 861 phistogram->histogram_config__mid_amb_odd_bin_2 = 0x02;
Charles MacNeill 5:89031b2f5316 862 phistogram->histogram_config__mid_amb_odd_bin_3_4 = 0x43;
Charles MacNeill 5:89031b2f5316 863 phistogram->histogram_config__mid_amb_odd_bin_5 = 0x05;
Charles MacNeill 5:89031b2f5316 864
Charles MacNeill 5:89031b2f5316 865 phistogram->histogram_config__user_bin_offset = 0x00;
Charles MacNeill 5:89031b2f5316 866
Charles MacNeill 5:89031b2f5316 867 phistogram->histogram_config__high_amb_even_bin_0_1 = 0x07;
Charles MacNeill 5:89031b2f5316 868 phistogram->histogram_config__high_amb_even_bin_2_3 = 0x21;
Charles MacNeill 5:89031b2f5316 869 phistogram->histogram_config__high_amb_even_bin_4_5 = 0x43;
Charles MacNeill 5:89031b2f5316 870
Charles MacNeill 5:89031b2f5316 871 phistogram->histogram_config__high_amb_odd_bin_0_1 = 0x10;
Charles MacNeill 5:89031b2f5316 872 phistogram->histogram_config__high_amb_odd_bin_2_3 = 0x32;
Charles MacNeill 5:89031b2f5316 873 phistogram->histogram_config__high_amb_odd_bin_4_5 = 0x54;
Charles MacNeill 5:89031b2f5316 874
Charles MacNeill 5:89031b2f5316 875 phistogram->histogram_config__amb_thresh_low = 0xFFFF;
Charles MacNeill 5:89031b2f5316 876 phistogram->histogram_config__amb_thresh_high = 0xFFFF;
Charles MacNeill 5:89031b2f5316 877
Charles MacNeill 5:89031b2f5316 878 phistogram->histogram_config__spad_array_selection = 0x00;
Charles MacNeill 5:89031b2f5316 879
Charles MacNeill 5:89031b2f5316 880
Charles MacNeill 5:89031b2f5316 881 pzone_cfg->max_zones = VL53LX_MAX_USER_ZONES;
Charles MacNeill 5:89031b2f5316 882 pzone_cfg->active_zones = 0x00;
Charles MacNeill 5:89031b2f5316 883 pzone_cfg->user_zones[0].height = 0x0f;
Charles MacNeill 5:89031b2f5316 884 pzone_cfg->user_zones[0].width = 0x0f;
Charles MacNeill 5:89031b2f5316 885 pzone_cfg->user_zones[0].x_centre = 0x08;
Charles MacNeill 5:89031b2f5316 886 pzone_cfg->user_zones[0].y_centre = 0x08;
Charles MacNeill 5:89031b2f5316 887
Charles MacNeill 5:89031b2f5316 888
Charles MacNeill 5:89031b2f5316 889
Charles MacNeill 5:89031b2f5316 890 pdynamic->system__grouped_parameter_hold_0 = 0x01;
Charles MacNeill 5:89031b2f5316 891
Charles MacNeill 5:89031b2f5316 892 pdynamic->system__thresh_high = 0x0000;
Charles MacNeill 5:89031b2f5316 893 pdynamic->system__thresh_low = 0x0000;
Charles MacNeill 5:89031b2f5316 894 pdynamic->system__enable_xtalk_per_quadrant = 0x00;
Charles MacNeill 5:89031b2f5316 895 pdynamic->system__seed_config =
Charles MacNeill 5:89031b2f5316 896 ptuning_parms->tp_lite_seed_cfg;
Charles MacNeill 5:89031b2f5316 897
Charles MacNeill 5:89031b2f5316 898
Charles MacNeill 5:89031b2f5316 899 pdynamic->sd_config__woi_sd0 = 0x0B;
Charles MacNeill 5:89031b2f5316 900
Charles MacNeill 5:89031b2f5316 901 pdynamic->sd_config__woi_sd1 = 0x09;
Charles MacNeill 5:89031b2f5316 902
Charles MacNeill 5:89031b2f5316 903 pdynamic->sd_config__initial_phase_sd0 =
Charles MacNeill 5:89031b2f5316 904 ptuning_parms->tp_init_phase_rtn_lite_med;
Charles MacNeill 5:89031b2f5316 905 pdynamic->sd_config__initial_phase_sd1 =
Charles MacNeill 5:89031b2f5316 906 ptuning_parms->tp_init_phase_ref_lite_med;
Charles MacNeill 5:89031b2f5316 907
Charles MacNeill 5:89031b2f5316 908 pdynamic->system__grouped_parameter_hold_1 = 0x01;
Charles MacNeill 5:89031b2f5316 909
Charles MacNeill 5:89031b2f5316 910
Charles MacNeill 5:89031b2f5316 911
Charles MacNeill 5:89031b2f5316 912 pdynamic->sd_config__first_order_select =
Charles MacNeill 5:89031b2f5316 913 ptuning_parms->tp_lite_first_order_select;
Charles MacNeill 5:89031b2f5316 914 pdynamic->sd_config__quantifier =
Charles MacNeill 5:89031b2f5316 915 ptuning_parms->tp_lite_quantifier;
Charles MacNeill 5:89031b2f5316 916
Charles MacNeill 5:89031b2f5316 917
Charles MacNeill 5:89031b2f5316 918 pdynamic->roi_config__user_roi_centre_spad = 0xC7;
Charles MacNeill 5:89031b2f5316 919
Charles MacNeill 5:89031b2f5316 920 pdynamic->roi_config__user_roi_requested_global_xy_size = 0xFF;
Charles MacNeill 5:89031b2f5316 921
Charles MacNeill 5:89031b2f5316 922
Charles MacNeill 5:89031b2f5316 923 pdynamic->system__sequence_config =
Charles MacNeill 5:89031b2f5316 924 VL53LX_SEQUENCE_VHV_EN |
Charles MacNeill 5:89031b2f5316 925 VL53LX_SEQUENCE_PHASECAL_EN |
Charles MacNeill 5:89031b2f5316 926 VL53LX_SEQUENCE_DSS1_EN |
Charles MacNeill 5:89031b2f5316 927 VL53LX_SEQUENCE_DSS2_EN |
Charles MacNeill 5:89031b2f5316 928 VL53LX_SEQUENCE_MM2_EN |
Charles MacNeill 5:89031b2f5316 929 VL53LX_SEQUENCE_RANGE_EN;
Charles MacNeill 5:89031b2f5316 930
Charles MacNeill 5:89031b2f5316 931 pdynamic->system__grouped_parameter_hold = 0x02;
Charles MacNeill 5:89031b2f5316 932
Charles MacNeill 5:89031b2f5316 933
Charles MacNeill 5:89031b2f5316 934
Charles MacNeill 5:89031b2f5316 935
Charles MacNeill 5:89031b2f5316 936 psystem->system__stream_count_ctrl = 0x00;
Charles MacNeill 5:89031b2f5316 937 psystem->firmware__enable = 0x01;
Charles MacNeill 5:89031b2f5316 938 psystem->system__interrupt_clear =
Charles MacNeill 5:89031b2f5316 939 VL53LX_CLEAR_RANGE_INT;
Charles MacNeill 5:89031b2f5316 940
Charles MacNeill 5:89031b2f5316 941 psystem->system__mode_start =
Charles MacNeill 5:89031b2f5316 942 VL53LX_DEVICESCHEDULERMODE_STREAMING |
Charles MacNeill 5:89031b2f5316 943 VL53LX_DEVICEREADOUTMODE_SINGLE_SD |
Charles MacNeill 5:89031b2f5316 944 VL53LX_DEVICEMEASUREMENTMODE_BACKTOBACK;
Charles MacNeill 5:89031b2f5316 945
Charles MacNeill 5:89031b2f5316 946 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 947
Charles MacNeill 5:89031b2f5316 948 return status;
Charles MacNeill 5:89031b2f5316 949 }
Charles MacNeill 5:89031b2f5316 950
Charles MacNeill 5:89031b2f5316 951
Charles MacNeill 5:89031b2f5316 952 VL53LX_Error VL53LX_preset_mode_histogram_ranging(
Charles MacNeill 5:89031b2f5316 953 VL53LX_hist_post_process_config_t *phistpostprocess,
Charles MacNeill 5:89031b2f5316 954 VL53LX_static_config_t *pstatic,
Charles MacNeill 5:89031b2f5316 955 VL53LX_histogram_config_t *phistogram,
Charles MacNeill 5:89031b2f5316 956 VL53LX_general_config_t *pgeneral,
Charles MacNeill 5:89031b2f5316 957 VL53LX_timing_config_t *ptiming,
Charles MacNeill 5:89031b2f5316 958 VL53LX_dynamic_config_t *pdynamic,
Charles MacNeill 5:89031b2f5316 959 VL53LX_system_control_t *psystem,
Charles MacNeill 5:89031b2f5316 960 VL53LX_tuning_parm_storage_t *ptuning_parms,
Charles MacNeill 5:89031b2f5316 961 VL53LX_zone_config_t *pzone_cfg)
Charles MacNeill 5:89031b2f5316 962 {
Charles MacNeill 5:89031b2f5316 963
Charles MacNeill 5:89031b2f5316 964
Charles MacNeill 5:89031b2f5316 965 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 966
Charles MacNeill 5:89031b2f5316 967 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 968
Charles MacNeill 5:89031b2f5316 969
Charles MacNeill 5:89031b2f5316 970
Charles MacNeill 5:89031b2f5316 971 status =
Charles MacNeill 5:89031b2f5316 972 VL53LX_preset_mode_standard_ranging(
Charles MacNeill 5:89031b2f5316 973 pstatic,
Charles MacNeill 5:89031b2f5316 974 phistogram,
Charles MacNeill 5:89031b2f5316 975 pgeneral,
Charles MacNeill 5:89031b2f5316 976 ptiming,
Charles MacNeill 5:89031b2f5316 977 pdynamic,
Charles MacNeill 5:89031b2f5316 978 psystem,
Charles MacNeill 5:89031b2f5316 979 ptuning_parms,
Charles MacNeill 5:89031b2f5316 980 pzone_cfg);
Charles MacNeill 5:89031b2f5316 981
Charles MacNeill 5:89031b2f5316 982
Charles MacNeill 5:89031b2f5316 983
Charles MacNeill 5:89031b2f5316 984 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 985
Charles MacNeill 5:89031b2f5316 986
Charles MacNeill 5:89031b2f5316 987
Charles MacNeill 5:89031b2f5316 988 pstatic->dss_config__target_total_rate_mcps = 0x1400;
Charles MacNeill 5:89031b2f5316 989
Charles MacNeill 5:89031b2f5316 990
Charles MacNeill 5:89031b2f5316 991
Charles MacNeill 5:89031b2f5316 992 VL53LX_init_histogram_config_structure(
Charles MacNeill 5:89031b2f5316 993 7, 0, 1, 2, 3, 4,
Charles MacNeill 5:89031b2f5316 994 0, 1, 2, 3, 4, 5,
Charles MacNeill 5:89031b2f5316 995 phistogram);
Charles MacNeill 5:89031b2f5316 996
Charles MacNeill 5:89031b2f5316 997
Charles MacNeill 5:89031b2f5316 998 VL53LX_init_histogram_multizone_config_structure(
Charles MacNeill 5:89031b2f5316 999 7, 0, 1, 2, 3, 4,
Charles MacNeill 5:89031b2f5316 1000 0, 1, 2, 3, 4, 5,
Charles MacNeill 5:89031b2f5316 1001 &(pzone_cfg->multizone_hist_cfg));
Charles MacNeill 5:89031b2f5316 1002
Charles MacNeill 5:89031b2f5316 1003
Charles MacNeill 5:89031b2f5316 1004
Charles MacNeill 5:89031b2f5316 1005
Charles MacNeill 5:89031b2f5316 1006 ptiming->range_config__vcsel_period_a = 0x09;
Charles MacNeill 5:89031b2f5316 1007 ptiming->range_config__vcsel_period_b = 0x0B;
Charles MacNeill 5:89031b2f5316 1008 pdynamic->sd_config__woi_sd0 = 0x09;
Charles MacNeill 5:89031b2f5316 1009 pdynamic->sd_config__woi_sd1 = 0x0B;
Charles MacNeill 5:89031b2f5316 1010
Charles MacNeill 5:89031b2f5316 1011
Charles MacNeill 5:89031b2f5316 1012
Charles MacNeill 5:89031b2f5316 1013
Charles MacNeill 5:89031b2f5316 1014 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1015 ptiming->mm_config__timeout_macrop_a_lo = 0x20;
Charles MacNeill 5:89031b2f5316 1016 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1017 ptiming->mm_config__timeout_macrop_b_lo = 0x1A;
Charles MacNeill 5:89031b2f5316 1018
Charles MacNeill 5:89031b2f5316 1019
Charles MacNeill 5:89031b2f5316 1020 ptiming->range_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1021 ptiming->range_config__timeout_macrop_a_lo = 0x28;
Charles MacNeill 5:89031b2f5316 1022
Charles MacNeill 5:89031b2f5316 1023
Charles MacNeill 5:89031b2f5316 1024 ptiming->range_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1025 ptiming->range_config__timeout_macrop_b_lo = 0x21;
Charles MacNeill 5:89031b2f5316 1026
Charles MacNeill 5:89031b2f5316 1027
Charles MacNeill 5:89031b2f5316 1028 pgeneral->phasecal_config__timeout_macrop = 0xF5;
Charles MacNeill 5:89031b2f5316 1029
Charles MacNeill 5:89031b2f5316 1030
Charles MacNeill 5:89031b2f5316 1031
Charles MacNeill 5:89031b2f5316 1032 phistpostprocess->valid_phase_low = 0x08;
Charles MacNeill 5:89031b2f5316 1033 phistpostprocess->valid_phase_high = 0x88;
Charles MacNeill 5:89031b2f5316 1034
Charles MacNeill 5:89031b2f5316 1035
Charles MacNeill 5:89031b2f5316 1036
Charles MacNeill 5:89031b2f5316 1037 VL53LX_copy_hist_cfg_to_static_cfg(
Charles MacNeill 5:89031b2f5316 1038 phistogram,
Charles MacNeill 5:89031b2f5316 1039 pstatic,
Charles MacNeill 5:89031b2f5316 1040 pgeneral,
Charles MacNeill 5:89031b2f5316 1041 ptiming,
Charles MacNeill 5:89031b2f5316 1042 pdynamic);
Charles MacNeill 5:89031b2f5316 1043
Charles MacNeill 5:89031b2f5316 1044
Charles MacNeill 5:89031b2f5316 1045
Charles MacNeill 5:89031b2f5316 1046
Charles MacNeill 5:89031b2f5316 1047 pdynamic->system__sequence_config =
Charles MacNeill 5:89031b2f5316 1048 VL53LX_SEQUENCE_VHV_EN |
Charles MacNeill 5:89031b2f5316 1049 VL53LX_SEQUENCE_PHASECAL_EN |
Charles MacNeill 5:89031b2f5316 1050 VL53LX_SEQUENCE_DSS1_EN |
Charles MacNeill 5:89031b2f5316 1051 VL53LX_SEQUENCE_DSS2_EN |
Charles MacNeill 5:89031b2f5316 1052
Charles MacNeill 5:89031b2f5316 1053
Charles MacNeill 5:89031b2f5316 1054 VL53LX_SEQUENCE_RANGE_EN;
Charles MacNeill 5:89031b2f5316 1055
Charles MacNeill 5:89031b2f5316 1056
Charles MacNeill 5:89031b2f5316 1057
Charles MacNeill 5:89031b2f5316 1058
Charles MacNeill 5:89031b2f5316 1059 psystem->system__mode_start =
Charles MacNeill 5:89031b2f5316 1060 VL53LX_DEVICESCHEDULERMODE_HISTOGRAM |
Charles MacNeill 5:89031b2f5316 1061 VL53LX_DEVICEREADOUTMODE_DUAL_SD |
Charles MacNeill 5:89031b2f5316 1062 VL53LX_DEVICEMEASUREMENTMODE_BACKTOBACK;
Charles MacNeill 5:89031b2f5316 1063 }
Charles MacNeill 5:89031b2f5316 1064
Charles MacNeill 5:89031b2f5316 1065 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1066
Charles MacNeill 5:89031b2f5316 1067 return status;
Charles MacNeill 5:89031b2f5316 1068 }
Charles MacNeill 5:89031b2f5316 1069
Charles MacNeill 5:89031b2f5316 1070
Charles MacNeill 5:89031b2f5316 1071 VL53LX_Error VL53LX_preset_mode_histogram_long_range(
Charles MacNeill 5:89031b2f5316 1072 VL53LX_hist_post_process_config_t *phistpostprocess,
Charles MacNeill 5:89031b2f5316 1073 VL53LX_static_config_t *pstatic,
Charles MacNeill 5:89031b2f5316 1074 VL53LX_histogram_config_t *phistogram,
Charles MacNeill 5:89031b2f5316 1075 VL53LX_general_config_t *pgeneral,
Charles MacNeill 5:89031b2f5316 1076 VL53LX_timing_config_t *ptiming,
Charles MacNeill 5:89031b2f5316 1077 VL53LX_dynamic_config_t *pdynamic,
Charles MacNeill 5:89031b2f5316 1078 VL53LX_system_control_t *psystem,
Charles MacNeill 5:89031b2f5316 1079 VL53LX_tuning_parm_storage_t *ptuning_parms,
Charles MacNeill 5:89031b2f5316 1080 VL53LX_zone_config_t *pzone_cfg)
Charles MacNeill 5:89031b2f5316 1081 {
Charles MacNeill 5:89031b2f5316 1082
Charles MacNeill 5:89031b2f5316 1083
Charles MacNeill 5:89031b2f5316 1084 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1085
Charles MacNeill 5:89031b2f5316 1086 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1087
Charles MacNeill 5:89031b2f5316 1088
Charles MacNeill 5:89031b2f5316 1089
Charles MacNeill 5:89031b2f5316 1090 status =
Charles MacNeill 5:89031b2f5316 1091 VL53LX_preset_mode_histogram_ranging(
Charles MacNeill 5:89031b2f5316 1092 phistpostprocess,
Charles MacNeill 5:89031b2f5316 1093 pstatic,
Charles MacNeill 5:89031b2f5316 1094 phistogram,
Charles MacNeill 5:89031b2f5316 1095 pgeneral,
Charles MacNeill 5:89031b2f5316 1096 ptiming,
Charles MacNeill 5:89031b2f5316 1097 pdynamic,
Charles MacNeill 5:89031b2f5316 1098 psystem,
Charles MacNeill 5:89031b2f5316 1099 ptuning_parms,
Charles MacNeill 5:89031b2f5316 1100 pzone_cfg);
Charles MacNeill 5:89031b2f5316 1101
Charles MacNeill 5:89031b2f5316 1102
Charles MacNeill 5:89031b2f5316 1103
Charles MacNeill 5:89031b2f5316 1104 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1105
Charles MacNeill 5:89031b2f5316 1106
Charles MacNeill 5:89031b2f5316 1107
Charles MacNeill 5:89031b2f5316 1108
Charles MacNeill 5:89031b2f5316 1109
Charles MacNeill 5:89031b2f5316 1110 VL53LX_init_histogram_config_structure(
Charles MacNeill 5:89031b2f5316 1111 7, 0, 1, 2, 3, 4,
Charles MacNeill 5:89031b2f5316 1112 0, 1, 2, 3, 4, 5,
Charles MacNeill 5:89031b2f5316 1113 phistogram);
Charles MacNeill 5:89031b2f5316 1114
Charles MacNeill 5:89031b2f5316 1115
Charles MacNeill 5:89031b2f5316 1116 VL53LX_init_histogram_multizone_config_structure(
Charles MacNeill 5:89031b2f5316 1117 7, 0, 1, 2, 3, 4,
Charles MacNeill 5:89031b2f5316 1118 0, 1, 2, 3, 4, 5,
Charles MacNeill 5:89031b2f5316 1119 &(pzone_cfg->multizone_hist_cfg));
Charles MacNeill 5:89031b2f5316 1120
Charles MacNeill 5:89031b2f5316 1121
Charles MacNeill 5:89031b2f5316 1122
Charles MacNeill 5:89031b2f5316 1123 VL53LX_copy_hist_cfg_to_static_cfg(
Charles MacNeill 5:89031b2f5316 1124 phistogram,
Charles MacNeill 5:89031b2f5316 1125 pstatic,
Charles MacNeill 5:89031b2f5316 1126 pgeneral,
Charles MacNeill 5:89031b2f5316 1127 ptiming,
Charles MacNeill 5:89031b2f5316 1128 pdynamic);
Charles MacNeill 5:89031b2f5316 1129
Charles MacNeill 5:89031b2f5316 1130
Charles MacNeill 5:89031b2f5316 1131
Charles MacNeill 5:89031b2f5316 1132 ptiming->range_config__vcsel_period_a = 0x09;
Charles MacNeill 5:89031b2f5316 1133 ptiming->range_config__vcsel_period_b = 0x0b;
Charles MacNeill 5:89031b2f5316 1134
Charles MacNeill 5:89031b2f5316 1135
Charles MacNeill 5:89031b2f5316 1136
Charles MacNeill 5:89031b2f5316 1137 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1138 ptiming->mm_config__timeout_macrop_a_lo = 0x21;
Charles MacNeill 5:89031b2f5316 1139 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1140 ptiming->mm_config__timeout_macrop_b_lo = 0x1b;
Charles MacNeill 5:89031b2f5316 1141
Charles MacNeill 5:89031b2f5316 1142
Charles MacNeill 5:89031b2f5316 1143
Charles MacNeill 5:89031b2f5316 1144 ptiming->range_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1145 ptiming->range_config__timeout_macrop_a_lo = 0x29;
Charles MacNeill 5:89031b2f5316 1146 ptiming->range_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1147 ptiming->range_config__timeout_macrop_b_lo = 0x22;
Charles MacNeill 5:89031b2f5316 1148
Charles MacNeill 5:89031b2f5316 1149
Charles MacNeill 5:89031b2f5316 1150
Charles MacNeill 5:89031b2f5316 1151 pgeneral->cal_config__vcsel_start = 0x09;
Charles MacNeill 5:89031b2f5316 1152
Charles MacNeill 5:89031b2f5316 1153
Charles MacNeill 5:89031b2f5316 1154
Charles MacNeill 5:89031b2f5316 1155 pgeneral->phasecal_config__timeout_macrop = 0xF5;
Charles MacNeill 5:89031b2f5316 1156
Charles MacNeill 5:89031b2f5316 1157
Charles MacNeill 5:89031b2f5316 1158
Charles MacNeill 5:89031b2f5316 1159 pdynamic->sd_config__woi_sd0 = 0x09;
Charles MacNeill 5:89031b2f5316 1160 pdynamic->sd_config__woi_sd1 = 0x0B;
Charles MacNeill 5:89031b2f5316 1161 pdynamic->sd_config__initial_phase_sd0 =
Charles MacNeill 5:89031b2f5316 1162 ptuning_parms->tp_init_phase_rtn_hist_long;
Charles MacNeill 5:89031b2f5316 1163 pdynamic->sd_config__initial_phase_sd1 =
Charles MacNeill 5:89031b2f5316 1164 ptuning_parms->tp_init_phase_ref_hist_long;
Charles MacNeill 5:89031b2f5316 1165
Charles MacNeill 5:89031b2f5316 1166
Charles MacNeill 5:89031b2f5316 1167
Charles MacNeill 5:89031b2f5316 1168 phistpostprocess->valid_phase_low = 0x08;
Charles MacNeill 5:89031b2f5316 1169 phistpostprocess->valid_phase_high = 0x88;
Charles MacNeill 5:89031b2f5316 1170
Charles MacNeill 5:89031b2f5316 1171 pdynamic->system__sequence_config =
Charles MacNeill 5:89031b2f5316 1172 VL53LX_SEQUENCE_VHV_EN |
Charles MacNeill 5:89031b2f5316 1173 VL53LX_SEQUENCE_PHASECAL_EN |
Charles MacNeill 5:89031b2f5316 1174 VL53LX_SEQUENCE_DSS1_EN |
Charles MacNeill 5:89031b2f5316 1175 VL53LX_SEQUENCE_DSS2_EN |
Charles MacNeill 5:89031b2f5316 1176 VL53LX_SEQUENCE_RANGE_EN;
Charles MacNeill 5:89031b2f5316 1177
Charles MacNeill 5:89031b2f5316 1178
Charles MacNeill 5:89031b2f5316 1179
Charles MacNeill 5:89031b2f5316 1180
Charles MacNeill 5:89031b2f5316 1181 psystem->system__mode_start =
Charles MacNeill 5:89031b2f5316 1182 VL53LX_DEVICESCHEDULERMODE_HISTOGRAM |
Charles MacNeill 5:89031b2f5316 1183 VL53LX_DEVICEREADOUTMODE_DUAL_SD |
Charles MacNeill 5:89031b2f5316 1184 VL53LX_DEVICEMEASUREMENTMODE_BACKTOBACK;
Charles MacNeill 5:89031b2f5316 1185 }
Charles MacNeill 5:89031b2f5316 1186
Charles MacNeill 5:89031b2f5316 1187 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1188
Charles MacNeill 5:89031b2f5316 1189 return status;
Charles MacNeill 5:89031b2f5316 1190 }
Charles MacNeill 5:89031b2f5316 1191
Charles MacNeill 5:89031b2f5316 1192
Charles MacNeill 5:89031b2f5316 1193 VL53LX_Error VL53LX_preset_mode_histogram_medium_range(
Charles MacNeill 5:89031b2f5316 1194 VL53LX_hist_post_process_config_t *phistpostprocess,
Charles MacNeill 5:89031b2f5316 1195 VL53LX_static_config_t *pstatic,
Charles MacNeill 5:89031b2f5316 1196 VL53LX_histogram_config_t *phistogram,
Charles MacNeill 5:89031b2f5316 1197 VL53LX_general_config_t *pgeneral,
Charles MacNeill 5:89031b2f5316 1198 VL53LX_timing_config_t *ptiming,
Charles MacNeill 5:89031b2f5316 1199 VL53LX_dynamic_config_t *pdynamic,
Charles MacNeill 5:89031b2f5316 1200 VL53LX_system_control_t *psystem,
Charles MacNeill 5:89031b2f5316 1201 VL53LX_tuning_parm_storage_t *ptuning_parms,
Charles MacNeill 5:89031b2f5316 1202 VL53LX_zone_config_t *pzone_cfg)
Charles MacNeill 5:89031b2f5316 1203 {
Charles MacNeill 5:89031b2f5316 1204
Charles MacNeill 5:89031b2f5316 1205
Charles MacNeill 5:89031b2f5316 1206 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1207
Charles MacNeill 5:89031b2f5316 1208 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1209
Charles MacNeill 5:89031b2f5316 1210
Charles MacNeill 5:89031b2f5316 1211
Charles MacNeill 5:89031b2f5316 1212 status =
Charles MacNeill 5:89031b2f5316 1213 VL53LX_preset_mode_histogram_ranging(
Charles MacNeill 5:89031b2f5316 1214 phistpostprocess,
Charles MacNeill 5:89031b2f5316 1215 pstatic,
Charles MacNeill 5:89031b2f5316 1216 phistogram,
Charles MacNeill 5:89031b2f5316 1217 pgeneral,
Charles MacNeill 5:89031b2f5316 1218 ptiming,
Charles MacNeill 5:89031b2f5316 1219 pdynamic,
Charles MacNeill 5:89031b2f5316 1220 psystem,
Charles MacNeill 5:89031b2f5316 1221 ptuning_parms,
Charles MacNeill 5:89031b2f5316 1222 pzone_cfg);
Charles MacNeill 5:89031b2f5316 1223
Charles MacNeill 5:89031b2f5316 1224
Charles MacNeill 5:89031b2f5316 1225
Charles MacNeill 5:89031b2f5316 1226 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1227
Charles MacNeill 5:89031b2f5316 1228
Charles MacNeill 5:89031b2f5316 1229
Charles MacNeill 5:89031b2f5316 1230
Charles MacNeill 5:89031b2f5316 1231
Charles MacNeill 5:89031b2f5316 1232 VL53LX_init_histogram_config_structure(
Charles MacNeill 5:89031b2f5316 1233 7, 0, 1, 1, 2, 2,
Charles MacNeill 5:89031b2f5316 1234 0, 1, 2, 1, 2, 3,
Charles MacNeill 5:89031b2f5316 1235 phistogram);
Charles MacNeill 5:89031b2f5316 1236
Charles MacNeill 5:89031b2f5316 1237
Charles MacNeill 5:89031b2f5316 1238 VL53LX_init_histogram_multizone_config_structure(
Charles MacNeill 5:89031b2f5316 1239 7, 0, 1, 1, 2, 2,
Charles MacNeill 5:89031b2f5316 1240 0, 1, 2, 1, 2, 3,
Charles MacNeill 5:89031b2f5316 1241 &(pzone_cfg->multizone_hist_cfg));
Charles MacNeill 5:89031b2f5316 1242
Charles MacNeill 5:89031b2f5316 1243
Charles MacNeill 5:89031b2f5316 1244
Charles MacNeill 5:89031b2f5316 1245 VL53LX_copy_hist_cfg_to_static_cfg(
Charles MacNeill 5:89031b2f5316 1246 phistogram,
Charles MacNeill 5:89031b2f5316 1247 pstatic,
Charles MacNeill 5:89031b2f5316 1248 pgeneral,
Charles MacNeill 5:89031b2f5316 1249 ptiming,
Charles MacNeill 5:89031b2f5316 1250 pdynamic);
Charles MacNeill 5:89031b2f5316 1251
Charles MacNeill 5:89031b2f5316 1252
Charles MacNeill 5:89031b2f5316 1253
Charles MacNeill 5:89031b2f5316 1254 ptiming->range_config__vcsel_period_a = 0x05;
Charles MacNeill 5:89031b2f5316 1255 ptiming->range_config__vcsel_period_b = 0x07;
Charles MacNeill 5:89031b2f5316 1256
Charles MacNeill 5:89031b2f5316 1257
Charles MacNeill 5:89031b2f5316 1258
Charles MacNeill 5:89031b2f5316 1259 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1260 ptiming->mm_config__timeout_macrop_a_lo = 0x36;
Charles MacNeill 5:89031b2f5316 1261 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1262 ptiming->mm_config__timeout_macrop_b_lo = 0x28;
Charles MacNeill 5:89031b2f5316 1263
Charles MacNeill 5:89031b2f5316 1264
Charles MacNeill 5:89031b2f5316 1265
Charles MacNeill 5:89031b2f5316 1266 ptiming->range_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1267 ptiming->range_config__timeout_macrop_a_lo = 0x44;
Charles MacNeill 5:89031b2f5316 1268 ptiming->range_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1269 ptiming->range_config__timeout_macrop_b_lo = 0x33;
Charles MacNeill 5:89031b2f5316 1270
Charles MacNeill 5:89031b2f5316 1271
Charles MacNeill 5:89031b2f5316 1272
Charles MacNeill 5:89031b2f5316 1273 pgeneral->cal_config__vcsel_start = 0x05;
Charles MacNeill 5:89031b2f5316 1274
Charles MacNeill 5:89031b2f5316 1275
Charles MacNeill 5:89031b2f5316 1276
Charles MacNeill 5:89031b2f5316 1277 pgeneral->phasecal_config__timeout_macrop = 0xF5;
Charles MacNeill 5:89031b2f5316 1278
Charles MacNeill 5:89031b2f5316 1279
Charles MacNeill 5:89031b2f5316 1280
Charles MacNeill 5:89031b2f5316 1281 pdynamic->sd_config__woi_sd0 = 0x05;
Charles MacNeill 5:89031b2f5316 1282 pdynamic->sd_config__woi_sd1 = 0x07;
Charles MacNeill 5:89031b2f5316 1283 pdynamic->sd_config__initial_phase_sd0 =
Charles MacNeill 5:89031b2f5316 1284 ptuning_parms->tp_init_phase_rtn_hist_med;
Charles MacNeill 5:89031b2f5316 1285 pdynamic->sd_config__initial_phase_sd1 =
Charles MacNeill 5:89031b2f5316 1286 ptuning_parms->tp_init_phase_ref_hist_med;
Charles MacNeill 5:89031b2f5316 1287
Charles MacNeill 5:89031b2f5316 1288
Charles MacNeill 5:89031b2f5316 1289
Charles MacNeill 5:89031b2f5316 1290 phistpostprocess->valid_phase_low = 0x08;
Charles MacNeill 5:89031b2f5316 1291 phistpostprocess->valid_phase_high = 0x48;
Charles MacNeill 5:89031b2f5316 1292
Charles MacNeill 5:89031b2f5316 1293 pdynamic->system__sequence_config =
Charles MacNeill 5:89031b2f5316 1294 VL53LX_SEQUENCE_VHV_EN |
Charles MacNeill 5:89031b2f5316 1295 VL53LX_SEQUENCE_PHASECAL_EN |
Charles MacNeill 5:89031b2f5316 1296 VL53LX_SEQUENCE_DSS1_EN |
Charles MacNeill 5:89031b2f5316 1297 VL53LX_SEQUENCE_DSS2_EN |
Charles MacNeill 5:89031b2f5316 1298 VL53LX_SEQUENCE_RANGE_EN;
Charles MacNeill 5:89031b2f5316 1299
Charles MacNeill 5:89031b2f5316 1300
Charles MacNeill 5:89031b2f5316 1301
Charles MacNeill 5:89031b2f5316 1302
Charles MacNeill 5:89031b2f5316 1303 psystem->system__mode_start =
Charles MacNeill 5:89031b2f5316 1304 VL53LX_DEVICESCHEDULERMODE_HISTOGRAM |
Charles MacNeill 5:89031b2f5316 1305 VL53LX_DEVICEREADOUTMODE_DUAL_SD |
Charles MacNeill 5:89031b2f5316 1306 VL53LX_DEVICEMEASUREMENTMODE_BACKTOBACK;
Charles MacNeill 5:89031b2f5316 1307 }
Charles MacNeill 5:89031b2f5316 1308
Charles MacNeill 5:89031b2f5316 1309 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1310
Charles MacNeill 5:89031b2f5316 1311 return status;
Charles MacNeill 5:89031b2f5316 1312 }
Charles MacNeill 5:89031b2f5316 1313
Charles MacNeill 5:89031b2f5316 1314
Charles MacNeill 5:89031b2f5316 1315 VL53LX_Error VL53LX_preset_mode_histogram_short_range(
Charles MacNeill 5:89031b2f5316 1316 VL53LX_hist_post_process_config_t *phistpostprocess,
Charles MacNeill 5:89031b2f5316 1317 VL53LX_static_config_t *pstatic,
Charles MacNeill 5:89031b2f5316 1318 VL53LX_histogram_config_t *phistogram,
Charles MacNeill 5:89031b2f5316 1319 VL53LX_general_config_t *pgeneral,
Charles MacNeill 5:89031b2f5316 1320 VL53LX_timing_config_t *ptiming,
Charles MacNeill 5:89031b2f5316 1321 VL53LX_dynamic_config_t *pdynamic,
Charles MacNeill 5:89031b2f5316 1322 VL53LX_system_control_t *psystem,
Charles MacNeill 5:89031b2f5316 1323 VL53LX_tuning_parm_storage_t *ptuning_parms,
Charles MacNeill 5:89031b2f5316 1324 VL53LX_zone_config_t *pzone_cfg)
Charles MacNeill 5:89031b2f5316 1325 {
Charles MacNeill 5:89031b2f5316 1326
Charles MacNeill 5:89031b2f5316 1327
Charles MacNeill 5:89031b2f5316 1328 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1329
Charles MacNeill 5:89031b2f5316 1330 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1331
Charles MacNeill 5:89031b2f5316 1332
Charles MacNeill 5:89031b2f5316 1333
Charles MacNeill 5:89031b2f5316 1334 status =
Charles MacNeill 5:89031b2f5316 1335 VL53LX_preset_mode_histogram_ranging(
Charles MacNeill 5:89031b2f5316 1336 phistpostprocess,
Charles MacNeill 5:89031b2f5316 1337 pstatic,
Charles MacNeill 5:89031b2f5316 1338 phistogram,
Charles MacNeill 5:89031b2f5316 1339 pgeneral,
Charles MacNeill 5:89031b2f5316 1340 ptiming,
Charles MacNeill 5:89031b2f5316 1341 pdynamic,
Charles MacNeill 5:89031b2f5316 1342 psystem,
Charles MacNeill 5:89031b2f5316 1343 ptuning_parms,
Charles MacNeill 5:89031b2f5316 1344 pzone_cfg);
Charles MacNeill 5:89031b2f5316 1345
Charles MacNeill 5:89031b2f5316 1346
Charles MacNeill 5:89031b2f5316 1347
Charles MacNeill 5:89031b2f5316 1348 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1349
Charles MacNeill 5:89031b2f5316 1350
Charles MacNeill 5:89031b2f5316 1351
Charles MacNeill 5:89031b2f5316 1352
Charles MacNeill 5:89031b2f5316 1353
Charles MacNeill 5:89031b2f5316 1354 VL53LX_init_histogram_config_structure(
Charles MacNeill 5:89031b2f5316 1355 7, 7, 0, 1, 1, 1,
Charles MacNeill 5:89031b2f5316 1356 0, 1, 1, 1, 2, 2,
Charles MacNeill 5:89031b2f5316 1357 phistogram);
Charles MacNeill 5:89031b2f5316 1358
Charles MacNeill 5:89031b2f5316 1359
Charles MacNeill 5:89031b2f5316 1360 VL53LX_init_histogram_multizone_config_structure(
Charles MacNeill 5:89031b2f5316 1361 7, 7, 0, 1, 1, 1,
Charles MacNeill 5:89031b2f5316 1362 0, 1, 1, 1, 2, 2,
Charles MacNeill 5:89031b2f5316 1363 &(pzone_cfg->multizone_hist_cfg));
Charles MacNeill 5:89031b2f5316 1364
Charles MacNeill 5:89031b2f5316 1365
Charles MacNeill 5:89031b2f5316 1366
Charles MacNeill 5:89031b2f5316 1367 VL53LX_copy_hist_cfg_to_static_cfg(
Charles MacNeill 5:89031b2f5316 1368 phistogram,
Charles MacNeill 5:89031b2f5316 1369 pstatic,
Charles MacNeill 5:89031b2f5316 1370 pgeneral,
Charles MacNeill 5:89031b2f5316 1371 ptiming,
Charles MacNeill 5:89031b2f5316 1372 pdynamic);
Charles MacNeill 5:89031b2f5316 1373
Charles MacNeill 5:89031b2f5316 1374
Charles MacNeill 5:89031b2f5316 1375
Charles MacNeill 5:89031b2f5316 1376 ptiming->range_config__vcsel_period_a = 0x03;
Charles MacNeill 5:89031b2f5316 1377 ptiming->range_config__vcsel_period_b = 0x05;
Charles MacNeill 5:89031b2f5316 1378
Charles MacNeill 5:89031b2f5316 1379
Charles MacNeill 5:89031b2f5316 1380
Charles MacNeill 5:89031b2f5316 1381 ptiming->mm_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1382 ptiming->mm_config__timeout_macrop_a_lo = 0x52;
Charles MacNeill 5:89031b2f5316 1383 ptiming->mm_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1384 ptiming->mm_config__timeout_macrop_b_lo = 0x37;
Charles MacNeill 5:89031b2f5316 1385
Charles MacNeill 5:89031b2f5316 1386
Charles MacNeill 5:89031b2f5316 1387
Charles MacNeill 5:89031b2f5316 1388 ptiming->range_config__timeout_macrop_a_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1389 ptiming->range_config__timeout_macrop_a_lo = 0x66;
Charles MacNeill 5:89031b2f5316 1390 ptiming->range_config__timeout_macrop_b_hi = 0x00;
Charles MacNeill 5:89031b2f5316 1391 ptiming->range_config__timeout_macrop_b_lo = 0x44;
Charles MacNeill 5:89031b2f5316 1392
Charles MacNeill 5:89031b2f5316 1393
Charles MacNeill 5:89031b2f5316 1394
Charles MacNeill 5:89031b2f5316 1395 pgeneral->cal_config__vcsel_start = 0x03;
Charles MacNeill 5:89031b2f5316 1396
Charles MacNeill 5:89031b2f5316 1397
Charles MacNeill 5:89031b2f5316 1398
Charles MacNeill 5:89031b2f5316 1399 pgeneral->phasecal_config__timeout_macrop = 0xF5;
Charles MacNeill 5:89031b2f5316 1400
Charles MacNeill 5:89031b2f5316 1401
Charles MacNeill 5:89031b2f5316 1402
Charles MacNeill 5:89031b2f5316 1403 pdynamic->sd_config__woi_sd0 = 0x03;
Charles MacNeill 5:89031b2f5316 1404 pdynamic->sd_config__woi_sd1 = 0x05;
Charles MacNeill 5:89031b2f5316 1405 pdynamic->sd_config__initial_phase_sd0 =
Charles MacNeill 5:89031b2f5316 1406 ptuning_parms->tp_init_phase_rtn_hist_short;
Charles MacNeill 5:89031b2f5316 1407 pdynamic->sd_config__initial_phase_sd1 =
Charles MacNeill 5:89031b2f5316 1408 ptuning_parms->tp_init_phase_ref_hist_short;
Charles MacNeill 5:89031b2f5316 1409
Charles MacNeill 5:89031b2f5316 1410
Charles MacNeill 5:89031b2f5316 1411 phistpostprocess->valid_phase_low = 0x08;
Charles MacNeill 5:89031b2f5316 1412 phistpostprocess->valid_phase_high = 0x28;
Charles MacNeill 5:89031b2f5316 1413
Charles MacNeill 5:89031b2f5316 1414 pdynamic->system__sequence_config =
Charles MacNeill 5:89031b2f5316 1415 VL53LX_SEQUENCE_VHV_EN |
Charles MacNeill 5:89031b2f5316 1416 VL53LX_SEQUENCE_PHASECAL_EN |
Charles MacNeill 5:89031b2f5316 1417 VL53LX_SEQUENCE_DSS1_EN |
Charles MacNeill 5:89031b2f5316 1418 VL53LX_SEQUENCE_DSS2_EN |
Charles MacNeill 5:89031b2f5316 1419 VL53LX_SEQUENCE_MM1_EN |
Charles MacNeill 5:89031b2f5316 1420
Charles MacNeill 5:89031b2f5316 1421 VL53LX_SEQUENCE_RANGE_EN;
Charles MacNeill 5:89031b2f5316 1422
Charles MacNeill 5:89031b2f5316 1423
Charles MacNeill 5:89031b2f5316 1424
Charles MacNeill 5:89031b2f5316 1425
Charles MacNeill 5:89031b2f5316 1426 psystem->system__mode_start =
Charles MacNeill 5:89031b2f5316 1427 VL53LX_DEVICESCHEDULERMODE_HISTOGRAM |
Charles MacNeill 5:89031b2f5316 1428 VL53LX_DEVICEREADOUTMODE_DUAL_SD |
Charles MacNeill 5:89031b2f5316 1429 VL53LX_DEVICEMEASUREMENTMODE_BACKTOBACK;
Charles MacNeill 5:89031b2f5316 1430 }
Charles MacNeill 5:89031b2f5316 1431
Charles MacNeill 5:89031b2f5316 1432 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1433
Charles MacNeill 5:89031b2f5316 1434 return status;
Charles MacNeill 5:89031b2f5316 1435 }
Charles MacNeill 5:89031b2f5316 1436
Charles MacNeill 5:89031b2f5316 1437
Charles MacNeill 5:89031b2f5316 1438 void VL53LX_copy_hist_cfg_to_static_cfg(
Charles MacNeill 5:89031b2f5316 1439 VL53LX_histogram_config_t *phistogram,
Charles MacNeill 5:89031b2f5316 1440 VL53LX_static_config_t *pstatic,
Charles MacNeill 5:89031b2f5316 1441 VL53LX_general_config_t *pgeneral,
Charles MacNeill 5:89031b2f5316 1442 VL53LX_timing_config_t *ptiming,
Charles MacNeill 5:89031b2f5316 1443 VL53LX_dynamic_config_t *pdynamic)
Charles MacNeill 5:89031b2f5316 1444 {
Charles MacNeill 5:89031b2f5316 1445
Charles MacNeill 5:89031b2f5316 1446
Charles MacNeill 5:89031b2f5316 1447 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1448
Charles MacNeill 5:89031b2f5316 1449 SUPPRESS_UNUSED_WARNING(pgeneral);
Charles MacNeill 5:89031b2f5316 1450
Charles MacNeill 5:89031b2f5316 1451 pstatic->sigma_estimator__effective_pulse_width_ns =
Charles MacNeill 5:89031b2f5316 1452 phistogram->histogram_config__high_amb_even_bin_0_1;
Charles MacNeill 5:89031b2f5316 1453 pstatic->sigma_estimator__effective_ambient_width_ns =
Charles MacNeill 5:89031b2f5316 1454 phistogram->histogram_config__high_amb_even_bin_2_3;
Charles MacNeill 5:89031b2f5316 1455 pstatic->sigma_estimator__sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 1456 phistogram->histogram_config__high_amb_even_bin_4_5;
Charles MacNeill 5:89031b2f5316 1457
Charles MacNeill 5:89031b2f5316 1458 pstatic->algo__crosstalk_compensation_valid_height_mm =
Charles MacNeill 5:89031b2f5316 1459 phistogram->histogram_config__high_amb_odd_bin_0_1;
Charles MacNeill 5:89031b2f5316 1460
Charles MacNeill 5:89031b2f5316 1461 pstatic->spare_host_config__static_config_spare_0 =
Charles MacNeill 5:89031b2f5316 1462 phistogram->histogram_config__high_amb_odd_bin_2_3;
Charles MacNeill 5:89031b2f5316 1463 pstatic->spare_host_config__static_config_spare_1 =
Charles MacNeill 5:89031b2f5316 1464 phistogram->histogram_config__high_amb_odd_bin_4_5;
Charles MacNeill 5:89031b2f5316 1465
Charles MacNeill 5:89031b2f5316 1466 pstatic->algo__range_ignore_threshold_mcps =
Charles MacNeill 5:89031b2f5316 1467 (((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1)
Charles MacNeill 5:89031b2f5316 1468 << 8)
Charles MacNeill 5:89031b2f5316 1469 + (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3;
Charles MacNeill 5:89031b2f5316 1470
Charles MacNeill 5:89031b2f5316 1471 pstatic->algo__range_ignore_valid_height_mm =
Charles MacNeill 5:89031b2f5316 1472 phistogram->histogram_config__mid_amb_even_bin_4_5;
Charles MacNeill 5:89031b2f5316 1473 pstatic->algo__range_min_clip =
Charles MacNeill 5:89031b2f5316 1474 phistogram->histogram_config__mid_amb_odd_bin_0_1;
Charles MacNeill 5:89031b2f5316 1475 pstatic->algo__consistency_check__tolerance =
Charles MacNeill 5:89031b2f5316 1476 phistogram->histogram_config__mid_amb_odd_bin_2;
Charles MacNeill 5:89031b2f5316 1477
Charles MacNeill 5:89031b2f5316 1478 pstatic->spare_host_config__static_config_spare_2 =
Charles MacNeill 5:89031b2f5316 1479 phistogram->histogram_config__mid_amb_odd_bin_3_4;
Charles MacNeill 5:89031b2f5316 1480 pstatic->sd_config__reset_stages_msb =
Charles MacNeill 5:89031b2f5316 1481 phistogram->histogram_config__mid_amb_odd_bin_5;
Charles MacNeill 5:89031b2f5316 1482
Charles MacNeill 5:89031b2f5316 1483 pstatic->sd_config__reset_stages_lsb =
Charles MacNeill 5:89031b2f5316 1484 phistogram->histogram_config__user_bin_offset;
Charles MacNeill 5:89031b2f5316 1485
Charles MacNeill 5:89031b2f5316 1486 ptiming->range_config__sigma_thresh =
Charles MacNeill 5:89031b2f5316 1487 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1)
Charles MacNeill 5:89031b2f5316 1488 << 8)
Charles MacNeill 5:89031b2f5316 1489 + (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3;
Charles MacNeill 5:89031b2f5316 1490
Charles MacNeill 5:89031b2f5316 1491 ptiming->range_config__min_count_rate_rtn_limit_mcps =
Charles MacNeill 5:89031b2f5316 1492 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5)
Charles MacNeill 5:89031b2f5316 1493 << 8)
Charles MacNeill 5:89031b2f5316 1494 + (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1;
Charles MacNeill 5:89031b2f5316 1495
Charles MacNeill 5:89031b2f5316 1496 ptiming->range_config__valid_phase_low =
Charles MacNeill 5:89031b2f5316 1497 phistogram->histogram_config__low_amb_odd_bin_2_3;
Charles MacNeill 5:89031b2f5316 1498 ptiming->range_config__valid_phase_high =
Charles MacNeill 5:89031b2f5316 1499 phistogram->histogram_config__low_amb_odd_bin_4_5;
Charles MacNeill 5:89031b2f5316 1500
Charles MacNeill 5:89031b2f5316 1501 pdynamic->system__thresh_high =
Charles MacNeill 5:89031b2f5316 1502 phistogram->histogram_config__amb_thresh_low;
Charles MacNeill 5:89031b2f5316 1503
Charles MacNeill 5:89031b2f5316 1504 pdynamic->system__thresh_low =
Charles MacNeill 5:89031b2f5316 1505 phistogram->histogram_config__amb_thresh_high;
Charles MacNeill 5:89031b2f5316 1506
Charles MacNeill 5:89031b2f5316 1507 pdynamic->system__enable_xtalk_per_quadrant =
Charles MacNeill 5:89031b2f5316 1508 phistogram->histogram_config__spad_array_selection;
Charles MacNeill 5:89031b2f5316 1509
Charles MacNeill 5:89031b2f5316 1510 LOG_FUNCTION_END(0);
Charles MacNeill 5:89031b2f5316 1511
Charles MacNeill 5:89031b2f5316 1512 }
Charles MacNeill 5:89031b2f5316 1513
Charles MacNeill 5:89031b2f5316 1514 void VL53LX_copy_hist_bins_to_static_cfg(
Charles MacNeill 5:89031b2f5316 1515 VL53LX_histogram_config_t *phistogram,
Charles MacNeill 5:89031b2f5316 1516 VL53LX_static_config_t *pstatic,
Charles MacNeill 5:89031b2f5316 1517 VL53LX_timing_config_t *ptiming)
Charles MacNeill 5:89031b2f5316 1518 {
Charles MacNeill 5:89031b2f5316 1519
Charles MacNeill 5:89031b2f5316 1520
Charles MacNeill 5:89031b2f5316 1521 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1522
Charles MacNeill 5:89031b2f5316 1523 pstatic->sigma_estimator__effective_pulse_width_ns =
Charles MacNeill 5:89031b2f5316 1524 phistogram->histogram_config__high_amb_even_bin_0_1;
Charles MacNeill 5:89031b2f5316 1525 pstatic->sigma_estimator__effective_ambient_width_ns =
Charles MacNeill 5:89031b2f5316 1526 phistogram->histogram_config__high_amb_even_bin_2_3;
Charles MacNeill 5:89031b2f5316 1527 pstatic->sigma_estimator__sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 1528 phistogram->histogram_config__high_amb_even_bin_4_5;
Charles MacNeill 5:89031b2f5316 1529
Charles MacNeill 5:89031b2f5316 1530 pstatic->algo__crosstalk_compensation_valid_height_mm =
Charles MacNeill 5:89031b2f5316 1531 phistogram->histogram_config__high_amb_odd_bin_0_1;
Charles MacNeill 5:89031b2f5316 1532
Charles MacNeill 5:89031b2f5316 1533 pstatic->spare_host_config__static_config_spare_0 =
Charles MacNeill 5:89031b2f5316 1534 phistogram->histogram_config__high_amb_odd_bin_2_3;
Charles MacNeill 5:89031b2f5316 1535 pstatic->spare_host_config__static_config_spare_1 =
Charles MacNeill 5:89031b2f5316 1536 phistogram->histogram_config__high_amb_odd_bin_4_5;
Charles MacNeill 5:89031b2f5316 1537
Charles MacNeill 5:89031b2f5316 1538 pstatic->algo__range_ignore_threshold_mcps =
Charles MacNeill 5:89031b2f5316 1539 (((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1)
Charles MacNeill 5:89031b2f5316 1540 << 8)
Charles MacNeill 5:89031b2f5316 1541 + (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3;
Charles MacNeill 5:89031b2f5316 1542
Charles MacNeill 5:89031b2f5316 1543 pstatic->algo__range_ignore_valid_height_mm =
Charles MacNeill 5:89031b2f5316 1544 phistogram->histogram_config__mid_amb_even_bin_4_5;
Charles MacNeill 5:89031b2f5316 1545 pstatic->algo__range_min_clip =
Charles MacNeill 5:89031b2f5316 1546 phistogram->histogram_config__mid_amb_odd_bin_0_1;
Charles MacNeill 5:89031b2f5316 1547 pstatic->algo__consistency_check__tolerance =
Charles MacNeill 5:89031b2f5316 1548 phistogram->histogram_config__mid_amb_odd_bin_2;
Charles MacNeill 5:89031b2f5316 1549
Charles MacNeill 5:89031b2f5316 1550 pstatic->spare_host_config__static_config_spare_2 =
Charles MacNeill 5:89031b2f5316 1551 phistogram->histogram_config__mid_amb_odd_bin_3_4;
Charles MacNeill 5:89031b2f5316 1552 pstatic->sd_config__reset_stages_msb =
Charles MacNeill 5:89031b2f5316 1553 phistogram->histogram_config__mid_amb_odd_bin_5;
Charles MacNeill 5:89031b2f5316 1554
Charles MacNeill 5:89031b2f5316 1555 ptiming->range_config__sigma_thresh =
Charles MacNeill 5:89031b2f5316 1556 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1)
Charles MacNeill 5:89031b2f5316 1557 << 8)
Charles MacNeill 5:89031b2f5316 1558 + (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3;
Charles MacNeill 5:89031b2f5316 1559
Charles MacNeill 5:89031b2f5316 1560 ptiming->range_config__min_count_rate_rtn_limit_mcps =
Charles MacNeill 5:89031b2f5316 1561 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5)
Charles MacNeill 5:89031b2f5316 1562 << 8)
Charles MacNeill 5:89031b2f5316 1563 + (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1;
Charles MacNeill 5:89031b2f5316 1564
Charles MacNeill 5:89031b2f5316 1565 ptiming->range_config__valid_phase_low =
Charles MacNeill 5:89031b2f5316 1566 phistogram->histogram_config__low_amb_odd_bin_2_3;
Charles MacNeill 5:89031b2f5316 1567 ptiming->range_config__valid_phase_high =
Charles MacNeill 5:89031b2f5316 1568 phistogram->histogram_config__low_amb_odd_bin_4_5;
Charles MacNeill 5:89031b2f5316 1569
Charles MacNeill 5:89031b2f5316 1570 LOG_FUNCTION_END(0);
Charles MacNeill 5:89031b2f5316 1571
Charles MacNeill 5:89031b2f5316 1572 }
Charles MacNeill 5:89031b2f5316 1573
Charles MacNeill 5:89031b2f5316 1574
Charles MacNeill 5:89031b2f5316 1575