ST Expansion SW Team / VL53L3CX_mbed

Rename library

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L3CX_NoShield_1Sensor_poll_Mb06x VL53L3_NoShield_1Sensor_polling_Mb63 X_NUCLEO_53L3A2 53L3A2_Ranging

modules/vl53lx_api_core.c@7:7f1bbf370283, 2021-07-21 (annotated)

Committer:
charlesmn
Date:
Wed Jul 21 14:07:59 2021 +0000
Revision:
7:7f1bbf370283
Parent:
5:89031b2f5316 
Moved vl53l3cx_class.cpp and .h to 53l3a2_RangingClass

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Charles MacNeill 5:89031b2f5316 1
Charles MacNeill 5:89031b2f5316 2 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Charles MacNeill 5:89031b2f5316 3 /******************************************************************************
Charles MacNeill 5:89031b2f5316 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
Charles MacNeill 5:89031b2f5316 5
Charles MacNeill 5:89031b2f5316 6 This file is part of VL53LX and is dual licensed,
Charles MacNeill 5:89031b2f5316 7 either GPL-2.0+
Charles MacNeill 5:89031b2f5316 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 5:89031b2f5316 9 ******************************************************************************
Charles MacNeill 5:89031b2f5316 10 */
Charles MacNeill 5:89031b2f5316 11
Charles MacNeill 5:89031b2f5316 12
Charles MacNeill 5:89031b2f5316 13
Charles MacNeill 5:89031b2f5316 14
Charles MacNeill 5:89031b2f5316 15
Charles MacNeill 5:89031b2f5316 16 #include "vl53lx_platform.h"
Charles MacNeill 5:89031b2f5316 17 #include "vl53lx_platform_ipp.h"
Charles MacNeill 5:89031b2f5316 18 #include "vl53lx_ll_def.h"
Charles MacNeill 5:89031b2f5316 19 #include "vl53lx_ll_device.h"
Charles MacNeill 5:89031b2f5316 20 #include "vl53lx_register_map.h"
Charles MacNeill 5:89031b2f5316 21 #include "vl53lx_register_settings.h"
Charles MacNeill 5:89031b2f5316 22 #include "vl53lx_register_funcs.h"
Charles MacNeill 5:89031b2f5316 23 #include "vl53lx_hist_map.h"
Charles MacNeill 5:89031b2f5316 24 #include "vl53lx_hist_structs.h"
Charles MacNeill 5:89031b2f5316 25 #include "vl53lx_nvm_map.h"
Charles MacNeill 5:89031b2f5316 26 #include "vl53lx_nvm_structs.h"
Charles MacNeill 5:89031b2f5316 27 #include "vl53lx_nvm.h"
Charles MacNeill 5:89031b2f5316 28 #include "vl53lx_core.h"
Charles MacNeill 5:89031b2f5316 29 #include "vl53lx_wait.h"
Charles MacNeill 5:89031b2f5316 30 #include "vl53lx_api_preset_modes.h"
Charles MacNeill 5:89031b2f5316 31 #include "vl53lx_silicon_core.h"
Charles MacNeill 5:89031b2f5316 32 #include "vl53lx_api_core.h"
Charles MacNeill 5:89031b2f5316 33 #include "vl53lx_tuning_parm_defaults.h"
Charles MacNeill 5:89031b2f5316 34
Charles MacNeill 5:89031b2f5316 35 #ifdef VL53LX_LOG_ENABLE
Charles MacNeill 5:89031b2f5316 36 #include "vl53lx_api_debug.h"
Charles MacNeill 5:89031b2f5316 37 #endif
Charles MacNeill 5:89031b2f5316 38
Charles MacNeill 5:89031b2f5316 39 #define LOG_FUNCTION_START(fmt, ...) \
Charles MacNeill 5:89031b2f5316 40 _LOG_FUNCTION_START(VL53LX_TRACE_MODULE_CORE, fmt, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 41 #define LOG_FUNCTION_END(status, ...) \
Charles MacNeill 5:89031b2f5316 42 _LOG_FUNCTION_END(VL53LX_TRACE_MODULE_CORE, status, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 43 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
Charles MacNeill 5:89031b2f5316 44 _LOG_FUNCTION_END_FMT(VL53LX_TRACE_MODULE_CORE, status, \
Charles MacNeill 5:89031b2f5316 45 fmt, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 46
Charles MacNeill 5:89031b2f5316 47 #define trace_print(level, ...) \
Charles MacNeill 5:89031b2f5316 48 _LOG_TRACE_PRINT(VL53LX_TRACE_MODULE_CORE, \
Charles MacNeill 5:89031b2f5316 49 level, VL53LX_TRACE_FUNCTION_NONE, ##__VA_ARGS__)
Charles MacNeill 5:89031b2f5316 50
Charles MacNeill 5:89031b2f5316 51 #define VL53LX_MAX_I2C_XFER_SIZE 256
Charles MacNeill 5:89031b2f5316 52
Charles MacNeill 5:89031b2f5316 53 static VL53LX_Error select_offset_per_vcsel(VL53LX_LLDriverData_t *pdev,
Charles MacNeill 5:89031b2f5316 54 int16_t *poffset) {
Charles MacNeill 5:89031b2f5316 55 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 56 int16_t tA, tB;
Charles MacNeill 5:89031b2f5316 57 uint8_t isc;
Charles MacNeill 5:89031b2f5316 58
Charles MacNeill 5:89031b2f5316 59 switch (pdev->preset_mode) {
Charles MacNeill 5:89031b2f5316 60 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 61 tA = pdev->per_vcsel_cal_data.short_a_offset_mm;
Charles MacNeill 5:89031b2f5316 62 tB = pdev->per_vcsel_cal_data.short_b_offset_mm;
Charles MacNeill 5:89031b2f5316 63 break;
Charles MacNeill 5:89031b2f5316 64 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
Charles MacNeill 5:89031b2f5316 65 tA = pdev->per_vcsel_cal_data.medium_a_offset_mm;
Charles MacNeill 5:89031b2f5316 66 tB = pdev->per_vcsel_cal_data.medium_b_offset_mm;
Charles MacNeill 5:89031b2f5316 67 break;
Charles MacNeill 5:89031b2f5316 68 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 69 tA = pdev->per_vcsel_cal_data.long_a_offset_mm;
Charles MacNeill 5:89031b2f5316 70 tB = pdev->per_vcsel_cal_data.long_b_offset_mm;
Charles MacNeill 5:89031b2f5316 71 break;
Charles MacNeill 5:89031b2f5316 72 default:
Charles MacNeill 5:89031b2f5316 73 tA = pdev->per_vcsel_cal_data.long_a_offset_mm;
Charles MacNeill 5:89031b2f5316 74 tB = pdev->per_vcsel_cal_data.long_b_offset_mm;
Charles MacNeill 5:89031b2f5316 75 status = VL53LX_ERROR_INVALID_PARAMS;
Charles MacNeill 5:89031b2f5316 76 *poffset = 0;
Charles MacNeill 5:89031b2f5316 77 break;
Charles MacNeill 5:89031b2f5316 78 }
Charles MacNeill 5:89031b2f5316 79
Charles MacNeill 5:89031b2f5316 80 isc = pdev->ll_state.cfg_internal_stream_count;
Charles MacNeill 5:89031b2f5316 81 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 82 *poffset = (isc & 0x01) ? tA : tB;
Charles MacNeill 5:89031b2f5316 83
Charles MacNeill 5:89031b2f5316 84 return status;
Charles MacNeill 5:89031b2f5316 85 }
Charles MacNeill 5:89031b2f5316 86
Charles MacNeill 5:89031b2f5316 87 static void vl53lx_diff_histo_stddev(VL53LX_LLDriverData_t *pdev,
Charles MacNeill 5:89031b2f5316 88 VL53LX_histogram_bin_data_t *pdata, uint8_t timing, uint8_t HighIndex,
Charles MacNeill 5:89031b2f5316 89 uint8_t prev_pos, int32_t *pdiff_histo_stddev) {
Charles MacNeill 5:89031b2f5316 90 uint16_t bin = 0;
Charles MacNeill 5:89031b2f5316 91 int32_t total_rate_pre = 0;
Charles MacNeill 5:89031b2f5316 92 int32_t total_rate_cur = 0;
Charles MacNeill 5:89031b2f5316 93 int32_t PrevBin, CurrBin;
Charles MacNeill 5:89031b2f5316 94
Charles MacNeill 5:89031b2f5316 95 total_rate_pre = 0;
Charles MacNeill 5:89031b2f5316 96 total_rate_cur = 0;
Charles MacNeill 5:89031b2f5316 97
Charles MacNeill 5:89031b2f5316 98
Charles MacNeill 5:89031b2f5316 99 for (bin = timing * 4; bin < HighIndex; bin++) {
Charles MacNeill 5:89031b2f5316 100 total_rate_pre +=
Charles MacNeill 5:89031b2f5316 101 pdev->multi_bins_rec[prev_pos][timing][bin];
Charles MacNeill 5:89031b2f5316 102 total_rate_cur += pdata->bin_data[bin];
Charles MacNeill 5:89031b2f5316 103 }
Charles MacNeill 5:89031b2f5316 104
Charles MacNeill 5:89031b2f5316 105 if ((total_rate_pre != 0) && (total_rate_cur != 0))
Charles MacNeill 5:89031b2f5316 106 for (bin = timing * 4; bin < HighIndex; bin++) {
Charles MacNeill 5:89031b2f5316 107 PrevBin = pdev->multi_bins_rec[prev_pos][timing][bin];
Charles MacNeill 5:89031b2f5316 108 PrevBin = (PrevBin * 1000) / total_rate_pre;
Charles MacNeill 5:89031b2f5316 109 CurrBin = pdata->bin_data[bin] * 1000 / total_rate_cur;
Charles MacNeill 5:89031b2f5316 110 *pdiff_histo_stddev += (PrevBin - CurrBin) *
Charles MacNeill 5:89031b2f5316 111 (PrevBin - CurrBin);
Charles MacNeill 5:89031b2f5316 112 }
Charles MacNeill 5:89031b2f5316 113 }
Charles MacNeill 5:89031b2f5316 114
Charles MacNeill 5:89031b2f5316 115 static void vl53lx_histo_merge(VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 116 VL53LX_histogram_bin_data_t *pdata) {
Charles MacNeill 5:89031b2f5316 117 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 118 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 119 uint16_t bin = 0;
Charles MacNeill 5:89031b2f5316 120 uint8_t i = 0;
Charles MacNeill 5:89031b2f5316 121 int32_t TuningBinRecSize = 0;
Charles MacNeill 5:89031b2f5316 122 uint8_t recom_been_reset = 0;
Charles MacNeill 5:89031b2f5316 123 uint8_t timing = 0;
Charles MacNeill 5:89031b2f5316 124 int32_t rmt = 0;
Charles MacNeill 5:89031b2f5316 125 int32_t diff_histo_stddev = 0;
Charles MacNeill 5:89031b2f5316 126 uint8_t HighIndex, prev_pos;
Charles MacNeill 5:89031b2f5316 127 uint8_t BuffSize = VL53LX_HISTOGRAM_BUFFER_SIZE;
Charles MacNeill 5:89031b2f5316 128 uint8_t pos;
Charles MacNeill 5:89031b2f5316 129
Charles MacNeill 5:89031b2f5316 130 VL53LX_get_tuning_parm(Dev, VL53LX_TUNINGPARM_HIST_MERGE_MAX_SIZE,
Charles MacNeill 5:89031b2f5316 131 &TuningBinRecSize);
Charles MacNeill 5:89031b2f5316 132
Charles MacNeill 5:89031b2f5316 133 VL53LX_get_tuning_parm(Dev, VL53LX_TUNINGPARM_RESET_MERGE_THRESHOLD,
Charles MacNeill 5:89031b2f5316 134 &rmt);
Charles MacNeill 5:89031b2f5316 135
Charles MacNeill 5:89031b2f5316 136
Charles MacNeill 5:89031b2f5316 137 if (pdev->pos_before_next_recom == 0) {
Charles MacNeill 5:89031b2f5316 138
Charles MacNeill 5:89031b2f5316 139 timing = 1 - pdata->result__stream_count % 2;
Charles MacNeill 5:89031b2f5316 140
Charles MacNeill 5:89031b2f5316 141 diff_histo_stddev = 0;
Charles MacNeill 5:89031b2f5316 142 HighIndex = BuffSize - timing * 4;
Charles MacNeill 5:89031b2f5316 143 if (pdev->bin_rec_pos > 0)
Charles MacNeill 5:89031b2f5316 144 prev_pos = pdev->bin_rec_pos - 1;
Charles MacNeill 5:89031b2f5316 145 else
Charles MacNeill 5:89031b2f5316 146 prev_pos = (TuningBinRecSize - 1);
Charles MacNeill 5:89031b2f5316 147
Charles MacNeill 5:89031b2f5316 148 if (pdev->multi_bins_rec[prev_pos][timing][4] > 0)
Charles MacNeill 5:89031b2f5316 149 vl53lx_diff_histo_stddev(pdev, pdata,
Charles MacNeill 5:89031b2f5316 150 timing, HighIndex, prev_pos,
Charles MacNeill 5:89031b2f5316 151 &diff_histo_stddev);
Charles MacNeill 5:89031b2f5316 152
Charles MacNeill 5:89031b2f5316 153 if (diff_histo_stddev >= rmt) {
Charles MacNeill 5:89031b2f5316 154 memset(pdev->multi_bins_rec, 0,
Charles MacNeill 5:89031b2f5316 155 sizeof(pdev->multi_bins_rec));
Charles MacNeill 5:89031b2f5316 156 pdev->bin_rec_pos = 0;
Charles MacNeill 5:89031b2f5316 157
Charles MacNeill 5:89031b2f5316 158 recom_been_reset = 1;
Charles MacNeill 5:89031b2f5316 159
Charles MacNeill 5:89031b2f5316 160 if (timing == 0)
Charles MacNeill 5:89031b2f5316 161 pdev->pos_before_next_recom =
Charles MacNeill 5:89031b2f5316 162 VL53LX_FRAME_WAIT_EVENT;
Charles MacNeill 5:89031b2f5316 163 else
Charles MacNeill 5:89031b2f5316 164 pdev->pos_before_next_recom =
Charles MacNeill 5:89031b2f5316 165 VL53LX_FRAME_WAIT_EVENT + 1;
Charles MacNeill 5:89031b2f5316 166 } else {
Charles MacNeill 5:89031b2f5316 167
Charles MacNeill 5:89031b2f5316 168 pos = pdev->bin_rec_pos;
Charles MacNeill 5:89031b2f5316 169 for (i = 0; i < BuffSize; i++)
Charles MacNeill 5:89031b2f5316 170 pdev->multi_bins_rec[pos][timing][i] =
Charles MacNeill 5:89031b2f5316 171 pdata->bin_data[i];
Charles MacNeill 5:89031b2f5316 172 }
Charles MacNeill 5:89031b2f5316 173
Charles MacNeill 5:89031b2f5316 174 if (pdev->bin_rec_pos == (TuningBinRecSize - 1) && timing == 1)
Charles MacNeill 5:89031b2f5316 175 pdev->bin_rec_pos = 0;
Charles MacNeill 5:89031b2f5316 176 else if (timing == 1)
Charles MacNeill 5:89031b2f5316 177 pdev->bin_rec_pos++;
Charles MacNeill 5:89031b2f5316 178
Charles MacNeill 5:89031b2f5316 179 if (!((recom_been_reset == 1) && (timing == 0)) &&
Charles MacNeill 5:89031b2f5316 180 (pdev->pos_before_next_recom == 0)) {
Charles MacNeill 5:89031b2f5316 181
Charles MacNeill 5:89031b2f5316 182 for (bin = 0; bin < BuffSize; bin++)
Charles MacNeill 5:89031b2f5316 183 pdata->bin_data[bin] = 0;
Charles MacNeill 5:89031b2f5316 184
Charles MacNeill 5:89031b2f5316 185 for (bin = 0; bin < BuffSize; bin++)
Charles MacNeill 5:89031b2f5316 186 for (i = 0; i < TuningBinRecSize; i++)
Charles MacNeill 5:89031b2f5316 187 pdata->bin_data[bin] +=
Charles MacNeill 5:89031b2f5316 188 (pdev->multi_bins_rec[i][timing][bin]);
Charles MacNeill 5:89031b2f5316 189 }
Charles MacNeill 5:89031b2f5316 190 } else {
Charles MacNeill 5:89031b2f5316 191
Charles MacNeill 5:89031b2f5316 192 pdev->pos_before_next_recom--;
Charles MacNeill 5:89031b2f5316 193 if (pdev->pos_before_next_recom == 255)
Charles MacNeill 5:89031b2f5316 194 pdev->pos_before_next_recom = 0;
Charles MacNeill 5:89031b2f5316 195 }
Charles MacNeill 5:89031b2f5316 196 }
Charles MacNeill 5:89031b2f5316 197
Charles MacNeill 5:89031b2f5316 198 VL53LX_Error VL53LX_load_patch(VL53LX_DEV Dev)
Charles MacNeill 5:89031b2f5316 199 {
Charles MacNeill 5:89031b2f5316 200 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 201 int32_t patch_tuning = 0;
Charles MacNeill 5:89031b2f5316 202 uint8_t comms_buffer[256];
Charles MacNeill 5:89031b2f5316 203 uint32_t patch_power;
Charles MacNeill 5:89031b2f5316 204
Charles MacNeill 5:89031b2f5316 205 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 206
Charles MacNeill 5:89031b2f5316 207 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 208 status = VL53LX_WrByte(Dev,
Charles MacNeill 5:89031b2f5316 209 VL53LX_FIRMWARE__ENABLE, 0x00);
Charles MacNeill 5:89031b2f5316 210
Charles MacNeill 5:89031b2f5316 211 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 212 VL53LX_enable_powerforce(Dev);
Charles MacNeill 5:89031b2f5316 213
Charles MacNeill 5:89031b2f5316 214 VL53LX_get_tuning_parm(Dev, VL53LX_TUNINGPARM_PHASECAL_PATCH_POWER,
Charles MacNeill 5:89031b2f5316 215 &patch_tuning);
Charles MacNeill 5:89031b2f5316 216
Charles MacNeill 5:89031b2f5316 217 switch (patch_tuning) {
Charles MacNeill 5:89031b2f5316 218 case 0:
Charles MacNeill 5:89031b2f5316 219 patch_power = 0x00;
Charles MacNeill 5:89031b2f5316 220 break;
Charles MacNeill 5:89031b2f5316 221 case 1:
Charles MacNeill 5:89031b2f5316 222 patch_power = 0x10;
Charles MacNeill 5:89031b2f5316 223 break;
Charles MacNeill 5:89031b2f5316 224 case 2:
Charles MacNeill 5:89031b2f5316 225 patch_power = 0x20;
Charles MacNeill 5:89031b2f5316 226 break;
Charles MacNeill 5:89031b2f5316 227 case 3:
Charles MacNeill 5:89031b2f5316 228 patch_power = 0x40;
Charles MacNeill 5:89031b2f5316 229 break;
Charles MacNeill 5:89031b2f5316 230 default:
Charles MacNeill 5:89031b2f5316 231 patch_power = 0x00;
Charles MacNeill 5:89031b2f5316 232 }
Charles MacNeill 5:89031b2f5316 233
Charles MacNeill 5:89031b2f5316 234 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 235
Charles MacNeill 5:89031b2f5316 236 comms_buffer[0] = 0x29;
Charles MacNeill 5:89031b2f5316 237 comms_buffer[1] = 0xC9;
Charles MacNeill 5:89031b2f5316 238 comms_buffer[2] = 0x0E;
Charles MacNeill 5:89031b2f5316 239 comms_buffer[3] = 0x40;
Charles MacNeill 5:89031b2f5316 240 comms_buffer[4] = 0x28;
Charles MacNeill 5:89031b2f5316 241 comms_buffer[5] = patch_power;
Charles MacNeill 5:89031b2f5316 242
Charles MacNeill 5:89031b2f5316 243 status = VL53LX_WriteMulti(Dev,
Charles MacNeill 5:89031b2f5316 244 VL53LX_PATCH__OFFSET_0, comms_buffer, 6);
Charles MacNeill 5:89031b2f5316 245 }
Charles MacNeill 5:89031b2f5316 246
Charles MacNeill 5:89031b2f5316 247 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 248 comms_buffer[0] = 0x03;
Charles MacNeill 5:89031b2f5316 249 comms_buffer[1] = 0x6D;
Charles MacNeill 5:89031b2f5316 250 comms_buffer[2] = 0x03;
Charles MacNeill 5:89031b2f5316 251 comms_buffer[3] = 0x6F;
Charles MacNeill 5:89031b2f5316 252 comms_buffer[4] = 0x07;
Charles MacNeill 5:89031b2f5316 253 comms_buffer[5] = 0x29;
Charles MacNeill 5:89031b2f5316 254 status = VL53LX_WriteMulti(Dev,
Charles MacNeill 5:89031b2f5316 255 VL53LX_PATCH__ADDRESS_0, comms_buffer, 6);
Charles MacNeill 5:89031b2f5316 256 }
Charles MacNeill 5:89031b2f5316 257
Charles MacNeill 5:89031b2f5316 258 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 259 comms_buffer[0] = 0x00;
Charles MacNeill 5:89031b2f5316 260 comms_buffer[1] = 0x07;
Charles MacNeill 5:89031b2f5316 261 status = VL53LX_WriteMulti(Dev,
Charles MacNeill 5:89031b2f5316 262 VL53LX_PATCH__JMP_ENABLES, comms_buffer, 2);
Charles MacNeill 5:89031b2f5316 263 }
Charles MacNeill 5:89031b2f5316 264
Charles MacNeill 5:89031b2f5316 265 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 266 comms_buffer[0] = 0x00;
Charles MacNeill 5:89031b2f5316 267 comms_buffer[1] = 0x07;
Charles MacNeill 5:89031b2f5316 268 status = VL53LX_WriteMulti(Dev,
Charles MacNeill 5:89031b2f5316 269 VL53LX_PATCH__DATA_ENABLES, comms_buffer, 2);
Charles MacNeill 5:89031b2f5316 270 }
Charles MacNeill 5:89031b2f5316 271
Charles MacNeill 5:89031b2f5316 272 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 273 status = VL53LX_WrByte(Dev,
Charles MacNeill 5:89031b2f5316 274 VL53LX_PATCH__CTRL, 0x01);
Charles MacNeill 5:89031b2f5316 275
Charles MacNeill 5:89031b2f5316 276 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 277 status = VL53LX_WrByte(Dev,
Charles MacNeill 5:89031b2f5316 278 VL53LX_FIRMWARE__ENABLE, 0x01);
Charles MacNeill 5:89031b2f5316 279
Charles MacNeill 5:89031b2f5316 280 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 281
Charles MacNeill 5:89031b2f5316 282 return status;
Charles MacNeill 5:89031b2f5316 283 }
Charles MacNeill 5:89031b2f5316 284
Charles MacNeill 5:89031b2f5316 285 VL53LX_Error VL53LX_unload_patch(VL53LX_DEV Dev)
Charles MacNeill 5:89031b2f5316 286 {
Charles MacNeill 5:89031b2f5316 287 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 288
Charles MacNeill 5:89031b2f5316 289 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 290 status = VL53LX_WrByte(Dev,
Charles MacNeill 5:89031b2f5316 291 VL53LX_FIRMWARE__ENABLE, 0x00);
Charles MacNeill 5:89031b2f5316 292
Charles MacNeill 5:89031b2f5316 293 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 294 VL53LX_disable_powerforce(Dev);
Charles MacNeill 5:89031b2f5316 295
Charles MacNeill 5:89031b2f5316 296 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 297 status = VL53LX_WrByte(Dev,
Charles MacNeill 5:89031b2f5316 298 VL53LX_PATCH__CTRL, 0x00);
Charles MacNeill 5:89031b2f5316 299
Charles MacNeill 5:89031b2f5316 300 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 301 status = VL53LX_WrByte(Dev,
Charles MacNeill 5:89031b2f5316 302 VL53LX_FIRMWARE__ENABLE, 0x01);
Charles MacNeill 5:89031b2f5316 303
Charles MacNeill 5:89031b2f5316 304 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 305
Charles MacNeill 5:89031b2f5316 306 return status;
Charles MacNeill 5:89031b2f5316 307 }
Charles MacNeill 5:89031b2f5316 308
Charles MacNeill 5:89031b2f5316 309 VL53LX_Error VL53LX_get_version(
Charles MacNeill 5:89031b2f5316 310 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 311 VL53LX_ll_version_t *pdata)
Charles MacNeill 5:89031b2f5316 312 {
Charles MacNeill 5:89031b2f5316 313
Charles MacNeill 5:89031b2f5316 314
Charles MacNeill 5:89031b2f5316 315 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 316
Charles MacNeill 5:89031b2f5316 317 VL53LX_init_version(Dev);
Charles MacNeill 5:89031b2f5316 318
Charles MacNeill 5:89031b2f5316 319 memcpy(pdata, &(pdev->version), sizeof(VL53LX_ll_version_t));
Charles MacNeill 5:89031b2f5316 320
Charles MacNeill 5:89031b2f5316 321 return VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 322 }
Charles MacNeill 5:89031b2f5316 323
Charles MacNeill 5:89031b2f5316 324
Charles MacNeill 5:89031b2f5316 325 VL53LX_Error VL53LX_data_init(
Charles MacNeill 5:89031b2f5316 326 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 327 uint8_t read_p2p_data)
Charles MacNeill 5:89031b2f5316 328 {
Charles MacNeill 5:89031b2f5316 329
Charles MacNeill 5:89031b2f5316 330
Charles MacNeill 5:89031b2f5316 331 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 332 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 333 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 334 VL53LX_LLDriverResults_t *pres =
Charles MacNeill 5:89031b2f5316 335 VL53LXDevStructGetLLResultsHandle(Dev);
Charles MacNeill 5:89031b2f5316 336
Charles MacNeill 5:89031b2f5316 337
Charles MacNeill 5:89031b2f5316 338
Charles MacNeill 5:89031b2f5316 339 VL53LX_zone_objects_t *pobjects;
Charles MacNeill 5:89031b2f5316 340
Charles MacNeill 5:89031b2f5316 341 uint8_t i = 0;
Charles MacNeill 5:89031b2f5316 342
Charles MacNeill 5:89031b2f5316 343 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 344
Charles MacNeill 5:89031b2f5316 345 VL53LX_init_ll_driver_state(
Charles MacNeill 5:89031b2f5316 346 Dev,
Charles MacNeill 5:89031b2f5316 347 VL53LX_DEVICESTATE_UNKNOWN);
Charles MacNeill 5:89031b2f5316 348
Charles MacNeill 5:89031b2f5316 349 pres->range_results.max_results = VL53LX_MAX_RANGE_RESULTS;
Charles MacNeill 5:89031b2f5316 350 pres->range_results.active_results = 0;
Charles MacNeill 5:89031b2f5316 351 pres->zone_results.max_zones = VL53LX_MAX_USER_ZONES;
Charles MacNeill 5:89031b2f5316 352 pres->zone_results.active_zones = 0;
Charles MacNeill 5:89031b2f5316 353
Charles MacNeill 5:89031b2f5316 354 for (i = 0; i < VL53LX_MAX_USER_ZONES; i++) {
Charles MacNeill 5:89031b2f5316 355 pobjects = &(pres->zone_results.VL53LX_p_003[i]);
Charles MacNeill 5:89031b2f5316 356 pobjects->xmonitor.VL53LX_p_016 = 0;
Charles MacNeill 5:89031b2f5316 357 pobjects->xmonitor.VL53LX_p_017 = 0;
Charles MacNeill 5:89031b2f5316 358 pobjects->xmonitor.VL53LX_p_011 = 0;
Charles MacNeill 5:89031b2f5316 359 pobjects->xmonitor.range_status =
Charles MacNeill 5:89031b2f5316 360 VL53LX_DEVICEERROR_NOUPDATE;
Charles MacNeill 5:89031b2f5316 361 }
Charles MacNeill 5:89031b2f5316 362
Charles MacNeill 5:89031b2f5316 363
Charles MacNeill 5:89031b2f5316 364
Charles MacNeill 5:89031b2f5316 365 pres->zone_hists.max_zones = VL53LX_MAX_USER_ZONES;
Charles MacNeill 5:89031b2f5316 366 pres->zone_hists.active_zones = 0;
Charles MacNeill 5:89031b2f5316 367
Charles MacNeill 5:89031b2f5316 368
Charles MacNeill 5:89031b2f5316 369
Charles MacNeill 5:89031b2f5316 370 pres->zone_cal.max_zones = VL53LX_MAX_USER_ZONES;
Charles MacNeill 5:89031b2f5316 371 pres->zone_cal.active_zones = 0;
Charles MacNeill 5:89031b2f5316 372 for (i = 0; i < VL53LX_MAX_USER_ZONES; i++) {
Charles MacNeill 5:89031b2f5316 373 pres->zone_cal.VL53LX_p_003[i].no_of_samples = 0;
Charles MacNeill 5:89031b2f5316 374 pres->zone_cal.VL53LX_p_003[i].effective_spads = 0;
Charles MacNeill 5:89031b2f5316 375 pres->zone_cal.VL53LX_p_003[i].peak_rate_mcps = 0;
Charles MacNeill 5:89031b2f5316 376 pres->zone_cal.VL53LX_p_003[i].median_range_mm = 0;
Charles MacNeill 5:89031b2f5316 377 pres->zone_cal.VL53LX_p_003[i].range_mm_offset = 0;
Charles MacNeill 5:89031b2f5316 378 }
Charles MacNeill 5:89031b2f5316 379
Charles MacNeill 5:89031b2f5316 380 pdev->wait_method = VL53LX_WAIT_METHOD_BLOCKING;
Charles MacNeill 5:89031b2f5316 381 pdev->preset_mode = VL53LX_DEVICEPRESETMODE_STANDARD_RANGING;
Charles MacNeill 5:89031b2f5316 382 pdev->zone_preset = 0;
Charles MacNeill 5:89031b2f5316 383 pdev->measurement_mode = VL53LX_DEVICEMEASUREMENTMODE_STOP;
Charles MacNeill 5:89031b2f5316 384
Charles MacNeill 5:89031b2f5316 385 pdev->offset_calibration_mode =
Charles MacNeill 5:89031b2f5316 386 VL53LX_OFFSETCALIBRATIONMODE__MM1_MM2__STANDARD;
Charles MacNeill 5:89031b2f5316 387 pdev->offset_correction_mode =
Charles MacNeill 5:89031b2f5316 388 VL53LX_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS;
Charles MacNeill 5:89031b2f5316 389 pdev->dmax_mode =
Charles MacNeill 5:89031b2f5316 390 VL53LX_DEVICEDMAXMODE__FMT_CAL_DATA;
Charles MacNeill 5:89031b2f5316 391
Charles MacNeill 5:89031b2f5316 392 pdev->phasecal_config_timeout_us = 1000;
Charles MacNeill 5:89031b2f5316 393 pdev->mm_config_timeout_us = 2000;
Charles MacNeill 5:89031b2f5316 394 pdev->range_config_timeout_us = 13000;
Charles MacNeill 5:89031b2f5316 395 pdev->inter_measurement_period_ms = 100;
Charles MacNeill 5:89031b2f5316 396 pdev->dss_config__target_total_rate_mcps = 0x0A00;
Charles MacNeill 5:89031b2f5316 397 pdev->debug_mode = 0x00;
Charles MacNeill 5:89031b2f5316 398
Charles MacNeill 5:89031b2f5316 399 pdev->offset_results.max_results = VL53LX_MAX_OFFSET_RANGE_RESULTS;
Charles MacNeill 5:89031b2f5316 400 pdev->offset_results.active_results = 0;
Charles MacNeill 5:89031b2f5316 401
Charles MacNeill 5:89031b2f5316 402
Charles MacNeill 5:89031b2f5316 403
Charles MacNeill 5:89031b2f5316 404 pdev->gain_cal.standard_ranging_gain_factor =
Charles MacNeill 5:89031b2f5316 405 VL53LX_TUNINGPARM_LITE_RANGING_GAIN_FACTOR_DEFAULT;
Charles MacNeill 5:89031b2f5316 406 pdev->gain_cal.histogram_ranging_gain_factor =
Charles MacNeill 5:89031b2f5316 407 VL53LX_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT;
Charles MacNeill 5:89031b2f5316 408
Charles MacNeill 5:89031b2f5316 409
Charles MacNeill 5:89031b2f5316 410 VL53LX_init_version(Dev);
Charles MacNeill 5:89031b2f5316 411
Charles MacNeill 5:89031b2f5316 412
Charles MacNeill 5:89031b2f5316 413 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec));
Charles MacNeill 5:89031b2f5316 414 pdev->bin_rec_pos = 0;
Charles MacNeill 5:89031b2f5316 415 pdev->pos_before_next_recom = 0;
Charles MacNeill 5:89031b2f5316 416
Charles MacNeill 5:89031b2f5316 417
Charles MacNeill 5:89031b2f5316 418
Charles MacNeill 5:89031b2f5316 419 if (read_p2p_data > 0 && status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 420 status = VL53LX_read_p2p_data(Dev);
Charles MacNeill 5:89031b2f5316 421
Charles MacNeill 5:89031b2f5316 422
Charles MacNeill 5:89031b2f5316 423 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 424 status = VL53LX_init_refspadchar_config_struct(
Charles MacNeill 5:89031b2f5316 425 &(pdev->refspadchar));
Charles MacNeill 5:89031b2f5316 426
Charles MacNeill 5:89031b2f5316 427
Charles MacNeill 5:89031b2f5316 428 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 429 status = VL53LX_init_ssc_config_struct(
Charles MacNeill 5:89031b2f5316 430 &(pdev->ssc_cfg));
Charles MacNeill 5:89031b2f5316 431
Charles MacNeill 5:89031b2f5316 432
Charles MacNeill 5:89031b2f5316 433 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 434 status = VL53LX_init_xtalk_config_struct(
Charles MacNeill 5:89031b2f5316 435 &(pdev->customer),
Charles MacNeill 5:89031b2f5316 436 &(pdev->xtalk_cfg));
Charles MacNeill 5:89031b2f5316 437
Charles MacNeill 5:89031b2f5316 438
Charles MacNeill 5:89031b2f5316 439 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 440 status = VL53LX_init_xtalk_extract_config_struct(
Charles MacNeill 5:89031b2f5316 441 &(pdev->xtalk_extract_cfg));
Charles MacNeill 5:89031b2f5316 442
Charles MacNeill 5:89031b2f5316 443
Charles MacNeill 5:89031b2f5316 444 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 445 status = VL53LX_init_offset_cal_config_struct(
Charles MacNeill 5:89031b2f5316 446 &(pdev->offsetcal_cfg));
Charles MacNeill 5:89031b2f5316 447
Charles MacNeill 5:89031b2f5316 448
Charles MacNeill 5:89031b2f5316 449 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 450 status = VL53LX_init_zone_cal_config_struct(
Charles MacNeill 5:89031b2f5316 451 &(pdev->zonecal_cfg));
Charles MacNeill 5:89031b2f5316 452
Charles MacNeill 5:89031b2f5316 453
Charles MacNeill 5:89031b2f5316 454 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 455 status = VL53LX_init_hist_post_process_config_struct(
Charles MacNeill 5:89031b2f5316 456 pdev->xtalk_cfg.global_crosstalk_compensation_enable,
Charles MacNeill 5:89031b2f5316 457 &(pdev->histpostprocess));
Charles MacNeill 5:89031b2f5316 458
Charles MacNeill 5:89031b2f5316 459
Charles MacNeill 5:89031b2f5316 460 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 461 status = VL53LX_init_hist_gen3_dmax_config_struct(
Charles MacNeill 5:89031b2f5316 462 &(pdev->dmax_cfg));
Charles MacNeill 5:89031b2f5316 463
Charles MacNeill 5:89031b2f5316 464
Charles MacNeill 5:89031b2f5316 465 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 466 status = VL53LX_init_tuning_parm_storage_struct(
Charles MacNeill 5:89031b2f5316 467 &(pdev->tuning_parms));
Charles MacNeill 5:89031b2f5316 468
Charles MacNeill 5:89031b2f5316 469
Charles MacNeill 5:89031b2f5316 470
Charles MacNeill 5:89031b2f5316 471 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 472 status = VL53LX_set_preset_mode(
Charles MacNeill 5:89031b2f5316 473 Dev,
Charles MacNeill 5:89031b2f5316 474 pdev->preset_mode,
Charles MacNeill 5:89031b2f5316 475 pdev->dss_config__target_total_rate_mcps,
Charles MacNeill 5:89031b2f5316 476 pdev->phasecal_config_timeout_us,
Charles MacNeill 5:89031b2f5316 477 pdev->mm_config_timeout_us,
Charles MacNeill 5:89031b2f5316 478 pdev->range_config_timeout_us,
Charles MacNeill 5:89031b2f5316 479 pdev->inter_measurement_period_ms);
Charles MacNeill 5:89031b2f5316 480
Charles MacNeill 5:89031b2f5316 481
Charles MacNeill 5:89031b2f5316 482 VL53LX_init_histogram_bin_data_struct(
Charles MacNeill 5:89031b2f5316 483 0,
Charles MacNeill 5:89031b2f5316 484 VL53LX_HISTOGRAM_BUFFER_SIZE,
Charles MacNeill 5:89031b2f5316 485 &(pdev->hist_data));
Charles MacNeill 5:89031b2f5316 486
Charles MacNeill 5:89031b2f5316 487 VL53LX_init_histogram_bin_data_struct(
Charles MacNeill 5:89031b2f5316 488 0,
Charles MacNeill 5:89031b2f5316 489 VL53LX_HISTOGRAM_BUFFER_SIZE,
Charles MacNeill 5:89031b2f5316 490 &(pdev->hist_xtalk));
Charles MacNeill 5:89031b2f5316 491
Charles MacNeill 5:89031b2f5316 492
Charles MacNeill 5:89031b2f5316 493 VL53LX_init_xtalk_bin_data_struct(
Charles MacNeill 5:89031b2f5316 494 0,
Charles MacNeill 5:89031b2f5316 495 VL53LX_XTALK_HISTO_BINS,
Charles MacNeill 5:89031b2f5316 496 &(pdev->xtalk_shapes.xtalk_shape));
Charles MacNeill 5:89031b2f5316 497
Charles MacNeill 5:89031b2f5316 498
Charles MacNeill 5:89031b2f5316 499
Charles MacNeill 5:89031b2f5316 500 VL53LX_xtalk_cal_data_init(
Charles MacNeill 5:89031b2f5316 501 Dev
Charles MacNeill 5:89031b2f5316 502 );
Charles MacNeill 5:89031b2f5316 503
Charles MacNeill 5:89031b2f5316 504
Charles MacNeill 5:89031b2f5316 505
Charles MacNeill 5:89031b2f5316 506 VL53LX_dynamic_xtalk_correction_data_init(
Charles MacNeill 5:89031b2f5316 507 Dev
Charles MacNeill 5:89031b2f5316 508 );
Charles MacNeill 5:89031b2f5316 509
Charles MacNeill 5:89031b2f5316 510
Charles MacNeill 5:89031b2f5316 511
Charles MacNeill 5:89031b2f5316 512 VL53LX_low_power_auto_data_init(
Charles MacNeill 5:89031b2f5316 513 Dev
Charles MacNeill 5:89031b2f5316 514 );
Charles MacNeill 5:89031b2f5316 515
Charles MacNeill 5:89031b2f5316 516 #ifdef VL53LX_LOG_ENABLE
Charles MacNeill 5:89031b2f5316 517
Charles MacNeill 5:89031b2f5316 518
Charles MacNeill 5:89031b2f5316 519
Charles MacNeill 5:89031b2f5316 520 VL53LX_print_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 521 &(pdev->stat_nvm),
Charles MacNeill 5:89031b2f5316 522 "data_init():pdev->lldata.stat_nvm.",
Charles MacNeill 5:89031b2f5316 523 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 524
Charles MacNeill 5:89031b2f5316 525 VL53LX_print_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 526 &(pdev->customer),
Charles MacNeill 5:89031b2f5316 527 "data_init():pdev->lldata.customer.",
Charles MacNeill 5:89031b2f5316 528 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 529
Charles MacNeill 5:89031b2f5316 530 VL53LX_print_nvm_copy_data(
Charles MacNeill 5:89031b2f5316 531 &(pdev->nvm_copy_data),
Charles MacNeill 5:89031b2f5316 532 "data_init():pdev->lldata.nvm_copy_data.",
Charles MacNeill 5:89031b2f5316 533 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 534
Charles MacNeill 5:89031b2f5316 535 VL53LX_print_dmax_calibration_data(
Charles MacNeill 5:89031b2f5316 536 &(pdev->fmt_dmax_cal),
Charles MacNeill 5:89031b2f5316 537 "data_init():pdev->lldata.fmt_dmax_cal.",
Charles MacNeill 5:89031b2f5316 538 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 539
Charles MacNeill 5:89031b2f5316 540 VL53LX_print_dmax_calibration_data(
Charles MacNeill 5:89031b2f5316 541 &(pdev->cust_dmax_cal),
Charles MacNeill 5:89031b2f5316 542 "data_init():pdev->lldata.cust_dmax_cal.",
Charles MacNeill 5:89031b2f5316 543 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 544
Charles MacNeill 5:89031b2f5316 545 VL53LX_print_additional_offset_cal_data(
Charles MacNeill 5:89031b2f5316 546 &(pdev->add_off_cal_data),
Charles MacNeill 5:89031b2f5316 547 "data_init():pdev->lldata.add_off_cal_data.",
Charles MacNeill 5:89031b2f5316 548 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 549
Charles MacNeill 5:89031b2f5316 550 VL53LX_print_user_zone(
Charles MacNeill 5:89031b2f5316 551 &(pdev->mm_roi),
Charles MacNeill 5:89031b2f5316 552 "data_init():pdev->lldata.mm_roi.",
Charles MacNeill 5:89031b2f5316 553 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 554
Charles MacNeill 5:89031b2f5316 555 VL53LX_print_optical_centre(
Charles MacNeill 5:89031b2f5316 556 &(pdev->optical_centre),
Charles MacNeill 5:89031b2f5316 557 "data_init():pdev->lldata.optical_centre.",
Charles MacNeill 5:89031b2f5316 558 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 559
Charles MacNeill 5:89031b2f5316 560 VL53LX_print_cal_peak_rate_map(
Charles MacNeill 5:89031b2f5316 561 &(pdev->cal_peak_rate_map),
Charles MacNeill 5:89031b2f5316 562 "data_init():pdev->lldata.cal_peak_rate_map.",
Charles MacNeill 5:89031b2f5316 563 VL53LX_TRACE_MODULE_DATA_INIT);
Charles MacNeill 5:89031b2f5316 564
Charles MacNeill 5:89031b2f5316 565 #endif
Charles MacNeill 5:89031b2f5316 566
Charles MacNeill 5:89031b2f5316 567 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 568
Charles MacNeill 5:89031b2f5316 569 return status;
Charles MacNeill 5:89031b2f5316 570 }
Charles MacNeill 5:89031b2f5316 571
Charles MacNeill 5:89031b2f5316 572
Charles MacNeill 5:89031b2f5316 573 VL53LX_Error VL53LX_read_p2p_data(
Charles MacNeill 5:89031b2f5316 574 VL53LX_DEV Dev)
Charles MacNeill 5:89031b2f5316 575 {
Charles MacNeill 5:89031b2f5316 576
Charles MacNeill 5:89031b2f5316 577
Charles MacNeill 5:89031b2f5316 578
Charles MacNeill 5:89031b2f5316 579 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 580 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 581 VL53LX_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 582 VL53LX_customer_nvm_managed_t *pN = &(pdev->customer);
Charles MacNeill 5:89031b2f5316 583 VL53LX_additional_offset_cal_data_t *pCD = &(pdev->add_off_cal_data);
Charles MacNeill 5:89031b2f5316 584
Charles MacNeill 5:89031b2f5316 585 VL53LX_decoded_nvm_fmt_range_data_t fmt_rrd;
Charles MacNeill 5:89031b2f5316 586
Charles MacNeill 5:89031b2f5316 587 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 588
Charles MacNeill 5:89031b2f5316 589 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 590 status = VL53LX_get_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 591 Dev,
Charles MacNeill 5:89031b2f5316 592 &(pdev->stat_nvm));
Charles MacNeill 5:89031b2f5316 593
Charles MacNeill 5:89031b2f5316 594 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 595 status = VL53LX_get_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 596 Dev,
Charles MacNeill 5:89031b2f5316 597 &(pdev->customer));
Charles MacNeill 5:89031b2f5316 598
Charles MacNeill 5:89031b2f5316 599 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 600
Charles MacNeill 5:89031b2f5316 601 status = VL53LX_get_nvm_copy_data(
Charles MacNeill 5:89031b2f5316 602 Dev,
Charles MacNeill 5:89031b2f5316 603 &(pdev->nvm_copy_data));
Charles MacNeill 5:89031b2f5316 604
Charles MacNeill 5:89031b2f5316 605
Charles MacNeill 5:89031b2f5316 606 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 607 VL53LX_copy_rtn_good_spads_to_buffer(
Charles MacNeill 5:89031b2f5316 608 &(pdev->nvm_copy_data),
Charles MacNeill 5:89031b2f5316 609 &(pdev->rtn_good_spads[0]));
Charles MacNeill 5:89031b2f5316 610 }
Charles MacNeill 5:89031b2f5316 611
Charles MacNeill 5:89031b2f5316 612
Charles MacNeill 5:89031b2f5316 613
Charles MacNeill 5:89031b2f5316 614 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 615 pHP->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 616 pN->algo__crosstalk_compensation_plane_offset_kcps;
Charles MacNeill 5:89031b2f5316 617 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 618 pN->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 619 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 620 pN->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 621 }
Charles MacNeill 5:89031b2f5316 622
Charles MacNeill 5:89031b2f5316 623
Charles MacNeill 5:89031b2f5316 624 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 625 status =
Charles MacNeill 5:89031b2f5316 626 VL53LX_read_nvm_optical_centre(
Charles MacNeill 5:89031b2f5316 627 Dev,
Charles MacNeill 5:89031b2f5316 628 &(pdev->optical_centre));
Charles MacNeill 5:89031b2f5316 629
Charles MacNeill 5:89031b2f5316 630
Charles MacNeill 5:89031b2f5316 631
Charles MacNeill 5:89031b2f5316 632 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 633 status =
Charles MacNeill 5:89031b2f5316 634 VL53LX_read_nvm_cal_peak_rate_map(
Charles MacNeill 5:89031b2f5316 635 Dev,
Charles MacNeill 5:89031b2f5316 636 &(pdev->cal_peak_rate_map));
Charles MacNeill 5:89031b2f5316 637
Charles MacNeill 5:89031b2f5316 638
Charles MacNeill 5:89031b2f5316 639
Charles MacNeill 5:89031b2f5316 640 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 641
Charles MacNeill 5:89031b2f5316 642 status =
Charles MacNeill 5:89031b2f5316 643 VL53LX_read_nvm_additional_offset_cal_data(
Charles MacNeill 5:89031b2f5316 644 Dev,
Charles MacNeill 5:89031b2f5316 645 &(pdev->add_off_cal_data));
Charles MacNeill 5:89031b2f5316 646
Charles MacNeill 5:89031b2f5316 647
Charles MacNeill 5:89031b2f5316 648
Charles MacNeill 5:89031b2f5316 649 if (pCD->result__mm_inner_peak_signal_count_rtn_mcps == 0 &&
Charles MacNeill 5:89031b2f5316 650 pCD->result__mm_outer_peak_signal_count_rtn_mcps == 0) {
Charles MacNeill 5:89031b2f5316 651
Charles MacNeill 5:89031b2f5316 652 pCD->result__mm_inner_peak_signal_count_rtn_mcps
Charles MacNeill 5:89031b2f5316 653 = 0x0080;
Charles MacNeill 5:89031b2f5316 654 pCD->result__mm_outer_peak_signal_count_rtn_mcps
Charles MacNeill 5:89031b2f5316 655 = 0x0180;
Charles MacNeill 5:89031b2f5316 656
Charles MacNeill 5:89031b2f5316 657
Charles MacNeill 5:89031b2f5316 658
Charles MacNeill 5:89031b2f5316 659 VL53LX_calc_mm_effective_spads(
Charles MacNeill 5:89031b2f5316 660 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
Charles MacNeill 5:89031b2f5316 661 pdev->nvm_copy_data.roi_config__mode_roi_xy_size,
Charles MacNeill 5:89031b2f5316 662 0xC7,
Charles MacNeill 5:89031b2f5316 663 0xFF,
Charles MacNeill 5:89031b2f5316 664 &(pdev->rtn_good_spads[0]),
Charles MacNeill 5:89031b2f5316 665 VL53LX_RTN_SPAD_APERTURE_TRANSMISSION,
Charles MacNeill 5:89031b2f5316 666 &(pCD->result__mm_inner_actual_effective_spads),
Charles MacNeill 5:89031b2f5316 667 &(pCD->result__mm_outer_actual_effective_spads));
Charles MacNeill 5:89031b2f5316 668 }
Charles MacNeill 5:89031b2f5316 669 }
Charles MacNeill 5:89031b2f5316 670
Charles MacNeill 5:89031b2f5316 671
Charles MacNeill 5:89031b2f5316 672 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 673
Charles MacNeill 5:89031b2f5316 674 status =
Charles MacNeill 5:89031b2f5316 675 VL53LX_read_nvm_fmt_range_results_data(
Charles MacNeill 5:89031b2f5316 676 Dev,
Charles MacNeill 5:89031b2f5316 677 VL53LX_NVM__FMT__RANGE_RESULTS__140MM_DARK,
Charles MacNeill 5:89031b2f5316 678 &fmt_rrd);
Charles MacNeill 5:89031b2f5316 679
Charles MacNeill 5:89031b2f5316 680 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 681 pdev->fmt_dmax_cal.ref__actual_effective_spads =
Charles MacNeill 5:89031b2f5316 682 fmt_rrd.result__actual_effective_rtn_spads;
Charles MacNeill 5:89031b2f5316 683 pdev->fmt_dmax_cal.ref__peak_signal_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 684 fmt_rrd.result__peak_signal_count_rate_rtn_mcps;
Charles MacNeill 5:89031b2f5316 685 pdev->fmt_dmax_cal.ref__distance_mm =
Charles MacNeill 5:89031b2f5316 686 fmt_rrd.measured_distance_mm;
Charles MacNeill 5:89031b2f5316 687
Charles MacNeill 5:89031b2f5316 688
Charles MacNeill 5:89031b2f5316 689 if (pdev->cal_peak_rate_map.cal_reflectance_pc != 0) {
Charles MacNeill 5:89031b2f5316 690 pdev->fmt_dmax_cal.ref_reflectance_pc =
Charles MacNeill 5:89031b2f5316 691 pdev->cal_peak_rate_map.cal_reflectance_pc;
Charles MacNeill 5:89031b2f5316 692 } else {
Charles MacNeill 5:89031b2f5316 693 pdev->fmt_dmax_cal.ref_reflectance_pc = 0x0014;
Charles MacNeill 5:89031b2f5316 694 }
Charles MacNeill 5:89031b2f5316 695
Charles MacNeill 5:89031b2f5316 696
Charles MacNeill 5:89031b2f5316 697 pdev->fmt_dmax_cal.coverglass_transmission = 0x0100;
Charles MacNeill 5:89031b2f5316 698 }
Charles MacNeill 5:89031b2f5316 699 }
Charles MacNeill 5:89031b2f5316 700
Charles MacNeill 5:89031b2f5316 701
Charles MacNeill 5:89031b2f5316 702 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 703 status =
Charles MacNeill 5:89031b2f5316 704 VL53LX_RdWord(
Charles MacNeill 5:89031b2f5316 705 Dev,
Charles MacNeill 5:89031b2f5316 706 VL53LX_RESULT__OSC_CALIBRATE_VAL,
Charles MacNeill 5:89031b2f5316 707 &(pdev->dbg_results.result__osc_calibrate_val));
Charles MacNeill 5:89031b2f5316 708
Charles MacNeill 5:89031b2f5316 709
Charles MacNeill 5:89031b2f5316 710
Charles MacNeill 5:89031b2f5316 711 if (pdev->stat_nvm.osc_measured__fast_osc__frequency < 0x1000) {
Charles MacNeill 5:89031b2f5316 712 trace_print(
Charles MacNeill 5:89031b2f5316 713 VL53LX_TRACE_LEVEL_WARNING,
Charles MacNeill 5:89031b2f5316 714 "\nInvalid %s value (0x%04X) - forcing to 0x%04X\n\n",
Charles MacNeill 5:89031b2f5316 715 "pdev->stat_nvm.osc_measured__fast_osc__frequency",
Charles MacNeill 5:89031b2f5316 716 pdev->stat_nvm.osc_measured__fast_osc__frequency,
Charles MacNeill 5:89031b2f5316 717 0xBCCC);
Charles MacNeill 5:89031b2f5316 718 pdev->stat_nvm.osc_measured__fast_osc__frequency = 0xBCCC;
Charles MacNeill 5:89031b2f5316 719 }
Charles MacNeill 5:89031b2f5316 720
Charles MacNeill 5:89031b2f5316 721
Charles MacNeill 5:89031b2f5316 722
Charles MacNeill 5:89031b2f5316 723 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 724 status =
Charles MacNeill 5:89031b2f5316 725 VL53LX_get_mode_mitigation_roi(
Charles MacNeill 5:89031b2f5316 726 Dev,
Charles MacNeill 5:89031b2f5316 727 &(pdev->mm_roi));
Charles MacNeill 5:89031b2f5316 728
Charles MacNeill 5:89031b2f5316 729
Charles MacNeill 5:89031b2f5316 730
Charles MacNeill 5:89031b2f5316 731 if (pdev->optical_centre.x_centre == 0 &&
Charles MacNeill 5:89031b2f5316 732 pdev->optical_centre.y_centre == 0) {
Charles MacNeill 5:89031b2f5316 733 pdev->optical_centre.x_centre =
Charles MacNeill 5:89031b2f5316 734 pdev->mm_roi.x_centre << 4;
Charles MacNeill 5:89031b2f5316 735 pdev->optical_centre.y_centre =
Charles MacNeill 5:89031b2f5316 736 pdev->mm_roi.y_centre << 4;
Charles MacNeill 5:89031b2f5316 737 }
Charles MacNeill 5:89031b2f5316 738
Charles MacNeill 5:89031b2f5316 739 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 740
Charles MacNeill 5:89031b2f5316 741 return status;
Charles MacNeill 5:89031b2f5316 742 }
Charles MacNeill 5:89031b2f5316 743
Charles MacNeill 5:89031b2f5316 744
Charles MacNeill 5:89031b2f5316 745 VL53LX_Error VL53LX_set_part_to_part_data(
Charles MacNeill 5:89031b2f5316 746 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 747 VL53LX_calibration_data_t *pcal_data)
Charles MacNeill 5:89031b2f5316 748 {
Charles MacNeill 5:89031b2f5316 749
Charles MacNeill 5:89031b2f5316 750
Charles MacNeill 5:89031b2f5316 751 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 752 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 753 VL53LX_xtalk_config_t *pC = &(pdev->xtalk_cfg);
Charles MacNeill 5:89031b2f5316 754 VL53LX_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 755 VL53LX_customer_nvm_managed_t *pN = &(pdev->customer);
Charles MacNeill 5:89031b2f5316 756
Charles MacNeill 5:89031b2f5316 757 uint32_t tempu32;
Charles MacNeill 5:89031b2f5316 758
Charles MacNeill 5:89031b2f5316 759 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 760
Charles MacNeill 5:89031b2f5316 761 if (pcal_data->struct_version !=
Charles MacNeill 5:89031b2f5316 762 VL53LX_LL_CALIBRATION_DATA_STRUCT_VERSION) {
Charles MacNeill 5:89031b2f5316 763 status = VL53LX_ERROR_INVALID_PARAMS;
Charles MacNeill 5:89031b2f5316 764 }
Charles MacNeill 5:89031b2f5316 765
Charles MacNeill 5:89031b2f5316 766 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 767
Charles MacNeill 5:89031b2f5316 768
Charles MacNeill 5:89031b2f5316 769 memcpy(
Charles MacNeill 5:89031b2f5316 770 &(pdev->customer),
Charles MacNeill 5:89031b2f5316 771 &(pcal_data->customer),
Charles MacNeill 5:89031b2f5316 772 sizeof(VL53LX_customer_nvm_managed_t));
Charles MacNeill 5:89031b2f5316 773
Charles MacNeill 5:89031b2f5316 774
Charles MacNeill 5:89031b2f5316 775 memcpy(
Charles MacNeill 5:89031b2f5316 776 &(pdev->add_off_cal_data),
Charles MacNeill 5:89031b2f5316 777 &(pcal_data->add_off_cal_data),
Charles MacNeill 5:89031b2f5316 778 sizeof(VL53LX_additional_offset_cal_data_t));
Charles MacNeill 5:89031b2f5316 779
Charles MacNeill 5:89031b2f5316 780
Charles MacNeill 5:89031b2f5316 781 memcpy(
Charles MacNeill 5:89031b2f5316 782 &(pdev->fmt_dmax_cal),
Charles MacNeill 5:89031b2f5316 783 &(pcal_data->fmt_dmax_cal),
Charles MacNeill 5:89031b2f5316 784 sizeof(VL53LX_dmax_calibration_data_t));
Charles MacNeill 5:89031b2f5316 785
Charles MacNeill 5:89031b2f5316 786
Charles MacNeill 5:89031b2f5316 787 memcpy(
Charles MacNeill 5:89031b2f5316 788 &(pdev->cust_dmax_cal),
Charles MacNeill 5:89031b2f5316 789 &(pcal_data->cust_dmax_cal),
Charles MacNeill 5:89031b2f5316 790 sizeof(VL53LX_dmax_calibration_data_t));
Charles MacNeill 5:89031b2f5316 791
Charles MacNeill 5:89031b2f5316 792
Charles MacNeill 5:89031b2f5316 793 memcpy(
Charles MacNeill 5:89031b2f5316 794 &(pdev->xtalk_shapes),
Charles MacNeill 5:89031b2f5316 795 &(pcal_data->xtalkhisto),
Charles MacNeill 5:89031b2f5316 796 sizeof(VL53LX_xtalk_histogram_data_t));
Charles MacNeill 5:89031b2f5316 797
Charles MacNeill 5:89031b2f5316 798
Charles MacNeill 5:89031b2f5316 799 memcpy(
Charles MacNeill 5:89031b2f5316 800 &(pdev->gain_cal),
Charles MacNeill 5:89031b2f5316 801 &(pcal_data->gain_cal),
Charles MacNeill 5:89031b2f5316 802 sizeof(VL53LX_gain_calibration_data_t));
Charles MacNeill 5:89031b2f5316 803
Charles MacNeill 5:89031b2f5316 804
Charles MacNeill 5:89031b2f5316 805 memcpy(
Charles MacNeill 5:89031b2f5316 806 &(pdev->cal_peak_rate_map),
Charles MacNeill 5:89031b2f5316 807 &(pcal_data->cal_peak_rate_map),
Charles MacNeill 5:89031b2f5316 808 sizeof(VL53LX_cal_peak_rate_map_t));
Charles MacNeill 5:89031b2f5316 809
Charles MacNeill 5:89031b2f5316 810
Charles MacNeill 5:89031b2f5316 811 memcpy(
Charles MacNeill 5:89031b2f5316 812 &(pdev->per_vcsel_cal_data),
Charles MacNeill 5:89031b2f5316 813 &(pcal_data->per_vcsel_cal_data),
Charles MacNeill 5:89031b2f5316 814 sizeof(VL53LX_per_vcsel_period_offset_cal_data_t));
Charles MacNeill 5:89031b2f5316 815
Charles MacNeill 5:89031b2f5316 816
Charles MacNeill 5:89031b2f5316 817
Charles MacNeill 5:89031b2f5316 818 pC->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 819 pN->algo__crosstalk_compensation_plane_offset_kcps;
Charles MacNeill 5:89031b2f5316 820 pC->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 821 pN->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 822 pC->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 823 pN->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 824
Charles MacNeill 5:89031b2f5316 825 pHP->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 826 VL53LX_calc_crosstalk_plane_offset_with_margin(
Charles MacNeill 5:89031b2f5316 827 pC->algo__crosstalk_compensation_plane_offset_kcps,
Charles MacNeill 5:89031b2f5316 828 pC->histogram_mode_crosstalk_margin_kcps);
Charles MacNeill 5:89031b2f5316 829
Charles MacNeill 5:89031b2f5316 830 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 831 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 832 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 833 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 834
Charles MacNeill 5:89031b2f5316 835
Charles MacNeill 5:89031b2f5316 836
Charles MacNeill 5:89031b2f5316 837 if (pC->global_crosstalk_compensation_enable == 0x00) {
Charles MacNeill 5:89031b2f5316 838 pN->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 839 0x00;
Charles MacNeill 5:89031b2f5316 840 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 841 0x00;
Charles MacNeill 5:89031b2f5316 842 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 843 0x00;
Charles MacNeill 5:89031b2f5316 844 } else {
Charles MacNeill 5:89031b2f5316 845 tempu32 =
Charles MacNeill 5:89031b2f5316 846 VL53LX_calc_crosstalk_plane_offset_with_margin(
Charles MacNeill 5:89031b2f5316 847 pC->algo__crosstalk_compensation_plane_offset_kcps,
Charles MacNeill 5:89031b2f5316 848 pC->lite_mode_crosstalk_margin_kcps);
Charles MacNeill 5:89031b2f5316 849
Charles MacNeill 5:89031b2f5316 850
Charles MacNeill 5:89031b2f5316 851 if (tempu32 > 0xFFFF)
Charles MacNeill 5:89031b2f5316 852 tempu32 = 0xFFFF;
Charles MacNeill 5:89031b2f5316 853
Charles MacNeill 5:89031b2f5316 854 pN->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 855 (uint16_t)tempu32;
Charles MacNeill 5:89031b2f5316 856 }
Charles MacNeill 5:89031b2f5316 857 }
Charles MacNeill 5:89031b2f5316 858
Charles MacNeill 5:89031b2f5316 859 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 860
Charles MacNeill 5:89031b2f5316 861 return status;
Charles MacNeill 5:89031b2f5316 862 }
Charles MacNeill 5:89031b2f5316 863
Charles MacNeill 5:89031b2f5316 864
Charles MacNeill 5:89031b2f5316 865 VL53LX_Error VL53LX_get_part_to_part_data(
Charles MacNeill 5:89031b2f5316 866 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 867 VL53LX_calibration_data_t *pcal_data)
Charles MacNeill 5:89031b2f5316 868 {
Charles MacNeill 5:89031b2f5316 869
Charles MacNeill 5:89031b2f5316 870
Charles MacNeill 5:89031b2f5316 871 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 872 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 873 VL53LX_xtalk_config_t *pC = &(pdev->xtalk_cfg);
Charles MacNeill 5:89031b2f5316 874 VL53LX_customer_nvm_managed_t *pCN = &(pcal_data->customer);
Charles MacNeill 5:89031b2f5316 875
Charles MacNeill 5:89031b2f5316 876 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 877
Charles MacNeill 5:89031b2f5316 878 pcal_data->struct_version =
Charles MacNeill 5:89031b2f5316 879 VL53LX_LL_CALIBRATION_DATA_STRUCT_VERSION;
Charles MacNeill 5:89031b2f5316 880
Charles MacNeill 5:89031b2f5316 881
Charles MacNeill 5:89031b2f5316 882 memcpy(
Charles MacNeill 5:89031b2f5316 883 &(pcal_data->customer),
Charles MacNeill 5:89031b2f5316 884 &(pdev->customer),
Charles MacNeill 5:89031b2f5316 885 sizeof(VL53LX_customer_nvm_managed_t));
Charles MacNeill 5:89031b2f5316 886
Charles MacNeill 5:89031b2f5316 887
Charles MacNeill 5:89031b2f5316 888
Charles MacNeill 5:89031b2f5316 889
Charles MacNeill 5:89031b2f5316 890 if (pC->algo__crosstalk_compensation_plane_offset_kcps > 0xFFFF) {
Charles MacNeill 5:89031b2f5316 891 pCN->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 892 0xFFFF;
Charles MacNeill 5:89031b2f5316 893 } else {
Charles MacNeill 5:89031b2f5316 894 pCN->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 895 (uint16_t)pC->algo__crosstalk_compensation_plane_offset_kcps;
Charles MacNeill 5:89031b2f5316 896 }
Charles MacNeill 5:89031b2f5316 897 pCN->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 898 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 899 pCN->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 900 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 901
Charles MacNeill 5:89031b2f5316 902
Charles MacNeill 5:89031b2f5316 903 memcpy(
Charles MacNeill 5:89031b2f5316 904 &(pcal_data->fmt_dmax_cal),
Charles MacNeill 5:89031b2f5316 905 &(pdev->fmt_dmax_cal),
Charles MacNeill 5:89031b2f5316 906 sizeof(VL53LX_dmax_calibration_data_t));
Charles MacNeill 5:89031b2f5316 907
Charles MacNeill 5:89031b2f5316 908
Charles MacNeill 5:89031b2f5316 909 memcpy(
Charles MacNeill 5:89031b2f5316 910 &(pcal_data->cust_dmax_cal),
Charles MacNeill 5:89031b2f5316 911 &(pdev->cust_dmax_cal),
Charles MacNeill 5:89031b2f5316 912 sizeof(VL53LX_dmax_calibration_data_t));
Charles MacNeill 5:89031b2f5316 913
Charles MacNeill 5:89031b2f5316 914
Charles MacNeill 5:89031b2f5316 915 memcpy(
Charles MacNeill 5:89031b2f5316 916 &(pcal_data->add_off_cal_data),
Charles MacNeill 5:89031b2f5316 917 &(pdev->add_off_cal_data),
Charles MacNeill 5:89031b2f5316 918 sizeof(VL53LX_additional_offset_cal_data_t));
Charles MacNeill 5:89031b2f5316 919
Charles MacNeill 5:89031b2f5316 920
Charles MacNeill 5:89031b2f5316 921 memcpy(
Charles MacNeill 5:89031b2f5316 922 &(pcal_data->optical_centre),
Charles MacNeill 5:89031b2f5316 923 &(pdev->optical_centre),
Charles MacNeill 5:89031b2f5316 924 sizeof(VL53LX_optical_centre_t));
Charles MacNeill 5:89031b2f5316 925
Charles MacNeill 5:89031b2f5316 926
Charles MacNeill 5:89031b2f5316 927 memcpy(
Charles MacNeill 5:89031b2f5316 928 &(pcal_data->xtalkhisto),
Charles MacNeill 5:89031b2f5316 929 &(pdev->xtalk_shapes),
Charles MacNeill 5:89031b2f5316 930 sizeof(VL53LX_xtalk_histogram_data_t));
Charles MacNeill 5:89031b2f5316 931
Charles MacNeill 5:89031b2f5316 932
Charles MacNeill 5:89031b2f5316 933 memcpy(
Charles MacNeill 5:89031b2f5316 934 &(pcal_data->gain_cal),
Charles MacNeill 5:89031b2f5316 935 &(pdev->gain_cal),
Charles MacNeill 5:89031b2f5316 936 sizeof(VL53LX_gain_calibration_data_t));
Charles MacNeill 5:89031b2f5316 937
Charles MacNeill 5:89031b2f5316 938
Charles MacNeill 5:89031b2f5316 939 memcpy(
Charles MacNeill 5:89031b2f5316 940 &(pcal_data->cal_peak_rate_map),
Charles MacNeill 5:89031b2f5316 941 &(pdev->cal_peak_rate_map),
Charles MacNeill 5:89031b2f5316 942 sizeof(VL53LX_cal_peak_rate_map_t));
Charles MacNeill 5:89031b2f5316 943
Charles MacNeill 5:89031b2f5316 944
Charles MacNeill 5:89031b2f5316 945 memcpy(
Charles MacNeill 5:89031b2f5316 946 &(pcal_data->per_vcsel_cal_data),
Charles MacNeill 5:89031b2f5316 947 &(pdev->per_vcsel_cal_data),
Charles MacNeill 5:89031b2f5316 948 sizeof(VL53LX_per_vcsel_period_offset_cal_data_t));
Charles MacNeill 5:89031b2f5316 949
Charles MacNeill 5:89031b2f5316 950 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 951
Charles MacNeill 5:89031b2f5316 952 return status;
Charles MacNeill 5:89031b2f5316 953 }
Charles MacNeill 5:89031b2f5316 954
Charles MacNeill 5:89031b2f5316 955
Charles MacNeill 5:89031b2f5316 956 VL53LX_Error VL53LX_set_inter_measurement_period_ms(
Charles MacNeill 5:89031b2f5316 957 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 958 uint32_t inter_measurement_period_ms)
Charles MacNeill 5:89031b2f5316 959 {
Charles MacNeill 5:89031b2f5316 960
Charles MacNeill 5:89031b2f5316 961
Charles MacNeill 5:89031b2f5316 962 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 963 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 964
Charles MacNeill 5:89031b2f5316 965 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 966
Charles MacNeill 5:89031b2f5316 967 if (pdev->dbg_results.result__osc_calibrate_val == 0)
Charles MacNeill 5:89031b2f5316 968 status = VL53LX_ERROR_DIVISION_BY_ZERO;
Charles MacNeill 5:89031b2f5316 969
Charles MacNeill 5:89031b2f5316 970 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 971 pdev->inter_measurement_period_ms = inter_measurement_period_ms;
Charles MacNeill 5:89031b2f5316 972 pdev->tim_cfg.system__intermeasurement_period =
Charles MacNeill 5:89031b2f5316 973 inter_measurement_period_ms *
Charles MacNeill 5:89031b2f5316 974 (uint32_t)pdev->dbg_results.result__osc_calibrate_val;
Charles MacNeill 5:89031b2f5316 975 }
Charles MacNeill 5:89031b2f5316 976
Charles MacNeill 5:89031b2f5316 977 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 978
Charles MacNeill 5:89031b2f5316 979 return status;
Charles MacNeill 5:89031b2f5316 980 }
Charles MacNeill 5:89031b2f5316 981
Charles MacNeill 5:89031b2f5316 982
Charles MacNeill 5:89031b2f5316 983 VL53LX_Error VL53LX_get_inter_measurement_period_ms(
Charles MacNeill 5:89031b2f5316 984 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 985 uint32_t *pinter_measurement_period_ms)
Charles MacNeill 5:89031b2f5316 986 {
Charles MacNeill 5:89031b2f5316 987
Charles MacNeill 5:89031b2f5316 988
Charles MacNeill 5:89031b2f5316 989 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 990 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 991
Charles MacNeill 5:89031b2f5316 992 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 993
Charles MacNeill 5:89031b2f5316 994 if (pdev->dbg_results.result__osc_calibrate_val == 0)
Charles MacNeill 5:89031b2f5316 995 status = VL53LX_ERROR_DIVISION_BY_ZERO;
Charles MacNeill 5:89031b2f5316 996
Charles MacNeill 5:89031b2f5316 997 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 998 *pinter_measurement_period_ms =
Charles MacNeill 5:89031b2f5316 999 pdev->tim_cfg.system__intermeasurement_period /
Charles MacNeill 5:89031b2f5316 1000 (uint32_t)pdev->dbg_results.result__osc_calibrate_val;
Charles MacNeill 5:89031b2f5316 1001
Charles MacNeill 5:89031b2f5316 1002
Charles MacNeill 5:89031b2f5316 1003 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1004
Charles MacNeill 5:89031b2f5316 1005 return status;
Charles MacNeill 5:89031b2f5316 1006 }
Charles MacNeill 5:89031b2f5316 1007
Charles MacNeill 5:89031b2f5316 1008
Charles MacNeill 5:89031b2f5316 1009 VL53LX_Error VL53LX_set_timeouts_us(
Charles MacNeill 5:89031b2f5316 1010 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1011 uint32_t phasecal_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1012 uint32_t mm_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1013 uint32_t range_config_timeout_us)
Charles MacNeill 5:89031b2f5316 1014 {
Charles MacNeill 5:89031b2f5316 1015
Charles MacNeill 5:89031b2f5316 1016
Charles MacNeill 5:89031b2f5316 1017 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1018 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 1019 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1020
Charles MacNeill 5:89031b2f5316 1021 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1022
Charles MacNeill 5:89031b2f5316 1023 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0)
Charles MacNeill 5:89031b2f5316 1024 status = VL53LX_ERROR_DIVISION_BY_ZERO;
Charles MacNeill 5:89031b2f5316 1025
Charles MacNeill 5:89031b2f5316 1026 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1027
Charles MacNeill 5:89031b2f5316 1028 pdev->phasecal_config_timeout_us = phasecal_config_timeout_us;
Charles MacNeill 5:89031b2f5316 1029 pdev->mm_config_timeout_us = mm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 1030 pdev->range_config_timeout_us = range_config_timeout_us;
Charles MacNeill 5:89031b2f5316 1031
Charles MacNeill 5:89031b2f5316 1032 status =
Charles MacNeill 5:89031b2f5316 1033 VL53LX_calc_timeout_register_values(
Charles MacNeill 5:89031b2f5316 1034 phasecal_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1035 mm_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1036 range_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1037 pdev->stat_nvm.osc_measured__fast_osc__frequency,
Charles MacNeill 5:89031b2f5316 1038 &(pdev->gen_cfg),
Charles MacNeill 5:89031b2f5316 1039 &(pdev->tim_cfg));
Charles MacNeill 5:89031b2f5316 1040 }
Charles MacNeill 5:89031b2f5316 1041
Charles MacNeill 5:89031b2f5316 1042 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1043
Charles MacNeill 5:89031b2f5316 1044 return status;
Charles MacNeill 5:89031b2f5316 1045 }
Charles MacNeill 5:89031b2f5316 1046
Charles MacNeill 5:89031b2f5316 1047
Charles MacNeill 5:89031b2f5316 1048 VL53LX_Error VL53LX_get_timeouts_us(
Charles MacNeill 5:89031b2f5316 1049 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1050 uint32_t *pphasecal_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1051 uint32_t *pmm_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1052 uint32_t *prange_config_timeout_us)
Charles MacNeill 5:89031b2f5316 1053 {
Charles MacNeill 5:89031b2f5316 1054
Charles MacNeill 5:89031b2f5316 1055
Charles MacNeill 5:89031b2f5316 1056 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1057 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 1058 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1059
Charles MacNeill 5:89031b2f5316 1060 uint32_t macro_period_us = 0;
Charles MacNeill 5:89031b2f5316 1061 uint16_t timeout_encoded = 0;
Charles MacNeill 5:89031b2f5316 1062
Charles MacNeill 5:89031b2f5316 1063 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1064
Charles MacNeill 5:89031b2f5316 1065 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0)
Charles MacNeill 5:89031b2f5316 1066 status = VL53LX_ERROR_DIVISION_BY_ZERO;
Charles MacNeill 5:89031b2f5316 1067
Charles MacNeill 5:89031b2f5316 1068 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1069
Charles MacNeill 5:89031b2f5316 1070
Charles MacNeill 5:89031b2f5316 1071 macro_period_us =
Charles MacNeill 5:89031b2f5316 1072 VL53LX_calc_macro_period_us(
Charles MacNeill 5:89031b2f5316 1073 pdev->stat_nvm.osc_measured__fast_osc__frequency,
Charles MacNeill 5:89031b2f5316 1074 pdev->tim_cfg.range_config__vcsel_period_a);
Charles MacNeill 5:89031b2f5316 1075
Charles MacNeill 5:89031b2f5316 1076
Charles MacNeill 5:89031b2f5316 1077
Charles MacNeill 5:89031b2f5316 1078 *pphasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1079 VL53LX_calc_timeout_us(
Charles MacNeill 5:89031b2f5316 1080 (uint32_t)pdev->gen_cfg.phasecal_config__timeout_macrop,
Charles MacNeill 5:89031b2f5316 1081 macro_period_us);
Charles MacNeill 5:89031b2f5316 1082
Charles MacNeill 5:89031b2f5316 1083
Charles MacNeill 5:89031b2f5316 1084
Charles MacNeill 5:89031b2f5316 1085 timeout_encoded =
Charles MacNeill 5:89031b2f5316 1086 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_hi;
Charles MacNeill 5:89031b2f5316 1087 timeout_encoded = (timeout_encoded << 8) +
Charles MacNeill 5:89031b2f5316 1088 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_lo;
Charles MacNeill 5:89031b2f5316 1089
Charles MacNeill 5:89031b2f5316 1090 *pmm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1091 VL53LX_calc_decoded_timeout_us(
Charles MacNeill 5:89031b2f5316 1092 timeout_encoded,
Charles MacNeill 5:89031b2f5316 1093 macro_period_us);
Charles MacNeill 5:89031b2f5316 1094
Charles MacNeill 5:89031b2f5316 1095
Charles MacNeill 5:89031b2f5316 1096
Charles MacNeill 5:89031b2f5316 1097 timeout_encoded =
Charles MacNeill 5:89031b2f5316 1098 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_hi;
Charles MacNeill 5:89031b2f5316 1099 timeout_encoded = (timeout_encoded << 8) +
Charles MacNeill 5:89031b2f5316 1100 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_lo;
Charles MacNeill 5:89031b2f5316 1101
Charles MacNeill 5:89031b2f5316 1102 *prange_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1103 VL53LX_calc_decoded_timeout_us(
Charles MacNeill 5:89031b2f5316 1104 timeout_encoded,
Charles MacNeill 5:89031b2f5316 1105 macro_period_us);
Charles MacNeill 5:89031b2f5316 1106
Charles MacNeill 5:89031b2f5316 1107 pdev->phasecal_config_timeout_us = *pphasecal_config_timeout_us;
Charles MacNeill 5:89031b2f5316 1108 pdev->mm_config_timeout_us = *pmm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 1109 pdev->range_config_timeout_us = *prange_config_timeout_us;
Charles MacNeill 5:89031b2f5316 1110
Charles MacNeill 5:89031b2f5316 1111 }
Charles MacNeill 5:89031b2f5316 1112
Charles MacNeill 5:89031b2f5316 1113 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1114
Charles MacNeill 5:89031b2f5316 1115 return status;
Charles MacNeill 5:89031b2f5316 1116 }
Charles MacNeill 5:89031b2f5316 1117
Charles MacNeill 5:89031b2f5316 1118
Charles MacNeill 5:89031b2f5316 1119 VL53LX_Error VL53LX_set_user_zone(
Charles MacNeill 5:89031b2f5316 1120 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1121 VL53LX_user_zone_t *puser_zone)
Charles MacNeill 5:89031b2f5316 1122 {
Charles MacNeill 5:89031b2f5316 1123
Charles MacNeill 5:89031b2f5316 1124
Charles MacNeill 5:89031b2f5316 1125 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1126 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1127
Charles MacNeill 5:89031b2f5316 1128 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1129
Charles MacNeill 5:89031b2f5316 1130
Charles MacNeill 5:89031b2f5316 1131 VL53LX_encode_row_col(
Charles MacNeill 5:89031b2f5316 1132 puser_zone->y_centre,
Charles MacNeill 5:89031b2f5316 1133 puser_zone->x_centre,
Charles MacNeill 5:89031b2f5316 1134 &(pdev->dyn_cfg.roi_config__user_roi_centre_spad));
Charles MacNeill 5:89031b2f5316 1135
Charles MacNeill 5:89031b2f5316 1136
Charles MacNeill 5:89031b2f5316 1137 VL53LX_encode_zone_size(
Charles MacNeill 5:89031b2f5316 1138 puser_zone->width,
Charles MacNeill 5:89031b2f5316 1139 puser_zone->height,
Charles MacNeill 5:89031b2f5316 1140 &(pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size));
Charles MacNeill 5:89031b2f5316 1141
Charles MacNeill 5:89031b2f5316 1142
Charles MacNeill 5:89031b2f5316 1143
Charles MacNeill 5:89031b2f5316 1144 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1145
Charles MacNeill 5:89031b2f5316 1146 return status;
Charles MacNeill 5:89031b2f5316 1147 }
Charles MacNeill 5:89031b2f5316 1148
Charles MacNeill 5:89031b2f5316 1149
Charles MacNeill 5:89031b2f5316 1150 VL53LX_Error VL53LX_get_user_zone(
Charles MacNeill 5:89031b2f5316 1151 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1152 VL53LX_user_zone_t *puser_zone)
Charles MacNeill 5:89031b2f5316 1153 {
Charles MacNeill 5:89031b2f5316 1154
Charles MacNeill 5:89031b2f5316 1155
Charles MacNeill 5:89031b2f5316 1156 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1157 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1158
Charles MacNeill 5:89031b2f5316 1159 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1160
Charles MacNeill 5:89031b2f5316 1161
Charles MacNeill 5:89031b2f5316 1162 VL53LX_decode_row_col(
Charles MacNeill 5:89031b2f5316 1163 pdev->dyn_cfg.roi_config__user_roi_centre_spad,
Charles MacNeill 5:89031b2f5316 1164 &(puser_zone->y_centre),
Charles MacNeill 5:89031b2f5316 1165 &(puser_zone->x_centre));
Charles MacNeill 5:89031b2f5316 1166
Charles MacNeill 5:89031b2f5316 1167
Charles MacNeill 5:89031b2f5316 1168 VL53LX_decode_zone_size(
Charles MacNeill 5:89031b2f5316 1169 pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size,
Charles MacNeill 5:89031b2f5316 1170 &(puser_zone->width),
Charles MacNeill 5:89031b2f5316 1171 &(puser_zone->height));
Charles MacNeill 5:89031b2f5316 1172
Charles MacNeill 5:89031b2f5316 1173 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1174
Charles MacNeill 5:89031b2f5316 1175 return status;
Charles MacNeill 5:89031b2f5316 1176 }
Charles MacNeill 5:89031b2f5316 1177
Charles MacNeill 5:89031b2f5316 1178
Charles MacNeill 5:89031b2f5316 1179
Charles MacNeill 5:89031b2f5316 1180 VL53LX_Error VL53LX_get_mode_mitigation_roi(
Charles MacNeill 5:89031b2f5316 1181 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1182 VL53LX_user_zone_t *pmm_roi)
Charles MacNeill 5:89031b2f5316 1183 {
Charles MacNeill 5:89031b2f5316 1184
Charles MacNeill 5:89031b2f5316 1185
Charles MacNeill 5:89031b2f5316 1186 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1187 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1188
Charles MacNeill 5:89031b2f5316 1189 uint8_t x = 0;
Charles MacNeill 5:89031b2f5316 1190 uint8_t y = 0;
Charles MacNeill 5:89031b2f5316 1191 uint8_t xy_size = 0;
Charles MacNeill 5:89031b2f5316 1192
Charles MacNeill 5:89031b2f5316 1193 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1194
Charles MacNeill 5:89031b2f5316 1195
Charles MacNeill 5:89031b2f5316 1196 VL53LX_decode_row_col(
Charles MacNeill 5:89031b2f5316 1197 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
Charles MacNeill 5:89031b2f5316 1198 &y,
Charles MacNeill 5:89031b2f5316 1199 &x);
Charles MacNeill 5:89031b2f5316 1200
Charles MacNeill 5:89031b2f5316 1201 pmm_roi->x_centre = x;
Charles MacNeill 5:89031b2f5316 1202 pmm_roi->y_centre = y;
Charles MacNeill 5:89031b2f5316 1203
Charles MacNeill 5:89031b2f5316 1204
Charles MacNeill 5:89031b2f5316 1205 xy_size = pdev->nvm_copy_data.roi_config__mode_roi_xy_size;
Charles MacNeill 5:89031b2f5316 1206
Charles MacNeill 5:89031b2f5316 1207 pmm_roi->height = xy_size >> 4;
Charles MacNeill 5:89031b2f5316 1208 pmm_roi->width = xy_size & 0x0F;
Charles MacNeill 5:89031b2f5316 1209
Charles MacNeill 5:89031b2f5316 1210 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1211
Charles MacNeill 5:89031b2f5316 1212 return status;
Charles MacNeill 5:89031b2f5316 1213 }
Charles MacNeill 5:89031b2f5316 1214
Charles MacNeill 5:89031b2f5316 1215 VL53LX_Error VL53LX_init_zone_config_histogram_bins(
Charles MacNeill 5:89031b2f5316 1216 VL53LX_zone_config_t *pdata)
Charles MacNeill 5:89031b2f5316 1217 {
Charles MacNeill 5:89031b2f5316 1218
Charles MacNeill 5:89031b2f5316 1219
Charles MacNeill 5:89031b2f5316 1220 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1221
Charles MacNeill 5:89031b2f5316 1222 uint8_t i;
Charles MacNeill 5:89031b2f5316 1223
Charles MacNeill 5:89031b2f5316 1224 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1225
Charles MacNeill 5:89031b2f5316 1226 for (i = 0; i < pdata->max_zones; i++)
Charles MacNeill 5:89031b2f5316 1227 pdata->bin_config[i] = VL53LX_ZONECONFIG_BINCONFIG__LOWAMB;
Charles MacNeill 5:89031b2f5316 1228
Charles MacNeill 5:89031b2f5316 1229 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1230
Charles MacNeill 5:89031b2f5316 1231 return status;
Charles MacNeill 5:89031b2f5316 1232 }
Charles MacNeill 5:89031b2f5316 1233
Charles MacNeill 5:89031b2f5316 1234 VL53LX_Error VL53LX_set_zone_config(
Charles MacNeill 5:89031b2f5316 1235 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1236 VL53LX_zone_config_t *pzone_cfg)
Charles MacNeill 5:89031b2f5316 1237 {
Charles MacNeill 5:89031b2f5316 1238
Charles MacNeill 5:89031b2f5316 1239
Charles MacNeill 5:89031b2f5316 1240
Charles MacNeill 5:89031b2f5316 1241 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1242 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1243
Charles MacNeill 5:89031b2f5316 1244 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1245
Charles MacNeill 5:89031b2f5316 1246
Charles MacNeill 5:89031b2f5316 1247 memcpy(&(pdev->zone_cfg.user_zones), &(pzone_cfg->user_zones),
Charles MacNeill 5:89031b2f5316 1248 sizeof(pdev->zone_cfg.user_zones));
Charles MacNeill 5:89031b2f5316 1249
Charles MacNeill 5:89031b2f5316 1250
Charles MacNeill 5:89031b2f5316 1251 pdev->zone_cfg.max_zones = pzone_cfg->max_zones;
Charles MacNeill 5:89031b2f5316 1252 pdev->zone_cfg.active_zones = pzone_cfg->active_zones;
Charles MacNeill 5:89031b2f5316 1253
Charles MacNeill 5:89031b2f5316 1254 status = VL53LX_init_zone_config_histogram_bins(&pdev->zone_cfg);
Charles MacNeill 5:89031b2f5316 1255
Charles MacNeill 5:89031b2f5316 1256
Charles MacNeill 5:89031b2f5316 1257
Charles MacNeill 5:89031b2f5316 1258 if (pzone_cfg->active_zones == 0)
Charles MacNeill 5:89031b2f5316 1259 pdev->gen_cfg.global_config__stream_divider = 0;
Charles MacNeill 5:89031b2f5316 1260 else if (pzone_cfg->active_zones < VL53LX_MAX_USER_ZONES)
Charles MacNeill 5:89031b2f5316 1261 pdev->gen_cfg.global_config__stream_divider =
Charles MacNeill 5:89031b2f5316 1262 pzone_cfg->active_zones + 1;
Charles MacNeill 5:89031b2f5316 1263 else
Charles MacNeill 5:89031b2f5316 1264 pdev->gen_cfg.global_config__stream_divider =
Charles MacNeill 5:89031b2f5316 1265 VL53LX_MAX_USER_ZONES + 1;
Charles MacNeill 5:89031b2f5316 1266
Charles MacNeill 5:89031b2f5316 1267 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1268
Charles MacNeill 5:89031b2f5316 1269 return status;
Charles MacNeill 5:89031b2f5316 1270
Charles MacNeill 5:89031b2f5316 1271 }
Charles MacNeill 5:89031b2f5316 1272
Charles MacNeill 5:89031b2f5316 1273
Charles MacNeill 5:89031b2f5316 1274 VL53LX_Error VL53LX_get_zone_config(
Charles MacNeill 5:89031b2f5316 1275 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1276 VL53LX_zone_config_t *pzone_cfg)
Charles MacNeill 5:89031b2f5316 1277 {
Charles MacNeill 5:89031b2f5316 1278
Charles MacNeill 5:89031b2f5316 1279
Charles MacNeill 5:89031b2f5316 1280 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1281 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1282
Charles MacNeill 5:89031b2f5316 1283 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1284
Charles MacNeill 5:89031b2f5316 1285
Charles MacNeill 5:89031b2f5316 1286 memcpy(pzone_cfg, &(pdev->zone_cfg), sizeof(VL53LX_zone_config_t));
Charles MacNeill 5:89031b2f5316 1287
Charles MacNeill 5:89031b2f5316 1288 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1289
Charles MacNeill 5:89031b2f5316 1290 return status;
Charles MacNeill 5:89031b2f5316 1291 }
Charles MacNeill 5:89031b2f5316 1292
Charles MacNeill 5:89031b2f5316 1293
Charles MacNeill 5:89031b2f5316 1294 VL53LX_Error VL53LX_get_preset_mode_timing_cfg(
Charles MacNeill 5:89031b2f5316 1295 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1296 VL53LX_DevicePresetModes device_preset_mode,
Charles MacNeill 5:89031b2f5316 1297 uint16_t *pdss_config__target_total_rate_mcps,
Charles MacNeill 5:89031b2f5316 1298 uint32_t *pphasecal_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1299 uint32_t *pmm_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1300 uint32_t *prange_config_timeout_us)
Charles MacNeill 5:89031b2f5316 1301 {
Charles MacNeill 5:89031b2f5316 1302 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1303 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1304
Charles MacNeill 5:89031b2f5316 1305 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1306
Charles MacNeill 5:89031b2f5316 1307
Charles MacNeill 5:89031b2f5316 1308 switch (device_preset_mode) {
Charles MacNeill 5:89031b2f5316 1309
Charles MacNeill 5:89031b2f5316 1310 case VL53LX_DEVICEPRESETMODE_STANDARD_RANGING:
Charles MacNeill 5:89031b2f5316 1311 *pdss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 1312 pdev->tuning_parms.tp_dss_target_lite_mcps;
Charles MacNeill 5:89031b2f5316 1313 *pphasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1314 pdev->tuning_parms.tp_phasecal_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 1315 *pmm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1316 pdev->tuning_parms.tp_mm_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 1317 *prange_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1318 pdev->tuning_parms.tp_range_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 1319 break;
Charles MacNeill 5:89031b2f5316 1320
Charles MacNeill 5:89031b2f5316 1321 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 1322 *pdss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 1323 pdev->tuning_parms.tp_dss_target_histo_mcps;
Charles MacNeill 5:89031b2f5316 1324 *pphasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1325 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
Charles MacNeill 5:89031b2f5316 1326 *pmm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1327 pdev->tuning_parms.tp_mm_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 1328 *prange_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1329 pdev->tuning_parms.tp_range_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 1330
Charles MacNeill 5:89031b2f5316 1331 break;
Charles MacNeill 5:89031b2f5316 1332
Charles MacNeill 5:89031b2f5316 1333 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
Charles MacNeill 5:89031b2f5316 1334 *pdss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 1335 pdev->tuning_parms.tp_dss_target_histo_mcps;
Charles MacNeill 5:89031b2f5316 1336 *pphasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1337 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
Charles MacNeill 5:89031b2f5316 1338 *pmm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1339 pdev->tuning_parms.tp_mm_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 1340 *prange_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1341 pdev->tuning_parms.tp_range_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 1342 break;
Charles MacNeill 5:89031b2f5316 1343
Charles MacNeill 5:89031b2f5316 1344
Charles MacNeill 5:89031b2f5316 1345 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 1346 *pdss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 1347 pdev->tuning_parms.tp_dss_target_histo_mcps;
Charles MacNeill 5:89031b2f5316 1348 *pphasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1349 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
Charles MacNeill 5:89031b2f5316 1350 *pmm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1351 pdev->tuning_parms.tp_mm_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 1352 *prange_config_timeout_us =
Charles MacNeill 5:89031b2f5316 1353 pdev->tuning_parms.tp_range_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 1354 break;
Charles MacNeill 5:89031b2f5316 1355
Charles MacNeill 5:89031b2f5316 1356 default:
Charles MacNeill 5:89031b2f5316 1357 status = VL53LX_ERROR_INVALID_PARAMS;
Charles MacNeill 5:89031b2f5316 1358 break;
Charles MacNeill 5:89031b2f5316 1359
Charles MacNeill 5:89031b2f5316 1360 }
Charles MacNeill 5:89031b2f5316 1361
Charles MacNeill 5:89031b2f5316 1362 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1363
Charles MacNeill 5:89031b2f5316 1364 return status;
Charles MacNeill 5:89031b2f5316 1365 }
Charles MacNeill 5:89031b2f5316 1366
Charles MacNeill 5:89031b2f5316 1367
Charles MacNeill 5:89031b2f5316 1368 VL53LX_Error VL53LX_set_preset_mode(
Charles MacNeill 5:89031b2f5316 1369 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1370 VL53LX_DevicePresetModes device_preset_mode,
Charles MacNeill 5:89031b2f5316 1371 uint16_t dss_config__target_total_rate_mcps,
Charles MacNeill 5:89031b2f5316 1372 uint32_t phasecal_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1373 uint32_t mm_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1374 uint32_t range_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1375 uint32_t inter_measurement_period_ms)
Charles MacNeill 5:89031b2f5316 1376 {
Charles MacNeill 5:89031b2f5316 1377
Charles MacNeill 5:89031b2f5316 1378
Charles MacNeill 5:89031b2f5316 1379 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1380 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 1381 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1382 VL53LX_LLDriverResults_t *pres =
Charles MacNeill 5:89031b2f5316 1383 VL53LXDevStructGetLLResultsHandle(Dev);
Charles MacNeill 5:89031b2f5316 1384
Charles MacNeill 5:89031b2f5316 1385 VL53LX_hist_post_process_config_t *phistpostprocess =
Charles MacNeill 5:89031b2f5316 1386 &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 1387
Charles MacNeill 5:89031b2f5316 1388 VL53LX_static_config_t *pstatic = &(pdev->stat_cfg);
Charles MacNeill 5:89031b2f5316 1389 VL53LX_histogram_config_t *phistogram = &(pdev->hist_cfg);
Charles MacNeill 5:89031b2f5316 1390 VL53LX_general_config_t *pgeneral = &(pdev->gen_cfg);
Charles MacNeill 5:89031b2f5316 1391 VL53LX_timing_config_t *ptiming = &(pdev->tim_cfg);
Charles MacNeill 5:89031b2f5316 1392 VL53LX_dynamic_config_t *pdynamic = &(pdev->dyn_cfg);
Charles MacNeill 5:89031b2f5316 1393 VL53LX_system_control_t *psystem = &(pdev->sys_ctrl);
Charles MacNeill 5:89031b2f5316 1394 VL53LX_zone_config_t *pzone_cfg = &(pdev->zone_cfg);
Charles MacNeill 5:89031b2f5316 1395 VL53LX_tuning_parm_storage_t *ptuning_parms = &(pdev->tuning_parms);
Charles MacNeill 5:89031b2f5316 1396
Charles MacNeill 5:89031b2f5316 1397 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1398
Charles MacNeill 5:89031b2f5316 1399
Charles MacNeill 5:89031b2f5316 1400 pdev->preset_mode = device_preset_mode;
Charles MacNeill 5:89031b2f5316 1401 pdev->mm_config_timeout_us = mm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 1402 pdev->range_config_timeout_us = range_config_timeout_us;
Charles MacNeill 5:89031b2f5316 1403 pdev->inter_measurement_period_ms = inter_measurement_period_ms;
Charles MacNeill 5:89031b2f5316 1404
Charles MacNeill 5:89031b2f5316 1405
Charles MacNeill 5:89031b2f5316 1406
Charles MacNeill 5:89031b2f5316 1407 VL53LX_init_ll_driver_state(
Charles MacNeill 5:89031b2f5316 1408 Dev,
Charles MacNeill 5:89031b2f5316 1409 VL53LX_DEVICESTATE_SW_STANDBY);
Charles MacNeill 5:89031b2f5316 1410
Charles MacNeill 5:89031b2f5316 1411
Charles MacNeill 5:89031b2f5316 1412
Charles MacNeill 5:89031b2f5316 1413 switch (device_preset_mode) {
Charles MacNeill 5:89031b2f5316 1414 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 1415
Charles MacNeill 5:89031b2f5316 1416 status = VL53LX_preset_mode_histogram_long_range(
Charles MacNeill 5:89031b2f5316 1417 phistpostprocess,
Charles MacNeill 5:89031b2f5316 1418 pstatic,
Charles MacNeill 5:89031b2f5316 1419 phistogram,
Charles MacNeill 5:89031b2f5316 1420 pgeneral,
Charles MacNeill 5:89031b2f5316 1421 ptiming,
Charles MacNeill 5:89031b2f5316 1422 pdynamic,
Charles MacNeill 5:89031b2f5316 1423 psystem,
Charles MacNeill 5:89031b2f5316 1424 ptuning_parms,
Charles MacNeill 5:89031b2f5316 1425 pzone_cfg);
Charles MacNeill 5:89031b2f5316 1426 break;
Charles MacNeill 5:89031b2f5316 1427
Charles MacNeill 5:89031b2f5316 1428 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
Charles MacNeill 5:89031b2f5316 1429 status = VL53LX_preset_mode_histogram_medium_range(
Charles MacNeill 5:89031b2f5316 1430 phistpostprocess,
Charles MacNeill 5:89031b2f5316 1431 pstatic,
Charles MacNeill 5:89031b2f5316 1432 phistogram,
Charles MacNeill 5:89031b2f5316 1433 pgeneral,
Charles MacNeill 5:89031b2f5316 1434 ptiming,
Charles MacNeill 5:89031b2f5316 1435 pdynamic,
Charles MacNeill 5:89031b2f5316 1436 psystem,
Charles MacNeill 5:89031b2f5316 1437 ptuning_parms,
Charles MacNeill 5:89031b2f5316 1438 pzone_cfg);
Charles MacNeill 5:89031b2f5316 1439 break;
Charles MacNeill 5:89031b2f5316 1440
Charles MacNeill 5:89031b2f5316 1441 case VL53LX_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 1442 status = VL53LX_preset_mode_histogram_short_range(
Charles MacNeill 5:89031b2f5316 1443 phistpostprocess,
Charles MacNeill 5:89031b2f5316 1444 pstatic,
Charles MacNeill 5:89031b2f5316 1445 phistogram,
Charles MacNeill 5:89031b2f5316 1446 pgeneral,
Charles MacNeill 5:89031b2f5316 1447 ptiming,
Charles MacNeill 5:89031b2f5316 1448 pdynamic,
Charles MacNeill 5:89031b2f5316 1449 psystem,
Charles MacNeill 5:89031b2f5316 1450 ptuning_parms,
Charles MacNeill 5:89031b2f5316 1451 pzone_cfg);
Charles MacNeill 5:89031b2f5316 1452 break;
Charles MacNeill 5:89031b2f5316 1453
Charles MacNeill 5:89031b2f5316 1454 default:
Charles MacNeill 5:89031b2f5316 1455 status = VL53LX_ERROR_INVALID_PARAMS;
Charles MacNeill 5:89031b2f5316 1456 break;
Charles MacNeill 5:89031b2f5316 1457
Charles MacNeill 5:89031b2f5316 1458 }
Charles MacNeill 5:89031b2f5316 1459
Charles MacNeill 5:89031b2f5316 1460
Charles MacNeill 5:89031b2f5316 1461
Charles MacNeill 5:89031b2f5316 1462 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1463
Charles MacNeill 5:89031b2f5316 1464 pstatic->dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 1465 dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 1466 pdev->dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 1467 dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 1468
Charles MacNeill 5:89031b2f5316 1469 }
Charles MacNeill 5:89031b2f5316 1470
Charles MacNeill 5:89031b2f5316 1471
Charles MacNeill 5:89031b2f5316 1472
Charles MacNeill 5:89031b2f5316 1473 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1474 status =
Charles MacNeill 5:89031b2f5316 1475 VL53LX_set_timeouts_us(
Charles MacNeill 5:89031b2f5316 1476 Dev,
Charles MacNeill 5:89031b2f5316 1477 phasecal_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1478 mm_config_timeout_us,
Charles MacNeill 5:89031b2f5316 1479 range_config_timeout_us);
Charles MacNeill 5:89031b2f5316 1480
Charles MacNeill 5:89031b2f5316 1481 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1482 status =
Charles MacNeill 5:89031b2f5316 1483 VL53LX_set_inter_measurement_period_ms(
Charles MacNeill 5:89031b2f5316 1484 Dev,
Charles MacNeill 5:89031b2f5316 1485 inter_measurement_period_ms);
Charles MacNeill 5:89031b2f5316 1486
Charles MacNeill 5:89031b2f5316 1487
Charles MacNeill 5:89031b2f5316 1488
Charles MacNeill 5:89031b2f5316 1489 V53L1_init_zone_results_structure(
Charles MacNeill 5:89031b2f5316 1490 pdev->zone_cfg.active_zones+1,
Charles MacNeill 5:89031b2f5316 1491 &(pres->zone_results));
Charles MacNeill 5:89031b2f5316 1492
Charles MacNeill 5:89031b2f5316 1493 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1494
Charles MacNeill 5:89031b2f5316 1495 return status;
Charles MacNeill 5:89031b2f5316 1496 }
Charles MacNeill 5:89031b2f5316 1497
Charles MacNeill 5:89031b2f5316 1498
Charles MacNeill 5:89031b2f5316 1499 VL53LX_Error VL53LX_enable_xtalk_compensation(
Charles MacNeill 5:89031b2f5316 1500 VL53LX_DEV Dev)
Charles MacNeill 5:89031b2f5316 1501 {
Charles MacNeill 5:89031b2f5316 1502
Charles MacNeill 5:89031b2f5316 1503
Charles MacNeill 5:89031b2f5316 1504 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1505 uint32_t tempu32;
Charles MacNeill 5:89031b2f5316 1506
Charles MacNeill 5:89031b2f5316 1507 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1508 VL53LX_xtalk_config_t *pC = &(pdev->xtalk_cfg);
Charles MacNeill 5:89031b2f5316 1509 VL53LX_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 1510 VL53LX_customer_nvm_managed_t *pN = &(pdev->customer);
Charles MacNeill 5:89031b2f5316 1511
Charles MacNeill 5:89031b2f5316 1512 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1513
Charles MacNeill 5:89031b2f5316 1514
Charles MacNeill 5:89031b2f5316 1515 tempu32 = VL53LX_calc_crosstalk_plane_offset_with_margin(
Charles MacNeill 5:89031b2f5316 1516 pC->algo__crosstalk_compensation_plane_offset_kcps,
Charles MacNeill 5:89031b2f5316 1517 pC->lite_mode_crosstalk_margin_kcps);
Charles MacNeill 5:89031b2f5316 1518 if (tempu32 > 0xFFFF)
Charles MacNeill 5:89031b2f5316 1519 tempu32 = 0xFFFF;
Charles MacNeill 5:89031b2f5316 1520
Charles MacNeill 5:89031b2f5316 1521 pN->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 1522 (uint16_t)tempu32;
Charles MacNeill 5:89031b2f5316 1523
Charles MacNeill 5:89031b2f5316 1524 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 1525 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 1526
Charles MacNeill 5:89031b2f5316 1527 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 1528 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 1529
Charles MacNeill 5:89031b2f5316 1530
Charles MacNeill 5:89031b2f5316 1531 pHP->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 1532 VL53LX_calc_crosstalk_plane_offset_with_margin(
Charles MacNeill 5:89031b2f5316 1533 pC->algo__crosstalk_compensation_plane_offset_kcps,
Charles MacNeill 5:89031b2f5316 1534 pC->histogram_mode_crosstalk_margin_kcps);
Charles MacNeill 5:89031b2f5316 1535
Charles MacNeill 5:89031b2f5316 1536 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps
Charles MacNeill 5:89031b2f5316 1537 = pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 1538 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps
Charles MacNeill 5:89031b2f5316 1539 = pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 1540
Charles MacNeill 5:89031b2f5316 1541
Charles MacNeill 5:89031b2f5316 1542
Charles MacNeill 5:89031b2f5316 1543 pC->global_crosstalk_compensation_enable = 0x01;
Charles MacNeill 5:89031b2f5316 1544
Charles MacNeill 5:89031b2f5316 1545 pHP->algo__crosstalk_compensation_enable =
Charles MacNeill 5:89031b2f5316 1546 pC->global_crosstalk_compensation_enable;
Charles MacNeill 5:89031b2f5316 1547
Charles MacNeill 5:89031b2f5316 1548
Charles MacNeill 5:89031b2f5316 1549
Charles MacNeill 5:89031b2f5316 1550
Charles MacNeill 5:89031b2f5316 1551 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1552 pC->crosstalk_range_ignore_threshold_rate_mcps =
Charles MacNeill 5:89031b2f5316 1553 VL53LX_calc_range_ignore_threshold(
Charles MacNeill 5:89031b2f5316 1554 pC->algo__crosstalk_compensation_plane_offset_kcps,
Charles MacNeill 5:89031b2f5316 1555 pC->algo__crosstalk_compensation_x_plane_gradient_kcps,
Charles MacNeill 5:89031b2f5316 1556 pC->algo__crosstalk_compensation_y_plane_gradient_kcps,
Charles MacNeill 5:89031b2f5316 1557 pC->crosstalk_range_ignore_threshold_mult);
Charles MacNeill 5:89031b2f5316 1558 }
Charles MacNeill 5:89031b2f5316 1559
Charles MacNeill 5:89031b2f5316 1560
Charles MacNeill 5:89031b2f5316 1561
Charles MacNeill 5:89031b2f5316 1562 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1563 status =
Charles MacNeill 5:89031b2f5316 1564 VL53LX_set_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 1565 Dev,
Charles MacNeill 5:89031b2f5316 1566 &(pdev->customer));
Charles MacNeill 5:89031b2f5316 1567
Charles MacNeill 5:89031b2f5316 1568 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1569
Charles MacNeill 5:89031b2f5316 1570 return status;
Charles MacNeill 5:89031b2f5316 1571
Charles MacNeill 5:89031b2f5316 1572 }
Charles MacNeill 5:89031b2f5316 1573
Charles MacNeill 5:89031b2f5316 1574 void VL53LX_get_xtalk_compensation_enable(
Charles MacNeill 5:89031b2f5316 1575 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1576 uint8_t *pcrosstalk_compensation_enable)
Charles MacNeill 5:89031b2f5316 1577 {
Charles MacNeill 5:89031b2f5316 1578
Charles MacNeill 5:89031b2f5316 1579
Charles MacNeill 5:89031b2f5316 1580 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1581
Charles MacNeill 5:89031b2f5316 1582 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1583
Charles MacNeill 5:89031b2f5316 1584
Charles MacNeill 5:89031b2f5316 1585
Charles MacNeill 5:89031b2f5316 1586 *pcrosstalk_compensation_enable =
Charles MacNeill 5:89031b2f5316 1587 pdev->xtalk_cfg.global_crosstalk_compensation_enable;
Charles MacNeill 5:89031b2f5316 1588
Charles MacNeill 5:89031b2f5316 1589 }
Charles MacNeill 5:89031b2f5316 1590
Charles MacNeill 5:89031b2f5316 1591
Charles MacNeill 5:89031b2f5316 1592 VL53LX_Error VL53LX_disable_xtalk_compensation(
Charles MacNeill 5:89031b2f5316 1593 VL53LX_DEV Dev)
Charles MacNeill 5:89031b2f5316 1594 {
Charles MacNeill 5:89031b2f5316 1595
Charles MacNeill 5:89031b2f5316 1596
Charles MacNeill 5:89031b2f5316 1597 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1598
Charles MacNeill 5:89031b2f5316 1599 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1600 VL53LX_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 1601 VL53LX_customer_nvm_managed_t *pN = &(pdev->customer);
Charles MacNeill 5:89031b2f5316 1602
Charles MacNeill 5:89031b2f5316 1603 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1604
Charles MacNeill 5:89031b2f5316 1605
Charles MacNeill 5:89031b2f5316 1606 pN->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 1607 0x00;
Charles MacNeill 5:89031b2f5316 1608
Charles MacNeill 5:89031b2f5316 1609 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 1610 0x00;
Charles MacNeill 5:89031b2f5316 1611
Charles MacNeill 5:89031b2f5316 1612 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 1613 0x00;
Charles MacNeill 5:89031b2f5316 1614
Charles MacNeill 5:89031b2f5316 1615
Charles MacNeill 5:89031b2f5316 1616
Charles MacNeill 5:89031b2f5316 1617 pdev->xtalk_cfg.global_crosstalk_compensation_enable = 0x00;
Charles MacNeill 5:89031b2f5316 1618
Charles MacNeill 5:89031b2f5316 1619 pHP->algo__crosstalk_compensation_enable =
Charles MacNeill 5:89031b2f5316 1620 pdev->xtalk_cfg.global_crosstalk_compensation_enable;
Charles MacNeill 5:89031b2f5316 1621
Charles MacNeill 5:89031b2f5316 1622
Charles MacNeill 5:89031b2f5316 1623
Charles MacNeill 5:89031b2f5316 1624 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1625 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps =
Charles MacNeill 5:89031b2f5316 1626 0x0000;
Charles MacNeill 5:89031b2f5316 1627 }
Charles MacNeill 5:89031b2f5316 1628
Charles MacNeill 5:89031b2f5316 1629
Charles MacNeill 5:89031b2f5316 1630
Charles MacNeill 5:89031b2f5316 1631 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1632 status =
Charles MacNeill 5:89031b2f5316 1633 VL53LX_set_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 1634 Dev,
Charles MacNeill 5:89031b2f5316 1635 &(pdev->customer));
Charles MacNeill 5:89031b2f5316 1636 }
Charles MacNeill 5:89031b2f5316 1637 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1638
Charles MacNeill 5:89031b2f5316 1639 return status;
Charles MacNeill 5:89031b2f5316 1640
Charles MacNeill 5:89031b2f5316 1641 }
Charles MacNeill 5:89031b2f5316 1642
Charles MacNeill 5:89031b2f5316 1643
Charles MacNeill 5:89031b2f5316 1644 VL53LX_Error VL53LX_init_and_start_range(
Charles MacNeill 5:89031b2f5316 1645 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1646 uint8_t measurement_mode,
Charles MacNeill 5:89031b2f5316 1647 VL53LX_DeviceConfigLevel device_config_level)
Charles MacNeill 5:89031b2f5316 1648 {
Charles MacNeill 5:89031b2f5316 1649
Charles MacNeill 5:89031b2f5316 1650
Charles MacNeill 5:89031b2f5316 1651 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1652 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1653 VL53LX_LLDriverResults_t *pres =
Charles MacNeill 5:89031b2f5316 1654 VL53LXDevStructGetLLResultsHandle(Dev);
Charles MacNeill 5:89031b2f5316 1655
Charles MacNeill 5:89031b2f5316 1656 uint8_t buffer[VL53LX_MAX_I2C_XFER_SIZE];
Charles MacNeill 5:89031b2f5316 1657
Charles MacNeill 5:89031b2f5316 1658 VL53LX_static_nvm_managed_t *pstatic_nvm = &(pdev->stat_nvm);
Charles MacNeill 5:89031b2f5316 1659 VL53LX_customer_nvm_managed_t *pcustomer_nvm = &(pdev->customer);
Charles MacNeill 5:89031b2f5316 1660 VL53LX_static_config_t *pstatic = &(pdev->stat_cfg);
Charles MacNeill 5:89031b2f5316 1661 VL53LX_general_config_t *pgeneral = &(pdev->gen_cfg);
Charles MacNeill 5:89031b2f5316 1662 VL53LX_timing_config_t *ptiming = &(pdev->tim_cfg);
Charles MacNeill 5:89031b2f5316 1663 VL53LX_dynamic_config_t *pdynamic = &(pdev->dyn_cfg);
Charles MacNeill 5:89031b2f5316 1664 VL53LX_system_control_t *psystem = &(pdev->sys_ctrl);
Charles MacNeill 5:89031b2f5316 1665
Charles MacNeill 5:89031b2f5316 1666 VL53LX_ll_driver_state_t *pstate = &(pdev->ll_state);
Charles MacNeill 5:89031b2f5316 1667 VL53LX_customer_nvm_managed_t *pN = &(pdev->customer);
Charles MacNeill 5:89031b2f5316 1668
Charles MacNeill 5:89031b2f5316 1669 uint8_t *pbuffer = &buffer[0];
Charles MacNeill 5:89031b2f5316 1670 uint16_t i = 0;
Charles MacNeill 5:89031b2f5316 1671 uint16_t i2c_index = 0;
Charles MacNeill 5:89031b2f5316 1672 uint16_t i2c_buffer_offset_bytes = 0;
Charles MacNeill 5:89031b2f5316 1673 uint16_t i2c_buffer_size_bytes = 0;
Charles MacNeill 5:89031b2f5316 1674
Charles MacNeill 5:89031b2f5316 1675 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1676
Charles MacNeill 5:89031b2f5316 1677
Charles MacNeill 5:89031b2f5316 1678 pdev->measurement_mode = measurement_mode;
Charles MacNeill 5:89031b2f5316 1679
Charles MacNeill 5:89031b2f5316 1680
Charles MacNeill 5:89031b2f5316 1681
Charles MacNeill 5:89031b2f5316 1682 psystem->system__mode_start =
Charles MacNeill 5:89031b2f5316 1683 (psystem->system__mode_start &
Charles MacNeill 5:89031b2f5316 1684 VL53LX_DEVICEMEASUREMENTMODE_STOP_MASK) |
Charles MacNeill 5:89031b2f5316 1685 measurement_mode;
Charles MacNeill 5:89031b2f5316 1686
Charles MacNeill 5:89031b2f5316 1687
Charles MacNeill 5:89031b2f5316 1688
Charles MacNeill 5:89031b2f5316 1689 status =
Charles MacNeill 5:89031b2f5316 1690 VL53LX_set_user_zone(
Charles MacNeill 5:89031b2f5316 1691 Dev,
Charles MacNeill 5:89031b2f5316 1692 &(pdev->zone_cfg.user_zones[pdev->ll_state.cfg_zone_id]));
Charles MacNeill 5:89031b2f5316 1693
Charles MacNeill 5:89031b2f5316 1694 if (pdev->zone_cfg.active_zones > 0) {
Charles MacNeill 5:89031b2f5316 1695 status =
Charles MacNeill 5:89031b2f5316 1696 VL53LX_set_zone_dss_config(
Charles MacNeill 5:89031b2f5316 1697 Dev,
Charles MacNeill 5:89031b2f5316 1698 &(pres->zone_dyn_cfgs.VL53LX_p_003[pdev->ll_state.cfg_zone_id])
Charles MacNeill 5:89031b2f5316 1699 );
Charles MacNeill 5:89031b2f5316 1700 }
Charles MacNeill 5:89031b2f5316 1701
Charles MacNeill 5:89031b2f5316 1702
Charles MacNeill 5:89031b2f5316 1703
Charles MacNeill 5:89031b2f5316 1704 if (((pdev->sys_ctrl.system__mode_start &
Charles MacNeill 5:89031b2f5316 1705 VL53LX_DEVICESCHEDULERMODE_HISTOGRAM) == 0x00) &&
Charles MacNeill 5:89031b2f5316 1706 (pdev->xtalk_cfg.global_crosstalk_compensation_enable
Charles MacNeill 5:89031b2f5316 1707 == 0x01)) {
Charles MacNeill 5:89031b2f5316 1708 pdev->stat_cfg.algo__range_ignore_threshold_mcps =
Charles MacNeill 5:89031b2f5316 1709 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps;
Charles MacNeill 5:89031b2f5316 1710 }
Charles MacNeill 5:89031b2f5316 1711
Charles MacNeill 5:89031b2f5316 1712
Charles MacNeill 5:89031b2f5316 1713
Charles MacNeill 5:89031b2f5316 1714
Charles MacNeill 5:89031b2f5316 1715
Charles MacNeill 5:89031b2f5316 1716 if (pdev->low_power_auto_data.low_power_auto_range_count == 0xFF)
Charles MacNeill 5:89031b2f5316 1717 pdev->low_power_auto_data.low_power_auto_range_count = 0x0;
Charles MacNeill 5:89031b2f5316 1718
Charles MacNeill 5:89031b2f5316 1719
Charles MacNeill 5:89031b2f5316 1720 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) &&
Charles MacNeill 5:89031b2f5316 1721 (pdev->low_power_auto_data.low_power_auto_range_count == 0)) {
Charles MacNeill 5:89031b2f5316 1722
Charles MacNeill 5:89031b2f5316 1723 pdev->low_power_auto_data.saved_interrupt_config =
Charles MacNeill 5:89031b2f5316 1724 pdev->gen_cfg.system__interrupt_config_gpio;
Charles MacNeill 5:89031b2f5316 1725
Charles MacNeill 5:89031b2f5316 1726 pdev->gen_cfg.system__interrupt_config_gpio = 1 << 5;
Charles MacNeill 5:89031b2f5316 1727
Charles MacNeill 5:89031b2f5316 1728 if ((pdev->dyn_cfg.system__sequence_config & (
Charles MacNeill 5:89031b2f5316 1729 VL53LX_SEQUENCE_MM1_EN | VL53LX_SEQUENCE_MM2_EN)) ==
Charles MacNeill 5:89031b2f5316 1730 0x0) {
Charles MacNeill 5:89031b2f5316 1731 pN->algo__part_to_part_range_offset_mm =
Charles MacNeill 5:89031b2f5316 1732 (pN->mm_config__outer_offset_mm << 2);
Charles MacNeill 5:89031b2f5316 1733 } else {
Charles MacNeill 5:89031b2f5316 1734 pN->algo__part_to_part_range_offset_mm = 0x0;
Charles MacNeill 5:89031b2f5316 1735 }
Charles MacNeill 5:89031b2f5316 1736
Charles MacNeill 5:89031b2f5316 1737
Charles MacNeill 5:89031b2f5316 1738 if (device_config_level <
Charles MacNeill 5:89031b2f5316 1739 VL53LX_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS) {
Charles MacNeill 5:89031b2f5316 1740 device_config_level =
Charles MacNeill 5:89031b2f5316 1741 VL53LX_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS;
Charles MacNeill 5:89031b2f5316 1742 }
Charles MacNeill 5:89031b2f5316 1743 }
Charles MacNeill 5:89031b2f5316 1744
Charles MacNeill 5:89031b2f5316 1745 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) &&
Charles MacNeill 5:89031b2f5316 1746 (pdev->low_power_auto_data.low_power_auto_range_count == 1)) {
Charles MacNeill 5:89031b2f5316 1747
Charles MacNeill 5:89031b2f5316 1748 pdev->gen_cfg.system__interrupt_config_gpio =
Charles MacNeill 5:89031b2f5316 1749 pdev->low_power_auto_data.saved_interrupt_config;
Charles MacNeill 5:89031b2f5316 1750
Charles MacNeill 5:89031b2f5316 1751
Charles MacNeill 5:89031b2f5316 1752 device_config_level = VL53LX_DEVICECONFIGLEVEL_FULL;
Charles MacNeill 5:89031b2f5316 1753 }
Charles MacNeill 5:89031b2f5316 1754
Charles MacNeill 5:89031b2f5316 1755
Charles MacNeill 5:89031b2f5316 1756
Charles MacNeill 5:89031b2f5316 1757
Charles MacNeill 5:89031b2f5316 1758
Charles MacNeill 5:89031b2f5316 1759 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1760 status = VL53LX_save_cfg_data(Dev);
Charles MacNeill 5:89031b2f5316 1761
Charles MacNeill 5:89031b2f5316 1762 switch (device_config_level) {
Charles MacNeill 5:89031b2f5316 1763 case VL53LX_DEVICECONFIGLEVEL_FULL:
Charles MacNeill 5:89031b2f5316 1764 i2c_index = VL53LX_STATIC_NVM_MANAGED_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 1765 break;
Charles MacNeill 5:89031b2f5316 1766 case VL53LX_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS:
Charles MacNeill 5:89031b2f5316 1767 i2c_index = VL53LX_CUSTOMER_NVM_MANAGED_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 1768 break;
Charles MacNeill 5:89031b2f5316 1769 case VL53LX_DEVICECONFIGLEVEL_STATIC_ONWARDS:
Charles MacNeill 5:89031b2f5316 1770 i2c_index = VL53LX_STATIC_CONFIG_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 1771 break;
Charles MacNeill 5:89031b2f5316 1772 case VL53LX_DEVICECONFIGLEVEL_GENERAL_ONWARDS:
Charles MacNeill 5:89031b2f5316 1773 i2c_index = VL53LX_GENERAL_CONFIG_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 1774 break;
Charles MacNeill 5:89031b2f5316 1775 case VL53LX_DEVICECONFIGLEVEL_TIMING_ONWARDS:
Charles MacNeill 5:89031b2f5316 1776 i2c_index = VL53LX_TIMING_CONFIG_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 1777 break;
Charles MacNeill 5:89031b2f5316 1778 case VL53LX_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS:
Charles MacNeill 5:89031b2f5316 1779 i2c_index = VL53LX_DYNAMIC_CONFIG_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 1780 break;
Charles MacNeill 5:89031b2f5316 1781 default:
Charles MacNeill 5:89031b2f5316 1782 i2c_index = VL53LX_SYSTEM_CONTROL_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 1783 break;
Charles MacNeill 5:89031b2f5316 1784 }
Charles MacNeill 5:89031b2f5316 1785
Charles MacNeill 5:89031b2f5316 1786
Charles MacNeill 5:89031b2f5316 1787
Charles MacNeill 5:89031b2f5316 1788 i2c_buffer_size_bytes =
Charles MacNeill 5:89031b2f5316 1789 (VL53LX_SYSTEM_CONTROL_I2C_INDEX +
Charles MacNeill 5:89031b2f5316 1790 VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES) -
Charles MacNeill 5:89031b2f5316 1791 i2c_index;
Charles MacNeill 5:89031b2f5316 1792
Charles MacNeill 5:89031b2f5316 1793
Charles MacNeill 5:89031b2f5316 1794
Charles MacNeill 5:89031b2f5316 1795 pbuffer = &buffer[0];
Charles MacNeill 5:89031b2f5316 1796 for (i = 0; i < i2c_buffer_size_bytes; i++)
Charles MacNeill 5:89031b2f5316 1797 *pbuffer++ = 0;
Charles MacNeill 5:89031b2f5316 1798
Charles MacNeill 5:89031b2f5316 1799
Charles MacNeill 5:89031b2f5316 1800
Charles MacNeill 5:89031b2f5316 1801 if (device_config_level >= VL53LX_DEVICECONFIGLEVEL_FULL &&
Charles MacNeill 5:89031b2f5316 1802 status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1803
Charles MacNeill 5:89031b2f5316 1804 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 1805 VL53LX_STATIC_NVM_MANAGED_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 1806
Charles MacNeill 5:89031b2f5316 1807 status =
Charles MacNeill 5:89031b2f5316 1808 VL53LX_i2c_encode_static_nvm_managed(
Charles MacNeill 5:89031b2f5316 1809 pstatic_nvm,
Charles MacNeill 5:89031b2f5316 1810 VL53LX_STATIC_NVM_MANAGED_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1811 &buffer[i2c_buffer_offset_bytes]);
Charles MacNeill 5:89031b2f5316 1812 }
Charles MacNeill 5:89031b2f5316 1813
Charles MacNeill 5:89031b2f5316 1814 if (device_config_level >= VL53LX_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS &&
Charles MacNeill 5:89031b2f5316 1815 status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1816
Charles MacNeill 5:89031b2f5316 1817 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 1818 VL53LX_CUSTOMER_NVM_MANAGED_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 1819
Charles MacNeill 5:89031b2f5316 1820 status =
Charles MacNeill 5:89031b2f5316 1821 VL53LX_i2c_encode_customer_nvm_managed(
Charles MacNeill 5:89031b2f5316 1822 pcustomer_nvm,
Charles MacNeill 5:89031b2f5316 1823 VL53LX_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1824 &buffer[i2c_buffer_offset_bytes]);
Charles MacNeill 5:89031b2f5316 1825 }
Charles MacNeill 5:89031b2f5316 1826
Charles MacNeill 5:89031b2f5316 1827 if (device_config_level >= VL53LX_DEVICECONFIGLEVEL_STATIC_ONWARDS &&
Charles MacNeill 5:89031b2f5316 1828 status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1829
Charles MacNeill 5:89031b2f5316 1830 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 1831 VL53LX_STATIC_CONFIG_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 1832
Charles MacNeill 5:89031b2f5316 1833 status =
Charles MacNeill 5:89031b2f5316 1834 VL53LX_i2c_encode_static_config(
Charles MacNeill 5:89031b2f5316 1835 pstatic,
Charles MacNeill 5:89031b2f5316 1836 VL53LX_STATIC_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1837 &buffer[i2c_buffer_offset_bytes]);
Charles MacNeill 5:89031b2f5316 1838 }
Charles MacNeill 5:89031b2f5316 1839
Charles MacNeill 5:89031b2f5316 1840 if (device_config_level >= VL53LX_DEVICECONFIGLEVEL_GENERAL_ONWARDS &&
Charles MacNeill 5:89031b2f5316 1841 status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1842
Charles MacNeill 5:89031b2f5316 1843 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 1844 VL53LX_GENERAL_CONFIG_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 1845
Charles MacNeill 5:89031b2f5316 1846 status =
Charles MacNeill 5:89031b2f5316 1847 VL53LX_i2c_encode_general_config(
Charles MacNeill 5:89031b2f5316 1848 pgeneral,
Charles MacNeill 5:89031b2f5316 1849 VL53LX_GENERAL_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1850 &buffer[i2c_buffer_offset_bytes]);
Charles MacNeill 5:89031b2f5316 1851 }
Charles MacNeill 5:89031b2f5316 1852
Charles MacNeill 5:89031b2f5316 1853 if (device_config_level >= VL53LX_DEVICECONFIGLEVEL_TIMING_ONWARDS &&
Charles MacNeill 5:89031b2f5316 1854 status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1855
Charles MacNeill 5:89031b2f5316 1856 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 1857 VL53LX_TIMING_CONFIG_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 1858
Charles MacNeill 5:89031b2f5316 1859 status =
Charles MacNeill 5:89031b2f5316 1860 VL53LX_i2c_encode_timing_config(
Charles MacNeill 5:89031b2f5316 1861 ptiming,
Charles MacNeill 5:89031b2f5316 1862 VL53LX_TIMING_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1863 &buffer[i2c_buffer_offset_bytes]);
Charles MacNeill 5:89031b2f5316 1864 }
Charles MacNeill 5:89031b2f5316 1865
Charles MacNeill 5:89031b2f5316 1866 if (device_config_level >= VL53LX_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS &&
Charles MacNeill 5:89031b2f5316 1867 status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1868
Charles MacNeill 5:89031b2f5316 1869 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 1870 VL53LX_DYNAMIC_CONFIG_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 1871
Charles MacNeill 5:89031b2f5316 1872
Charles MacNeill 5:89031b2f5316 1873 if ((psystem->system__mode_start &
Charles MacNeill 5:89031b2f5316 1874 VL53LX_DEVICEMEASUREMENTMODE_BACKTOBACK) ==
Charles MacNeill 5:89031b2f5316 1875 VL53LX_DEVICEMEASUREMENTMODE_BACKTOBACK) {
Charles MacNeill 5:89031b2f5316 1876 pdynamic->system__grouped_parameter_hold_0 =
Charles MacNeill 5:89031b2f5316 1877 pstate->cfg_gph_id | 0x01;
Charles MacNeill 5:89031b2f5316 1878 pdynamic->system__grouped_parameter_hold_1 =
Charles MacNeill 5:89031b2f5316 1879 pstate->cfg_gph_id | 0x01;
Charles MacNeill 5:89031b2f5316 1880 pdynamic->system__grouped_parameter_hold =
Charles MacNeill 5:89031b2f5316 1881 pstate->cfg_gph_id;
Charles MacNeill 5:89031b2f5316 1882 }
Charles MacNeill 5:89031b2f5316 1883 status =
Charles MacNeill 5:89031b2f5316 1884 VL53LX_i2c_encode_dynamic_config(
Charles MacNeill 5:89031b2f5316 1885 pdynamic,
Charles MacNeill 5:89031b2f5316 1886 VL53LX_DYNAMIC_CONFIG_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1887 &buffer[i2c_buffer_offset_bytes]);
Charles MacNeill 5:89031b2f5316 1888 }
Charles MacNeill 5:89031b2f5316 1889
Charles MacNeill 5:89031b2f5316 1890 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1891
Charles MacNeill 5:89031b2f5316 1892 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 1893 VL53LX_SYSTEM_CONTROL_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 1894
Charles MacNeill 5:89031b2f5316 1895 status =
Charles MacNeill 5:89031b2f5316 1896 VL53LX_i2c_encode_system_control(
Charles MacNeill 5:89031b2f5316 1897 psystem,
Charles MacNeill 5:89031b2f5316 1898 VL53LX_SYSTEM_CONTROL_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 1899 &buffer[i2c_buffer_offset_bytes]);
Charles MacNeill 5:89031b2f5316 1900 }
Charles MacNeill 5:89031b2f5316 1901
Charles MacNeill 5:89031b2f5316 1902
Charles MacNeill 5:89031b2f5316 1903
Charles MacNeill 5:89031b2f5316 1904 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 1905 status =
Charles MacNeill 5:89031b2f5316 1906 VL53LX_WriteMulti(
Charles MacNeill 5:89031b2f5316 1907 Dev,
Charles MacNeill 5:89031b2f5316 1908 i2c_index,
Charles MacNeill 5:89031b2f5316 1909 buffer,
Charles MacNeill 5:89031b2f5316 1910 (uint32_t)i2c_buffer_size_bytes);
Charles MacNeill 5:89031b2f5316 1911
Charles MacNeill 5:89031b2f5316 1912 }
Charles MacNeill 5:89031b2f5316 1913
Charles MacNeill 5:89031b2f5316 1914
Charles MacNeill 5:89031b2f5316 1915 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1916 status = VL53LX_update_ll_driver_rd_state(Dev);
Charles MacNeill 5:89031b2f5316 1917 // printf("VL53LX_init_and_start_range VL53LX_update_ll_driver_rd_state %d \n",status);
Charles MacNeill 5:89031b2f5316 1918 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 1919 status = VL53LX_update_ll_driver_cfg_state(Dev);
Charles MacNeill 5:89031b2f5316 1920 // printf("VL53LX_init_and_start_range VL53LX_update_ll_driver_cfg_state %d \n",status);
Charles MacNeill 5:89031b2f5316 1921 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 1922 // printf("VL53LX_init_and_start_range %d \n",status);
Charles MacNeill 5:89031b2f5316 1923 return status;
Charles MacNeill 5:89031b2f5316 1924 }
Charles MacNeill 5:89031b2f5316 1925
Charles MacNeill 5:89031b2f5316 1926
Charles MacNeill 5:89031b2f5316 1927 VL53LX_Error VL53LX_stop_range(
Charles MacNeill 5:89031b2f5316 1928 VL53LX_DEV Dev)
Charles MacNeill 5:89031b2f5316 1929 {
Charles MacNeill 5:89031b2f5316 1930
Charles MacNeill 5:89031b2f5316 1931
Charles MacNeill 5:89031b2f5316 1932 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1933
Charles MacNeill 5:89031b2f5316 1934 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 1935 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1936 VL53LX_LLDriverResults_t *pres =
Charles MacNeill 5:89031b2f5316 1937 VL53LXDevStructGetLLResultsHandle(Dev);
Charles MacNeill 5:89031b2f5316 1938
Charles MacNeill 5:89031b2f5316 1939
Charles MacNeill 5:89031b2f5316 1940
Charles MacNeill 5:89031b2f5316 1941 pdev->sys_ctrl.system__mode_start =
Charles MacNeill 5:89031b2f5316 1942 (pdev->sys_ctrl.system__mode_start &
Charles MacNeill 5:89031b2f5316 1943 VL53LX_DEVICEMEASUREMENTMODE_STOP_MASK) |
Charles MacNeill 5:89031b2f5316 1944 VL53LX_DEVICEMEASUREMENTMODE_ABORT;
Charles MacNeill 5:89031b2f5316 1945
Charles MacNeill 5:89031b2f5316 1946 status = VL53LX_set_system_control(
Charles MacNeill 5:89031b2f5316 1947 Dev,
Charles MacNeill 5:89031b2f5316 1948 &pdev->sys_ctrl);
Charles MacNeill 5:89031b2f5316 1949
Charles MacNeill 5:89031b2f5316 1950
Charles MacNeill 5:89031b2f5316 1951 pdev->sys_ctrl.system__mode_start =
Charles MacNeill 5:89031b2f5316 1952 (pdev->sys_ctrl.system__mode_start &
Charles MacNeill 5:89031b2f5316 1953 VL53LX_DEVICEMEASUREMENTMODE_STOP_MASK);
Charles MacNeill 5:89031b2f5316 1954
Charles MacNeill 5:89031b2f5316 1955
Charles MacNeill 5:89031b2f5316 1956 VL53LX_init_ll_driver_state(
Charles MacNeill 5:89031b2f5316 1957 Dev,
Charles MacNeill 5:89031b2f5316 1958 VL53LX_DEVICESTATE_SW_STANDBY);
Charles MacNeill 5:89031b2f5316 1959
Charles MacNeill 5:89031b2f5316 1960
Charles MacNeill 5:89031b2f5316 1961 V53L1_init_zone_results_structure(
Charles MacNeill 5:89031b2f5316 1962 pdev->zone_cfg.active_zones+1,
Charles MacNeill 5:89031b2f5316 1963 &(pres->zone_results));
Charles MacNeill 5:89031b2f5316 1964
Charles MacNeill 5:89031b2f5316 1965
Charles MacNeill 5:89031b2f5316 1966 V53L1_init_zone_dss_configs(Dev);
Charles MacNeill 5:89031b2f5316 1967
Charles MacNeill 5:89031b2f5316 1968
Charles MacNeill 5:89031b2f5316 1969 if (pdev->low_power_auto_data.is_low_power_auto_mode == 1)
Charles MacNeill 5:89031b2f5316 1970 VL53LX_low_power_auto_data_stop_range(Dev);
Charles MacNeill 5:89031b2f5316 1971
Charles MacNeill 5:89031b2f5316 1972 return status;
Charles MacNeill 5:89031b2f5316 1973 }
Charles MacNeill 5:89031b2f5316 1974
Charles MacNeill 5:89031b2f5316 1975
Charles MacNeill 5:89031b2f5316 1976 VL53LX_Error VL53LX_get_measurement_results(
Charles MacNeill 5:89031b2f5316 1977 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 1978 VL53LX_DeviceResultsLevel device_results_level)
Charles MacNeill 5:89031b2f5316 1979 {
Charles MacNeill 5:89031b2f5316 1980
Charles MacNeill 5:89031b2f5316 1981
Charles MacNeill 5:89031b2f5316 1982 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 1983 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 1984
Charles MacNeill 5:89031b2f5316 1985 uint8_t buffer[VL53LX_MAX_I2C_XFER_SIZE];
Charles MacNeill 5:89031b2f5316 1986
Charles MacNeill 5:89031b2f5316 1987 VL53LX_system_results_t *psystem_results = &(pdev->sys_results);
Charles MacNeill 5:89031b2f5316 1988 VL53LX_core_results_t *pcore_results = &(pdev->core_results);
Charles MacNeill 5:89031b2f5316 1989 VL53LX_debug_results_t *pdebug_results = &(pdev->dbg_results);
Charles MacNeill 5:89031b2f5316 1990
Charles MacNeill 5:89031b2f5316 1991 uint16_t i2c_index = VL53LX_SYSTEM_RESULTS_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 1992 uint16_t i2c_buffer_offset_bytes = 0;
Charles MacNeill 5:89031b2f5316 1993 uint16_t i2c_buffer_size_bytes = 0;
Charles MacNeill 5:89031b2f5316 1994
Charles MacNeill 5:89031b2f5316 1995 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 1996
Charles MacNeill 5:89031b2f5316 1997
Charles MacNeill 5:89031b2f5316 1998
Charles MacNeill 5:89031b2f5316 1999 switch (device_results_level) {
Charles MacNeill 5:89031b2f5316 2000 case VL53LX_DEVICERESULTSLEVEL_FULL:
Charles MacNeill 5:89031b2f5316 2001 i2c_buffer_size_bytes =
Charles MacNeill 5:89031b2f5316 2002 (VL53LX_DEBUG_RESULTS_I2C_INDEX +
Charles MacNeill 5:89031b2f5316 2003 VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES) -
Charles MacNeill 5:89031b2f5316 2004 i2c_index;
Charles MacNeill 5:89031b2f5316 2005 break;
Charles MacNeill 5:89031b2f5316 2006 case VL53LX_DEVICERESULTSLEVEL_UPTO_CORE:
Charles MacNeill 5:89031b2f5316 2007 i2c_buffer_size_bytes =
Charles MacNeill 5:89031b2f5316 2008 (VL53LX_CORE_RESULTS_I2C_INDEX +
Charles MacNeill 5:89031b2f5316 2009 VL53LX_CORE_RESULTS_I2C_SIZE_BYTES) -
Charles MacNeill 5:89031b2f5316 2010 i2c_index;
Charles MacNeill 5:89031b2f5316 2011 break;
Charles MacNeill 5:89031b2f5316 2012 default:
Charles MacNeill 5:89031b2f5316 2013 i2c_buffer_size_bytes =
Charles MacNeill 5:89031b2f5316 2014 VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES;
Charles MacNeill 5:89031b2f5316 2015 break;
Charles MacNeill 5:89031b2f5316 2016 }
Charles MacNeill 5:89031b2f5316 2017
Charles MacNeill 5:89031b2f5316 2018
Charles MacNeill 5:89031b2f5316 2019
Charles MacNeill 5:89031b2f5316 2020 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2021 status =
Charles MacNeill 5:89031b2f5316 2022 VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 2023 Dev,
Charles MacNeill 5:89031b2f5316 2024 i2c_index,
Charles MacNeill 5:89031b2f5316 2025 buffer,
Charles MacNeill 5:89031b2f5316 2026 (uint32_t)i2c_buffer_size_bytes);
Charles MacNeill 5:89031b2f5316 2027
Charles MacNeill 5:89031b2f5316 2028
Charles MacNeill 5:89031b2f5316 2029
Charles MacNeill 5:89031b2f5316 2030 if (device_results_level >= VL53LX_DEVICERESULTSLEVEL_FULL &&
Charles MacNeill 5:89031b2f5316 2031 status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 2032
Charles MacNeill 5:89031b2f5316 2033 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 2034 VL53LX_DEBUG_RESULTS_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 2035
Charles MacNeill 5:89031b2f5316 2036 status =
Charles MacNeill 5:89031b2f5316 2037 VL53LX_i2c_decode_debug_results(
Charles MacNeill 5:89031b2f5316 2038 VL53LX_DEBUG_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2039 &buffer[i2c_buffer_offset_bytes],
Charles MacNeill 5:89031b2f5316 2040 pdebug_results);
Charles MacNeill 5:89031b2f5316 2041 }
Charles MacNeill 5:89031b2f5316 2042
Charles MacNeill 5:89031b2f5316 2043 if (device_results_level >= VL53LX_DEVICERESULTSLEVEL_UPTO_CORE &&
Charles MacNeill 5:89031b2f5316 2044 status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 2045
Charles MacNeill 5:89031b2f5316 2046 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 2047 VL53LX_CORE_RESULTS_I2C_INDEX - i2c_index;
Charles MacNeill 5:89031b2f5316 2048
Charles MacNeill 5:89031b2f5316 2049 status =
Charles MacNeill 5:89031b2f5316 2050 VL53LX_i2c_decode_core_results(
Charles MacNeill 5:89031b2f5316 2051 VL53LX_CORE_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2052 &buffer[i2c_buffer_offset_bytes],
Charles MacNeill 5:89031b2f5316 2053 pcore_results);
Charles MacNeill 5:89031b2f5316 2054 }
Charles MacNeill 5:89031b2f5316 2055
Charles MacNeill 5:89031b2f5316 2056 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 2057
Charles MacNeill 5:89031b2f5316 2058 i2c_buffer_offset_bytes = 0;
Charles MacNeill 5:89031b2f5316 2059 status =
Charles MacNeill 5:89031b2f5316 2060 VL53LX_i2c_decode_system_results(
Charles MacNeill 5:89031b2f5316 2061 VL53LX_SYSTEM_RESULTS_I2C_SIZE_BYTES,
Charles MacNeill 5:89031b2f5316 2062 &buffer[i2c_buffer_offset_bytes],
Charles MacNeill 5:89031b2f5316 2063 psystem_results);
Charles MacNeill 5:89031b2f5316 2064 }
Charles MacNeill 5:89031b2f5316 2065
Charles MacNeill 5:89031b2f5316 2066 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2067
Charles MacNeill 5:89031b2f5316 2068 return status;
Charles MacNeill 5:89031b2f5316 2069 }
Charles MacNeill 5:89031b2f5316 2070
Charles MacNeill 5:89031b2f5316 2071
Charles MacNeill 5:89031b2f5316 2072 VL53LX_Error VL53LX_get_device_results(
Charles MacNeill 5:89031b2f5316 2073 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2074 VL53LX_DeviceResultsLevel device_results_level,
Charles MacNeill 5:89031b2f5316 2075 VL53LX_range_results_t *prange_results)
Charles MacNeill 5:89031b2f5316 2076 {
Charles MacNeill 5:89031b2f5316 2077
Charles MacNeill 5:89031b2f5316 2078
Charles MacNeill 5:89031b2f5316 2079 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2080
Charles MacNeill 5:89031b2f5316 2081 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 2082 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 2083 VL53LX_LLDriverResults_t *pres =
Charles MacNeill 5:89031b2f5316 2084 VL53LXDevStructGetLLResultsHandle(Dev);
Charles MacNeill 5:89031b2f5316 2085
Charles MacNeill 5:89031b2f5316 2086 VL53LX_range_results_t *presults =
Charles MacNeill 5:89031b2f5316 2087 &(pres->range_results);
Charles MacNeill 5:89031b2f5316 2088 VL53LX_zone_objects_t *pobjects =
Charles MacNeill 5:89031b2f5316 2089 &(pres->zone_results.VL53LX_p_003[0]);
Charles MacNeill 5:89031b2f5316 2090 VL53LX_ll_driver_state_t *pstate =
Charles MacNeill 5:89031b2f5316 2091 &(pdev->ll_state);
Charles MacNeill 5:89031b2f5316 2092 VL53LX_zone_config_t *pzone_cfg =
Charles MacNeill 5:89031b2f5316 2093 &(pdev->zone_cfg);
Charles MacNeill 5:89031b2f5316 2094 VL53LX_zone_hist_info_t *phist_info =
Charles MacNeill 5:89031b2f5316 2095 &(pres->zone_hists.VL53LX_p_003[0]);
Charles MacNeill 5:89031b2f5316 2096
Charles MacNeill 5:89031b2f5316 2097 VL53LX_dmax_calibration_data_t dmax_cal;
Charles MacNeill 5:89031b2f5316 2098 VL53LX_dmax_calibration_data_t *pdmax_cal = &dmax_cal;
Charles MacNeill 5:89031b2f5316 2099 VL53LX_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 2100 VL53LX_xtalk_config_t *pC = &(pdev->xtalk_cfg);
Charles MacNeill 5:89031b2f5316 2101 VL53LX_low_power_auto_data_t *pL = &(pdev->low_power_auto_data);
Charles MacNeill 5:89031b2f5316 2102 VL53LX_histogram_bin_data_t *pHD = &(pdev->hist_data);
Charles MacNeill 5:89031b2f5316 2103 VL53LX_customer_nvm_managed_t *pN = &(pdev->customer);
Charles MacNeill 5:89031b2f5316 2104 VL53LX_zone_histograms_t *pZH = &(pres->zone_hists);
Charles MacNeill 5:89031b2f5316 2105 VL53LX_xtalk_calibration_results_t *pXCR = &(pdev->xtalk_cal);
Charles MacNeill 5:89031b2f5316 2106 uint8_t tmp8;
Charles MacNeill 5:89031b2f5316 2107 uint8_t zid;
Charles MacNeill 5:89031b2f5316 2108 uint8_t i;
Charles MacNeill 5:89031b2f5316 2109 uint8_t histo_merge_nb, idx;
Charles MacNeill 5:89031b2f5316 2110 VL53LX_range_data_t *pdata;
Charles MacNeill 5:89031b2f5316 2111
Charles MacNeill 5:89031b2f5316 2112 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2113
Charles MacNeill 5:89031b2f5316 2114
Charles MacNeill 5:89031b2f5316 2115
Charles MacNeill 5:89031b2f5316 2116 if ((pdev->sys_ctrl.system__mode_start &
Charles MacNeill 5:89031b2f5316 2117 VL53LX_DEVICESCHEDULERMODE_HISTOGRAM)
Charles MacNeill 5:89031b2f5316 2118 == VL53LX_DEVICESCHEDULERMODE_HISTOGRAM) {
Charles MacNeill 5:89031b2f5316 2119
Charles MacNeill 5:89031b2f5316 2120
Charles MacNeill 5:89031b2f5316 2121
Charles MacNeill 5:89031b2f5316 2122 status = VL53LX_get_histogram_bin_data(
Charles MacNeill 5:89031b2f5316 2123 Dev,
Charles MacNeill 5:89031b2f5316 2124 &(pdev->hist_data));
Charles MacNeill 5:89031b2f5316 2125
Charles MacNeill 5:89031b2f5316 2126
Charles MacNeill 5:89031b2f5316 2127
Charles MacNeill 5:89031b2f5316 2128
Charles MacNeill 5:89031b2f5316 2129 if (status == VL53LX_ERROR_NONE &&
Charles MacNeill 5:89031b2f5316 2130 pHD->number_of_ambient_bins == 0) {
Charles MacNeill 5:89031b2f5316 2131 zid = pdev->ll_state.rd_zone_id;
Charles MacNeill 5:89031b2f5316 2132 status = VL53LX_hist_copy_and_scale_ambient_info(
Charles MacNeill 5:89031b2f5316 2133 &(pZH->VL53LX_p_003[zid]),
Charles MacNeill 5:89031b2f5316 2134 &(pdev->hist_data));
Charles MacNeill 5:89031b2f5316 2135 }
Charles MacNeill 5:89031b2f5316 2136
Charles MacNeill 5:89031b2f5316 2137
Charles MacNeill 5:89031b2f5316 2138 if (status != VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2139 goto UPDATE_DYNAMIC_CONFIG;
Charles MacNeill 5:89031b2f5316 2140
Charles MacNeill 5:89031b2f5316 2141 VL53LX_compute_histo_merge_nb(Dev, &histo_merge_nb);
Charles MacNeill 5:89031b2f5316 2142 if (histo_merge_nb == 0)
Charles MacNeill 5:89031b2f5316 2143 histo_merge_nb = 1;
Charles MacNeill 5:89031b2f5316 2144 idx = histo_merge_nb - 1;
Charles MacNeill 5:89031b2f5316 2145 if (pdev->tuning_parms.tp_hist_merge == 1)
Charles MacNeill 5:89031b2f5316 2146 pC->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 2147 pXCR->algo__xtalk_cpo_HistoMerge_kcps[idx];
Charles MacNeill 5:89031b2f5316 2148
Charles MacNeill 5:89031b2f5316 2149 pHP->gain_factor =
Charles MacNeill 5:89031b2f5316 2150 pdev->gain_cal.histogram_ranging_gain_factor;
Charles MacNeill 5:89031b2f5316 2151
Charles MacNeill 5:89031b2f5316 2152 pHP->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 2153 VL53LX_calc_crosstalk_plane_offset_with_margin(
Charles MacNeill 5:89031b2f5316 2154 pC->algo__crosstalk_compensation_plane_offset_kcps,
Charles MacNeill 5:89031b2f5316 2155 pC->histogram_mode_crosstalk_margin_kcps);
Charles MacNeill 5:89031b2f5316 2156
Charles MacNeill 5:89031b2f5316 2157 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 2158 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 2159 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 2160 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 2161
Charles MacNeill 5:89031b2f5316 2162 pdev->dmax_cfg.ambient_thresh_sigma =
Charles MacNeill 5:89031b2f5316 2163 pHP->ambient_thresh_sigma1;
Charles MacNeill 5:89031b2f5316 2164 pdev->dmax_cfg.min_ambient_thresh_events =
Charles MacNeill 5:89031b2f5316 2165 pHP->min_ambient_thresh_events;
Charles MacNeill 5:89031b2f5316 2166 pdev->dmax_cfg.signal_total_events_limit =
Charles MacNeill 5:89031b2f5316 2167 pHP->signal_total_events_limit;
Charles MacNeill 5:89031b2f5316 2168 pdev->dmax_cfg.dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 2169 pdev->stat_cfg.dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 2170 pdev->dmax_cfg.dss_config__aperture_attenuation =
Charles MacNeill 5:89031b2f5316 2171 pdev->gen_cfg.dss_config__aperture_attenuation;
Charles MacNeill 5:89031b2f5316 2172
Charles MacNeill 5:89031b2f5316 2173 pHP->algo__crosstalk_detect_max_valid_range_mm =
Charles MacNeill 5:89031b2f5316 2174 pC->algo__crosstalk_detect_max_valid_range_mm;
Charles MacNeill 5:89031b2f5316 2175 pHP->algo__crosstalk_detect_min_valid_range_mm =
Charles MacNeill 5:89031b2f5316 2176 pC->algo__crosstalk_detect_min_valid_range_mm;
Charles MacNeill 5:89031b2f5316 2177 pHP->algo__crosstalk_detect_max_valid_rate_kcps =
Charles MacNeill 5:89031b2f5316 2178 pC->algo__crosstalk_detect_max_valid_rate_kcps;
Charles MacNeill 5:89031b2f5316 2179 pHP->algo__crosstalk_detect_max_sigma_mm =
Charles MacNeill 5:89031b2f5316 2180 pC->algo__crosstalk_detect_max_sigma_mm;
Charles MacNeill 5:89031b2f5316 2181
Charles MacNeill 5:89031b2f5316 2182
Charles MacNeill 5:89031b2f5316 2183
Charles MacNeill 5:89031b2f5316 2184 VL53LX_copy_rtn_good_spads_to_buffer(
Charles MacNeill 5:89031b2f5316 2185 &(pdev->nvm_copy_data),
Charles MacNeill 5:89031b2f5316 2186 &(pdev->rtn_good_spads[0]));
Charles MacNeill 5:89031b2f5316 2187
Charles MacNeill 5:89031b2f5316 2188
Charles MacNeill 5:89031b2f5316 2189
Charles MacNeill 5:89031b2f5316 2190 switch (pdev->offset_correction_mode) {
Charles MacNeill 5:89031b2f5316 2191
Charles MacNeill 5:89031b2f5316 2192 case VL53LX_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS:
Charles MacNeill 5:89031b2f5316 2193 tmp8 = pdev->gen_cfg.dss_config__aperture_attenuation;
Charles MacNeill 5:89031b2f5316 2194
Charles MacNeill 5:89031b2f5316 2195 VL53LX_hist_combine_mm1_mm2_offsets(
Charles MacNeill 5:89031b2f5316 2196 pN->mm_config__inner_offset_mm,
Charles MacNeill 5:89031b2f5316 2197 pN->mm_config__outer_offset_mm,
Charles MacNeill 5:89031b2f5316 2198 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
Charles MacNeill 5:89031b2f5316 2199 pdev->nvm_copy_data.roi_config__mode_roi_xy_size,
Charles MacNeill 5:89031b2f5316 2200 pHD->roi_config__user_roi_centre_spad,
Charles MacNeill 5:89031b2f5316 2201 pHD->roi_config__user_roi_requested_global_xy_size,
Charles MacNeill 5:89031b2f5316 2202 &(pdev->add_off_cal_data),
Charles MacNeill 5:89031b2f5316 2203 &(pdev->rtn_good_spads[0]),
Charles MacNeill 5:89031b2f5316 2204 (uint16_t)tmp8,
Charles MacNeill 5:89031b2f5316 2205 &(pHP->range_offset_mm));
Charles MacNeill 5:89031b2f5316 2206 break;
Charles MacNeill 5:89031b2f5316 2207 case VL53LX_OFFSETCORRECTIONMODE__PER_VCSEL_OFFSETS:
Charles MacNeill 5:89031b2f5316 2208 select_offset_per_vcsel(
Charles MacNeill 5:89031b2f5316 2209 pdev,
Charles MacNeill 5:89031b2f5316 2210 &(pHP->range_offset_mm));
Charles MacNeill 5:89031b2f5316 2211 pHP->range_offset_mm *= 4;
Charles MacNeill 5:89031b2f5316 2212 break;
Charles MacNeill 5:89031b2f5316 2213 default:
Charles MacNeill 5:89031b2f5316 2214 pHP->range_offset_mm = 0;
Charles MacNeill 5:89031b2f5316 2215 break;
Charles MacNeill 5:89031b2f5316 2216
Charles MacNeill 5:89031b2f5316 2217 }
Charles MacNeill 5:89031b2f5316 2218
Charles MacNeill 5:89031b2f5316 2219
Charles MacNeill 5:89031b2f5316 2220
Charles MacNeill 5:89031b2f5316 2221 if (status != VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2222 goto UPDATE_DYNAMIC_CONFIG;
Charles MacNeill 5:89031b2f5316 2223
Charles MacNeill 5:89031b2f5316 2224
Charles MacNeill 5:89031b2f5316 2225 VL53LX_calc_max_effective_spads(
Charles MacNeill 5:89031b2f5316 2226 pHD->roi_config__user_roi_centre_spad,
Charles MacNeill 5:89031b2f5316 2227 pHD->roi_config__user_roi_requested_global_xy_size,
Charles MacNeill 5:89031b2f5316 2228 &(pdev->rtn_good_spads[0]),
Charles MacNeill 5:89031b2f5316 2229 (uint16_t)pdev->gen_cfg.dss_config__aperture_attenuation,
Charles MacNeill 5:89031b2f5316 2230 &(pdev->dmax_cfg.max_effective_spads));
Charles MacNeill 5:89031b2f5316 2231
Charles MacNeill 5:89031b2f5316 2232 status =
Charles MacNeill 5:89031b2f5316 2233 VL53LX_get_dmax_calibration_data(
Charles MacNeill 5:89031b2f5316 2234 Dev,
Charles MacNeill 5:89031b2f5316 2235 pdev->dmax_mode,
Charles MacNeill 5:89031b2f5316 2236 pdmax_cal);
Charles MacNeill 5:89031b2f5316 2237
Charles MacNeill 5:89031b2f5316 2238
Charles MacNeill 5:89031b2f5316 2239 if (status != VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2240 goto UPDATE_DYNAMIC_CONFIG;
Charles MacNeill 5:89031b2f5316 2241
Charles MacNeill 5:89031b2f5316 2242 status = VL53LX_ipp_hist_process_data(
Charles MacNeill 5:89031b2f5316 2243 Dev,
Charles MacNeill 5:89031b2f5316 2244 pdmax_cal,
Charles MacNeill 5:89031b2f5316 2245 &(pdev->dmax_cfg),
Charles MacNeill 5:89031b2f5316 2246 &(pdev->histpostprocess),
Charles MacNeill 5:89031b2f5316 2247 &(pdev->hist_data),
Charles MacNeill 5:89031b2f5316 2248 &(pdev->xtalk_shapes),
Charles MacNeill 5:89031b2f5316 2249 pdev->wArea1,
Charles MacNeill 5:89031b2f5316 2250 pdev->wArea2,
Charles MacNeill 5:89031b2f5316 2251 &histo_merge_nb,
Charles MacNeill 5:89031b2f5316 2252 presults);
Charles MacNeill 5:89031b2f5316 2253
Charles MacNeill 5:89031b2f5316 2254 if ((pdev->tuning_parms.tp_hist_merge == 1) &&
Charles MacNeill 5:89031b2f5316 2255 (histo_merge_nb > 1))
Charles MacNeill 5:89031b2f5316 2256 for (i = 0; i < VL53LX_MAX_RANGE_RESULTS; i++) {
Charles MacNeill 5:89031b2f5316 2257 pdata = &(presults->VL53LX_p_003[i]);
Charles MacNeill 5:89031b2f5316 2258 pdata->VL53LX_p_016 /= histo_merge_nb;
Charles MacNeill 5:89031b2f5316 2259 pdata->VL53LX_p_017 /= histo_merge_nb;
Charles MacNeill 5:89031b2f5316 2260 pdata->VL53LX_p_010 /= histo_merge_nb;
Charles MacNeill 5:89031b2f5316 2261 pdata->peak_signal_count_rate_mcps /= histo_merge_nb;
Charles MacNeill 5:89031b2f5316 2262 pdata->avg_signal_count_rate_mcps /= histo_merge_nb;
Charles MacNeill 5:89031b2f5316 2263 pdata->ambient_count_rate_mcps /= histo_merge_nb;
Charles MacNeill 5:89031b2f5316 2264 pdata->VL53LX_p_009 /= histo_merge_nb;
Charles MacNeill 5:89031b2f5316 2265 }
Charles MacNeill 5:89031b2f5316 2266
Charles MacNeill 5:89031b2f5316 2267
Charles MacNeill 5:89031b2f5316 2268 if (status != VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2269 goto UPDATE_DYNAMIC_CONFIG;
Charles MacNeill 5:89031b2f5316 2270
Charles MacNeill 5:89031b2f5316 2271 status = VL53LX_hist_wrap_dmax(
Charles MacNeill 5:89031b2f5316 2272 &(pdev->histpostprocess),
Charles MacNeill 5:89031b2f5316 2273 &(pdev->hist_data),
Charles MacNeill 5:89031b2f5316 2274 &(presults->wrap_dmax_mm));
Charles MacNeill 5:89031b2f5316 2275
Charles MacNeill 5:89031b2f5316 2276
Charles MacNeill 5:89031b2f5316 2277 if (status != VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2278 goto UPDATE_DYNAMIC_CONFIG;
Charles MacNeill 5:89031b2f5316 2279
Charles MacNeill 5:89031b2f5316 2280 zid = pdev->ll_state.rd_zone_id;
Charles MacNeill 5:89031b2f5316 2281 status = VL53LX_hist_phase_consistency_check(
Charles MacNeill 5:89031b2f5316 2282 Dev,
Charles MacNeill 5:89031b2f5316 2283 &(pZH->VL53LX_p_003[zid]),
Charles MacNeill 5:89031b2f5316 2284 &(pres->zone_results.VL53LX_p_003[zid]),
Charles MacNeill 5:89031b2f5316 2285 presults);
Charles MacNeill 5:89031b2f5316 2286
Charles MacNeill 5:89031b2f5316 2287
Charles MacNeill 5:89031b2f5316 2288 if (status != VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2289 goto UPDATE_DYNAMIC_CONFIG;
Charles MacNeill 5:89031b2f5316 2290
Charles MacNeill 5:89031b2f5316 2291 zid = pdev->ll_state.rd_zone_id;
Charles MacNeill 5:89031b2f5316 2292 status = VL53LX_hist_xmonitor_consistency_check(
Charles MacNeill 5:89031b2f5316 2293 Dev,
Charles MacNeill 5:89031b2f5316 2294 &(pZH->VL53LX_p_003[zid]),
Charles MacNeill 5:89031b2f5316 2295 &(pres->zone_results.VL53LX_p_003[zid]),
Charles MacNeill 5:89031b2f5316 2296 &(presults->xmonitor));
Charles MacNeill 5:89031b2f5316 2297
Charles MacNeill 5:89031b2f5316 2298
Charles MacNeill 5:89031b2f5316 2299 if (status != VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2300 goto UPDATE_DYNAMIC_CONFIG;
Charles MacNeill 5:89031b2f5316 2301
Charles MacNeill 5:89031b2f5316 2302
Charles MacNeill 5:89031b2f5316 2303 zid = pdev->ll_state.rd_zone_id;
Charles MacNeill 5:89031b2f5316 2304 pZH->max_zones = VL53LX_MAX_USER_ZONES;
Charles MacNeill 5:89031b2f5316 2305 pZH->active_zones =
Charles MacNeill 5:89031b2f5316 2306 pdev->zone_cfg.active_zones+1;
Charles MacNeill 5:89031b2f5316 2307 pHD->zone_id = zid;
Charles MacNeill 5:89031b2f5316 2308
Charles MacNeill 5:89031b2f5316 2309 if (zid <
Charles MacNeill 5:89031b2f5316 2310 pres->zone_results.max_zones) {
Charles MacNeill 5:89031b2f5316 2311
Charles MacNeill 5:89031b2f5316 2312 phist_info =
Charles MacNeill 5:89031b2f5316 2313 &(pZH->VL53LX_p_003[zid]);
Charles MacNeill 5:89031b2f5316 2314
Charles MacNeill 5:89031b2f5316 2315 phist_info->rd_device_state =
Charles MacNeill 5:89031b2f5316 2316 pHD->rd_device_state;
Charles MacNeill 5:89031b2f5316 2317
Charles MacNeill 5:89031b2f5316 2318 phist_info->number_of_ambient_bins =
Charles MacNeill 5:89031b2f5316 2319 pHD->number_of_ambient_bins;
Charles MacNeill 5:89031b2f5316 2320
Charles MacNeill 5:89031b2f5316 2321 phist_info->result__dss_actual_effective_spads =
Charles MacNeill 5:89031b2f5316 2322 pHD->result__dss_actual_effective_spads;
Charles MacNeill 5:89031b2f5316 2323
Charles MacNeill 5:89031b2f5316 2324 phist_info->VL53LX_p_005 =
Charles MacNeill 5:89031b2f5316 2325 pHD->VL53LX_p_005;
Charles MacNeill 5:89031b2f5316 2326
Charles MacNeill 5:89031b2f5316 2327 phist_info->total_periods_elapsed =
Charles MacNeill 5:89031b2f5316 2328 pHD->total_periods_elapsed;
Charles MacNeill 5:89031b2f5316 2329
Charles MacNeill 5:89031b2f5316 2330 phist_info->ambient_events_sum =
Charles MacNeill 5:89031b2f5316 2331 pHD->ambient_events_sum;
Charles MacNeill 5:89031b2f5316 2332 }
Charles MacNeill 5:89031b2f5316 2333
Charles MacNeill 5:89031b2f5316 2334
Charles MacNeill 5:89031b2f5316 2335
Charles MacNeill 5:89031b2f5316 2336 if (status != VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2337 goto UPDATE_DYNAMIC_CONFIG;
Charles MacNeill 5:89031b2f5316 2338
Charles MacNeill 5:89031b2f5316 2339 VL53LX_hist_copy_results_to_sys_and_core(
Charles MacNeill 5:89031b2f5316 2340 &(pdev->hist_data),
Charles MacNeill 5:89031b2f5316 2341 presults,
Charles MacNeill 5:89031b2f5316 2342 &(pdev->sys_results),
Charles MacNeill 5:89031b2f5316 2343 &(pdev->core_results));
Charles MacNeill 5:89031b2f5316 2344
Charles MacNeill 5:89031b2f5316 2345
Charles MacNeill 5:89031b2f5316 2346 UPDATE_DYNAMIC_CONFIG:
Charles MacNeill 5:89031b2f5316 2347 if (pzone_cfg->active_zones > 0) {
Charles MacNeill 5:89031b2f5316 2348 if (pstate->rd_device_state !=
Charles MacNeill 5:89031b2f5316 2349 VL53LX_DEVICESTATE_RANGING_WAIT_GPH_SYNC) {
Charles MacNeill 5:89031b2f5316 2350 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 2351 status = VL53LX_dynamic_zone_update(
Charles MacNeill 5:89031b2f5316 2352 Dev, presults);
Charles MacNeill 5:89031b2f5316 2353 }
Charles MacNeill 5:89031b2f5316 2354 }
Charles MacNeill 5:89031b2f5316 2355
Charles MacNeill 5:89031b2f5316 2356
Charles MacNeill 5:89031b2f5316 2357 for (i = 0; i < VL53LX_MAX_USER_ZONES; i++) {
Charles MacNeill 5:89031b2f5316 2358 pzone_cfg->bin_config[i] =
Charles MacNeill 5:89031b2f5316 2359 ((pdev->ll_state.cfg_internal_stream_count)
Charles MacNeill 5:89031b2f5316 2360 & 0x01) ?
Charles MacNeill 5:89031b2f5316 2361 VL53LX_ZONECONFIG_BINCONFIG__HIGHAMB :
Charles MacNeill 5:89031b2f5316 2362 VL53LX_ZONECONFIG_BINCONFIG__LOWAMB;
Charles MacNeill 5:89031b2f5316 2363 }
Charles MacNeill 5:89031b2f5316 2364
Charles MacNeill 5:89031b2f5316 2365 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2366 status = VL53LX_multizone_hist_bins_update(Dev);
Charles MacNeill 5:89031b2f5316 2367
Charles MacNeill 5:89031b2f5316 2368 }
Charles MacNeill 5:89031b2f5316 2369
Charles MacNeill 5:89031b2f5316 2370
Charles MacNeill 5:89031b2f5316 2371
Charles MacNeill 5:89031b2f5316 2372 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2373 status = VL53LX_dynamic_xtalk_correction_corrector(Dev);
Charles MacNeill 5:89031b2f5316 2374
Charles MacNeill 5:89031b2f5316 2375 #ifdef VL53LX_LOG_ENABLE
Charles MacNeill 5:89031b2f5316 2376 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2377 VL53LX_print_histogram_bin_data(
Charles MacNeill 5:89031b2f5316 2378 &(pdev->hist_data),
Charles MacNeill 5:89031b2f5316 2379 "get_device_results():pdev->lldata.hist_data.",
Charles MacNeill 5:89031b2f5316 2380 VL53LX_TRACE_MODULE_HISTOGRAM_DATA);
Charles MacNeill 5:89031b2f5316 2381 #endif
Charles MacNeill 5:89031b2f5316 2382
Charles MacNeill 5:89031b2f5316 2383 if (pdev->tuning_parms.tp_hist_merge == 1)
Charles MacNeill 5:89031b2f5316 2384 pC->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 2385 pXCR->algo__xtalk_cpo_HistoMerge_kcps[0];
Charles MacNeill 5:89031b2f5316 2386 } else {
Charles MacNeill 5:89031b2f5316 2387
Charles MacNeill 5:89031b2f5316 2388 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2389 status = VL53LX_get_measurement_results(
Charles MacNeill 5:89031b2f5316 2390 Dev,
Charles MacNeill 5:89031b2f5316 2391 device_results_level);
Charles MacNeill 5:89031b2f5316 2392
Charles MacNeill 5:89031b2f5316 2393 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2394 VL53LX_copy_sys_and_core_results_to_range_results(
Charles MacNeill 5:89031b2f5316 2395 (int32_t)pdev->gain_cal.standard_ranging_gain_factor,
Charles MacNeill 5:89031b2f5316 2396 &(pdev->sys_results),
Charles MacNeill 5:89031b2f5316 2397 &(pdev->core_results),
Charles MacNeill 5:89031b2f5316 2398 presults);
Charles MacNeill 5:89031b2f5316 2399
Charles MacNeill 5:89031b2f5316 2400
Charles MacNeill 5:89031b2f5316 2401
Charles MacNeill 5:89031b2f5316 2402 if (pL->is_low_power_auto_mode == 1) {
Charles MacNeill 5:89031b2f5316 2403
Charles MacNeill 5:89031b2f5316 2404 if ((status == VL53LX_ERROR_NONE) &&
Charles MacNeill 5:89031b2f5316 2405 (pL->low_power_auto_range_count == 0)) {
Charles MacNeill 5:89031b2f5316 2406
Charles MacNeill 5:89031b2f5316 2407 status =
Charles MacNeill 5:89031b2f5316 2408 VL53LX_low_power_auto_setup_manual_calibration(
Charles MacNeill 5:89031b2f5316 2409 Dev);
Charles MacNeill 5:89031b2f5316 2410 pL->low_power_auto_range_count = 1;
Charles MacNeill 5:89031b2f5316 2411 } else if ((status == VL53LX_ERROR_NONE) &&
Charles MacNeill 5:89031b2f5316 2412 (pL->low_power_auto_range_count == 1)) {
Charles MacNeill 5:89031b2f5316 2413 pL->low_power_auto_range_count = 2;
Charles MacNeill 5:89031b2f5316 2414 }
Charles MacNeill 5:89031b2f5316 2415
Charles MacNeill 5:89031b2f5316 2416
Charles MacNeill 5:89031b2f5316 2417 if ((pL->low_power_auto_range_count != 0xFF) &&
Charles MacNeill 5:89031b2f5316 2418 (status == VL53LX_ERROR_NONE)) {
Charles MacNeill 5:89031b2f5316 2419 status = VL53LX_low_power_auto_update_DSS(
Charles MacNeill 5:89031b2f5316 2420 Dev);
Charles MacNeill 5:89031b2f5316 2421 }
Charles MacNeill 5:89031b2f5316 2422 }
Charles MacNeill 5:89031b2f5316 2423
Charles MacNeill 5:89031b2f5316 2424 }
Charles MacNeill 5:89031b2f5316 2425
Charles MacNeill 5:89031b2f5316 2426
Charles MacNeill 5:89031b2f5316 2427 presults->cfg_device_state = pdev->ll_state.cfg_device_state;
Charles MacNeill 5:89031b2f5316 2428 presults->rd_device_state = pdev->ll_state.rd_device_state;
Charles MacNeill 5:89031b2f5316 2429 presults->zone_id = pdev->ll_state.rd_zone_id;
Charles MacNeill 5:89031b2f5316 2430
Charles MacNeill 5:89031b2f5316 2431 if (status == VL53LX_ERROR_NONE) {
Charles MacNeill 5:89031b2f5316 2432
Charles MacNeill 5:89031b2f5316 2433
Charles MacNeill 5:89031b2f5316 2434 pres->zone_results.max_zones = VL53LX_MAX_USER_ZONES;
Charles MacNeill 5:89031b2f5316 2435 pres->zone_results.active_zones = pdev->zone_cfg.active_zones+1;
Charles MacNeill 5:89031b2f5316 2436 zid = pdev->ll_state.rd_zone_id;
Charles MacNeill 5:89031b2f5316 2437
Charles MacNeill 5:89031b2f5316 2438 if (zid < pres->zone_results.max_zones) {
Charles MacNeill 5:89031b2f5316 2439
Charles MacNeill 5:89031b2f5316 2440 pobjects =
Charles MacNeill 5:89031b2f5316 2441 &(pres->zone_results.VL53LX_p_003[zid]);
Charles MacNeill 5:89031b2f5316 2442
Charles MacNeill 5:89031b2f5316 2443 pobjects->cfg_device_state =
Charles MacNeill 5:89031b2f5316 2444 presults->cfg_device_state;
Charles MacNeill 5:89031b2f5316 2445 pobjects->rd_device_state = presults->rd_device_state;
Charles MacNeill 5:89031b2f5316 2446 pobjects->zone_id = presults->zone_id;
Charles MacNeill 5:89031b2f5316 2447 pobjects->stream_count = presults->stream_count;
Charles MacNeill 5:89031b2f5316 2448
Charles MacNeill 5:89031b2f5316 2449
Charles MacNeill 5:89031b2f5316 2450
Charles MacNeill 5:89031b2f5316 2451 pobjects->xmonitor.VL53LX_p_016 =
Charles MacNeill 5:89031b2f5316 2452 presults->xmonitor.VL53LX_p_016;
Charles MacNeill 5:89031b2f5316 2453 pobjects->xmonitor.VL53LX_p_017 =
Charles MacNeill 5:89031b2f5316 2454 presults->xmonitor.VL53LX_p_017;
Charles MacNeill 5:89031b2f5316 2455 pobjects->xmonitor.VL53LX_p_011 =
Charles MacNeill 5:89031b2f5316 2456 presults->xmonitor.VL53LX_p_011;
Charles MacNeill 5:89031b2f5316 2457 pobjects->xmonitor.range_status =
Charles MacNeill 5:89031b2f5316 2458 presults->xmonitor.range_status;
Charles MacNeill 5:89031b2f5316 2459
Charles MacNeill 5:89031b2f5316 2460 pobjects->max_objects = presults->max_results;
Charles MacNeill 5:89031b2f5316 2461 pobjects->active_objects = presults->active_results;
Charles MacNeill 5:89031b2f5316 2462
Charles MacNeill 5:89031b2f5316 2463 for (i = 0; i < presults->active_results; i++) {
Charles MacNeill 5:89031b2f5316 2464 pobjects->VL53LX_p_003[i].VL53LX_p_016 =
Charles MacNeill 5:89031b2f5316 2465 presults->VL53LX_p_003[i].VL53LX_p_016;
Charles MacNeill 5:89031b2f5316 2466 pobjects->VL53LX_p_003[i].VL53LX_p_017 =
Charles MacNeill 5:89031b2f5316 2467 presults->VL53LX_p_003[i].VL53LX_p_017;
Charles MacNeill 5:89031b2f5316 2468 pobjects->VL53LX_p_003[i].VL53LX_p_011 =
Charles MacNeill 5:89031b2f5316 2469 presults->VL53LX_p_003[i].VL53LX_p_011;
Charles MacNeill 5:89031b2f5316 2470 pobjects->VL53LX_p_003[i].range_status =
Charles MacNeill 5:89031b2f5316 2471 presults->VL53LX_p_003[i].range_status;
Charles MacNeill 5:89031b2f5316 2472 }
Charles MacNeill 5:89031b2f5316 2473
Charles MacNeill 5:89031b2f5316 2474
Charles MacNeill 5:89031b2f5316 2475 }
Charles MacNeill 5:89031b2f5316 2476 }
Charles MacNeill 5:89031b2f5316 2477
Charles MacNeill 5:89031b2f5316 2478
Charles MacNeill 5:89031b2f5316 2479
Charles MacNeill 5:89031b2f5316 2480 memcpy(
Charles MacNeill 5:89031b2f5316 2481 prange_results,
Charles MacNeill 5:89031b2f5316 2482 presults,
Charles MacNeill 5:89031b2f5316 2483 sizeof(VL53LX_range_results_t));
Charles MacNeill 5:89031b2f5316 2484
Charles MacNeill 5:89031b2f5316 2485
Charles MacNeill 5:89031b2f5316 2486
Charles MacNeill 5:89031b2f5316 2487 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2488 status = VL53LX_check_ll_driver_rd_state(Dev);
Charles MacNeill 5:89031b2f5316 2489
Charles MacNeill 5:89031b2f5316 2490 #ifdef VL53LX_LOG_ENABLE
Charles MacNeill 5:89031b2f5316 2491 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2492 VL53LX_print_range_results(
Charles MacNeill 5:89031b2f5316 2493 presults,
Charles MacNeill 5:89031b2f5316 2494 "get_device_results():pdev->llresults.range_results.",
Charles MacNeill 5:89031b2f5316 2495 VL53LX_TRACE_MODULE_RANGE_RESULTS_DATA);
Charles MacNeill 5:89031b2f5316 2496 #endif
Charles MacNeill 5:89031b2f5316 2497
Charles MacNeill 5:89031b2f5316 2498 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2499
Charles MacNeill 5:89031b2f5316 2500 return status;
Charles MacNeill 5:89031b2f5316 2501 }
Charles MacNeill 5:89031b2f5316 2502
Charles MacNeill 5:89031b2f5316 2503
Charles MacNeill 5:89031b2f5316 2504 VL53LX_Error VL53LX_clear_interrupt_and_enable_next_range(
Charles MacNeill 5:89031b2f5316 2505 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2506 uint8_t measurement_mode)
Charles MacNeill 5:89031b2f5316 2507 {
Charles MacNeill 5:89031b2f5316 2508
Charles MacNeill 5:89031b2f5316 2509
Charles MacNeill 5:89031b2f5316 2510
Charles MacNeill 5:89031b2f5316 2511 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2512
Charles MacNeill 5:89031b2f5316 2513 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2514
Charles MacNeill 5:89031b2f5316 2515
Charles MacNeill 5:89031b2f5316 2516
Charles MacNeill 5:89031b2f5316 2517
Charles MacNeill 5:89031b2f5316 2518
Charles MacNeill 5:89031b2f5316 2519
Charles MacNeill 5:89031b2f5316 2520
Charles MacNeill 5:89031b2f5316 2521
Charles MacNeill 5:89031b2f5316 2522
Charles MacNeill 5:89031b2f5316 2523
Charles MacNeill 5:89031b2f5316 2524 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2525 status = VL53LX_init_and_start_range(
Charles MacNeill 5:89031b2f5316 2526 Dev,
Charles MacNeill 5:89031b2f5316 2527 measurement_mode,
Charles MacNeill 5:89031b2f5316 2528 VL53LX_DEVICECONFIGLEVEL_GENERAL_ONWARDS);
Charles MacNeill 5:89031b2f5316 2529
Charles MacNeill 5:89031b2f5316 2530 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2531
Charles MacNeill 5:89031b2f5316 2532 return status;
Charles MacNeill 5:89031b2f5316 2533 }
Charles MacNeill 5:89031b2f5316 2534
Charles MacNeill 5:89031b2f5316 2535
Charles MacNeill 5:89031b2f5316 2536 VL53LX_Error VL53LX_get_histogram_bin_data(
Charles MacNeill 5:89031b2f5316 2537 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2538 VL53LX_histogram_bin_data_t *pdata)
Charles MacNeill 5:89031b2f5316 2539 {
Charles MacNeill 5:89031b2f5316 2540
Charles MacNeill 5:89031b2f5316 2541
Charles MacNeill 5:89031b2f5316 2542 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2543 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 2544 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 2545 VL53LX_LLDriverResults_t *pres =
Charles MacNeill 5:89031b2f5316 2546 VL53LXDevStructGetLLResultsHandle(Dev);
Charles MacNeill 5:89031b2f5316 2547
Charles MacNeill 5:89031b2f5316 2548 VL53LX_zone_private_dyn_cfg_t *pzone_dyn_cfg;
Charles MacNeill 5:89031b2f5316 2549
Charles MacNeill 5:89031b2f5316 2550 VL53LX_static_nvm_managed_t *pstat_nvm = &(pdev->stat_nvm);
Charles MacNeill 5:89031b2f5316 2551 VL53LX_static_config_t *pstat_cfg = &(pdev->stat_cfg);
Charles MacNeill 5:89031b2f5316 2552 VL53LX_general_config_t *pgen_cfg = &(pdev->gen_cfg);
Charles MacNeill 5:89031b2f5316 2553 VL53LX_timing_config_t *ptim_cfg = &(pdev->tim_cfg);
Charles MacNeill 5:89031b2f5316 2554 VL53LX_range_results_t *presults = &(pres->range_results);
Charles MacNeill 5:89031b2f5316 2555
Charles MacNeill 5:89031b2f5316 2556 uint8_t buffer[VL53LX_MAX_I2C_XFER_SIZE];
Charles MacNeill 5:89031b2f5316 2557 uint8_t *pbuffer = &buffer[0];
Charles MacNeill 5:89031b2f5316 2558 uint8_t bin_23_0 = 0x00;
Charles MacNeill 5:89031b2f5316 2559 uint16_t bin = 0;
Charles MacNeill 5:89031b2f5316 2560 uint16_t i2c_buffer_offset_bytes = 0;
Charles MacNeill 5:89031b2f5316 2561 uint16_t encoded_timeout = 0;
Charles MacNeill 5:89031b2f5316 2562
Charles MacNeill 5:89031b2f5316 2563 uint32_t pll_period_us = 0;
Charles MacNeill 5:89031b2f5316 2564 uint32_t periods_elapsed_tmp = 0;
Charles MacNeill 5:89031b2f5316 2565
Charles MacNeill 5:89031b2f5316 2566 uint8_t i = 0;
Charles MacNeill 5:89031b2f5316 2567
Charles MacNeill 5:89031b2f5316 2568 int32_t hist_merge = 0;
Charles MacNeill 5:89031b2f5316 2569
Charles MacNeill 5:89031b2f5316 2570 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2571
Charles MacNeill 5:89031b2f5316 2572
Charles MacNeill 5:89031b2f5316 2573
Charles MacNeill 5:89031b2f5316 2574 if (status == VL53LX_ERROR_NONE)
Charles MacNeill 5:89031b2f5316 2575 status = VL53LX_ReadMulti(
Charles MacNeill 5:89031b2f5316 2576 Dev,
Charles MacNeill 5:89031b2f5316 2577 VL53LX_HISTOGRAM_BIN_DATA_I2C_INDEX,
Charles MacNeill 5:89031b2f5316 2578 pbuffer,
Charles MacNeill 5:89031b2f5316 2579 VL53LX_HISTOGRAM_BIN_DATA_I2C_SIZE_BYTES);
Charles MacNeill 5:89031b2f5316 2580
Charles MacNeill 5:89031b2f5316 2581
Charles MacNeill 5:89031b2f5316 2582
Charles MacNeill 5:89031b2f5316 2583 pdata->result__interrupt_status = *(pbuffer + 0);
Charles MacNeill 5:89031b2f5316 2584 pdata->result__range_status = *(pbuffer + 1);
Charles MacNeill 5:89031b2f5316 2585 pdata->result__report_status = *(pbuffer + 2);
Charles MacNeill 5:89031b2f5316 2586 pdata->result__stream_count = *(pbuffer + 3);
Charles MacNeill 5:89031b2f5316 2587 pdata->result__dss_actual_effective_spads =
Charles MacNeill 5:89031b2f5316 2588 VL53LX_i2c_decode_uint16_t(2, pbuffer + 4);
Charles MacNeill 5:89031b2f5316 2589
Charles MacNeill 5:89031b2f5316 2590
Charles MacNeill 5:89031b2f5316 2591
Charles MacNeill 5:89031b2f5316 2592 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 2593 VL53LX_PHASECAL_RESULT__REFERENCE_PHASE -
Charles MacNeill 5:89031b2f5316 2594 VL53LX_HISTOGRAM_BIN_DATA_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 2595
Charles MacNeill 5:89031b2f5316 2596 pbuffer = &buffer[i2c_buffer_offset_bytes];
Charles MacNeill 5:89031b2f5316 2597
Charles MacNeill 5:89031b2f5316 2598 pdata->phasecal_result__reference_phase =
Charles MacNeill 5:89031b2f5316 2599 VL53LX_i2c_decode_uint16_t(2, pbuffer);
Charles MacNeill 5:89031b2f5316 2600
Charles MacNeill 5:89031b2f5316 2601 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 2602 VL53LX_PHASECAL_RESULT__VCSEL_START -
Charles MacNeill 5:89031b2f5316 2603 VL53LX_HISTOGRAM_BIN_DATA_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 2604
Charles MacNeill 5:89031b2f5316 2605 pdata->phasecal_result__vcsel_start = buffer[i2c_buffer_offset_bytes];
Charles MacNeill 5:89031b2f5316 2606
Charles MacNeill 5:89031b2f5316 2607
Charles MacNeill 5:89031b2f5316 2608
Charles MacNeill 5:89031b2f5316 2609 pdev->dbg_results.phasecal_result__reference_phase =
Charles MacNeill 5:89031b2f5316 2610 pdata->phasecal_result__reference_phase;
Charles MacNeill 5:89031b2f5316 2611 pdev->dbg_results.phasecal_result__vcsel_start =
Charles MacNeill 5:89031b2f5316 2612 pdata->phasecal_result__vcsel_start;
Charles MacNeill 5:89031b2f5316 2613
Charles MacNeill 5:89031b2f5316 2614
Charles MacNeill 5:89031b2f5316 2615
Charles MacNeill 5:89031b2f5316 2616 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 2617 VL53LX_RESULT__HISTOGRAM_BIN_23_0_MSB -
Charles MacNeill 5:89031b2f5316 2618 VL53LX_HISTOGRAM_BIN_DATA_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 2619
Charles MacNeill 5:89031b2f5316 2620 bin_23_0 = buffer[i2c_buffer_offset_bytes] << 2;
Charles MacNeill 5:89031b2f5316 2621
Charles MacNeill 5:89031b2f5316 2622 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 2623 VL53LX_RESULT__HISTOGRAM_BIN_23_0_LSB -
Charles MacNeill 5:89031b2f5316 2624 VL53LX_HISTOGRAM_BIN_DATA_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 2625
Charles MacNeill 5:89031b2f5316 2626 bin_23_0 += buffer[i2c_buffer_offset_bytes];
Charles MacNeill 5:89031b2f5316 2627
Charles MacNeill 5:89031b2f5316 2628 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 2629 VL53LX_RESULT__HISTOGRAM_BIN_23_0 -
Charles MacNeill 5:89031b2f5316 2630 VL53LX_HISTOGRAM_BIN_DATA_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 2631
Charles MacNeill 5:89031b2f5316 2632 buffer[i2c_buffer_offset_bytes] = bin_23_0;
Charles MacNeill 5:89031b2f5316 2633
Charles MacNeill 5:89031b2f5316 2634
Charles MacNeill 5:89031b2f5316 2635
Charles MacNeill 5:89031b2f5316 2636 i2c_buffer_offset_bytes =
Charles MacNeill 5:89031b2f5316 2637 VL53LX_RESULT__HISTOGRAM_BIN_0_2 -
Charles MacNeill 5:89031b2f5316 2638 VL53LX_HISTOGRAM_BIN_DATA_I2C_INDEX;
Charles MacNeill 5:89031b2f5316 2639
Charles MacNeill 5:89031b2f5316 2640 pbuffer = &buffer[i2c_buffer_offset_bytes];
Charles MacNeill 5:89031b2f5316 2641 for (bin = 0; bin < VL53LX_HISTOGRAM_BUFFER_SIZE; bin++) {
Charles MacNeill 5:89031b2f5316 2642 pdata->bin_data[bin] =
Charles MacNeill 5:89031b2f5316 2643 (int32_t)VL53LX_i2c_decode_uint32_t(3, pbuffer);
Charles MacNeill 5:89031b2f5316 2644 pbuffer += 3;
Charles MacNeill 5:89031b2f5316 2645 }
Charles MacNeill 5:89031b2f5316 2646
Charles MacNeill 5:89031b2f5316 2647
Charles MacNeill 5:89031b2f5316 2648
Charles MacNeill 5:89031b2f5316 2649
Charles MacNeill 5:89031b2f5316 2650 VL53LX_get_tuning_parm(Dev, VL53LX_TUNINGPARM_HIST_MERGE, &hist_merge);
Charles MacNeill 5:89031b2f5316 2651
Charles MacNeill 5:89031b2f5316 2652 if (pdata->result__stream_count == 0) {
Charles MacNeill 5:89031b2f5316 2653
Charles MacNeill 5:89031b2f5316 2654 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec));
Charles MacNeill 5:89031b2f5316 2655 pdev->bin_rec_pos = 0;
Charles MacNeill 5:89031b2f5316 2656 pdev->pos_before_next_recom = 0;
Charles MacNeill 5:89031b2f5316 2657 }
Charles MacNeill 5:89031b2f5316 2658
Charles MacNeill 5:89031b2f5316 2659 if (hist_merge == 1)
Charles MacNeill 5:89031b2f5316 2660 vl53lx_histo_merge(Dev, pdata);
Charles MacNeill 5:89031b2f5316 2661
Charles MacNeill 5:89031b2f5316 2662
Charles MacNeill 5:89031b2f5316 2663 pdata->zone_id = pdev->ll_state.rd_zone_id;
Charles MacNeill 5:89031b2f5316 2664 pdata->VL53LX_p_019 = 0;
Charles MacNeill 5:89031b2f5316 2665 pdata->VL53LX_p_020 = VL53LX_HISTOGRAM_BUFFER_SIZE;
Charles MacNeill 5:89031b2f5316 2666 pdata->VL53LX_p_021 = VL53LX_HISTOGRAM_BUFFER_SIZE;
Charles MacNeill 5:89031b2f5316 2667
Charles MacNeill 5:89031b2f5316 2668 pdata->cal_config__vcsel_start = pgen_cfg->cal_config__vcsel_start;
Charles MacNeill 5:89031b2f5316 2669
Charles MacNeill 5:89031b2f5316 2670
Charles MacNeill 5:89031b2f5316 2671
Charles MacNeill 5:89031b2f5316 2672 pdata->vcsel_width =
Charles MacNeill 5:89031b2f5316 2673 ((uint16_t)pgen_cfg->global_config__vcsel_width) << 4;
Charles MacNeill 5:89031b2f5316 2674 pdata->vcsel_width +=
Charles MacNeill 5:89031b2f5316 2675 (uint16_t)pstat_cfg->ana_config__vcsel_pulse_width_offset;
Charles MacNeill 5:89031b2f5316 2676
Charles MacNeill 5:89031b2f5316 2677
Charles MacNeill 5:89031b2f5316 2678 pdata->VL53LX_p_015 =
Charles MacNeill 5:89031b2f5316 2679 pstat_nvm->osc_measured__fast_osc__frequency;
Charles MacNeill 5:89031b2f5316 2680
Charles MacNeill 5:89031b2f5316 2681
Charles MacNeill 5:89031b2f5316 2682
Charles MacNeill 5:89031b2f5316 2683 VL53LX_hist_get_bin_sequence_config(Dev, pdata);
Charles MacNeill 5:89031b2f5316 2684
Charles MacNeill 5:89031b2f5316 2685
Charles MacNeill 5:89031b2f5316 2686
Charles MacNeill 5:89031b2f5316 2687 if (pdev->ll_state.rd_timing_status == 0) {
Charles MacNeill 5:89031b2f5316 2688
Charles MacNeill 5:89031b2f5316 2689 encoded_timeout =
Charles MacNeill 5:89031b2f5316 2690 (ptim_cfg->range_config__timeout_macrop_a_hi << 8)
Charles MacNeill 5:89031b2f5316 2691 + ptim_cfg->range_config__timeout_macrop_a_lo;
Charles MacNeill 5:89031b2f5316 2692 pdata->VL53LX_p_005 = ptim_cfg->range_config__vcsel_period_a;
Charles MacNeill 5:89031b2f5316 2693 } else {
Charles MacNeill 5:89031b2f5316 2694
Charles MacNeill 5:89031b2f5316 2695 encoded_timeout =
Charles MacNeill 5:89031b2f5316 2696 (ptim_cfg->range_config__timeout_macrop_b_hi << 8)
Charles MacNeill 5:89031b2f5316 2697 + ptim_cfg->range_config__timeout_macrop_b_lo;
Charles MacNeill 5:89031b2f5316 2698 pdata->VL53LX_p_005 = ptim_cfg->range_config__vcsel_period_b;
Charles MacNeill 5:89031b2f5316 2699 }
Charles MacNeill 5:89031b2f5316 2700
Charles MacNeill 5:89031b2f5316 2701
Charles MacNeill 5:89031b2f5316 2702
Charles MacNeill 5:89031b2f5316 2703 pdata->number_of_ambient_bins = 0;
Charles MacNeill 5:89031b2f5316 2704
Charles MacNeill 5:89031b2f5316 2705 for (i = 0; i < 6; i++) {
Charles MacNeill 5:89031b2f5316 2706 if ((pdata->bin_seq[i] & 0x07) == 0x07)
Charles MacNeill 5:89031b2f5316 2707 pdata->number_of_ambient_bins =
Charles MacNeill 5:89031b2f5316 2708 pdata->number_of_ambient_bins + 0x04;
Charles MacNeill 5:89031b2f5316 2709 }
Charles MacNeill 5:89031b2f5316 2710
Charles MacNeill 5:89031b2f5316 2711 pdata->total_periods_elapsed =
Charles MacNeill 5:89031b2f5316 2712 VL53LX_decode_timeout(encoded_timeout);
Charles MacNeill 5:89031b2f5316 2713
Charles MacNeill 5:89031b2f5316 2714
Charles MacNeill 5:89031b2f5316 2715
Charles MacNeill 5:89031b2f5316 2716
Charles MacNeill 5:89031b2f5316 2717 pll_period_us =
Charles MacNeill 5:89031b2f5316 2718 VL53LX_calc_pll_period_us(pdata->VL53LX_p_015);
Charles MacNeill 5:89031b2f5316 2719
Charles MacNeill 5:89031b2f5316 2720
Charles MacNeill 5:89031b2f5316 2721
Charles MacNeill 5:89031b2f5316 2722 periods_elapsed_tmp = pdata->total_periods_elapsed + 1;
Charles MacNeill 5:89031b2f5316 2723
Charles MacNeill 5:89031b2f5316 2724
Charles MacNeill 5:89031b2f5316 2725
Charles MacNeill 5:89031b2f5316 2726 pdata->peak_duration_us =
Charles MacNeill 5:89031b2f5316 2727 VL53LX_duration_maths(
Charles MacNeill 5:89031b2f5316 2728 pll_period_us,
Charles MacNeill 5:89031b2f5316 2729 (uint32_t)pdata->vcsel_width,
Charles MacNeill 5:89031b2f5316 2730 VL53LX_RANGING_WINDOW_VCSEL_PERIODS,
Charles MacNeill 5:89031b2f5316 2731 periods_elapsed_tmp);
Charles MacNeill 5:89031b2f5316 2732
Charles MacNeill 5:89031b2f5316 2733 pdata->woi_duration_us = 0;
Charles MacNeill 5:89031b2f5316 2734
Charles MacNeill 5:89031b2f5316 2735
Charles MacNeill 5:89031b2f5316 2736
Charles MacNeill 5:89031b2f5316 2737 VL53LX_hist_calc_zero_distance_phase(pdata);
Charles MacNeill 5:89031b2f5316 2738
Charles MacNeill 5:89031b2f5316 2739
Charles MacNeill 5:89031b2f5316 2740
Charles MacNeill 5:89031b2f5316 2741 VL53LX_hist_estimate_ambient_from_ambient_bins(pdata);
Charles MacNeill 5:89031b2f5316 2742
Charles MacNeill 5:89031b2f5316 2743
Charles MacNeill 5:89031b2f5316 2744
Charles MacNeill 5:89031b2f5316 2745 pdata->cfg_device_state = pdev->ll_state.cfg_device_state;
Charles MacNeill 5:89031b2f5316 2746 pdata->rd_device_state = pdev->ll_state.rd_device_state;
Charles MacNeill 5:89031b2f5316 2747
Charles MacNeill 5:89031b2f5316 2748
Charles MacNeill 5:89031b2f5316 2749
Charles MacNeill 5:89031b2f5316 2750 pzone_dyn_cfg = &(pres->zone_dyn_cfgs.VL53LX_p_003[pdata->zone_id]);
Charles MacNeill 5:89031b2f5316 2751
Charles MacNeill 5:89031b2f5316 2752 pdata->roi_config__user_roi_centre_spad =
Charles MacNeill 5:89031b2f5316 2753 pzone_dyn_cfg->roi_config__user_roi_centre_spad;
Charles MacNeill 5:89031b2f5316 2754 pdata->roi_config__user_roi_requested_global_xy_size =
Charles MacNeill 5:89031b2f5316 2755 pzone_dyn_cfg->roi_config__user_roi_requested_global_xy_size;
Charles MacNeill 5:89031b2f5316 2756
Charles MacNeill 5:89031b2f5316 2757
Charles MacNeill 5:89031b2f5316 2758
Charles MacNeill 5:89031b2f5316 2759 presults->device_status = VL53LX_DEVICEERROR_NOUPDATE;
Charles MacNeill 5:89031b2f5316 2760
Charles MacNeill 5:89031b2f5316 2761
Charles MacNeill 5:89031b2f5316 2762
Charles MacNeill 5:89031b2f5316 2763 switch (pdata->result__range_status &
Charles MacNeill 5:89031b2f5316 2764 VL53LX_RANGE_STATUS__RANGE_STATUS_MASK) {
Charles MacNeill 5:89031b2f5316 2765
Charles MacNeill 5:89031b2f5316 2766 case VL53LX_DEVICEERROR_VCSELCONTINUITYTESTFAILURE:
Charles MacNeill 5:89031b2f5316 2767 case VL53LX_DEVICEERROR_VCSELWATCHDOGTESTFAILURE:
Charles MacNeill 5:89031b2f5316 2768 case VL53LX_DEVICEERROR_NOVHVVALUEFOUND:
Charles MacNeill 5:89031b2f5316 2769 case VL53LX_DEVICEERROR_USERROICLIP:
Charles MacNeill 5:89031b2f5316 2770 case VL53LX_DEVICEERROR_MULTCLIPFAIL:
Charles MacNeill 5:89031b2f5316 2771
Charles MacNeill 5:89031b2f5316 2772 presults->device_status = (pdata->result__range_status &
Charles MacNeill 5:89031b2f5316 2773 VL53LX_RANGE_STATUS__RANGE_STATUS_MASK);
Charles MacNeill 5:89031b2f5316 2774
Charles MacNeill 5:89031b2f5316 2775 status = VL53LX_ERROR_RANGE_ERROR;
Charles MacNeill 5:89031b2f5316 2776
Charles MacNeill 5:89031b2f5316 2777 break;
Charles MacNeill 5:89031b2f5316 2778
Charles MacNeill 5:89031b2f5316 2779 }
Charles MacNeill 5:89031b2f5316 2780
Charles MacNeill 5:89031b2f5316 2781 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 2782
Charles MacNeill 5:89031b2f5316 2783 return status;
Charles MacNeill 5:89031b2f5316 2784 }
Charles MacNeill 5:89031b2f5316 2785
Charles MacNeill 5:89031b2f5316 2786
Charles MacNeill 5:89031b2f5316 2787 void VL53LX_copy_sys_and_core_results_to_range_results(
Charles MacNeill 5:89031b2f5316 2788 int32_t gain_factor,
Charles MacNeill 5:89031b2f5316 2789 VL53LX_system_results_t *psys,
Charles MacNeill 5:89031b2f5316 2790 VL53LX_core_results_t *pcore,
Charles MacNeill 5:89031b2f5316 2791 VL53LX_range_results_t *presults)
Charles MacNeill 5:89031b2f5316 2792 {
Charles MacNeill 5:89031b2f5316 2793 uint8_t i = 0;
Charles MacNeill 5:89031b2f5316 2794
Charles MacNeill 5:89031b2f5316 2795 VL53LX_range_data_t *pdata;
Charles MacNeill 5:89031b2f5316 2796 int32_t range_mm = 0;
Charles MacNeill 5:89031b2f5316 2797 uint32_t tmpu32 = 0;
Charles MacNeill 5:89031b2f5316 2798 uint16_t rpscr_crosstalk_corrected_mcps_sd0;
Charles MacNeill 5:89031b2f5316 2799 uint16_t rmmo_effective_spads_sd0;
Charles MacNeill 5:89031b2f5316 2800 uint16_t rmmi_effective_spads_sd0;
Charles MacNeill 5:89031b2f5316 2801
Charles MacNeill 5:89031b2f5316 2802 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 2803
Charles MacNeill 5:89031b2f5316 2804
Charles MacNeill 5:89031b2f5316 2805
Charles MacNeill 5:89031b2f5316 2806 presults->zone_id = 0;
Charles MacNeill 5:89031b2f5316 2807 presults->stream_count = psys->result__stream_count;
Charles MacNeill 5:89031b2f5316 2808 presults->wrap_dmax_mm = 0;
Charles MacNeill 5:89031b2f5316 2809 presults->max_results = VL53LX_MAX_RANGE_RESULTS;
Charles MacNeill 5:89031b2f5316 2810 presults->active_results = 1;
Charles MacNeill 5:89031b2f5316 2811 rpscr_crosstalk_corrected_mcps_sd0 =
Charles MacNeill 5:89031b2f5316 2812 psys->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0;
Charles MacNeill 5:89031b2f5316 2813 rmmo_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 2814 psys->result__mm_outer_actual_effective_spads_sd0;
Charles MacNeill 5:89031b2f5316 2815 rmmi_effective_spads_sd0 =
Charles MacNeill 5:89031b2f5316 2816 psys->result__mm_inner_actual_effective_spads_sd0;
Charles MacNeill 5:89031b2f5316 2817
Charles MacNeill 5:89031b2f5316 2818
Charles MacNeill 5:89031b2f5316 2819 for (i = 0; i < VL53LX_MAX_AMBIENT_DMAX_VALUES; i++)
Charles MacNeill 5:89031b2f5316 2820 presults->VL53LX_p_022[i] = 0;
Charles MacNeill 5:89031b2f5316 2821
Charles MacNeill 5:89031b2f5316 2822 pdata = &(presults->VL53LX_p_003[0]);
Charles MacNeill 5:89031b2f5316 2823
Charles MacNeill 5:89031b2f5316 2824 for (i = 0; i < 2; i++) {
Charles MacNeill 5:89031b2f5316 2825
Charles MacNeill 5:89031b2f5316 2826 pdata->range_id = i;
Charles MacNeill 5:89031b2f5316 2827 pdata->time_stamp = 0;
Charles MacNeill 5:89031b2f5316 2828
Charles MacNeill 5:89031b2f5316 2829 if ((psys->result__stream_count == 0) &&
Charles MacNeill 5:89031b2f5316 2830 ((psys->result__range_status &
Charles MacNeill 5:89031b2f5316 2831 VL53LX_RANGE_STATUS__RANGE_STATUS_MASK) ==
Charles MacNeill 5:89031b2f5316 2832 VL53LX_DEVICEERROR_RANGECOMPLETE)) {
Charles MacNeill 5:89031b2f5316 2833 pdata->range_status =
Charles MacNeill 5:89031b2f5316 2834 VL53LX_DEVICEERROR_RANGECOMPLETE_NO_WRAP_CHECK;
Charles MacNeill 5:89031b2f5316 2835 } else {
Charles MacNeill 5:89031b2f5316 2836 pdata->range_status =
Charles MacNeill 5:89031b2f5316 2837 psys->result__range_status &
Charles MacNeill 5:89031b2f5316 2838 VL53LX_RANGE_STATUS__RANGE_STATUS_MASK;
Charles MacNeill 5:89031b2f5316 2839 }
Charles MacNeill 5:89031b2f5316 2840
Charles MacNeill 5:89031b2f5316 2841 pdata->VL53LX_p_012 = 0;
Charles MacNeill 5:89031b2f5316 2842 pdata->VL53LX_p_019 = 0;
Charles MacNeill 5:89031b2f5316 2843 pdata->VL53LX_p_023 = 0;
Charles MacNeill 5:89031b2f5316 2844 pdata->VL53LX_p_024 = 0;
Charles MacNeill 5:89031b2f5316 2845 pdata->VL53LX_p_013 = 0;
Charles MacNeill 5:89031b2f5316 2846 pdata->VL53LX_p_025 = 0;
Charles MacNeill 5:89031b2f5316 2847
Charles MacNeill 5:89031b2f5316 2848 switch (i) {
Charles MacNeill 5:89031b2f5316 2849
Charles MacNeill 5:89031b2f5316 2850 case 0:
Charles MacNeill 5:89031b2f5316 2851 if (psys->result__report_status ==
Charles MacNeill 5:89031b2f5316 2852 VL53LX_DEVICEREPORTSTATUS_MM1)
Charles MacNeill 5:89031b2f5316 2853 pdata->VL53LX_p_004 =
Charles MacNeill 5:89031b2f5316 2854 rmmi_effective_spads_sd0;
Charles MacNeill 5:89031b2f5316 2855 else if (psys->result__report_status ==
Charles MacNeill 5:89031b2f5316 2856 VL53LX_DEVICEREPORTSTATUS_MM2)
Charles MacNeill 5:89031b2f5316 2857 pdata->VL53LX_p_004 =
Charles MacNeill 5:89031b2f5316 2858 rmmo_effective_spads_sd0;
Charles MacNeill 5:89031b2f5316 2859 else
Charles MacNeill 5:89031b2f5316 2860 pdata->VL53LX_p_004 =
Charles MacNeill 5:89031b2f5316 2861 psys->result__dss_actual_effective_spads_sd0;
Charles MacNeill 5:89031b2f5316 2862
Charles MacNeill 5:89031b2f5316 2863 pdata->peak_signal_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 2864 rpscr_crosstalk_corrected_mcps_sd0;
Charles MacNeill 5:89031b2f5316 2865 pdata->avg_signal_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 2866 psys->result__avg_signal_count_rate_mcps_sd0;
Charles MacNeill 5:89031b2f5316 2867 pdata->ambient_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 2868 psys->result__ambient_count_rate_mcps_sd0;
Charles MacNeill 5:89031b2f5316 2869
Charles MacNeill 5:89031b2f5316 2870
Charles MacNeill 5:89031b2f5316 2871
Charles MacNeill 5:89031b2f5316 2872
Charles MacNeill 5:89031b2f5316 2873 tmpu32 = ((uint32_t)psys->result__sigma_sd0 << 5);
Charles MacNeill 5:89031b2f5316 2874 if (tmpu32 > 0xFFFF)
Charles MacNeill 5:89031b2f5316 2875 tmpu32 = 0xFFFF;
Charles MacNeill 5:89031b2f5316 2876
Charles MacNeill 5:89031b2f5316 2877 pdata->VL53LX_p_002 = (uint16_t)tmpu32;
Charles MacNeill 5:89031b2f5316 2878
Charles MacNeill 5:89031b2f5316 2879
Charles MacNeill 5:89031b2f5316 2880
Charles MacNeill 5:89031b2f5316 2881 pdata->VL53LX_p_011 =
Charles MacNeill 5:89031b2f5316 2882 psys->result__phase_sd0;
Charles MacNeill 5:89031b2f5316 2883
Charles MacNeill 5:89031b2f5316 2884 range_mm = (int32_t)(
Charles MacNeill 5:89031b2f5316 2885 psys->result__final_crosstalk_corrected_range_mm_sd0);
Charles MacNeill 5:89031b2f5316 2886
Charles MacNeill 5:89031b2f5316 2887
Charles MacNeill 5:89031b2f5316 2888 range_mm *= gain_factor;
Charles MacNeill 5:89031b2f5316 2889 range_mm += 0x0400;
Charles MacNeill 5:89031b2f5316 2890 range_mm /= 0x0800;
Charles MacNeill 5:89031b2f5316 2891
Charles MacNeill 5:89031b2f5316 2892 pdata->median_range_mm = (int16_t)range_mm;
Charles MacNeill 5:89031b2f5316 2893
Charles MacNeill 5:89031b2f5316 2894 pdata->VL53LX_p_017 =
Charles MacNeill 5:89031b2f5316 2895 pcore->result_core__ranging_total_events_sd0;
Charles MacNeill 5:89031b2f5316 2896 pdata->VL53LX_p_010 =
Charles MacNeill 5:89031b2f5316 2897 pcore->result_core__signal_total_events_sd0;
Charles MacNeill 5:89031b2f5316 2898 pdata->total_periods_elapsed =
Charles MacNeill 5:89031b2f5316 2899 pcore->result_core__total_periods_elapsed_sd0;
Charles MacNeill 5:89031b2f5316 2900 pdata->VL53LX_p_016 =
Charles MacNeill 5:89031b2f5316 2901 pcore->result_core__ambient_window_events_sd0;
Charles MacNeill 5:89031b2f5316 2902
Charles MacNeill 5:89031b2f5316 2903 break;
Charles MacNeill 5:89031b2f5316 2904 case 1:
Charles MacNeill 5:89031b2f5316 2905
Charles MacNeill 5:89031b2f5316 2906 pdata->VL53LX_p_004 =
Charles MacNeill 5:89031b2f5316 2907 psys->result__dss_actual_effective_spads_sd1;
Charles MacNeill 5:89031b2f5316 2908 pdata->peak_signal_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 2909 psys->result__peak_signal_count_rate_mcps_sd1;
Charles MacNeill 5:89031b2f5316 2910 pdata->avg_signal_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 2911 0xFFFF;
Charles MacNeill 5:89031b2f5316 2912 pdata->ambient_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 2913 psys->result__ambient_count_rate_mcps_sd1;
Charles MacNeill 5:89031b2f5316 2914
Charles MacNeill 5:89031b2f5316 2915
Charles MacNeill 5:89031b2f5316 2916
Charles MacNeill 5:89031b2f5316 2917
Charles MacNeill 5:89031b2f5316 2918 tmpu32 = ((uint32_t)psys->result__sigma_sd1 << 5);
Charles MacNeill 5:89031b2f5316 2919 if (tmpu32 > 0xFFFF)
Charles MacNeill 5:89031b2f5316 2920 tmpu32 = 0xFFFF;
Charles MacNeill 5:89031b2f5316 2921
Charles MacNeill 5:89031b2f5316 2922 pdata->VL53LX_p_002 = (uint16_t)tmpu32;
Charles MacNeill 5:89031b2f5316 2923
Charles MacNeill 5:89031b2f5316 2924
Charles MacNeill 5:89031b2f5316 2925
Charles MacNeill 5:89031b2f5316 2926 pdata->VL53LX_p_011 =
Charles MacNeill 5:89031b2f5316 2927 psys->result__phase_sd1;
Charles MacNeill 5:89031b2f5316 2928
Charles MacNeill 5:89031b2f5316 2929 range_mm = (int32_t)(
Charles MacNeill 5:89031b2f5316 2930 psys->result__final_crosstalk_corrected_range_mm_sd1);
Charles MacNeill 5:89031b2f5316 2931
Charles MacNeill 5:89031b2f5316 2932
Charles MacNeill 5:89031b2f5316 2933 range_mm *= gain_factor;
Charles MacNeill 5:89031b2f5316 2934 range_mm += 0x0400;
Charles MacNeill 5:89031b2f5316 2935 range_mm /= 0x0800;
Charles MacNeill 5:89031b2f5316 2936
Charles MacNeill 5:89031b2f5316 2937 pdata->median_range_mm = (int16_t)range_mm;
Charles MacNeill 5:89031b2f5316 2938
Charles MacNeill 5:89031b2f5316 2939 pdata->VL53LX_p_017 =
Charles MacNeill 5:89031b2f5316 2940 pcore->result_core__ranging_total_events_sd1;
Charles MacNeill 5:89031b2f5316 2941 pdata->VL53LX_p_010 =
Charles MacNeill 5:89031b2f5316 2942 pcore->result_core__signal_total_events_sd1;
Charles MacNeill 5:89031b2f5316 2943 pdata->total_periods_elapsed =
Charles MacNeill 5:89031b2f5316 2944 pcore->result_core__total_periods_elapsed_sd1;
Charles MacNeill 5:89031b2f5316 2945 pdata->VL53LX_p_016 =
Charles MacNeill 5:89031b2f5316 2946 pcore->result_core__ambient_window_events_sd1;
Charles MacNeill 5:89031b2f5316 2947
Charles MacNeill 5:89031b2f5316 2948 break;
Charles MacNeill 5:89031b2f5316 2949 }
Charles MacNeill 5:89031b2f5316 2950
Charles MacNeill 5:89031b2f5316 2951
Charles MacNeill 5:89031b2f5316 2952 pdata->VL53LX_p_026 = pdata->VL53LX_p_011;
Charles MacNeill 5:89031b2f5316 2953 pdata->VL53LX_p_027 = pdata->VL53LX_p_011;
Charles MacNeill 5:89031b2f5316 2954 pdata->min_range_mm = pdata->median_range_mm;
Charles MacNeill 5:89031b2f5316 2955 pdata->max_range_mm = pdata->median_range_mm;
Charles MacNeill 5:89031b2f5316 2956
Charles MacNeill 5:89031b2f5316 2957 pdata++;
Charles MacNeill 5:89031b2f5316 2958 }
Charles MacNeill 5:89031b2f5316 2959
Charles MacNeill 5:89031b2f5316 2960
Charles MacNeill 5:89031b2f5316 2961
Charles MacNeill 5:89031b2f5316 2962 presults->device_status = VL53LX_DEVICEERROR_NOUPDATE;
Charles MacNeill 5:89031b2f5316 2963
Charles MacNeill 5:89031b2f5316 2964
Charles MacNeill 5:89031b2f5316 2965
Charles MacNeill 5:89031b2f5316 2966 switch (psys->result__range_status &
Charles MacNeill 5:89031b2f5316 2967 VL53LX_RANGE_STATUS__RANGE_STATUS_MASK) {
Charles MacNeill 5:89031b2f5316 2968
Charles MacNeill 5:89031b2f5316 2969 case VL53LX_DEVICEERROR_VCSELCONTINUITYTESTFAILURE:
Charles MacNeill 5:89031b2f5316 2970 case VL53LX_DEVICEERROR_VCSELWATCHDOGTESTFAILURE:
Charles MacNeill 5:89031b2f5316 2971 case VL53LX_DEVICEERROR_NOVHVVALUEFOUND:
Charles MacNeill 5:89031b2f5316 2972 case VL53LX_DEVICEERROR_USERROICLIP:
Charles MacNeill 5:89031b2f5316 2973 case VL53LX_DEVICEERROR_MULTCLIPFAIL:
Charles MacNeill 5:89031b2f5316 2974
Charles MacNeill 5:89031b2f5316 2975 presults->device_status = (psys->result__range_status &
Charles MacNeill 5:89031b2f5316 2976 VL53LX_RANGE_STATUS__RANGE_STATUS_MASK);
Charles MacNeill 5:89031b2f5316 2977
Charles MacNeill 5:89031b2f5316 2978 presults->VL53LX_p_003[0].range_status =
Charles MacNeill 5:89031b2f5316 2979 VL53LX_DEVICEERROR_NOUPDATE;
Charles MacNeill 5:89031b2f5316 2980 break;
Charles MacNeill 5:89031b2f5316 2981
Charles MacNeill 5:89031b2f5316 2982 }
Charles MacNeill 5:89031b2f5316 2983
Charles MacNeill 5:89031b2f5316 2984 LOG_FUNCTION_END(0);
Charles MacNeill 5:89031b2f5316 2985 }
Charles MacNeill 5:89031b2f5316 2986
Charles MacNeill 5:89031b2f5316 2987
Charles MacNeill 5:89031b2f5316 2988 VL53LX_Error VL53LX_set_zone_dss_config(
Charles MacNeill 5:89031b2f5316 2989 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 2990 VL53LX_zone_private_dyn_cfg_t *pzone_dyn_cfg)
Charles MacNeill 5:89031b2f5316 2991 {
Charles MacNeill 5:89031b2f5316 2992
Charles MacNeill 5:89031b2f5316 2993
Charles MacNeill 5:89031b2f5316 2994
Charles MacNeill 5:89031b2f5316 2995 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 2996
Charles MacNeill 5:89031b2f5316 2997 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 2998 VL53LX_ll_driver_state_t *pstate = &(pdev->ll_state);
Charles MacNeill 5:89031b2f5316 2999
Charles MacNeill 5:89031b2f5316 3000 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3001
Charles MacNeill 5:89031b2f5316 3002 if (pstate->cfg_device_state ==
Charles MacNeill 5:89031b2f5316 3003 VL53LX_DEVICESTATE_RANGING_DSS_MANUAL) {
Charles MacNeill 5:89031b2f5316 3004 pdev->gen_cfg.dss_config__roi_mode_control =
Charles MacNeill 5:89031b2f5316 3005 VL53LX_DSS_CONTROL__MODE_EFFSPADS;
Charles MacNeill 5:89031b2f5316 3006 pdev->gen_cfg.dss_config__manual_effective_spads_select =
Charles MacNeill 5:89031b2f5316 3007 pzone_dyn_cfg->dss_requested_effective_spad_count;
Charles MacNeill 5:89031b2f5316 3008 } else {
Charles MacNeill 5:89031b2f5316 3009 pdev->gen_cfg.dss_config__roi_mode_control =
Charles MacNeill 5:89031b2f5316 3010 VL53LX_DSS_CONTROL__MODE_TARGET_RATE;
Charles MacNeill 5:89031b2f5316 3011 }
Charles MacNeill 5:89031b2f5316 3012
Charles MacNeill 5:89031b2f5316 3013 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3014 return status;
Charles MacNeill 5:89031b2f5316 3015 }
Charles MacNeill 5:89031b2f5316 3016
Charles MacNeill 5:89031b2f5316 3017
Charles MacNeill 5:89031b2f5316 3018 VL53LX_Error VL53LX_set_dmax_mode(
Charles MacNeill 5:89031b2f5316 3019 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3020 VL53LX_DeviceDmaxMode dmax_mode)
Charles MacNeill 5:89031b2f5316 3021 {
Charles MacNeill 5:89031b2f5316 3022
Charles MacNeill 5:89031b2f5316 3023
Charles MacNeill 5:89031b2f5316 3024 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3025
Charles MacNeill 5:89031b2f5316 3026 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 3027
Charles MacNeill 5:89031b2f5316 3028 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3029
Charles MacNeill 5:89031b2f5316 3030 pdev->dmax_mode = dmax_mode;
Charles MacNeill 5:89031b2f5316 3031
Charles MacNeill 5:89031b2f5316 3032 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3033
Charles MacNeill 5:89031b2f5316 3034 return status;
Charles MacNeill 5:89031b2f5316 3035 }
Charles MacNeill 5:89031b2f5316 3036
Charles MacNeill 5:89031b2f5316 3037
Charles MacNeill 5:89031b2f5316 3038 VL53LX_Error VL53LX_get_dmax_mode(
Charles MacNeill 5:89031b2f5316 3039 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3040 VL53LX_DeviceDmaxMode *pdmax_mode)
Charles MacNeill 5:89031b2f5316 3041 {
Charles MacNeill 5:89031b2f5316 3042
Charles MacNeill 5:89031b2f5316 3043
Charles MacNeill 5:89031b2f5316 3044 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3045
Charles MacNeill 5:89031b2f5316 3046 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 3047
Charles MacNeill 5:89031b2f5316 3048 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3049
Charles MacNeill 5:89031b2f5316 3050 *pdmax_mode = pdev->dmax_mode;
Charles MacNeill 5:89031b2f5316 3051
Charles MacNeill 5:89031b2f5316 3052 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3053
Charles MacNeill 5:89031b2f5316 3054 return status;
Charles MacNeill 5:89031b2f5316 3055 }
Charles MacNeill 5:89031b2f5316 3056
Charles MacNeill 5:89031b2f5316 3057
Charles MacNeill 5:89031b2f5316 3058 VL53LX_Error VL53LX_get_dmax_calibration_data(
Charles MacNeill 5:89031b2f5316 3059 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3060 VL53LX_DeviceDmaxMode dmax_mode,
Charles MacNeill 5:89031b2f5316 3061 VL53LX_dmax_calibration_data_t *pdmax_cal)
Charles MacNeill 5:89031b2f5316 3062 {
Charles MacNeill 5:89031b2f5316 3063
Charles MacNeill 5:89031b2f5316 3064
Charles MacNeill 5:89031b2f5316 3065 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3066
Charles MacNeill 5:89031b2f5316 3067 VL53LX_LLDriverData_t *pdev =
Charles MacNeill 5:89031b2f5316 3068 VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 3069
Charles MacNeill 5:89031b2f5316 3070 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3071
Charles MacNeill 5:89031b2f5316 3072 switch (dmax_mode) {
Charles MacNeill 5:89031b2f5316 3073
Charles MacNeill 5:89031b2f5316 3074 case VL53LX_DEVICEDMAXMODE__CUST_CAL_DATA:
Charles MacNeill 5:89031b2f5316 3075 memcpy(
Charles MacNeill 5:89031b2f5316 3076 pdmax_cal,
Charles MacNeill 5:89031b2f5316 3077 &(pdev->cust_dmax_cal),
Charles MacNeill 5:89031b2f5316 3078 sizeof(VL53LX_dmax_calibration_data_t));
Charles MacNeill 5:89031b2f5316 3079 break;
Charles MacNeill 5:89031b2f5316 3080
Charles MacNeill 5:89031b2f5316 3081 case VL53LX_DEVICEDMAXMODE__FMT_CAL_DATA:
Charles MacNeill 5:89031b2f5316 3082 memcpy(
Charles MacNeill 5:89031b2f5316 3083 pdmax_cal,
Charles MacNeill 5:89031b2f5316 3084 &(pdev->fmt_dmax_cal),
Charles MacNeill 5:89031b2f5316 3085 sizeof(VL53LX_dmax_calibration_data_t));
Charles MacNeill 5:89031b2f5316 3086 break;
Charles MacNeill 5:89031b2f5316 3087
Charles MacNeill 5:89031b2f5316 3088 default:
Charles MacNeill 5:89031b2f5316 3089 status = VL53LX_ERROR_INVALID_PARAMS;
Charles MacNeill 5:89031b2f5316 3090 break;
Charles MacNeill 5:89031b2f5316 3091
Charles MacNeill 5:89031b2f5316 3092 }
Charles MacNeill 5:89031b2f5316 3093
Charles MacNeill 5:89031b2f5316 3094 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3095
Charles MacNeill 5:89031b2f5316 3096 return status;
Charles MacNeill 5:89031b2f5316 3097 }
Charles MacNeill 5:89031b2f5316 3098
Charles MacNeill 5:89031b2f5316 3099
Charles MacNeill 5:89031b2f5316 3100 VL53LX_Error VL53LX_set_offset_correction_mode(
Charles MacNeill 5:89031b2f5316 3101 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3102 VL53LX_OffsetCorrectionMode offset_cor_mode)
Charles MacNeill 5:89031b2f5316 3103 {
Charles MacNeill 5:89031b2f5316 3104
Charles MacNeill 5:89031b2f5316 3105
Charles MacNeill 5:89031b2f5316 3106
Charles MacNeill 5:89031b2f5316 3107 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3108
Charles MacNeill 5:89031b2f5316 3109 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 3110
Charles MacNeill 5:89031b2f5316 3111 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3112
Charles MacNeill 5:89031b2f5316 3113 pdev->offset_correction_mode = offset_cor_mode;
Charles MacNeill 5:89031b2f5316 3114
Charles MacNeill 5:89031b2f5316 3115 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3116
Charles MacNeill 5:89031b2f5316 3117 return status;
Charles MacNeill 5:89031b2f5316 3118 }
Charles MacNeill 5:89031b2f5316 3119
Charles MacNeill 5:89031b2f5316 3120
Charles MacNeill 5:89031b2f5316 3121 VL53LX_Error VL53LX_get_offset_correction_mode(
Charles MacNeill 5:89031b2f5316 3122 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3123 VL53LX_OffsetCorrectionMode *poffset_cor_mode)
Charles MacNeill 5:89031b2f5316 3124 {
Charles MacNeill 5:89031b2f5316 3125
Charles MacNeill 5:89031b2f5316 3126
Charles MacNeill 5:89031b2f5316 3127
Charles MacNeill 5:89031b2f5316 3128 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3129
Charles MacNeill 5:89031b2f5316 3130 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 3131
Charles MacNeill 5:89031b2f5316 3132 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3133
Charles MacNeill 5:89031b2f5316 3134 *poffset_cor_mode = pdev->offset_correction_mode;
Charles MacNeill 5:89031b2f5316 3135
Charles MacNeill 5:89031b2f5316 3136 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3137
Charles MacNeill 5:89031b2f5316 3138 return status;
Charles MacNeill 5:89031b2f5316 3139 }
Charles MacNeill 5:89031b2f5316 3140
Charles MacNeill 5:89031b2f5316 3141
Charles MacNeill 5:89031b2f5316 3142
Charles MacNeill 5:89031b2f5316 3143
Charles MacNeill 5:89031b2f5316 3144 VL53LX_Error VL53LX_get_tuning_debug_data(
Charles MacNeill 5:89031b2f5316 3145 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3146 VL53LX_tuning_parameters_t *ptun_data)
Charles MacNeill 5:89031b2f5316 3147 {
Charles MacNeill 5:89031b2f5316 3148
Charles MacNeill 5:89031b2f5316 3149
Charles MacNeill 5:89031b2f5316 3150 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3151
Charles MacNeill 5:89031b2f5316 3152 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 3153 VL53LX_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 3154 VL53LX_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
Charles MacNeill 5:89031b2f5316 3155
Charles MacNeill 5:89031b2f5316 3156 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3157
Charles MacNeill 5:89031b2f5316 3158 ptun_data->vl53lx_tuningparm_version =
Charles MacNeill 5:89031b2f5316 3159 pdev->tuning_parms.tp_tuning_parm_version;
Charles MacNeill 5:89031b2f5316 3160
Charles MacNeill 5:89031b2f5316 3161 ptun_data->vl53lx_tuningparm_key_table_version =
Charles MacNeill 5:89031b2f5316 3162 pdev->tuning_parms.tp_tuning_parm_key_table_version;
Charles MacNeill 5:89031b2f5316 3163
Charles MacNeill 5:89031b2f5316 3164
Charles MacNeill 5:89031b2f5316 3165 ptun_data->vl53lx_tuningparm_lld_version =
Charles MacNeill 5:89031b2f5316 3166 pdev->tuning_parms.tp_tuning_parm_lld_version;
Charles MacNeill 5:89031b2f5316 3167
Charles MacNeill 5:89031b2f5316 3168 ptun_data->vl53lx_tuningparm_hist_algo_select =
Charles MacNeill 5:89031b2f5316 3169 pHP->hist_algo_select;
Charles MacNeill 5:89031b2f5316 3170
Charles MacNeill 5:89031b2f5316 3171 ptun_data->vl53lx_tuningparm_hist_target_order =
Charles MacNeill 5:89031b2f5316 3172 pHP->hist_target_order;
Charles MacNeill 5:89031b2f5316 3173
Charles MacNeill 5:89031b2f5316 3174 ptun_data->vl53lx_tuningparm_hist_filter_woi_0 =
Charles MacNeill 5:89031b2f5316 3175 pHP->filter_woi0;
Charles MacNeill 5:89031b2f5316 3176
Charles MacNeill 5:89031b2f5316 3177 ptun_data->vl53lx_tuningparm_hist_filter_woi_1 =
Charles MacNeill 5:89031b2f5316 3178 pHP->filter_woi1;
Charles MacNeill 5:89031b2f5316 3179
Charles MacNeill 5:89031b2f5316 3180 ptun_data->vl53lx_tuningparm_hist_amb_est_method =
Charles MacNeill 5:89031b2f5316 3181 pHP->hist_amb_est_method;
Charles MacNeill 5:89031b2f5316 3182
Charles MacNeill 5:89031b2f5316 3183 ptun_data->vl53lx_tuningparm_hist_amb_thresh_sigma_0 =
Charles MacNeill 5:89031b2f5316 3184 pHP->ambient_thresh_sigma0;
Charles MacNeill 5:89031b2f5316 3185
Charles MacNeill 5:89031b2f5316 3186 ptun_data->vl53lx_tuningparm_hist_amb_thresh_sigma_1 =
Charles MacNeill 5:89031b2f5316 3187 pHP->ambient_thresh_sigma1;
Charles MacNeill 5:89031b2f5316 3188
Charles MacNeill 5:89031b2f5316 3189 ptun_data->vl53lx_tuningparm_hist_min_amb_thresh_events =
Charles MacNeill 5:89031b2f5316 3190 pHP->min_ambient_thresh_events;
Charles MacNeill 5:89031b2f5316 3191
Charles MacNeill 5:89031b2f5316 3192 ptun_data->vl53lx_tuningparm_hist_amb_events_scaler =
Charles MacNeill 5:89031b2f5316 3193 pHP->ambient_thresh_events_scaler;
Charles MacNeill 5:89031b2f5316 3194
Charles MacNeill 5:89031b2f5316 3195 ptun_data->vl53lx_tuningparm_hist_noise_threshold =
Charles MacNeill 5:89031b2f5316 3196 pHP->noise_threshold;
Charles MacNeill 5:89031b2f5316 3197
Charles MacNeill 5:89031b2f5316 3198 ptun_data->vl53lx_tuningparm_hist_signal_total_events_limit =
Charles MacNeill 5:89031b2f5316 3199 pHP->signal_total_events_limit;
Charles MacNeill 5:89031b2f5316 3200
Charles MacNeill 5:89031b2f5316 3201 ptun_data->vl53lx_tuningparm_hist_sigma_est_ref_mm =
Charles MacNeill 5:89031b2f5316 3202 pHP->sigma_estimator__sigma_ref_mm;
Charles MacNeill 5:89031b2f5316 3203
Charles MacNeill 5:89031b2f5316 3204 ptun_data->vl53lx_tuningparm_hist_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 3205 pHP->sigma_thresh;
Charles MacNeill 5:89031b2f5316 3206
Charles MacNeill 5:89031b2f5316 3207 ptun_data->vl53lx_tuningparm_hist_gain_factor =
Charles MacNeill 5:89031b2f5316 3208 pdev->gain_cal.histogram_ranging_gain_factor;
Charles MacNeill 5:89031b2f5316 3209
Charles MacNeill 5:89031b2f5316 3210 ptun_data->vl53lx_tuningparm_consistency_hist_phase_tolerance =
Charles MacNeill 5:89031b2f5316 3211 pHP->algo__consistency_check__phase_tolerance;
Charles MacNeill 5:89031b2f5316 3212
Charles MacNeill 5:89031b2f5316 3213 ptun_data->vl53lx_tuningparm_consistency_hist_min_max_tolerance_mm =
Charles MacNeill 5:89031b2f5316 3214 pHP->algo__consistency_check__min_max_tolerance;
Charles MacNeill 5:89031b2f5316 3215
Charles MacNeill 5:89031b2f5316 3216 ptun_data->vl53lx_tuningparm_consistency_hist_event_sigma =
Charles MacNeill 5:89031b2f5316 3217 pHP->algo__consistency_check__event_sigma;
Charles MacNeill 5:89031b2f5316 3218
Charles MacNeill 5:89031b2f5316 3219 ptun_data->vl53lx_tuningparm_consistency_hist_event_sigma_min_spad_limit
Charles MacNeill 5:89031b2f5316 3220 = pHP->algo__consistency_check__event_min_spad_count;
Charles MacNeill 5:89031b2f5316 3221
Charles MacNeill 5:89031b2f5316 3222 ptun_data->vl53lx_tuningparm_initial_phase_rtn_histo_long_range =
Charles MacNeill 5:89031b2f5316 3223 pdev->tuning_parms.tp_init_phase_rtn_hist_long;
Charles MacNeill 5:89031b2f5316 3224
Charles MacNeill 5:89031b2f5316 3225 ptun_data->vl53lx_tuningparm_initial_phase_rtn_histo_med_range =
Charles MacNeill 5:89031b2f5316 3226 pdev->tuning_parms.tp_init_phase_rtn_hist_med;
Charles MacNeill 5:89031b2f5316 3227
Charles MacNeill 5:89031b2f5316 3228 ptun_data->vl53lx_tuningparm_initial_phase_rtn_histo_short_range =
Charles MacNeill 5:89031b2f5316 3229 pdev->tuning_parms.tp_init_phase_rtn_hist_short;
Charles MacNeill 5:89031b2f5316 3230
Charles MacNeill 5:89031b2f5316 3231 ptun_data->vl53lx_tuningparm_initial_phase_ref_histo_long_range =
Charles MacNeill 5:89031b2f5316 3232 pdev->tuning_parms.tp_init_phase_ref_hist_long;
Charles MacNeill 5:89031b2f5316 3233
Charles MacNeill 5:89031b2f5316 3234 ptun_data->vl53lx_tuningparm_initial_phase_ref_histo_med_range =
Charles MacNeill 5:89031b2f5316 3235 pdev->tuning_parms.tp_init_phase_ref_hist_med;
Charles MacNeill 5:89031b2f5316 3236
Charles MacNeill 5:89031b2f5316 3237 ptun_data->vl53lx_tuningparm_initial_phase_ref_histo_short_range =
Charles MacNeill 5:89031b2f5316 3238 pdev->tuning_parms.tp_init_phase_ref_hist_short;
Charles MacNeill 5:89031b2f5316 3239
Charles MacNeill 5:89031b2f5316 3240 ptun_data->vl53lx_tuningparm_xtalk_detect_min_valid_range_mm =
Charles MacNeill 5:89031b2f5316 3241 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm;
Charles MacNeill 5:89031b2f5316 3242
Charles MacNeill 5:89031b2f5316 3243 ptun_data->vl53lx_tuningparm_xtalk_detect_max_valid_range_mm =
Charles MacNeill 5:89031b2f5316 3244 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm;
Charles MacNeill 5:89031b2f5316 3245
Charles MacNeill 5:89031b2f5316 3246 ptun_data->vl53lx_tuningparm_xtalk_detect_max_sigma_mm =
Charles MacNeill 5:89031b2f5316 3247 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
Charles MacNeill 5:89031b2f5316 3248
Charles MacNeill 5:89031b2f5316 3249 ptun_data->vl53lx_tuningparm_xtalk_detect_min_max_tolerance =
Charles MacNeill 5:89031b2f5316 3250 pHP->algo__crosstalk_detect_min_max_tolerance;
Charles MacNeill 5:89031b2f5316 3251
Charles MacNeill 5:89031b2f5316 3252 ptun_data->vl53lx_tuningparm_xtalk_detect_max_valid_rate_kcps =
Charles MacNeill 5:89031b2f5316 3253 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps;
Charles MacNeill 5:89031b2f5316 3254
Charles MacNeill 5:89031b2f5316 3255 ptun_data->vl53lx_tuningparm_xtalk_detect_event_sigma =
Charles MacNeill 5:89031b2f5316 3256 pHP->algo__crosstalk_detect_event_sigma;
Charles MacNeill 5:89031b2f5316 3257
Charles MacNeill 5:89031b2f5316 3258 ptun_data->vl53lx_tuningparm_hist_xtalk_margin_kcps =
Charles MacNeill 5:89031b2f5316 3259 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
Charles MacNeill 5:89031b2f5316 3260
Charles MacNeill 5:89031b2f5316 3261 ptun_data->vl53lx_tuningparm_consistency_lite_phase_tolerance =
Charles MacNeill 5:89031b2f5316 3262 pdev->tuning_parms.tp_consistency_lite_phase_tolerance;
Charles MacNeill 5:89031b2f5316 3263
Charles MacNeill 5:89031b2f5316 3264 ptun_data->vl53lx_tuningparm_phasecal_target =
Charles MacNeill 5:89031b2f5316 3265 pdev->tuning_parms.tp_phasecal_target;
Charles MacNeill 5:89031b2f5316 3266
Charles MacNeill 5:89031b2f5316 3267 ptun_data->vl53lx_tuningparm_lite_cal_repeat_rate =
Charles MacNeill 5:89031b2f5316 3268 pdev->tuning_parms.tp_cal_repeat_rate;
Charles MacNeill 5:89031b2f5316 3269
Charles MacNeill 5:89031b2f5316 3270 ptun_data->vl53lx_tuningparm_lite_ranging_gain_factor =
Charles MacNeill 5:89031b2f5316 3271 pdev->gain_cal.standard_ranging_gain_factor;
Charles MacNeill 5:89031b2f5316 3272
Charles MacNeill 5:89031b2f5316 3273 ptun_data->vl53lx_tuningparm_lite_min_clip_mm =
Charles MacNeill 5:89031b2f5316 3274 pdev->tuning_parms.tp_lite_min_clip;
Charles MacNeill 5:89031b2f5316 3275
Charles MacNeill 5:89031b2f5316 3276 ptun_data->vl53lx_tuningparm_lite_long_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 3277 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm;
Charles MacNeill 5:89031b2f5316 3278
Charles MacNeill 5:89031b2f5316 3279 ptun_data->vl53lx_tuningparm_lite_med_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 3280 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm;
Charles MacNeill 5:89031b2f5316 3281
Charles MacNeill 5:89031b2f5316 3282 ptun_data->vl53lx_tuningparm_lite_short_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 3283 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm;
Charles MacNeill 5:89031b2f5316 3284
Charles MacNeill 5:89031b2f5316 3285 ptun_data->vl53lx_tuningparm_lite_long_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 3286 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps;
Charles MacNeill 5:89031b2f5316 3287
Charles MacNeill 5:89031b2f5316 3288 ptun_data->vl53lx_tuningparm_lite_med_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 3289 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps;
Charles MacNeill 5:89031b2f5316 3290
Charles MacNeill 5:89031b2f5316 3291 ptun_data->vl53lx_tuningparm_lite_short_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 3292 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps;
Charles MacNeill 5:89031b2f5316 3293
Charles MacNeill 5:89031b2f5316 3294 ptun_data->vl53lx_tuningparm_lite_sigma_est_pulse_width =
Charles MacNeill 5:89031b2f5316 3295 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns;
Charles MacNeill 5:89031b2f5316 3296
Charles MacNeill 5:89031b2f5316 3297 ptun_data->vl53lx_tuningparm_lite_sigma_est_amb_width_ns =
Charles MacNeill 5:89031b2f5316 3298 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns;
Charles MacNeill 5:89031b2f5316 3299
Charles MacNeill 5:89031b2f5316 3300 ptun_data->vl53lx_tuningparm_lite_sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 3301 pdev->tuning_parms.tp_lite_sigma_ref_mm;
Charles MacNeill 5:89031b2f5316 3302
Charles MacNeill 5:89031b2f5316 3303 ptun_data->vl53lx_tuningparm_lite_rit_mult =
Charles MacNeill 5:89031b2f5316 3304 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
Charles MacNeill 5:89031b2f5316 3305
Charles MacNeill 5:89031b2f5316 3306 ptun_data->vl53lx_tuningparm_lite_seed_config =
Charles MacNeill 5:89031b2f5316 3307 pdev->tuning_parms.tp_lite_seed_cfg;
Charles MacNeill 5:89031b2f5316 3308
Charles MacNeill 5:89031b2f5316 3309 ptun_data->vl53lx_tuningparm_lite_quantifier =
Charles MacNeill 5:89031b2f5316 3310 pdev->tuning_parms.tp_lite_quantifier;
Charles MacNeill 5:89031b2f5316 3311
Charles MacNeill 5:89031b2f5316 3312 ptun_data->vl53lx_tuningparm_lite_first_order_select =
Charles MacNeill 5:89031b2f5316 3313 pdev->tuning_parms.tp_lite_first_order_select;
Charles MacNeill 5:89031b2f5316 3314
Charles MacNeill 5:89031b2f5316 3315 ptun_data->vl53lx_tuningparm_lite_xtalk_margin_kcps =
Charles MacNeill 5:89031b2f5316 3316 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
Charles MacNeill 5:89031b2f5316 3317
Charles MacNeill 5:89031b2f5316 3318 ptun_data->vl53lx_tuningparm_initial_phase_rtn_lite_long_range =
Charles MacNeill 5:89031b2f5316 3319 pdev->tuning_parms.tp_init_phase_rtn_lite_long;
Charles MacNeill 5:89031b2f5316 3320
Charles MacNeill 5:89031b2f5316 3321 ptun_data->vl53lx_tuningparm_initial_phase_rtn_lite_med_range =
Charles MacNeill 5:89031b2f5316 3322 pdev->tuning_parms.tp_init_phase_rtn_lite_med;
Charles MacNeill 5:89031b2f5316 3323
Charles MacNeill 5:89031b2f5316 3324 ptun_data->vl53lx_tuningparm_initial_phase_rtn_lite_short_range =
Charles MacNeill 5:89031b2f5316 3325 pdev->tuning_parms.tp_init_phase_rtn_lite_short;
Charles MacNeill 5:89031b2f5316 3326
Charles MacNeill 5:89031b2f5316 3327 ptun_data->vl53lx_tuningparm_initial_phase_ref_lite_long_range =
Charles MacNeill 5:89031b2f5316 3328 pdev->tuning_parms.tp_init_phase_ref_lite_long;
Charles MacNeill 5:89031b2f5316 3329
Charles MacNeill 5:89031b2f5316 3330 ptun_data->vl53lx_tuningparm_initial_phase_ref_lite_med_range =
Charles MacNeill 5:89031b2f5316 3331 pdev->tuning_parms.tp_init_phase_ref_lite_med;
Charles MacNeill 5:89031b2f5316 3332
Charles MacNeill 5:89031b2f5316 3333 ptun_data->vl53lx_tuningparm_initial_phase_ref_lite_short_range =
Charles MacNeill 5:89031b2f5316 3334 pdev->tuning_parms.tp_init_phase_ref_lite_short;
Charles MacNeill 5:89031b2f5316 3335
Charles MacNeill 5:89031b2f5316 3336 ptun_data->vl53lx_tuningparm_timed_seed_config =
Charles MacNeill 5:89031b2f5316 3337 pdev->tuning_parms.tp_timed_seed_cfg;
Charles MacNeill 5:89031b2f5316 3338
Charles MacNeill 5:89031b2f5316 3339 ptun_data->vl53lx_tuningparm_dmax_cfg_signal_thresh_sigma =
Charles MacNeill 5:89031b2f5316 3340 pdev->dmax_cfg.signal_thresh_sigma;
Charles MacNeill 5:89031b2f5316 3341
Charles MacNeill 5:89031b2f5316 3342 ptun_data->vl53lx_tuningparm_dmax_cfg_reflectance_array_0 =
Charles MacNeill 5:89031b2f5316 3343 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0];
Charles MacNeill 5:89031b2f5316 3344
Charles MacNeill 5:89031b2f5316 3345 ptun_data->vl53lx_tuningparm_dmax_cfg_reflectance_array_1 =
Charles MacNeill 5:89031b2f5316 3346 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1];
Charles MacNeill 5:89031b2f5316 3347
Charles MacNeill 5:89031b2f5316 3348 ptun_data->vl53lx_tuningparm_dmax_cfg_reflectance_array_2 =
Charles MacNeill 5:89031b2f5316 3349 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2];
Charles MacNeill 5:89031b2f5316 3350
Charles MacNeill 5:89031b2f5316 3351 ptun_data->vl53lx_tuningparm_dmax_cfg_reflectance_array_3 =
Charles MacNeill 5:89031b2f5316 3352 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3];
Charles MacNeill 5:89031b2f5316 3353
Charles MacNeill 5:89031b2f5316 3354 ptun_data->vl53lx_tuningparm_dmax_cfg_reflectance_array_4 =
Charles MacNeill 5:89031b2f5316 3355 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4];
Charles MacNeill 5:89031b2f5316 3356
Charles MacNeill 5:89031b2f5316 3357 ptun_data->vl53lx_tuningparm_vhv_loopbound =
Charles MacNeill 5:89031b2f5316 3358 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound;
Charles MacNeill 5:89031b2f5316 3359
Charles MacNeill 5:89031b2f5316 3360 ptun_data->vl53lx_tuningparm_refspadchar_device_test_mode =
Charles MacNeill 5:89031b2f5316 3361 pdev->refspadchar.device_test_mode;
Charles MacNeill 5:89031b2f5316 3362
Charles MacNeill 5:89031b2f5316 3363 ptun_data->vl53lx_tuningparm_refspadchar_vcsel_period =
Charles MacNeill 5:89031b2f5316 3364 pdev->refspadchar.VL53LX_p_005;
Charles MacNeill 5:89031b2f5316 3365
Charles MacNeill 5:89031b2f5316 3366 ptun_data->vl53lx_tuningparm_refspadchar_phasecal_timeout_us =
Charles MacNeill 5:89031b2f5316 3367 pdev->refspadchar.timeout_us;
Charles MacNeill 5:89031b2f5316 3368
Charles MacNeill 5:89031b2f5316 3369 ptun_data->vl53lx_tuningparm_refspadchar_target_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 3370 pdev->refspadchar.target_count_rate_mcps;
Charles MacNeill 5:89031b2f5316 3371
Charles MacNeill 5:89031b2f5316 3372 ptun_data->vl53lx_tuningparm_refspadchar_min_countrate_limit_mcps =
Charles MacNeill 5:89031b2f5316 3373 pdev->refspadchar.min_count_rate_limit_mcps;
Charles MacNeill 5:89031b2f5316 3374
Charles MacNeill 5:89031b2f5316 3375 ptun_data->vl53lx_tuningparm_refspadchar_max_countrate_limit_mcps =
Charles MacNeill 5:89031b2f5316 3376 pdev->refspadchar.max_count_rate_limit_mcps;
Charles MacNeill 5:89031b2f5316 3377
Charles MacNeill 5:89031b2f5316 3378 ptun_data->vl53lx_tuningparm_xtalk_extract_num_of_samples =
Charles MacNeill 5:89031b2f5316 3379 pXC->num_of_samples;
Charles MacNeill 5:89031b2f5316 3380
Charles MacNeill 5:89031b2f5316 3381 ptun_data->vl53lx_tuningparm_xtalk_extract_min_filter_thresh_mm =
Charles MacNeill 5:89031b2f5316 3382 pXC->algo__crosstalk_extract_min_valid_range_mm;
Charles MacNeill 5:89031b2f5316 3383
Charles MacNeill 5:89031b2f5316 3384 ptun_data->vl53lx_tuningparm_xtalk_extract_max_filter_thresh_mm =
Charles MacNeill 5:89031b2f5316 3385 pXC->algo__crosstalk_extract_max_valid_range_mm;
Charles MacNeill 5:89031b2f5316 3386
Charles MacNeill 5:89031b2f5316 3387 ptun_data->vl53lx_tuningparm_xtalk_extract_dss_rate_mcps =
Charles MacNeill 5:89031b2f5316 3388 pXC->dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 3389
Charles MacNeill 5:89031b2f5316 3390 ptun_data->vl53lx_tuningparm_xtalk_extract_phasecal_timeout_us =
Charles MacNeill 5:89031b2f5316 3391 pXC->phasecal_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3392
Charles MacNeill 5:89031b2f5316 3393 ptun_data->vl53lx_tuningparm_xtalk_extract_max_valid_rate_kcps =
Charles MacNeill 5:89031b2f5316 3394 pXC->algo__crosstalk_extract_max_valid_rate_kcps;
Charles MacNeill 5:89031b2f5316 3395
Charles MacNeill 5:89031b2f5316 3396 ptun_data->vl53lx_tuningparm_xtalk_extract_sigma_threshold_mm =
Charles MacNeill 5:89031b2f5316 3397 pXC->algo__crosstalk_extract_max_sigma_mm;
Charles MacNeill 5:89031b2f5316 3398
Charles MacNeill 5:89031b2f5316 3399 ptun_data->vl53lx_tuningparm_xtalk_extract_dss_timeout_us =
Charles MacNeill 5:89031b2f5316 3400 pXC->mm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3401
Charles MacNeill 5:89031b2f5316 3402 ptun_data->vl53lx_tuningparm_xtalk_extract_bin_timeout_us =
Charles MacNeill 5:89031b2f5316 3403 pXC->range_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3404
Charles MacNeill 5:89031b2f5316 3405 ptun_data->vl53lx_tuningparm_offset_cal_dss_rate_mcps =
Charles MacNeill 5:89031b2f5316 3406 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 3407
Charles MacNeill 5:89031b2f5316 3408 ptun_data->vl53lx_tuningparm_offset_cal_phasecal_timeout_us =
Charles MacNeill 5:89031b2f5316 3409 pdev->offsetcal_cfg.phasecal_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3410
Charles MacNeill 5:89031b2f5316 3411 ptun_data->vl53lx_tuningparm_offset_cal_mm_timeout_us =
Charles MacNeill 5:89031b2f5316 3412 pdev->offsetcal_cfg.mm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3413
Charles MacNeill 5:89031b2f5316 3414 ptun_data->vl53lx_tuningparm_offset_cal_range_timeout_us =
Charles MacNeill 5:89031b2f5316 3415 pdev->offsetcal_cfg.range_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3416
Charles MacNeill 5:89031b2f5316 3417 ptun_data->vl53lx_tuningparm_offset_cal_pre_samples =
Charles MacNeill 5:89031b2f5316 3418 pdev->offsetcal_cfg.pre_num_of_samples;
Charles MacNeill 5:89031b2f5316 3419
Charles MacNeill 5:89031b2f5316 3420 ptun_data->vl53lx_tuningparm_offset_cal_mm1_samples =
Charles MacNeill 5:89031b2f5316 3421 pdev->offsetcal_cfg.mm1_num_of_samples;
Charles MacNeill 5:89031b2f5316 3422
Charles MacNeill 5:89031b2f5316 3423 ptun_data->vl53lx_tuningparm_offset_cal_mm2_samples =
Charles MacNeill 5:89031b2f5316 3424 pdev->offsetcal_cfg.mm2_num_of_samples;
Charles MacNeill 5:89031b2f5316 3425
Charles MacNeill 5:89031b2f5316 3426 ptun_data->vl53lx_tuningparm_zone_cal_dss_rate_mcps =
Charles MacNeill 5:89031b2f5316 3427 pdev->zonecal_cfg.dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 3428
Charles MacNeill 5:89031b2f5316 3429 ptun_data->vl53lx_tuningparm_zone_cal_phasecal_timeout_us =
Charles MacNeill 5:89031b2f5316 3430 pdev->zonecal_cfg.phasecal_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3431
Charles MacNeill 5:89031b2f5316 3432 ptun_data->vl53lx_tuningparm_zone_cal_dss_timeout_us =
Charles MacNeill 5:89031b2f5316 3433 pdev->zonecal_cfg.mm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3434
Charles MacNeill 5:89031b2f5316 3435 ptun_data->vl53lx_tuningparm_zone_cal_phasecal_num_samples =
Charles MacNeill 5:89031b2f5316 3436 pdev->zonecal_cfg.phasecal_num_of_samples;
Charles MacNeill 5:89031b2f5316 3437
Charles MacNeill 5:89031b2f5316 3438 ptun_data->vl53lx_tuningparm_zone_cal_range_timeout_us =
Charles MacNeill 5:89031b2f5316 3439 pdev->zonecal_cfg.range_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3440
Charles MacNeill 5:89031b2f5316 3441 ptun_data->vl53lx_tuningparm_zone_cal_zone_num_samples =
Charles MacNeill 5:89031b2f5316 3442 pdev->zonecal_cfg.zone_num_of_samples;
Charles MacNeill 5:89031b2f5316 3443
Charles MacNeill 5:89031b2f5316 3444 ptun_data->vl53lx_tuningparm_spadmap_vcsel_period =
Charles MacNeill 5:89031b2f5316 3445 pdev->ssc_cfg.VL53LX_p_005;
Charles MacNeill 5:89031b2f5316 3446
Charles MacNeill 5:89031b2f5316 3447 ptun_data->vl53lx_tuningparm_spadmap_vcsel_start =
Charles MacNeill 5:89031b2f5316 3448 pdev->ssc_cfg.vcsel_start;
Charles MacNeill 5:89031b2f5316 3449
Charles MacNeill 5:89031b2f5316 3450 ptun_data->vl53lx_tuningparm_spadmap_rate_limit_mcps =
Charles MacNeill 5:89031b2f5316 3451 pdev->ssc_cfg.rate_limit_mcps;
Charles MacNeill 5:89031b2f5316 3452
Charles MacNeill 5:89031b2f5316 3453 ptun_data->vl53lx_tuningparm_lite_dss_config_target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 3454 pdev->tuning_parms.tp_dss_target_lite_mcps;
Charles MacNeill 5:89031b2f5316 3455
Charles MacNeill 5:89031b2f5316 3456 ptun_data->vl53lx_tuningparm_ranging_dss_config_target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 3457 pdev->tuning_parms.tp_dss_target_histo_mcps;
Charles MacNeill 5:89031b2f5316 3458
Charles MacNeill 5:89031b2f5316 3459 ptun_data->vl53lx_tuningparm_mz_dss_config_target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 3460 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
Charles MacNeill 5:89031b2f5316 3461
Charles MacNeill 5:89031b2f5316 3462 ptun_data->vl53lx_tuningparm_timed_dss_config_target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 3463 pdev->tuning_parms.tp_dss_target_timed_mcps;
Charles MacNeill 5:89031b2f5316 3464
Charles MacNeill 5:89031b2f5316 3465 ptun_data->vl53lx_tuningparm_lite_phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3466 pdev->tuning_parms.tp_phasecal_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 3467
Charles MacNeill 5:89031b2f5316 3468 ptun_data->vl53lx_tuningparm_ranging_long_phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3469 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
Charles MacNeill 5:89031b2f5316 3470
Charles MacNeill 5:89031b2f5316 3471 ptun_data->vl53lx_tuningparm_ranging_med_phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3472 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
Charles MacNeill 5:89031b2f5316 3473
Charles MacNeill 5:89031b2f5316 3474 ptun_data->vl53lx_tuningparm_ranging_short_phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3475 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
Charles MacNeill 5:89031b2f5316 3476
Charles MacNeill 5:89031b2f5316 3477 ptun_data->vl53lx_tuningparm_mz_long_phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3478 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
Charles MacNeill 5:89031b2f5316 3479
Charles MacNeill 5:89031b2f5316 3480 ptun_data->vl53lx_tuningparm_mz_med_phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3481 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
Charles MacNeill 5:89031b2f5316 3482
Charles MacNeill 5:89031b2f5316 3483 ptun_data->vl53lx_tuningparm_mz_short_phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3484 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
Charles MacNeill 5:89031b2f5316 3485
Charles MacNeill 5:89031b2f5316 3486 ptun_data->vl53lx_tuningparm_timed_phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3487 pdev->tuning_parms.tp_phasecal_timeout_timed_us;
Charles MacNeill 5:89031b2f5316 3488
Charles MacNeill 5:89031b2f5316 3489 ptun_data->vl53lx_tuningparm_lite_mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3490 pdev->tuning_parms.tp_mm_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 3491
Charles MacNeill 5:89031b2f5316 3492 ptun_data->vl53lx_tuningparm_ranging_mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3493 pdev->tuning_parms.tp_mm_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 3494
Charles MacNeill 5:89031b2f5316 3495 ptun_data->vl53lx_tuningparm_mz_mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3496 pdev->tuning_parms.tp_mm_timeout_mz_us;
Charles MacNeill 5:89031b2f5316 3497
Charles MacNeill 5:89031b2f5316 3498 ptun_data->vl53lx_tuningparm_timed_mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3499 pdev->tuning_parms.tp_mm_timeout_timed_us;
Charles MacNeill 5:89031b2f5316 3500
Charles MacNeill 5:89031b2f5316 3501 ptun_data->vl53lx_tuningparm_lite_range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3502 pdev->tuning_parms.tp_range_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 3503
Charles MacNeill 5:89031b2f5316 3504 ptun_data->vl53lx_tuningparm_ranging_range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3505 pdev->tuning_parms.tp_range_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 3506
Charles MacNeill 5:89031b2f5316 3507 ptun_data->vl53lx_tuningparm_mz_range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3508 pdev->tuning_parms.tp_range_timeout_mz_us;
Charles MacNeill 5:89031b2f5316 3509
Charles MacNeill 5:89031b2f5316 3510 ptun_data->vl53lx_tuningparm_timed_range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3511 pdev->tuning_parms.tp_range_timeout_timed_us;
Charles MacNeill 5:89031b2f5316 3512
Charles MacNeill 5:89031b2f5316 3513 ptun_data->vl53lx_tuningparm_dynxtalk_smudge_margin =
Charles MacNeill 5:89031b2f5316 3514 pdev->smudge_correct_config.smudge_margin;
Charles MacNeill 5:89031b2f5316 3515
Charles MacNeill 5:89031b2f5316 3516 ptun_data->vl53lx_tuningparm_dynxtalk_noise_margin =
Charles MacNeill 5:89031b2f5316 3517 pdev->smudge_correct_config.noise_margin;
Charles MacNeill 5:89031b2f5316 3518
Charles MacNeill 5:89031b2f5316 3519 ptun_data->vl53lx_tuningparm_dynxtalk_xtalk_offset_limit =
Charles MacNeill 5:89031b2f5316 3520 pdev->smudge_correct_config.user_xtalk_offset_limit;
Charles MacNeill 5:89031b2f5316 3521
Charles MacNeill 5:89031b2f5316 3522 ptun_data->vl53lx_tuningparm_dynxtalk_xtalk_offset_limit_hi =
Charles MacNeill 5:89031b2f5316 3523 pdev->smudge_correct_config.user_xtalk_offset_limit_hi;
Charles MacNeill 5:89031b2f5316 3524
Charles MacNeill 5:89031b2f5316 3525 ptun_data->vl53lx_tuningparm_dynxtalk_sample_limit =
Charles MacNeill 5:89031b2f5316 3526 pdev->smudge_correct_config.sample_limit;
Charles MacNeill 5:89031b2f5316 3527
Charles MacNeill 5:89031b2f5316 3528 ptun_data->vl53lx_tuningparm_dynxtalk_single_xtalk_delta =
Charles MacNeill 5:89031b2f5316 3529 pdev->smudge_correct_config.single_xtalk_delta;
Charles MacNeill 5:89031b2f5316 3530
Charles MacNeill 5:89031b2f5316 3531 ptun_data->vl53lx_tuningparm_dynxtalk_averaged_xtalk_delta =
Charles MacNeill 5:89031b2f5316 3532 pdev->smudge_correct_config.averaged_xtalk_delta;
Charles MacNeill 5:89031b2f5316 3533
Charles MacNeill 5:89031b2f5316 3534 ptun_data->vl53lx_tuningparm_dynxtalk_clip_limit =
Charles MacNeill 5:89031b2f5316 3535 pdev->smudge_correct_config.smudge_corr_clip_limit;
Charles MacNeill 5:89031b2f5316 3536
Charles MacNeill 5:89031b2f5316 3537 ptun_data->vl53lx_tuningparm_dynxtalk_scaler_calc_method =
Charles MacNeill 5:89031b2f5316 3538 pdev->smudge_correct_config.scaler_calc_method;
Charles MacNeill 5:89031b2f5316 3539
Charles MacNeill 5:89031b2f5316 3540 ptun_data->vl53lx_tuningparm_dynxtalk_xgradient_scaler =
Charles MacNeill 5:89031b2f5316 3541 pdev->smudge_correct_config.x_gradient_scaler;
Charles MacNeill 5:89031b2f5316 3542
Charles MacNeill 5:89031b2f5316 3543 ptun_data->vl53lx_tuningparm_dynxtalk_ygradient_scaler =
Charles MacNeill 5:89031b2f5316 3544 pdev->smudge_correct_config.y_gradient_scaler;
Charles MacNeill 5:89031b2f5316 3545
Charles MacNeill 5:89031b2f5316 3546 ptun_data->vl53lx_tuningparm_dynxtalk_user_scaler_set =
Charles MacNeill 5:89031b2f5316 3547 pdev->smudge_correct_config.user_scaler_set;
Charles MacNeill 5:89031b2f5316 3548
Charles MacNeill 5:89031b2f5316 3549 ptun_data->vl53lx_tuningparm_dynxtalk_smudge_cor_single_apply =
Charles MacNeill 5:89031b2f5316 3550 pdev->smudge_correct_config.smudge_corr_single_apply;
Charles MacNeill 5:89031b2f5316 3551
Charles MacNeill 5:89031b2f5316 3552 ptun_data->vl53lx_tuningparm_dynxtalk_xtalk_amb_threshold =
Charles MacNeill 5:89031b2f5316 3553 pdev->smudge_correct_config.smudge_corr_ambient_threshold;
Charles MacNeill 5:89031b2f5316 3554
Charles MacNeill 5:89031b2f5316 3555 ptun_data->vl53lx_tuningparm_dynxtalk_nodetect_amb_threshold_kcps =
Charles MacNeill 5:89031b2f5316 3556 pdev->smudge_correct_config.nodetect_ambient_threshold;
Charles MacNeill 5:89031b2f5316 3557
Charles MacNeill 5:89031b2f5316 3558 ptun_data->vl53lx_tuningparm_dynxtalk_nodetect_sample_limit =
Charles MacNeill 5:89031b2f5316 3559 pdev->smudge_correct_config.nodetect_sample_limit;
Charles MacNeill 5:89031b2f5316 3560
Charles MacNeill 5:89031b2f5316 3561 ptun_data->vl53lx_tuningparm_dynxtalk_nodetect_xtalk_offset_kcps =
Charles MacNeill 5:89031b2f5316 3562 pdev->smudge_correct_config.nodetect_xtalk_offset;
Charles MacNeill 5:89031b2f5316 3563
Charles MacNeill 5:89031b2f5316 3564 ptun_data->vl53lx_tuningparm_dynxtalk_nodetect_min_range_mm =
Charles MacNeill 5:89031b2f5316 3565 pdev->smudge_correct_config.nodetect_min_range_mm;
Charles MacNeill 5:89031b2f5316 3566
Charles MacNeill 5:89031b2f5316 3567 ptun_data->vl53lx_tuningparm_lowpowerauto_vhv_loop_bound =
Charles MacNeill 5:89031b2f5316 3568 pdev->low_power_auto_data.vhv_loop_bound;
Charles MacNeill 5:89031b2f5316 3569
Charles MacNeill 5:89031b2f5316 3570 ptun_data->vl53lx_tuningparm_lowpowerauto_mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3571 pdev->tuning_parms.tp_mm_timeout_lpa_us;
Charles MacNeill 5:89031b2f5316 3572
Charles MacNeill 5:89031b2f5316 3573 ptun_data->vl53lx_tuningparm_lowpowerauto_range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 3574 pdev->tuning_parms.tp_range_timeout_lpa_us;
Charles MacNeill 5:89031b2f5316 3575
Charles MacNeill 5:89031b2f5316 3576 ptun_data->vl53lx_tuningparm_very_short_dss_rate_mcps =
Charles MacNeill 5:89031b2f5316 3577 pdev->tuning_parms.tp_dss_target_very_short_mcps;
Charles MacNeill 5:89031b2f5316 3578
Charles MacNeill 5:89031b2f5316 3579 ptun_data->vl53lx_tuningparm_phasecal_patch_power =
Charles MacNeill 5:89031b2f5316 3580 pdev->tuning_parms.tp_phasecal_patch_power;
Charles MacNeill 5:89031b2f5316 3581
Charles MacNeill 5:89031b2f5316 3582 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 3583
Charles MacNeill 5:89031b2f5316 3584 return status;
Charles MacNeill 5:89031b2f5316 3585 }
Charles MacNeill 5:89031b2f5316 3586
Charles MacNeill 5:89031b2f5316 3587
Charles MacNeill 5:89031b2f5316 3588
Charles MacNeill 5:89031b2f5316 3589
Charles MacNeill 5:89031b2f5316 3590
Charles MacNeill 5:89031b2f5316 3591 VL53LX_Error VL53LX_get_tuning_parm(
Charles MacNeill 5:89031b2f5316 3592 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 3593 VL53LX_TuningParms tuning_parm_key,
Charles MacNeill 5:89031b2f5316 3594 int32_t *ptuning_parm_value)
Charles MacNeill 5:89031b2f5316 3595 {
Charles MacNeill 5:89031b2f5316 3596
Charles MacNeill 5:89031b2f5316 3597
Charles MacNeill 5:89031b2f5316 3598
Charles MacNeill 5:89031b2f5316 3599 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 3600
Charles MacNeill 5:89031b2f5316 3601 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 3602 VL53LX_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 3603 VL53LX_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
Charles MacNeill 5:89031b2f5316 3604
Charles MacNeill 5:89031b2f5316 3605 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 3606
Charles MacNeill 5:89031b2f5316 3607 switch (tuning_parm_key) {
Charles MacNeill 5:89031b2f5316 3608
Charles MacNeill 5:89031b2f5316 3609 case VL53LX_TUNINGPARM_VERSION:
Charles MacNeill 5:89031b2f5316 3610 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3611 (int32_t)pdev->tuning_parms.tp_tuning_parm_version;
Charles MacNeill 5:89031b2f5316 3612 break;
Charles MacNeill 5:89031b2f5316 3613 case VL53LX_TUNINGPARM_KEY_TABLE_VERSION:
Charles MacNeill 5:89031b2f5316 3614 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3615 (int32_t)pdev->tuning_parms.tp_tuning_parm_key_table_version;
Charles MacNeill 5:89031b2f5316 3616 break;
Charles MacNeill 5:89031b2f5316 3617 case VL53LX_TUNINGPARM_LLD_VERSION:
Charles MacNeill 5:89031b2f5316 3618 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3619 (int32_t)pdev->tuning_parms.tp_tuning_parm_lld_version;
Charles MacNeill 5:89031b2f5316 3620 break;
Charles MacNeill 5:89031b2f5316 3621 case VL53LX_TUNINGPARM_HIST_ALGO_SELECT:
Charles MacNeill 5:89031b2f5316 3622 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3623 (int32_t)pHP->hist_algo_select;
Charles MacNeill 5:89031b2f5316 3624 break;
Charles MacNeill 5:89031b2f5316 3625 case VL53LX_TUNINGPARM_HIST_TARGET_ORDER:
Charles MacNeill 5:89031b2f5316 3626 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3627 (int32_t)pHP->hist_target_order;
Charles MacNeill 5:89031b2f5316 3628 break;
Charles MacNeill 5:89031b2f5316 3629 case VL53LX_TUNINGPARM_HIST_FILTER_WOI_0:
Charles MacNeill 5:89031b2f5316 3630 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3631 (int32_t)pHP->filter_woi0;
Charles MacNeill 5:89031b2f5316 3632 break;
Charles MacNeill 5:89031b2f5316 3633 case VL53LX_TUNINGPARM_HIST_FILTER_WOI_1:
Charles MacNeill 5:89031b2f5316 3634 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3635 (int32_t)pHP->filter_woi1;
Charles MacNeill 5:89031b2f5316 3636 break;
Charles MacNeill 5:89031b2f5316 3637 case VL53LX_TUNINGPARM_HIST_AMB_EST_METHOD:
Charles MacNeill 5:89031b2f5316 3638 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3639 (int32_t)pHP->hist_amb_est_method;
Charles MacNeill 5:89031b2f5316 3640 break;
Charles MacNeill 5:89031b2f5316 3641 case VL53LX_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0:
Charles MacNeill 5:89031b2f5316 3642 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3643 (int32_t)pHP->ambient_thresh_sigma0;
Charles MacNeill 5:89031b2f5316 3644 break;
Charles MacNeill 5:89031b2f5316 3645 case VL53LX_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1:
Charles MacNeill 5:89031b2f5316 3646 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3647 (int32_t)pHP->ambient_thresh_sigma1;
Charles MacNeill 5:89031b2f5316 3648 break;
Charles MacNeill 5:89031b2f5316 3649 case VL53LX_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS:
Charles MacNeill 5:89031b2f5316 3650 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3651 (int32_t)pHP->min_ambient_thresh_events;
Charles MacNeill 5:89031b2f5316 3652 break;
Charles MacNeill 5:89031b2f5316 3653 case VL53LX_TUNINGPARM_HIST_AMB_EVENTS_SCALER:
Charles MacNeill 5:89031b2f5316 3654 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3655 (int32_t)pHP->ambient_thresh_events_scaler;
Charles MacNeill 5:89031b2f5316 3656 break;
Charles MacNeill 5:89031b2f5316 3657 case VL53LX_TUNINGPARM_HIST_NOISE_THRESHOLD:
Charles MacNeill 5:89031b2f5316 3658 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3659 (int32_t)pHP->noise_threshold;
Charles MacNeill 5:89031b2f5316 3660 break;
Charles MacNeill 5:89031b2f5316 3661 case VL53LX_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT:
Charles MacNeill 5:89031b2f5316 3662 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3663 (int32_t)pHP->signal_total_events_limit;
Charles MacNeill 5:89031b2f5316 3664 break;
Charles MacNeill 5:89031b2f5316 3665 case VL53LX_TUNINGPARM_HIST_SIGMA_EST_REF_MM:
Charles MacNeill 5:89031b2f5316 3666 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3667 (int32_t)pHP->sigma_estimator__sigma_ref_mm;
Charles MacNeill 5:89031b2f5316 3668 break;
Charles MacNeill 5:89031b2f5316 3669 case VL53LX_TUNINGPARM_HIST_SIGMA_THRESH_MM:
Charles MacNeill 5:89031b2f5316 3670 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3671 (int32_t)pHP->sigma_thresh;
Charles MacNeill 5:89031b2f5316 3672 break;
Charles MacNeill 5:89031b2f5316 3673 case VL53LX_TUNINGPARM_HIST_GAIN_FACTOR:
Charles MacNeill 5:89031b2f5316 3674 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3675 (int32_t)pdev->gain_cal.histogram_ranging_gain_factor;
Charles MacNeill 5:89031b2f5316 3676 break;
Charles MacNeill 5:89031b2f5316 3677 case VL53LX_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE:
Charles MacNeill 5:89031b2f5316 3678 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3679 (int32_t)pHP->algo__consistency_check__phase_tolerance;
Charles MacNeill 5:89031b2f5316 3680 break;
Charles MacNeill 5:89031b2f5316 3681 case VL53LX_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM:
Charles MacNeill 5:89031b2f5316 3682 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3683 (int32_t)pHP->algo__consistency_check__min_max_tolerance;
Charles MacNeill 5:89031b2f5316 3684 break;
Charles MacNeill 5:89031b2f5316 3685 case VL53LX_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA:
Charles MacNeill 5:89031b2f5316 3686 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3687 (int32_t)pHP->algo__consistency_check__event_sigma;
Charles MacNeill 5:89031b2f5316 3688 break;
Charles MacNeill 5:89031b2f5316 3689 case VL53LX_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT:
Charles MacNeill 5:89031b2f5316 3690 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3691 (int32_t)pHP->algo__consistency_check__event_min_spad_count;
Charles MacNeill 5:89031b2f5316 3692 break;
Charles MacNeill 5:89031b2f5316 3693 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 3694 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3695 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_long;
Charles MacNeill 5:89031b2f5316 3696 break;
Charles MacNeill 5:89031b2f5316 3697 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE:
Charles MacNeill 5:89031b2f5316 3698 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3699 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_med;
Charles MacNeill 5:89031b2f5316 3700 break;
Charles MacNeill 5:89031b2f5316 3701 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 3702 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3703 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_short;
Charles MacNeill 5:89031b2f5316 3704 break;
Charles MacNeill 5:89031b2f5316 3705 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 3706 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3707 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_long;
Charles MacNeill 5:89031b2f5316 3708 break;
Charles MacNeill 5:89031b2f5316 3709 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE:
Charles MacNeill 5:89031b2f5316 3710 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3711 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_med;
Charles MacNeill 5:89031b2f5316 3712 break;
Charles MacNeill 5:89031b2f5316 3713 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 3714 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3715 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_short;
Charles MacNeill 5:89031b2f5316 3716 break;
Charles MacNeill 5:89031b2f5316 3717 case VL53LX_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM:
Charles MacNeill 5:89031b2f5316 3718 *ptuning_parm_value = (int32_t)(
Charles MacNeill 5:89031b2f5316 3719 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm);
Charles MacNeill 5:89031b2f5316 3720 break;
Charles MacNeill 5:89031b2f5316 3721 case VL53LX_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM:
Charles MacNeill 5:89031b2f5316 3722 *ptuning_parm_value = (int32_t)(
Charles MacNeill 5:89031b2f5316 3723 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm);
Charles MacNeill 5:89031b2f5316 3724 break;
Charles MacNeill 5:89031b2f5316 3725 case VL53LX_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM:
Charles MacNeill 5:89031b2f5316 3726 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3727 (int32_t)pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
Charles MacNeill 5:89031b2f5316 3728 break;
Charles MacNeill 5:89031b2f5316 3729 case VL53LX_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE:
Charles MacNeill 5:89031b2f5316 3730 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3731 (int32_t)pHP->algo__crosstalk_detect_min_max_tolerance;
Charles MacNeill 5:89031b2f5316 3732 break;
Charles MacNeill 5:89031b2f5316 3733 case VL53LX_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS:
Charles MacNeill 5:89031b2f5316 3734 *ptuning_parm_value = (int32_t)(
Charles MacNeill 5:89031b2f5316 3735 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps);
Charles MacNeill 5:89031b2f5316 3736 break;
Charles MacNeill 5:89031b2f5316 3737 case VL53LX_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA:
Charles MacNeill 5:89031b2f5316 3738 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3739 (int32_t)pHP->algo__crosstalk_detect_event_sigma;
Charles MacNeill 5:89031b2f5316 3740 break;
Charles MacNeill 5:89031b2f5316 3741 case VL53LX_TUNINGPARM_HIST_XTALK_MARGIN_KCPS:
Charles MacNeill 5:89031b2f5316 3742 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3743 (int32_t)pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
Charles MacNeill 5:89031b2f5316 3744 break;
Charles MacNeill 5:89031b2f5316 3745 case VL53LX_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE:
Charles MacNeill 5:89031b2f5316 3746 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3747 (int32_t)pdev->tuning_parms.tp_consistency_lite_phase_tolerance;
Charles MacNeill 5:89031b2f5316 3748 break;
Charles MacNeill 5:89031b2f5316 3749 case VL53LX_TUNINGPARM_PHASECAL_TARGET:
Charles MacNeill 5:89031b2f5316 3750 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3751 (int32_t)pdev->tuning_parms.tp_phasecal_target;
Charles MacNeill 5:89031b2f5316 3752 break;
Charles MacNeill 5:89031b2f5316 3753 case VL53LX_TUNINGPARM_LITE_CAL_REPEAT_RATE:
Charles MacNeill 5:89031b2f5316 3754 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3755 (int32_t)pdev->tuning_parms.tp_cal_repeat_rate;
Charles MacNeill 5:89031b2f5316 3756 break;
Charles MacNeill 5:89031b2f5316 3757 case VL53LX_TUNINGPARM_LITE_RANGING_GAIN_FACTOR:
Charles MacNeill 5:89031b2f5316 3758 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3759 (int32_t)pdev->gain_cal.standard_ranging_gain_factor;
Charles MacNeill 5:89031b2f5316 3760 break;
Charles MacNeill 5:89031b2f5316 3761 case VL53LX_TUNINGPARM_LITE_MIN_CLIP_MM:
Charles MacNeill 5:89031b2f5316 3762 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3763 (int32_t)pdev->tuning_parms.tp_lite_min_clip;
Charles MacNeill 5:89031b2f5316 3764 break;
Charles MacNeill 5:89031b2f5316 3765 case VL53LX_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM:
Charles MacNeill 5:89031b2f5316 3766 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3767 (int32_t)pdev->tuning_parms.tp_lite_long_sigma_thresh_mm;
Charles MacNeill 5:89031b2f5316 3768 break;
Charles MacNeill 5:89031b2f5316 3769 case VL53LX_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM:
Charles MacNeill 5:89031b2f5316 3770 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3771 (int32_t)pdev->tuning_parms.tp_lite_med_sigma_thresh_mm;
Charles MacNeill 5:89031b2f5316 3772 break;
Charles MacNeill 5:89031b2f5316 3773 case VL53LX_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM:
Charles MacNeill 5:89031b2f5316 3774 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3775 (int32_t)pdev->tuning_parms.tp_lite_short_sigma_thresh_mm;
Charles MacNeill 5:89031b2f5316 3776 break;
Charles MacNeill 5:89031b2f5316 3777 case VL53LX_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS:
Charles MacNeill 5:89031b2f5316 3778 *ptuning_parm_value = (int32_t)(
Charles MacNeill 5:89031b2f5316 3779 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps);
Charles MacNeill 5:89031b2f5316 3780 break;
Charles MacNeill 5:89031b2f5316 3781 case VL53LX_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS:
Charles MacNeill 5:89031b2f5316 3782 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3783 (int32_t)pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps;
Charles MacNeill 5:89031b2f5316 3784 break;
Charles MacNeill 5:89031b2f5316 3785 case VL53LX_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS:
Charles MacNeill 5:89031b2f5316 3786 *ptuning_parm_value = (int32_t)(
Charles MacNeill 5:89031b2f5316 3787 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps);
Charles MacNeill 5:89031b2f5316 3788 break;
Charles MacNeill 5:89031b2f5316 3789 case VL53LX_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH:
Charles MacNeill 5:89031b2f5316 3790 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3791 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns;
Charles MacNeill 5:89031b2f5316 3792 break;
Charles MacNeill 5:89031b2f5316 3793 case VL53LX_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS:
Charles MacNeill 5:89031b2f5316 3794 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3795 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns;
Charles MacNeill 5:89031b2f5316 3796 break;
Charles MacNeill 5:89031b2f5316 3797 case VL53LX_TUNINGPARM_LITE_SIGMA_REF_MM:
Charles MacNeill 5:89031b2f5316 3798 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3799 (int32_t)pdev->tuning_parms.tp_lite_sigma_ref_mm;
Charles MacNeill 5:89031b2f5316 3800 break;
Charles MacNeill 5:89031b2f5316 3801 case VL53LX_TUNINGPARM_LITE_RIT_MULT:
Charles MacNeill 5:89031b2f5316 3802 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3803 (int32_t)pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
Charles MacNeill 5:89031b2f5316 3804 break;
Charles MacNeill 5:89031b2f5316 3805 case VL53LX_TUNINGPARM_LITE_SEED_CONFIG:
Charles MacNeill 5:89031b2f5316 3806 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3807 (int32_t)pdev->tuning_parms.tp_lite_seed_cfg;
Charles MacNeill 5:89031b2f5316 3808 break;
Charles MacNeill 5:89031b2f5316 3809 case VL53LX_TUNINGPARM_LITE_QUANTIFIER:
Charles MacNeill 5:89031b2f5316 3810 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3811 (int32_t)pdev->tuning_parms.tp_lite_quantifier;
Charles MacNeill 5:89031b2f5316 3812 break;
Charles MacNeill 5:89031b2f5316 3813 case VL53LX_TUNINGPARM_LITE_FIRST_ORDER_SELECT:
Charles MacNeill 5:89031b2f5316 3814 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3815 (int32_t)pdev->tuning_parms.tp_lite_first_order_select;
Charles MacNeill 5:89031b2f5316 3816 break;
Charles MacNeill 5:89031b2f5316 3817 case VL53LX_TUNINGPARM_LITE_XTALK_MARGIN_KCPS:
Charles MacNeill 5:89031b2f5316 3818 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3819 (int32_t)pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
Charles MacNeill 5:89031b2f5316 3820 break;
Charles MacNeill 5:89031b2f5316 3821 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 3822 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3823 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_long;
Charles MacNeill 5:89031b2f5316 3824 break;
Charles MacNeill 5:89031b2f5316 3825 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE:
Charles MacNeill 5:89031b2f5316 3826 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3827 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_med;
Charles MacNeill 5:89031b2f5316 3828 break;
Charles MacNeill 5:89031b2f5316 3829 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 3830 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3831 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_short;
Charles MacNeill 5:89031b2f5316 3832 break;
Charles MacNeill 5:89031b2f5316 3833 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 3834 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3835 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_long;
Charles MacNeill 5:89031b2f5316 3836 break;
Charles MacNeill 5:89031b2f5316 3837 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE:
Charles MacNeill 5:89031b2f5316 3838 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3839 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_med;
Charles MacNeill 5:89031b2f5316 3840 break;
Charles MacNeill 5:89031b2f5316 3841 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 3842 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3843 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_short;
Charles MacNeill 5:89031b2f5316 3844 break;
Charles MacNeill 5:89031b2f5316 3845 case VL53LX_TUNINGPARM_TIMED_SEED_CONFIG:
Charles MacNeill 5:89031b2f5316 3846 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3847 (int32_t)pdev->tuning_parms.tp_timed_seed_cfg;
Charles MacNeill 5:89031b2f5316 3848 break;
Charles MacNeill 5:89031b2f5316 3849 case VL53LX_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA:
Charles MacNeill 5:89031b2f5316 3850 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3851 (int32_t)pdev->dmax_cfg.signal_thresh_sigma;
Charles MacNeill 5:89031b2f5316 3852 break;
Charles MacNeill 5:89031b2f5316 3853 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0:
Charles MacNeill 5:89031b2f5316 3854 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3855 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[0];
Charles MacNeill 5:89031b2f5316 3856 break;
Charles MacNeill 5:89031b2f5316 3857 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1:
Charles MacNeill 5:89031b2f5316 3858 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3859 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[1];
Charles MacNeill 5:89031b2f5316 3860 break;
Charles MacNeill 5:89031b2f5316 3861 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2:
Charles MacNeill 5:89031b2f5316 3862 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3863 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[2];
Charles MacNeill 5:89031b2f5316 3864 break;
Charles MacNeill 5:89031b2f5316 3865 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3:
Charles MacNeill 5:89031b2f5316 3866 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3867 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[3];
Charles MacNeill 5:89031b2f5316 3868 break;
Charles MacNeill 5:89031b2f5316 3869 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4:
Charles MacNeill 5:89031b2f5316 3870 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3871 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[4];
Charles MacNeill 5:89031b2f5316 3872 break;
Charles MacNeill 5:89031b2f5316 3873 case VL53LX_TUNINGPARM_VHV_LOOPBOUND:
Charles MacNeill 5:89031b2f5316 3874 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3875 (int32_t)pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound;
Charles MacNeill 5:89031b2f5316 3876 break;
Charles MacNeill 5:89031b2f5316 3877 case VL53LX_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE:
Charles MacNeill 5:89031b2f5316 3878 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3879 (int32_t)pdev->refspadchar.device_test_mode;
Charles MacNeill 5:89031b2f5316 3880 break;
Charles MacNeill 5:89031b2f5316 3881 case VL53LX_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD:
Charles MacNeill 5:89031b2f5316 3882 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3883 (int32_t)pdev->refspadchar.VL53LX_p_005;
Charles MacNeill 5:89031b2f5316 3884 break;
Charles MacNeill 5:89031b2f5316 3885 case VL53LX_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3886 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3887 (int32_t)pdev->refspadchar.timeout_us;
Charles MacNeill 5:89031b2f5316 3888 break;
Charles MacNeill 5:89031b2f5316 3889 case VL53LX_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 3890 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3891 (int32_t)pdev->refspadchar.target_count_rate_mcps;
Charles MacNeill 5:89031b2f5316 3892 break;
Charles MacNeill 5:89031b2f5316 3893 case VL53LX_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS:
Charles MacNeill 5:89031b2f5316 3894 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3895 (int32_t)pdev->refspadchar.min_count_rate_limit_mcps;
Charles MacNeill 5:89031b2f5316 3896 break;
Charles MacNeill 5:89031b2f5316 3897 case VL53LX_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS:
Charles MacNeill 5:89031b2f5316 3898 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3899 (int32_t)pdev->refspadchar.max_count_rate_limit_mcps;
Charles MacNeill 5:89031b2f5316 3900 break;
Charles MacNeill 5:89031b2f5316 3901 case VL53LX_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES:
Charles MacNeill 5:89031b2f5316 3902 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3903 (int32_t)pXC->num_of_samples;
Charles MacNeill 5:89031b2f5316 3904 break;
Charles MacNeill 5:89031b2f5316 3905 case VL53LX_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM:
Charles MacNeill 5:89031b2f5316 3906 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3907 (int32_t)pXC->algo__crosstalk_extract_min_valid_range_mm;
Charles MacNeill 5:89031b2f5316 3908 break;
Charles MacNeill 5:89031b2f5316 3909 case VL53LX_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM:
Charles MacNeill 5:89031b2f5316 3910 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3911 (int32_t)pXC->algo__crosstalk_extract_max_valid_range_mm;
Charles MacNeill 5:89031b2f5316 3912 break;
Charles MacNeill 5:89031b2f5316 3913 case VL53LX_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 3914 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3915 (int32_t)pXC->dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 3916 break;
Charles MacNeill 5:89031b2f5316 3917 case VL53LX_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3918 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3919 (int32_t)pXC->phasecal_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3920 break;
Charles MacNeill 5:89031b2f5316 3921 case VL53LX_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS:
Charles MacNeill 5:89031b2f5316 3922 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3923 (int32_t)pXC->algo__crosstalk_extract_max_valid_rate_kcps;
Charles MacNeill 5:89031b2f5316 3924 break;
Charles MacNeill 5:89031b2f5316 3925 case VL53LX_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM:
Charles MacNeill 5:89031b2f5316 3926 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3927 (int32_t)pXC->algo__crosstalk_extract_max_sigma_mm;
Charles MacNeill 5:89031b2f5316 3928 break;
Charles MacNeill 5:89031b2f5316 3929 case VL53LX_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3930 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3931 (int32_t)pXC->mm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3932 break;
Charles MacNeill 5:89031b2f5316 3933 case VL53LX_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3934 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3935 (int32_t)pXC->range_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3936 break;
Charles MacNeill 5:89031b2f5316 3937 case VL53LX_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 3938 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3939 (int32_t)pdev->offsetcal_cfg.dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 3940 break;
Charles MacNeill 5:89031b2f5316 3941 case VL53LX_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3942 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3943 (int32_t)pdev->offsetcal_cfg.phasecal_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3944 break;
Charles MacNeill 5:89031b2f5316 3945 case VL53LX_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3946 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3947 (int32_t)pdev->offsetcal_cfg.mm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3948 break;
Charles MacNeill 5:89031b2f5316 3949 case VL53LX_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3950 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3951 (int32_t)pdev->offsetcal_cfg.range_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3952 break;
Charles MacNeill 5:89031b2f5316 3953 case VL53LX_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES:
Charles MacNeill 5:89031b2f5316 3954 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3955 (int32_t)pdev->offsetcal_cfg.pre_num_of_samples;
Charles MacNeill 5:89031b2f5316 3956 break;
Charles MacNeill 5:89031b2f5316 3957 case VL53LX_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES:
Charles MacNeill 5:89031b2f5316 3958 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3959 (int32_t)pdev->offsetcal_cfg.mm1_num_of_samples;
Charles MacNeill 5:89031b2f5316 3960 break;
Charles MacNeill 5:89031b2f5316 3961 case VL53LX_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES:
Charles MacNeill 5:89031b2f5316 3962 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3963 (int32_t)pdev->offsetcal_cfg.mm2_num_of_samples;
Charles MacNeill 5:89031b2f5316 3964 break;
Charles MacNeill 5:89031b2f5316 3965 case VL53LX_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 3966 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3967 (int32_t)pdev->zonecal_cfg.dss_config__target_total_rate_mcps;
Charles MacNeill 5:89031b2f5316 3968 break;
Charles MacNeill 5:89031b2f5316 3969 case VL53LX_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3970 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3971 (int32_t)pdev->zonecal_cfg.phasecal_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3972 break;
Charles MacNeill 5:89031b2f5316 3973 case VL53LX_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3974 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3975 (int32_t)pdev->zonecal_cfg.mm_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3976 break;
Charles MacNeill 5:89031b2f5316 3977 case VL53LX_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES:
Charles MacNeill 5:89031b2f5316 3978 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3979 (int32_t)pdev->zonecal_cfg.phasecal_num_of_samples;
Charles MacNeill 5:89031b2f5316 3980 break;
Charles MacNeill 5:89031b2f5316 3981 case VL53LX_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 3982 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3983 (int32_t)pdev->zonecal_cfg.range_config_timeout_us;
Charles MacNeill 5:89031b2f5316 3984 break;
Charles MacNeill 5:89031b2f5316 3985 case VL53LX_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES:
Charles MacNeill 5:89031b2f5316 3986 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3987 (int32_t)pdev->zonecal_cfg.zone_num_of_samples;
Charles MacNeill 5:89031b2f5316 3988 break;
Charles MacNeill 5:89031b2f5316 3989 case VL53LX_TUNINGPARM_SPADMAP_VCSEL_PERIOD:
Charles MacNeill 5:89031b2f5316 3990 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3991 (int32_t)pdev->ssc_cfg.VL53LX_p_005;
Charles MacNeill 5:89031b2f5316 3992 break;
Charles MacNeill 5:89031b2f5316 3993 case VL53LX_TUNINGPARM_SPADMAP_VCSEL_START:
Charles MacNeill 5:89031b2f5316 3994 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3995 (int32_t)pdev->ssc_cfg.vcsel_start;
Charles MacNeill 5:89031b2f5316 3996 break;
Charles MacNeill 5:89031b2f5316 3997 case VL53LX_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS:
Charles MacNeill 5:89031b2f5316 3998 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 3999 (int32_t)pdev->ssc_cfg.rate_limit_mcps;
Charles MacNeill 5:89031b2f5316 4000 break;
Charles MacNeill 5:89031b2f5316 4001 case VL53LX_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4002 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4003 (int32_t)pdev->tuning_parms.tp_dss_target_lite_mcps;
Charles MacNeill 5:89031b2f5316 4004 break;
Charles MacNeill 5:89031b2f5316 4005 case VL53LX_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4006 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4007 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mcps;
Charles MacNeill 5:89031b2f5316 4008 break;
Charles MacNeill 5:89031b2f5316 4009 case VL53LX_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4010 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4011 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
Charles MacNeill 5:89031b2f5316 4012 break;
Charles MacNeill 5:89031b2f5316 4013 case VL53LX_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4014 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4015 (int32_t)pdev->tuning_parms.tp_dss_target_timed_mcps;
Charles MacNeill 5:89031b2f5316 4016 break;
Charles MacNeill 5:89031b2f5316 4017 case VL53LX_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4018 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4019 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 4020 break;
Charles MacNeill 5:89031b2f5316 4021 case VL53LX_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4022 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4023 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
Charles MacNeill 5:89031b2f5316 4024 break;
Charles MacNeill 5:89031b2f5316 4025 case VL53LX_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4026 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4027 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
Charles MacNeill 5:89031b2f5316 4028 break;
Charles MacNeill 5:89031b2f5316 4029 case VL53LX_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4030 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4031 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
Charles MacNeill 5:89031b2f5316 4032 break;
Charles MacNeill 5:89031b2f5316 4033 case VL53LX_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4034 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4035 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
Charles MacNeill 5:89031b2f5316 4036 break;
Charles MacNeill 5:89031b2f5316 4037 case VL53LX_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4038 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4039 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
Charles MacNeill 5:89031b2f5316 4040 break;
Charles MacNeill 5:89031b2f5316 4041 case VL53LX_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4042 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4043 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
Charles MacNeill 5:89031b2f5316 4044 break;
Charles MacNeill 5:89031b2f5316 4045 case VL53LX_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4046 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4047 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_timed_us;
Charles MacNeill 5:89031b2f5316 4048 break;
Charles MacNeill 5:89031b2f5316 4049 case VL53LX_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4050 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4051 (int32_t)pdev->tuning_parms.tp_mm_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 4052 break;
Charles MacNeill 5:89031b2f5316 4053 case VL53LX_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4054 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4055 (int32_t)pdev->tuning_parms.tp_mm_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 4056 break;
Charles MacNeill 5:89031b2f5316 4057 case VL53LX_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4058 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4059 (int32_t)pdev->tuning_parms.tp_mm_timeout_mz_us;
Charles MacNeill 5:89031b2f5316 4060 break;
Charles MacNeill 5:89031b2f5316 4061 case VL53LX_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4062 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4063 (int32_t)pdev->tuning_parms.tp_mm_timeout_timed_us;
Charles MacNeill 5:89031b2f5316 4064 break;
Charles MacNeill 5:89031b2f5316 4065 case VL53LX_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4066 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4067 (int32_t)pdev->tuning_parms.tp_range_timeout_lite_us;
Charles MacNeill 5:89031b2f5316 4068 break;
Charles MacNeill 5:89031b2f5316 4069 case VL53LX_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4070 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4071 (int32_t)pdev->tuning_parms.tp_range_timeout_histo_us;
Charles MacNeill 5:89031b2f5316 4072 break;
Charles MacNeill 5:89031b2f5316 4073 case VL53LX_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4074 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4075 (int32_t)pdev->tuning_parms.tp_range_timeout_mz_us;
Charles MacNeill 5:89031b2f5316 4076 break;
Charles MacNeill 5:89031b2f5316 4077 case VL53LX_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4078 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4079 (int32_t)pdev->tuning_parms.tp_range_timeout_timed_us;
Charles MacNeill 5:89031b2f5316 4080 break;
Charles MacNeill 5:89031b2f5316 4081 case VL53LX_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN:
Charles MacNeill 5:89031b2f5316 4082 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4083 (int32_t)pdev->smudge_correct_config.smudge_margin;
Charles MacNeill 5:89031b2f5316 4084 break;
Charles MacNeill 5:89031b2f5316 4085 case VL53LX_TUNINGPARM_DYNXTALK_NOISE_MARGIN:
Charles MacNeill 5:89031b2f5316 4086 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4087 (int32_t)pdev->smudge_correct_config.noise_margin;
Charles MacNeill 5:89031b2f5316 4088 break;
Charles MacNeill 5:89031b2f5316 4089 case VL53LX_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT:
Charles MacNeill 5:89031b2f5316 4090 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4091 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit;
Charles MacNeill 5:89031b2f5316 4092 break;
Charles MacNeill 5:89031b2f5316 4093 case VL53LX_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI:
Charles MacNeill 5:89031b2f5316 4094 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4095 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit_hi;
Charles MacNeill 5:89031b2f5316 4096 break;
Charles MacNeill 5:89031b2f5316 4097 case VL53LX_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT:
Charles MacNeill 5:89031b2f5316 4098 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4099 (int32_t)pdev->smudge_correct_config.sample_limit;
Charles MacNeill 5:89031b2f5316 4100 break;
Charles MacNeill 5:89031b2f5316 4101 case VL53LX_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA:
Charles MacNeill 5:89031b2f5316 4102 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4103 (int32_t)pdev->smudge_correct_config.single_xtalk_delta;
Charles MacNeill 5:89031b2f5316 4104 break;
Charles MacNeill 5:89031b2f5316 4105 case VL53LX_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA:
Charles MacNeill 5:89031b2f5316 4106 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4107 (int32_t)pdev->smudge_correct_config.averaged_xtalk_delta;
Charles MacNeill 5:89031b2f5316 4108 break;
Charles MacNeill 5:89031b2f5316 4109 case VL53LX_TUNINGPARM_DYNXTALK_CLIP_LIMIT:
Charles MacNeill 5:89031b2f5316 4110 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4111 (int32_t)pdev->smudge_correct_config.smudge_corr_clip_limit;
Charles MacNeill 5:89031b2f5316 4112 break;
Charles MacNeill 5:89031b2f5316 4113 case VL53LX_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD:
Charles MacNeill 5:89031b2f5316 4114 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4115 (int32_t)pdev->smudge_correct_config.scaler_calc_method;
Charles MacNeill 5:89031b2f5316 4116 break;
Charles MacNeill 5:89031b2f5316 4117 case VL53LX_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER:
Charles MacNeill 5:89031b2f5316 4118 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4119 (int32_t)pdev->smudge_correct_config.x_gradient_scaler;
Charles MacNeill 5:89031b2f5316 4120 break;
Charles MacNeill 5:89031b2f5316 4121 case VL53LX_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER:
Charles MacNeill 5:89031b2f5316 4122 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4123 (int32_t)pdev->smudge_correct_config.y_gradient_scaler;
Charles MacNeill 5:89031b2f5316 4124 break;
Charles MacNeill 5:89031b2f5316 4125 case VL53LX_TUNINGPARM_DYNXTALK_USER_SCALER_SET:
Charles MacNeill 5:89031b2f5316 4126 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4127 (int32_t)pdev->smudge_correct_config.user_scaler_set;
Charles MacNeill 5:89031b2f5316 4128 break;
Charles MacNeill 5:89031b2f5316 4129 case VL53LX_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY:
Charles MacNeill 5:89031b2f5316 4130 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4131 (int32_t)pdev->smudge_correct_config.smudge_corr_single_apply;
Charles MacNeill 5:89031b2f5316 4132 break;
Charles MacNeill 5:89031b2f5316 4133 case VL53LX_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD:
Charles MacNeill 5:89031b2f5316 4134 *ptuning_parm_value = (int32_t)(
Charles MacNeill 5:89031b2f5316 4135 pdev->smudge_correct_config.smudge_corr_ambient_threshold);
Charles MacNeill 5:89031b2f5316 4136 break;
Charles MacNeill 5:89031b2f5316 4137 case VL53LX_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS:
Charles MacNeill 5:89031b2f5316 4138 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4139 (int32_t)pdev->smudge_correct_config.nodetect_ambient_threshold;
Charles MacNeill 5:89031b2f5316 4140 break;
Charles MacNeill 5:89031b2f5316 4141 case VL53LX_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT:
Charles MacNeill 5:89031b2f5316 4142 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4143 (int32_t)pdev->smudge_correct_config.nodetect_sample_limit;
Charles MacNeill 5:89031b2f5316 4144 break;
Charles MacNeill 5:89031b2f5316 4145 case VL53LX_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS:
Charles MacNeill 5:89031b2f5316 4146 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4147 (int32_t)pdev->smudge_correct_config.nodetect_xtalk_offset;
Charles MacNeill 5:89031b2f5316 4148 break;
Charles MacNeill 5:89031b2f5316 4149 case VL53LX_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM:
Charles MacNeill 5:89031b2f5316 4150 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4151 (int32_t)pdev->smudge_correct_config.nodetect_min_range_mm;
Charles MacNeill 5:89031b2f5316 4152 break;
Charles MacNeill 5:89031b2f5316 4153 case VL53LX_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND:
Charles MacNeill 5:89031b2f5316 4154 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4155 (int32_t)pdev->low_power_auto_data.vhv_loop_bound;
Charles MacNeill 5:89031b2f5316 4156 break;
Charles MacNeill 5:89031b2f5316 4157 case VL53LX_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4158 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4159 (int32_t)pdev->tuning_parms.tp_mm_timeout_lpa_us;
Charles MacNeill 5:89031b2f5316 4160 break;
Charles MacNeill 5:89031b2f5316 4161 case VL53LX_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4162 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4163 (int32_t)pdev->tuning_parms.tp_range_timeout_lpa_us;
Charles MacNeill 5:89031b2f5316 4164 break;
Charles MacNeill 5:89031b2f5316 4165 case VL53LX_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4166 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4167 (int32_t)pdev->tuning_parms.tp_dss_target_very_short_mcps;
Charles MacNeill 5:89031b2f5316 4168 break;
Charles MacNeill 5:89031b2f5316 4169 case VL53LX_TUNINGPARM_PHASECAL_PATCH_POWER:
Charles MacNeill 5:89031b2f5316 4170 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4171 (int32_t) pdev->tuning_parms.tp_phasecal_patch_power;
Charles MacNeill 5:89031b2f5316 4172 break;
Charles MacNeill 5:89031b2f5316 4173 case VL53LX_TUNINGPARM_HIST_MERGE:
Charles MacNeill 5:89031b2f5316 4174 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4175 (int32_t) pdev->tuning_parms.tp_hist_merge;
Charles MacNeill 5:89031b2f5316 4176 break;
Charles MacNeill 5:89031b2f5316 4177 case VL53LX_TUNINGPARM_RESET_MERGE_THRESHOLD:
Charles MacNeill 5:89031b2f5316 4178 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4179 (int32_t) pdev->tuning_parms.tp_reset_merge_threshold;
Charles MacNeill 5:89031b2f5316 4180 break;
Charles MacNeill 5:89031b2f5316 4181 case VL53LX_TUNINGPARM_HIST_MERGE_MAX_SIZE:
Charles MacNeill 5:89031b2f5316 4182 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4183 (int32_t) pdev->tuning_parms.tp_hist_merge_max_size;
Charles MacNeill 5:89031b2f5316 4184 break;
Charles MacNeill 5:89031b2f5316 4185 case VL53LX_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR:
Charles MacNeill 5:89031b2f5316 4186 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4187 pdev->smudge_correct_config.max_smudge_factor;
Charles MacNeill 5:89031b2f5316 4188 break;
Charles MacNeill 5:89031b2f5316 4189
Charles MacNeill 5:89031b2f5316 4190 case VL53LX_TUNINGPARM_UWR_ENABLE:
Charles MacNeill 5:89031b2f5316 4191 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4192 pdev->tuning_parms.tp_uwr_enable;
Charles MacNeill 5:89031b2f5316 4193 break;
Charles MacNeill 5:89031b2f5316 4194 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN:
Charles MacNeill 5:89031b2f5316 4195 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4196 pdev->tuning_parms.tp_uwr_med_z_1_min;
Charles MacNeill 5:89031b2f5316 4197 break;
Charles MacNeill 5:89031b2f5316 4198 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX:
Charles MacNeill 5:89031b2f5316 4199 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4200 pdev->tuning_parms.tp_uwr_med_z_1_max;
Charles MacNeill 5:89031b2f5316 4201 break;
Charles MacNeill 5:89031b2f5316 4202 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN:
Charles MacNeill 5:89031b2f5316 4203 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4204 pdev->tuning_parms.tp_uwr_med_z_2_min;
Charles MacNeill 5:89031b2f5316 4205 break;
Charles MacNeill 5:89031b2f5316 4206 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX:
Charles MacNeill 5:89031b2f5316 4207 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4208 pdev->tuning_parms.tp_uwr_med_z_2_max;
Charles MacNeill 5:89031b2f5316 4209 break;
Charles MacNeill 5:89031b2f5316 4210 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN:
Charles MacNeill 5:89031b2f5316 4211 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4212 pdev->tuning_parms.tp_uwr_med_z_3_min;
Charles MacNeill 5:89031b2f5316 4213 break;
Charles MacNeill 5:89031b2f5316 4214 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX:
Charles MacNeill 5:89031b2f5316 4215 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4216 pdev->tuning_parms.tp_uwr_med_z_3_max;
Charles MacNeill 5:89031b2f5316 4217 break;
Charles MacNeill 5:89031b2f5316 4218 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN:
Charles MacNeill 5:89031b2f5316 4219 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4220 pdev->tuning_parms.tp_uwr_med_z_4_min;
Charles MacNeill 5:89031b2f5316 4221 break;
Charles MacNeill 5:89031b2f5316 4222 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX:
Charles MacNeill 5:89031b2f5316 4223 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4224 pdev->tuning_parms.tp_uwr_med_z_4_max;
Charles MacNeill 5:89031b2f5316 4225 break;
Charles MacNeill 5:89031b2f5316 4226 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN:
Charles MacNeill 5:89031b2f5316 4227 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4228 pdev->tuning_parms.tp_uwr_med_z_5_min;
Charles MacNeill 5:89031b2f5316 4229 break;
Charles MacNeill 5:89031b2f5316 4230 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX:
Charles MacNeill 5:89031b2f5316 4231 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4232 pdev->tuning_parms.tp_uwr_med_z_5_max;
Charles MacNeill 5:89031b2f5316 4233 break;
Charles MacNeill 5:89031b2f5316 4234 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA:
Charles MacNeill 5:89031b2f5316 4235 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4236 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea;
Charles MacNeill 5:89031b2f5316 4237 break;
Charles MacNeill 5:89031b2f5316 4238 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB:
Charles MacNeill 5:89031b2f5316 4239 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4240 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb;
Charles MacNeill 5:89031b2f5316 4241 break;
Charles MacNeill 5:89031b2f5316 4242 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA:
Charles MacNeill 5:89031b2f5316 4243 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4244 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea;
Charles MacNeill 5:89031b2f5316 4245 break;
Charles MacNeill 5:89031b2f5316 4246 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB:
Charles MacNeill 5:89031b2f5316 4247 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4248 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb;
Charles MacNeill 5:89031b2f5316 4249 break;
Charles MacNeill 5:89031b2f5316 4250 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA:
Charles MacNeill 5:89031b2f5316 4251 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4252 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea;
Charles MacNeill 5:89031b2f5316 4253 break;
Charles MacNeill 5:89031b2f5316 4254 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB:
Charles MacNeill 5:89031b2f5316 4255 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4256 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb;
Charles MacNeill 5:89031b2f5316 4257 break;
Charles MacNeill 5:89031b2f5316 4258 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA:
Charles MacNeill 5:89031b2f5316 4259 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4260 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea;
Charles MacNeill 5:89031b2f5316 4261 break;
Charles MacNeill 5:89031b2f5316 4262 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB:
Charles MacNeill 5:89031b2f5316 4263 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4264 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb;
Charles MacNeill 5:89031b2f5316 4265 break;
Charles MacNeill 5:89031b2f5316 4266 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA:
Charles MacNeill 5:89031b2f5316 4267 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4268 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea;
Charles MacNeill 5:89031b2f5316 4269 break;
Charles MacNeill 5:89031b2f5316 4270 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB:
Charles MacNeill 5:89031b2f5316 4271 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4272 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb;
Charles MacNeill 5:89031b2f5316 4273 break;
Charles MacNeill 5:89031b2f5316 4274 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_1_MIN:
Charles MacNeill 5:89031b2f5316 4275 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4276 pdev->tuning_parms.tp_uwr_lng_z_1_min;
Charles MacNeill 5:89031b2f5316 4277 break;
Charles MacNeill 5:89031b2f5316 4278 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_1_MAX:
Charles MacNeill 5:89031b2f5316 4279 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4280 pdev->tuning_parms.tp_uwr_lng_z_1_max;
Charles MacNeill 5:89031b2f5316 4281 break;
Charles MacNeill 5:89031b2f5316 4282 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_2_MIN:
Charles MacNeill 5:89031b2f5316 4283 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4284 pdev->tuning_parms.tp_uwr_lng_z_2_min;
Charles MacNeill 5:89031b2f5316 4285 break;
Charles MacNeill 5:89031b2f5316 4286 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_2_MAX:
Charles MacNeill 5:89031b2f5316 4287 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4288 pdev->tuning_parms.tp_uwr_lng_z_2_max;
Charles MacNeill 5:89031b2f5316 4289 break;
Charles MacNeill 5:89031b2f5316 4290 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_3_MIN:
Charles MacNeill 5:89031b2f5316 4291 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4292 pdev->tuning_parms.tp_uwr_lng_z_3_min;
Charles MacNeill 5:89031b2f5316 4293 break;
Charles MacNeill 5:89031b2f5316 4294 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_3_MAX:
Charles MacNeill 5:89031b2f5316 4295 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4296 pdev->tuning_parms.tp_uwr_lng_z_3_max;
Charles MacNeill 5:89031b2f5316 4297 break;
Charles MacNeill 5:89031b2f5316 4298 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_4_MIN:
Charles MacNeill 5:89031b2f5316 4299 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4300 pdev->tuning_parms.tp_uwr_lng_z_4_min;
Charles MacNeill 5:89031b2f5316 4301 break;
Charles MacNeill 5:89031b2f5316 4302 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_4_MAX:
Charles MacNeill 5:89031b2f5316 4303 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4304 pdev->tuning_parms.tp_uwr_lng_z_4_max;
Charles MacNeill 5:89031b2f5316 4305 break;
Charles MacNeill 5:89031b2f5316 4306 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_5_MIN:
Charles MacNeill 5:89031b2f5316 4307 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4308 pdev->tuning_parms.tp_uwr_lng_z_5_min;
Charles MacNeill 5:89031b2f5316 4309 break;
Charles MacNeill 5:89031b2f5316 4310 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_5_MAX:
Charles MacNeill 5:89031b2f5316 4311 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4312 pdev->tuning_parms.tp_uwr_lng_z_5_max;
Charles MacNeill 5:89031b2f5316 4313 break;
Charles MacNeill 5:89031b2f5316 4314 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA:
Charles MacNeill 5:89031b2f5316 4315 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4316 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea;
Charles MacNeill 5:89031b2f5316 4317 break;
Charles MacNeill 5:89031b2f5316 4318 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB:
Charles MacNeill 5:89031b2f5316 4319 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4320 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb;
Charles MacNeill 5:89031b2f5316 4321 break;
Charles MacNeill 5:89031b2f5316 4322 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA:
Charles MacNeill 5:89031b2f5316 4323 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4324 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea;
Charles MacNeill 5:89031b2f5316 4325 break;
Charles MacNeill 5:89031b2f5316 4326 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB:
Charles MacNeill 5:89031b2f5316 4327 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4328 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb;
Charles MacNeill 5:89031b2f5316 4329 break;
Charles MacNeill 5:89031b2f5316 4330 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA:
Charles MacNeill 5:89031b2f5316 4331 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4332 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea;
Charles MacNeill 5:89031b2f5316 4333 break;
Charles MacNeill 5:89031b2f5316 4334 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB:
Charles MacNeill 5:89031b2f5316 4335 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4336 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb;
Charles MacNeill 5:89031b2f5316 4337 break;
Charles MacNeill 5:89031b2f5316 4338 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA:
Charles MacNeill 5:89031b2f5316 4339 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4340 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea;
Charles MacNeill 5:89031b2f5316 4341 break;
Charles MacNeill 5:89031b2f5316 4342 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB:
Charles MacNeill 5:89031b2f5316 4343 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4344 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb;
Charles MacNeill 5:89031b2f5316 4345 break;
Charles MacNeill 5:89031b2f5316 4346 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA:
Charles MacNeill 5:89031b2f5316 4347 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4348 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea;
Charles MacNeill 5:89031b2f5316 4349 break;
Charles MacNeill 5:89031b2f5316 4350 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB:
Charles MacNeill 5:89031b2f5316 4351 *ptuning_parm_value =
Charles MacNeill 5:89031b2f5316 4352 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb;
Charles MacNeill 5:89031b2f5316 4353 break;
Charles MacNeill 5:89031b2f5316 4354
Charles MacNeill 5:89031b2f5316 4355 default:
Charles MacNeill 5:89031b2f5316 4356 *ptuning_parm_value = 0x7FFFFFFF;
Charles MacNeill 5:89031b2f5316 4357 status = VL53LX_ERROR_INVALID_PARAMS;
Charles MacNeill 5:89031b2f5316 4358 break;
Charles MacNeill 5:89031b2f5316 4359
Charles MacNeill 5:89031b2f5316 4360 }
Charles MacNeill 5:89031b2f5316 4361
Charles MacNeill 5:89031b2f5316 4362 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 4363
Charles MacNeill 5:89031b2f5316 4364 return status;
Charles MacNeill 5:89031b2f5316 4365 }
Charles MacNeill 5:89031b2f5316 4366
Charles MacNeill 5:89031b2f5316 4367 VL53LX_Error VL53LX_set_tuning_parm(
Charles MacNeill 5:89031b2f5316 4368 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 4369 VL53LX_TuningParms tuning_parm_key,
Charles MacNeill 5:89031b2f5316 4370 int32_t tuning_parm_value)
Charles MacNeill 5:89031b2f5316 4371 {
Charles MacNeill 5:89031b2f5316 4372
Charles MacNeill 5:89031b2f5316 4373
Charles MacNeill 5:89031b2f5316 4374
Charles MacNeill 5:89031b2f5316 4375 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 4376
Charles MacNeill 5:89031b2f5316 4377 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 4378 VL53LX_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
Charles MacNeill 5:89031b2f5316 4379 VL53LX_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
Charles MacNeill 5:89031b2f5316 4380
Charles MacNeill 5:89031b2f5316 4381 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 4382
Charles MacNeill 5:89031b2f5316 4383 switch (tuning_parm_key) {
Charles MacNeill 5:89031b2f5316 4384
Charles MacNeill 5:89031b2f5316 4385 case VL53LX_TUNINGPARM_VERSION:
Charles MacNeill 5:89031b2f5316 4386 pdev->tuning_parms.tp_tuning_parm_version =
Charles MacNeill 5:89031b2f5316 4387 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4388 break;
Charles MacNeill 5:89031b2f5316 4389 case VL53LX_TUNINGPARM_KEY_TABLE_VERSION:
Charles MacNeill 5:89031b2f5316 4390 pdev->tuning_parms.tp_tuning_parm_key_table_version =
Charles MacNeill 5:89031b2f5316 4391 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4392
Charles MacNeill 5:89031b2f5316 4393
Charles MacNeill 5:89031b2f5316 4394
Charles MacNeill 5:89031b2f5316 4395 if ((uint16_t)tuning_parm_value
Charles MacNeill 5:89031b2f5316 4396 != VL53LX_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT)
Charles MacNeill 5:89031b2f5316 4397 status = VL53LX_ERROR_TUNING_PARM_KEY_MISMATCH;
Charles MacNeill 5:89031b2f5316 4398
Charles MacNeill 5:89031b2f5316 4399 break;
Charles MacNeill 5:89031b2f5316 4400 case VL53LX_TUNINGPARM_LLD_VERSION:
Charles MacNeill 5:89031b2f5316 4401 pdev->tuning_parms.tp_tuning_parm_lld_version =
Charles MacNeill 5:89031b2f5316 4402 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4403 break;
Charles MacNeill 5:89031b2f5316 4404 case VL53LX_TUNINGPARM_HIST_ALGO_SELECT:
Charles MacNeill 5:89031b2f5316 4405 pHP->hist_algo_select =
Charles MacNeill 5:89031b2f5316 4406 (VL53LX_HistAlgoSelect)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4407 break;
Charles MacNeill 5:89031b2f5316 4408 case VL53LX_TUNINGPARM_HIST_TARGET_ORDER:
Charles MacNeill 5:89031b2f5316 4409 pHP->hist_target_order =
Charles MacNeill 5:89031b2f5316 4410 (VL53LX_HistTargetOrder)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4411 break;
Charles MacNeill 5:89031b2f5316 4412 case VL53LX_TUNINGPARM_HIST_FILTER_WOI_0:
Charles MacNeill 5:89031b2f5316 4413 pHP->filter_woi0 =
Charles MacNeill 5:89031b2f5316 4414 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4415 break;
Charles MacNeill 5:89031b2f5316 4416 case VL53LX_TUNINGPARM_HIST_FILTER_WOI_1:
Charles MacNeill 5:89031b2f5316 4417 pHP->filter_woi1 =
Charles MacNeill 5:89031b2f5316 4418 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4419 break;
Charles MacNeill 5:89031b2f5316 4420 case VL53LX_TUNINGPARM_HIST_AMB_EST_METHOD:
Charles MacNeill 5:89031b2f5316 4421 pHP->hist_amb_est_method =
Charles MacNeill 5:89031b2f5316 4422 (VL53LX_HistAmbEstMethod)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4423 break;
Charles MacNeill 5:89031b2f5316 4424 case VL53LX_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0:
Charles MacNeill 5:89031b2f5316 4425 pHP->ambient_thresh_sigma0 =
Charles MacNeill 5:89031b2f5316 4426 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4427 break;
Charles MacNeill 5:89031b2f5316 4428 case VL53LX_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1:
Charles MacNeill 5:89031b2f5316 4429 pHP->ambient_thresh_sigma1 =
Charles MacNeill 5:89031b2f5316 4430 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4431 break;
Charles MacNeill 5:89031b2f5316 4432 case VL53LX_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS:
Charles MacNeill 5:89031b2f5316 4433 pHP->min_ambient_thresh_events =
Charles MacNeill 5:89031b2f5316 4434 (int32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4435 break;
Charles MacNeill 5:89031b2f5316 4436 case VL53LX_TUNINGPARM_HIST_AMB_EVENTS_SCALER:
Charles MacNeill 5:89031b2f5316 4437 pHP->ambient_thresh_events_scaler =
Charles MacNeill 5:89031b2f5316 4438 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4439 break;
Charles MacNeill 5:89031b2f5316 4440 case VL53LX_TUNINGPARM_HIST_NOISE_THRESHOLD:
Charles MacNeill 5:89031b2f5316 4441 pHP->noise_threshold =
Charles MacNeill 5:89031b2f5316 4442 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4443 break;
Charles MacNeill 5:89031b2f5316 4444 case VL53LX_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT:
Charles MacNeill 5:89031b2f5316 4445 pHP->signal_total_events_limit =
Charles MacNeill 5:89031b2f5316 4446 (int32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4447 break;
Charles MacNeill 5:89031b2f5316 4448 case VL53LX_TUNINGPARM_HIST_SIGMA_EST_REF_MM:
Charles MacNeill 5:89031b2f5316 4449 pHP->sigma_estimator__sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 4450 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4451 break;
Charles MacNeill 5:89031b2f5316 4452 case VL53LX_TUNINGPARM_HIST_SIGMA_THRESH_MM:
Charles MacNeill 5:89031b2f5316 4453 pHP->sigma_thresh =
Charles MacNeill 5:89031b2f5316 4454 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4455 break;
Charles MacNeill 5:89031b2f5316 4456 case VL53LX_TUNINGPARM_HIST_GAIN_FACTOR:
Charles MacNeill 5:89031b2f5316 4457 pdev->gain_cal.histogram_ranging_gain_factor =
Charles MacNeill 5:89031b2f5316 4458 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4459 break;
Charles MacNeill 5:89031b2f5316 4460 case VL53LX_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE:
Charles MacNeill 5:89031b2f5316 4461 pHP->algo__consistency_check__phase_tolerance =
Charles MacNeill 5:89031b2f5316 4462 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4463 break;
Charles MacNeill 5:89031b2f5316 4464 case VL53LX_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM:
Charles MacNeill 5:89031b2f5316 4465 pHP->algo__consistency_check__min_max_tolerance =
Charles MacNeill 5:89031b2f5316 4466 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4467 break;
Charles MacNeill 5:89031b2f5316 4468 case VL53LX_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA:
Charles MacNeill 5:89031b2f5316 4469 pHP->algo__consistency_check__event_sigma =
Charles MacNeill 5:89031b2f5316 4470 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4471 break;
Charles MacNeill 5:89031b2f5316 4472 case VL53LX_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT:
Charles MacNeill 5:89031b2f5316 4473 pHP->algo__consistency_check__event_min_spad_count =
Charles MacNeill 5:89031b2f5316 4474 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4475 break;
Charles MacNeill 5:89031b2f5316 4476 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 4477 pdev->tuning_parms.tp_init_phase_rtn_hist_long =
Charles MacNeill 5:89031b2f5316 4478 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4479 break;
Charles MacNeill 5:89031b2f5316 4480 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE:
Charles MacNeill 5:89031b2f5316 4481 pdev->tuning_parms.tp_init_phase_rtn_hist_med =
Charles MacNeill 5:89031b2f5316 4482 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4483 break;
Charles MacNeill 5:89031b2f5316 4484 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 4485 pdev->tuning_parms.tp_init_phase_rtn_hist_short =
Charles MacNeill 5:89031b2f5316 4486 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4487 break;
Charles MacNeill 5:89031b2f5316 4488 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 4489 pdev->tuning_parms.tp_init_phase_ref_hist_long =
Charles MacNeill 5:89031b2f5316 4490 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4491 break;
Charles MacNeill 5:89031b2f5316 4492 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE:
Charles MacNeill 5:89031b2f5316 4493 pdev->tuning_parms.tp_init_phase_ref_hist_med =
Charles MacNeill 5:89031b2f5316 4494 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4495 break;
Charles MacNeill 5:89031b2f5316 4496 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 4497 pdev->tuning_parms.tp_init_phase_ref_hist_short =
Charles MacNeill 5:89031b2f5316 4498 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4499 break;
Charles MacNeill 5:89031b2f5316 4500 case VL53LX_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM:
Charles MacNeill 5:89031b2f5316 4501 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm =
Charles MacNeill 5:89031b2f5316 4502 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4503 break;
Charles MacNeill 5:89031b2f5316 4504 case VL53LX_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM:
Charles MacNeill 5:89031b2f5316 4505 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm =
Charles MacNeill 5:89031b2f5316 4506 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4507 break;
Charles MacNeill 5:89031b2f5316 4508 case VL53LX_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM:
Charles MacNeill 5:89031b2f5316 4509 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm =
Charles MacNeill 5:89031b2f5316 4510 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4511 break;
Charles MacNeill 5:89031b2f5316 4512 case VL53LX_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE:
Charles MacNeill 5:89031b2f5316 4513 pHP->algo__crosstalk_detect_min_max_tolerance =
Charles MacNeill 5:89031b2f5316 4514 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4515 break;
Charles MacNeill 5:89031b2f5316 4516 case VL53LX_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS:
Charles MacNeill 5:89031b2f5316 4517 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps =
Charles MacNeill 5:89031b2f5316 4518 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4519 break;
Charles MacNeill 5:89031b2f5316 4520 case VL53LX_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA:
Charles MacNeill 5:89031b2f5316 4521 pHP->algo__crosstalk_detect_event_sigma =
Charles MacNeill 5:89031b2f5316 4522 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4523 break;
Charles MacNeill 5:89031b2f5316 4524 case VL53LX_TUNINGPARM_HIST_XTALK_MARGIN_KCPS:
Charles MacNeill 5:89031b2f5316 4525 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps =
Charles MacNeill 5:89031b2f5316 4526 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4527 break;
Charles MacNeill 5:89031b2f5316 4528 case VL53LX_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE:
Charles MacNeill 5:89031b2f5316 4529 pdev->tuning_parms.tp_consistency_lite_phase_tolerance =
Charles MacNeill 5:89031b2f5316 4530 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4531 break;
Charles MacNeill 5:89031b2f5316 4532 case VL53LX_TUNINGPARM_PHASECAL_TARGET:
Charles MacNeill 5:89031b2f5316 4533 pdev->tuning_parms.tp_phasecal_target =
Charles MacNeill 5:89031b2f5316 4534 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4535 break;
Charles MacNeill 5:89031b2f5316 4536 case VL53LX_TUNINGPARM_LITE_CAL_REPEAT_RATE:
Charles MacNeill 5:89031b2f5316 4537 pdev->tuning_parms.tp_cal_repeat_rate =
Charles MacNeill 5:89031b2f5316 4538 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4539 break;
Charles MacNeill 5:89031b2f5316 4540 case VL53LX_TUNINGPARM_LITE_RANGING_GAIN_FACTOR:
Charles MacNeill 5:89031b2f5316 4541 pdev->gain_cal.standard_ranging_gain_factor =
Charles MacNeill 5:89031b2f5316 4542 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4543 break;
Charles MacNeill 5:89031b2f5316 4544 case VL53LX_TUNINGPARM_LITE_MIN_CLIP_MM:
Charles MacNeill 5:89031b2f5316 4545 pdev->tuning_parms.tp_lite_min_clip =
Charles MacNeill 5:89031b2f5316 4546 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4547 break;
Charles MacNeill 5:89031b2f5316 4548 case VL53LX_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM:
Charles MacNeill 5:89031b2f5316 4549 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 4550 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4551 break;
Charles MacNeill 5:89031b2f5316 4552 case VL53LX_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM:
Charles MacNeill 5:89031b2f5316 4553 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 4554 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4555 break;
Charles MacNeill 5:89031b2f5316 4556 case VL53LX_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM:
Charles MacNeill 5:89031b2f5316 4557 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm =
Charles MacNeill 5:89031b2f5316 4558 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4559 break;
Charles MacNeill 5:89031b2f5316 4560 case VL53LX_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS:
Charles MacNeill 5:89031b2f5316 4561 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 4562 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4563 break;
Charles MacNeill 5:89031b2f5316 4564 case VL53LX_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS:
Charles MacNeill 5:89031b2f5316 4565 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 4566 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4567 break;
Charles MacNeill 5:89031b2f5316 4568 case VL53LX_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS:
Charles MacNeill 5:89031b2f5316 4569 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps =
Charles MacNeill 5:89031b2f5316 4570 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4571 break;
Charles MacNeill 5:89031b2f5316 4572 case VL53LX_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH:
Charles MacNeill 5:89031b2f5316 4573 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns =
Charles MacNeill 5:89031b2f5316 4574 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4575 break;
Charles MacNeill 5:89031b2f5316 4576 case VL53LX_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS:
Charles MacNeill 5:89031b2f5316 4577 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns =
Charles MacNeill 5:89031b2f5316 4578 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4579 break;
Charles MacNeill 5:89031b2f5316 4580 case VL53LX_TUNINGPARM_LITE_SIGMA_REF_MM:
Charles MacNeill 5:89031b2f5316 4581 pdev->tuning_parms.tp_lite_sigma_ref_mm =
Charles MacNeill 5:89031b2f5316 4582 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4583 break;
Charles MacNeill 5:89031b2f5316 4584 case VL53LX_TUNINGPARM_LITE_RIT_MULT:
Charles MacNeill 5:89031b2f5316 4585 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult =
Charles MacNeill 5:89031b2f5316 4586 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4587 break;
Charles MacNeill 5:89031b2f5316 4588 case VL53LX_TUNINGPARM_LITE_SEED_CONFIG:
Charles MacNeill 5:89031b2f5316 4589 pdev->tuning_parms.tp_lite_seed_cfg =
Charles MacNeill 5:89031b2f5316 4590 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4591 break;
Charles MacNeill 5:89031b2f5316 4592 case VL53LX_TUNINGPARM_LITE_QUANTIFIER:
Charles MacNeill 5:89031b2f5316 4593 pdev->tuning_parms.tp_lite_quantifier =
Charles MacNeill 5:89031b2f5316 4594 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4595 break;
Charles MacNeill 5:89031b2f5316 4596 case VL53LX_TUNINGPARM_LITE_FIRST_ORDER_SELECT:
Charles MacNeill 5:89031b2f5316 4597 pdev->tuning_parms.tp_lite_first_order_select =
Charles MacNeill 5:89031b2f5316 4598 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4599 break;
Charles MacNeill 5:89031b2f5316 4600 case VL53LX_TUNINGPARM_LITE_XTALK_MARGIN_KCPS:
Charles MacNeill 5:89031b2f5316 4601 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps =
Charles MacNeill 5:89031b2f5316 4602 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4603 break;
Charles MacNeill 5:89031b2f5316 4604 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 4605 pdev->tuning_parms.tp_init_phase_rtn_lite_long =
Charles MacNeill 5:89031b2f5316 4606 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4607 break;
Charles MacNeill 5:89031b2f5316 4608 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE:
Charles MacNeill 5:89031b2f5316 4609 pdev->tuning_parms.tp_init_phase_rtn_lite_med =
Charles MacNeill 5:89031b2f5316 4610 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4611 break;
Charles MacNeill 5:89031b2f5316 4612 case VL53LX_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 4613 pdev->tuning_parms.tp_init_phase_rtn_lite_short =
Charles MacNeill 5:89031b2f5316 4614 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4615 break;
Charles MacNeill 5:89031b2f5316 4616 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE:
Charles MacNeill 5:89031b2f5316 4617 pdev->tuning_parms.tp_init_phase_ref_lite_long =
Charles MacNeill 5:89031b2f5316 4618 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4619 break;
Charles MacNeill 5:89031b2f5316 4620 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE:
Charles MacNeill 5:89031b2f5316 4621 pdev->tuning_parms.tp_init_phase_ref_lite_med =
Charles MacNeill 5:89031b2f5316 4622 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4623 break;
Charles MacNeill 5:89031b2f5316 4624 case VL53LX_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE:
Charles MacNeill 5:89031b2f5316 4625 pdev->tuning_parms.tp_init_phase_ref_lite_short =
Charles MacNeill 5:89031b2f5316 4626 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4627 break;
Charles MacNeill 5:89031b2f5316 4628 case VL53LX_TUNINGPARM_TIMED_SEED_CONFIG:
Charles MacNeill 5:89031b2f5316 4629 pdev->tuning_parms.tp_timed_seed_cfg =
Charles MacNeill 5:89031b2f5316 4630 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4631 break;
Charles MacNeill 5:89031b2f5316 4632 case VL53LX_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA:
Charles MacNeill 5:89031b2f5316 4633 pdev->dmax_cfg.signal_thresh_sigma =
Charles MacNeill 5:89031b2f5316 4634 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4635 break;
Charles MacNeill 5:89031b2f5316 4636 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0:
Charles MacNeill 5:89031b2f5316 4637 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0] =
Charles MacNeill 5:89031b2f5316 4638 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4639 break;
Charles MacNeill 5:89031b2f5316 4640 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1:
Charles MacNeill 5:89031b2f5316 4641 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1] =
Charles MacNeill 5:89031b2f5316 4642 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4643 break;
Charles MacNeill 5:89031b2f5316 4644 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2:
Charles MacNeill 5:89031b2f5316 4645 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2] =
Charles MacNeill 5:89031b2f5316 4646 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4647 break;
Charles MacNeill 5:89031b2f5316 4648 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3:
Charles MacNeill 5:89031b2f5316 4649 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3] =
Charles MacNeill 5:89031b2f5316 4650 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4651 break;
Charles MacNeill 5:89031b2f5316 4652 case VL53LX_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4:
Charles MacNeill 5:89031b2f5316 4653 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4] =
Charles MacNeill 5:89031b2f5316 4654 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4655 break;
Charles MacNeill 5:89031b2f5316 4656 case VL53LX_TUNINGPARM_VHV_LOOPBOUND:
Charles MacNeill 5:89031b2f5316 4657 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound =
Charles MacNeill 5:89031b2f5316 4658 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4659 break;
Charles MacNeill 5:89031b2f5316 4660 case VL53LX_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE:
Charles MacNeill 5:89031b2f5316 4661 pdev->refspadchar.device_test_mode =
Charles MacNeill 5:89031b2f5316 4662 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4663 break;
Charles MacNeill 5:89031b2f5316 4664 case VL53LX_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD:
Charles MacNeill 5:89031b2f5316 4665 pdev->refspadchar.VL53LX_p_005 =
Charles MacNeill 5:89031b2f5316 4666 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4667 break;
Charles MacNeill 5:89031b2f5316 4668 case VL53LX_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4669 pdev->refspadchar.timeout_us =
Charles MacNeill 5:89031b2f5316 4670 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4671 break;
Charles MacNeill 5:89031b2f5316 4672 case VL53LX_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4673 pdev->refspadchar.target_count_rate_mcps =
Charles MacNeill 5:89031b2f5316 4674 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4675 break;
Charles MacNeill 5:89031b2f5316 4676 case VL53LX_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS:
Charles MacNeill 5:89031b2f5316 4677 pdev->refspadchar.min_count_rate_limit_mcps =
Charles MacNeill 5:89031b2f5316 4678 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4679 break;
Charles MacNeill 5:89031b2f5316 4680 case VL53LX_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS:
Charles MacNeill 5:89031b2f5316 4681 pdev->refspadchar.max_count_rate_limit_mcps =
Charles MacNeill 5:89031b2f5316 4682 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4683 break;
Charles MacNeill 5:89031b2f5316 4684 case VL53LX_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES:
Charles MacNeill 5:89031b2f5316 4685 pXC->num_of_samples =
Charles MacNeill 5:89031b2f5316 4686 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4687 break;
Charles MacNeill 5:89031b2f5316 4688 case VL53LX_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM:
Charles MacNeill 5:89031b2f5316 4689 pXC->algo__crosstalk_extract_min_valid_range_mm =
Charles MacNeill 5:89031b2f5316 4690 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4691 break;
Charles MacNeill 5:89031b2f5316 4692 case VL53LX_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM:
Charles MacNeill 5:89031b2f5316 4693 pXC->algo__crosstalk_extract_max_valid_range_mm =
Charles MacNeill 5:89031b2f5316 4694 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4695 break;
Charles MacNeill 5:89031b2f5316 4696 case VL53LX_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4697 pXC->dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 4698 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4699 break;
Charles MacNeill 5:89031b2f5316 4700 case VL53LX_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4701 pXC->phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4702 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4703 break;
Charles MacNeill 5:89031b2f5316 4704 case VL53LX_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS:
Charles MacNeill 5:89031b2f5316 4705 pXC->algo__crosstalk_extract_max_valid_rate_kcps =
Charles MacNeill 5:89031b2f5316 4706 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4707 break;
Charles MacNeill 5:89031b2f5316 4708 case VL53LX_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM:
Charles MacNeill 5:89031b2f5316 4709 pXC->algo__crosstalk_extract_max_sigma_mm =
Charles MacNeill 5:89031b2f5316 4710 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4711 break;
Charles MacNeill 5:89031b2f5316 4712 case VL53LX_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4713 pXC->mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4714 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4715 break;
Charles MacNeill 5:89031b2f5316 4716 case VL53LX_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4717 pXC->range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4718 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4719 break;
Charles MacNeill 5:89031b2f5316 4720 case VL53LX_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4721 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 4722 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4723 break;
Charles MacNeill 5:89031b2f5316 4724 case VL53LX_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4725 pdev->offsetcal_cfg.phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4726 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4727 break;
Charles MacNeill 5:89031b2f5316 4728 case VL53LX_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4729 pdev->offsetcal_cfg.mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4730 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4731 break;
Charles MacNeill 5:89031b2f5316 4732 case VL53LX_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4733 pdev->offsetcal_cfg.range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4734 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4735 break;
Charles MacNeill 5:89031b2f5316 4736 case VL53LX_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES:
Charles MacNeill 5:89031b2f5316 4737 pdev->offsetcal_cfg.pre_num_of_samples =
Charles MacNeill 5:89031b2f5316 4738 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4739 break;
Charles MacNeill 5:89031b2f5316 4740 case VL53LX_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES:
Charles MacNeill 5:89031b2f5316 4741 pdev->offsetcal_cfg.mm1_num_of_samples =
Charles MacNeill 5:89031b2f5316 4742 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4743 break;
Charles MacNeill 5:89031b2f5316 4744 case VL53LX_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES:
Charles MacNeill 5:89031b2f5316 4745 pdev->offsetcal_cfg.mm2_num_of_samples =
Charles MacNeill 5:89031b2f5316 4746 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4747 break;
Charles MacNeill 5:89031b2f5316 4748 case VL53LX_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4749 pdev->zonecal_cfg.dss_config__target_total_rate_mcps =
Charles MacNeill 5:89031b2f5316 4750 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4751 break;
Charles MacNeill 5:89031b2f5316 4752 case VL53LX_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4753 pdev->zonecal_cfg.phasecal_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4754 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4755 break;
Charles MacNeill 5:89031b2f5316 4756 case VL53LX_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4757 pdev->zonecal_cfg.mm_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4758 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4759 break;
Charles MacNeill 5:89031b2f5316 4760 case VL53LX_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES:
Charles MacNeill 5:89031b2f5316 4761 pdev->zonecal_cfg.phasecal_num_of_samples =
Charles MacNeill 5:89031b2f5316 4762 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4763 break;
Charles MacNeill 5:89031b2f5316 4764 case VL53LX_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4765 pdev->zonecal_cfg.range_config_timeout_us =
Charles MacNeill 5:89031b2f5316 4766 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4767 break;
Charles MacNeill 5:89031b2f5316 4768 case VL53LX_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES:
Charles MacNeill 5:89031b2f5316 4769 pdev->zonecal_cfg.zone_num_of_samples =
Charles MacNeill 5:89031b2f5316 4770 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4771 break;
Charles MacNeill 5:89031b2f5316 4772 case VL53LX_TUNINGPARM_SPADMAP_VCSEL_PERIOD:
Charles MacNeill 5:89031b2f5316 4773 pdev->ssc_cfg.VL53LX_p_005 =
Charles MacNeill 5:89031b2f5316 4774 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4775 break;
Charles MacNeill 5:89031b2f5316 4776 case VL53LX_TUNINGPARM_SPADMAP_VCSEL_START:
Charles MacNeill 5:89031b2f5316 4777 pdev->ssc_cfg.vcsel_start =
Charles MacNeill 5:89031b2f5316 4778 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4779 break;
Charles MacNeill 5:89031b2f5316 4780 case VL53LX_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS:
Charles MacNeill 5:89031b2f5316 4781 pdev->ssc_cfg.rate_limit_mcps =
Charles MacNeill 5:89031b2f5316 4782 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4783 break;
Charles MacNeill 5:89031b2f5316 4784 case VL53LX_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4785 pdev->tuning_parms.tp_dss_target_lite_mcps =
Charles MacNeill 5:89031b2f5316 4786 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4787 break;
Charles MacNeill 5:89031b2f5316 4788 case VL53LX_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4789 pdev->tuning_parms.tp_dss_target_histo_mcps =
Charles MacNeill 5:89031b2f5316 4790 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4791 break;
Charles MacNeill 5:89031b2f5316 4792 case VL53LX_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4793 pdev->tuning_parms.tp_dss_target_histo_mz_mcps =
Charles MacNeill 5:89031b2f5316 4794 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4795 break;
Charles MacNeill 5:89031b2f5316 4796 case VL53LX_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4797 pdev->tuning_parms.tp_dss_target_timed_mcps =
Charles MacNeill 5:89031b2f5316 4798 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4799 break;
Charles MacNeill 5:89031b2f5316 4800 case VL53LX_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4801 pdev->tuning_parms.tp_phasecal_timeout_lite_us =
Charles MacNeill 5:89031b2f5316 4802 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4803 break;
Charles MacNeill 5:89031b2f5316 4804 case VL53LX_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4805 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us =
Charles MacNeill 5:89031b2f5316 4806 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4807 break;
Charles MacNeill 5:89031b2f5316 4808 case VL53LX_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4809 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us =
Charles MacNeill 5:89031b2f5316 4810 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4811 break;
Charles MacNeill 5:89031b2f5316 4812 case VL53LX_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4813 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us =
Charles MacNeill 5:89031b2f5316 4814 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4815 break;
Charles MacNeill 5:89031b2f5316 4816 case VL53LX_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4817 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us =
Charles MacNeill 5:89031b2f5316 4818 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4819 break;
Charles MacNeill 5:89031b2f5316 4820 case VL53LX_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4821 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us =
Charles MacNeill 5:89031b2f5316 4822 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4823 break;
Charles MacNeill 5:89031b2f5316 4824 case VL53LX_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4825 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us =
Charles MacNeill 5:89031b2f5316 4826 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4827 break;
Charles MacNeill 5:89031b2f5316 4828 case VL53LX_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4829 pdev->tuning_parms.tp_phasecal_timeout_timed_us =
Charles MacNeill 5:89031b2f5316 4830 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4831 break;
Charles MacNeill 5:89031b2f5316 4832 case VL53LX_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4833 pdev->tuning_parms.tp_mm_timeout_lite_us =
Charles MacNeill 5:89031b2f5316 4834 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4835 break;
Charles MacNeill 5:89031b2f5316 4836 case VL53LX_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4837 pdev->tuning_parms.tp_mm_timeout_histo_us =
Charles MacNeill 5:89031b2f5316 4838 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4839 break;
Charles MacNeill 5:89031b2f5316 4840 case VL53LX_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4841 pdev->tuning_parms.tp_mm_timeout_mz_us =
Charles MacNeill 5:89031b2f5316 4842 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4843 break;
Charles MacNeill 5:89031b2f5316 4844 case VL53LX_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4845 pdev->tuning_parms.tp_mm_timeout_timed_us =
Charles MacNeill 5:89031b2f5316 4846 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4847 break;
Charles MacNeill 5:89031b2f5316 4848 case VL53LX_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4849 pdev->tuning_parms.tp_range_timeout_lite_us =
Charles MacNeill 5:89031b2f5316 4850 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4851 break;
Charles MacNeill 5:89031b2f5316 4852 case VL53LX_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4853 pdev->tuning_parms.tp_range_timeout_histo_us =
Charles MacNeill 5:89031b2f5316 4854 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4855 break;
Charles MacNeill 5:89031b2f5316 4856 case VL53LX_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4857 pdev->tuning_parms.tp_range_timeout_mz_us =
Charles MacNeill 5:89031b2f5316 4858 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4859 break;
Charles MacNeill 5:89031b2f5316 4860 case VL53LX_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4861 pdev->tuning_parms.tp_range_timeout_timed_us =
Charles MacNeill 5:89031b2f5316 4862 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4863 break;
Charles MacNeill 5:89031b2f5316 4864 case VL53LX_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN:
Charles MacNeill 5:89031b2f5316 4865 pdev->smudge_correct_config.smudge_margin =
Charles MacNeill 5:89031b2f5316 4866 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4867 break;
Charles MacNeill 5:89031b2f5316 4868 case VL53LX_TUNINGPARM_DYNXTALK_NOISE_MARGIN:
Charles MacNeill 5:89031b2f5316 4869 pdev->smudge_correct_config.noise_margin =
Charles MacNeill 5:89031b2f5316 4870 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4871 break;
Charles MacNeill 5:89031b2f5316 4872 case VL53LX_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT:
Charles MacNeill 5:89031b2f5316 4873 pdev->smudge_correct_config.user_xtalk_offset_limit =
Charles MacNeill 5:89031b2f5316 4874 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4875 break;
Charles MacNeill 5:89031b2f5316 4876 case VL53LX_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI:
Charles MacNeill 5:89031b2f5316 4877 pdev->smudge_correct_config.user_xtalk_offset_limit_hi =
Charles MacNeill 5:89031b2f5316 4878 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4879 break;
Charles MacNeill 5:89031b2f5316 4880 case VL53LX_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT:
Charles MacNeill 5:89031b2f5316 4881 pdev->smudge_correct_config.sample_limit =
Charles MacNeill 5:89031b2f5316 4882 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4883 break;
Charles MacNeill 5:89031b2f5316 4884 case VL53LX_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA:
Charles MacNeill 5:89031b2f5316 4885 pdev->smudge_correct_config.single_xtalk_delta =
Charles MacNeill 5:89031b2f5316 4886 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4887 break;
Charles MacNeill 5:89031b2f5316 4888 case VL53LX_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA:
Charles MacNeill 5:89031b2f5316 4889 pdev->smudge_correct_config.averaged_xtalk_delta =
Charles MacNeill 5:89031b2f5316 4890 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4891 break;
Charles MacNeill 5:89031b2f5316 4892 case VL53LX_TUNINGPARM_DYNXTALK_CLIP_LIMIT:
Charles MacNeill 5:89031b2f5316 4893 pdev->smudge_correct_config.smudge_corr_clip_limit =
Charles MacNeill 5:89031b2f5316 4894 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4895 break;
Charles MacNeill 5:89031b2f5316 4896 case VL53LX_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD:
Charles MacNeill 5:89031b2f5316 4897 pdev->smudge_correct_config.scaler_calc_method =
Charles MacNeill 5:89031b2f5316 4898 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4899 break;
Charles MacNeill 5:89031b2f5316 4900 case VL53LX_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER:
Charles MacNeill 5:89031b2f5316 4901 pdev->smudge_correct_config.x_gradient_scaler =
Charles MacNeill 5:89031b2f5316 4902 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4903 break;
Charles MacNeill 5:89031b2f5316 4904 case VL53LX_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER:
Charles MacNeill 5:89031b2f5316 4905 pdev->smudge_correct_config.y_gradient_scaler =
Charles MacNeill 5:89031b2f5316 4906 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4907 break;
Charles MacNeill 5:89031b2f5316 4908 case VL53LX_TUNINGPARM_DYNXTALK_USER_SCALER_SET:
Charles MacNeill 5:89031b2f5316 4909 pdev->smudge_correct_config.user_scaler_set =
Charles MacNeill 5:89031b2f5316 4910 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4911 break;
Charles MacNeill 5:89031b2f5316 4912
Charles MacNeill 5:89031b2f5316 4913 case VL53LX_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY:
Charles MacNeill 5:89031b2f5316 4914 pdev->smudge_correct_config.smudge_corr_single_apply =
Charles MacNeill 5:89031b2f5316 4915 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4916 break;
Charles MacNeill 5:89031b2f5316 4917 case VL53LX_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD:
Charles MacNeill 5:89031b2f5316 4918 pdev->smudge_correct_config.smudge_corr_ambient_threshold =
Charles MacNeill 5:89031b2f5316 4919 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4920 break;
Charles MacNeill 5:89031b2f5316 4921 case VL53LX_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS:
Charles MacNeill 5:89031b2f5316 4922 pdev->smudge_correct_config.nodetect_ambient_threshold =
Charles MacNeill 5:89031b2f5316 4923 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4924 break;
Charles MacNeill 5:89031b2f5316 4925 case VL53LX_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT:
Charles MacNeill 5:89031b2f5316 4926 pdev->smudge_correct_config.nodetect_sample_limit =
Charles MacNeill 5:89031b2f5316 4927 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4928 break;
Charles MacNeill 5:89031b2f5316 4929 case VL53LX_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS:
Charles MacNeill 5:89031b2f5316 4930 pdev->smudge_correct_config.nodetect_xtalk_offset =
Charles MacNeill 5:89031b2f5316 4931 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4932 break;
Charles MacNeill 5:89031b2f5316 4933 case VL53LX_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM:
Charles MacNeill 5:89031b2f5316 4934 pdev->smudge_correct_config.nodetect_min_range_mm =
Charles MacNeill 5:89031b2f5316 4935 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4936 break;
Charles MacNeill 5:89031b2f5316 4937 case VL53LX_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND:
Charles MacNeill 5:89031b2f5316 4938 pdev->low_power_auto_data.vhv_loop_bound =
Charles MacNeill 5:89031b2f5316 4939 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4940 break;
Charles MacNeill 5:89031b2f5316 4941 case VL53LX_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4942 pdev->tuning_parms.tp_mm_timeout_lpa_us =
Charles MacNeill 5:89031b2f5316 4943 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4944 break;
Charles MacNeill 5:89031b2f5316 4945 case VL53LX_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US:
Charles MacNeill 5:89031b2f5316 4946 pdev->tuning_parms.tp_range_timeout_lpa_us =
Charles MacNeill 5:89031b2f5316 4947 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4948 break;
Charles MacNeill 5:89031b2f5316 4949 case VL53LX_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS:
Charles MacNeill 5:89031b2f5316 4950 pdev->tuning_parms.tp_dss_target_very_short_mcps =
Charles MacNeill 5:89031b2f5316 4951 (uint16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4952 break;
Charles MacNeill 5:89031b2f5316 4953 case VL53LX_TUNINGPARM_PHASECAL_PATCH_POWER:
Charles MacNeill 5:89031b2f5316 4954 pdev->tuning_parms.tp_phasecal_patch_power =
Charles MacNeill 5:89031b2f5316 4955 (uint16_t) tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4956 break;
Charles MacNeill 5:89031b2f5316 4957 case VL53LX_TUNINGPARM_HIST_MERGE:
Charles MacNeill 5:89031b2f5316 4958 pdev->tuning_parms.tp_hist_merge =
Charles MacNeill 5:89031b2f5316 4959 (uint16_t) tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4960 break;
Charles MacNeill 5:89031b2f5316 4961 case VL53LX_TUNINGPARM_RESET_MERGE_THRESHOLD:
Charles MacNeill 5:89031b2f5316 4962 pdev->tuning_parms.tp_reset_merge_threshold =
Charles MacNeill 5:89031b2f5316 4963 (uint16_t) tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4964 break;
Charles MacNeill 5:89031b2f5316 4965 case VL53LX_TUNINGPARM_HIST_MERGE_MAX_SIZE:
Charles MacNeill 5:89031b2f5316 4966 pdev->tuning_parms.tp_hist_merge_max_size =
Charles MacNeill 5:89031b2f5316 4967 (uint16_t) tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4968 break;
Charles MacNeill 5:89031b2f5316 4969 case VL53LX_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR:
Charles MacNeill 5:89031b2f5316 4970 pdev->smudge_correct_config.max_smudge_factor =
Charles MacNeill 5:89031b2f5316 4971 (uint32_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4972 break;
Charles MacNeill 5:89031b2f5316 4973
Charles MacNeill 5:89031b2f5316 4974 case VL53LX_TUNINGPARM_UWR_ENABLE:
Charles MacNeill 5:89031b2f5316 4975 pdev->tuning_parms.tp_uwr_enable =
Charles MacNeill 5:89031b2f5316 4976 (uint8_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4977 break;
Charles MacNeill 5:89031b2f5316 4978 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN:
Charles MacNeill 5:89031b2f5316 4979 pdev->tuning_parms.tp_uwr_med_z_1_min =
Charles MacNeill 5:89031b2f5316 4980 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4981 break;
Charles MacNeill 5:89031b2f5316 4982 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX:
Charles MacNeill 5:89031b2f5316 4983 pdev->tuning_parms.tp_uwr_med_z_1_max =
Charles MacNeill 5:89031b2f5316 4984 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4985 break;
Charles MacNeill 5:89031b2f5316 4986 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN:
Charles MacNeill 5:89031b2f5316 4987 pdev->tuning_parms.tp_uwr_med_z_2_min =
Charles MacNeill 5:89031b2f5316 4988 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4989 break;
Charles MacNeill 5:89031b2f5316 4990 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX:
Charles MacNeill 5:89031b2f5316 4991 pdev->tuning_parms.tp_uwr_med_z_2_max =
Charles MacNeill 5:89031b2f5316 4992 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4993 break;
Charles MacNeill 5:89031b2f5316 4994 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN:
Charles MacNeill 5:89031b2f5316 4995 pdev->tuning_parms.tp_uwr_med_z_3_min =
Charles MacNeill 5:89031b2f5316 4996 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 4997 break;
Charles MacNeill 5:89031b2f5316 4998 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX:
Charles MacNeill 5:89031b2f5316 4999 pdev->tuning_parms.tp_uwr_med_z_3_max =
Charles MacNeill 5:89031b2f5316 5000 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5001 break;
Charles MacNeill 5:89031b2f5316 5002 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN:
Charles MacNeill 5:89031b2f5316 5003 pdev->tuning_parms.tp_uwr_med_z_4_min =
Charles MacNeill 5:89031b2f5316 5004 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5005 break;
Charles MacNeill 5:89031b2f5316 5006 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX:
Charles MacNeill 5:89031b2f5316 5007 pdev->tuning_parms.tp_uwr_med_z_4_max =
Charles MacNeill 5:89031b2f5316 5008 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5009 break;
Charles MacNeill 5:89031b2f5316 5010 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN:
Charles MacNeill 5:89031b2f5316 5011 pdev->tuning_parms.tp_uwr_med_z_5_min =
Charles MacNeill 5:89031b2f5316 5012 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5013 break;
Charles MacNeill 5:89031b2f5316 5014 case VL53LX_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX:
Charles MacNeill 5:89031b2f5316 5015 pdev->tuning_parms.tp_uwr_med_z_5_max =
Charles MacNeill 5:89031b2f5316 5016 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5017 break;
Charles MacNeill 5:89031b2f5316 5018 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA:
Charles MacNeill 5:89031b2f5316 5019 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea =
Charles MacNeill 5:89031b2f5316 5020 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5021 break;
Charles MacNeill 5:89031b2f5316 5022 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB:
Charles MacNeill 5:89031b2f5316 5023 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb =
Charles MacNeill 5:89031b2f5316 5024 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5025 break;
Charles MacNeill 5:89031b2f5316 5026 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA:
Charles MacNeill 5:89031b2f5316 5027 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea =
Charles MacNeill 5:89031b2f5316 5028 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5029 break;
Charles MacNeill 5:89031b2f5316 5030 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB:
Charles MacNeill 5:89031b2f5316 5031 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb =
Charles MacNeill 5:89031b2f5316 5032 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5033 break;
Charles MacNeill 5:89031b2f5316 5034 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA:
Charles MacNeill 5:89031b2f5316 5035 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea =
Charles MacNeill 5:89031b2f5316 5036 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5037 break;
Charles MacNeill 5:89031b2f5316 5038 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB:
Charles MacNeill 5:89031b2f5316 5039 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb =
Charles MacNeill 5:89031b2f5316 5040 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5041 break;
Charles MacNeill 5:89031b2f5316 5042 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA:
Charles MacNeill 5:89031b2f5316 5043 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea =
Charles MacNeill 5:89031b2f5316 5044 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5045 break;
Charles MacNeill 5:89031b2f5316 5046 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB:
Charles MacNeill 5:89031b2f5316 5047 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb =
Charles MacNeill 5:89031b2f5316 5048 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5049 break;
Charles MacNeill 5:89031b2f5316 5050 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA:
Charles MacNeill 5:89031b2f5316 5051 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea =
Charles MacNeill 5:89031b2f5316 5052 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5053 break;
Charles MacNeill 5:89031b2f5316 5054 case VL53LX_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB:
Charles MacNeill 5:89031b2f5316 5055 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb =
Charles MacNeill 5:89031b2f5316 5056 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5057 break;
Charles MacNeill 5:89031b2f5316 5058 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_1_MIN:
Charles MacNeill 5:89031b2f5316 5059 pdev->tuning_parms.tp_uwr_lng_z_1_min =
Charles MacNeill 5:89031b2f5316 5060 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5061 break;
Charles MacNeill 5:89031b2f5316 5062 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_1_MAX:
Charles MacNeill 5:89031b2f5316 5063 pdev->tuning_parms.tp_uwr_lng_z_1_max =
Charles MacNeill 5:89031b2f5316 5064 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5065 break;
Charles MacNeill 5:89031b2f5316 5066 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_2_MIN:
Charles MacNeill 5:89031b2f5316 5067 pdev->tuning_parms.tp_uwr_lng_z_2_min =
Charles MacNeill 5:89031b2f5316 5068 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5069 break;
Charles MacNeill 5:89031b2f5316 5070 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_2_MAX:
Charles MacNeill 5:89031b2f5316 5071 pdev->tuning_parms.tp_uwr_lng_z_2_max =
Charles MacNeill 5:89031b2f5316 5072 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5073 break;
Charles MacNeill 5:89031b2f5316 5074 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_3_MIN:
Charles MacNeill 5:89031b2f5316 5075 pdev->tuning_parms.tp_uwr_lng_z_3_min =
Charles MacNeill 5:89031b2f5316 5076 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5077 break;
Charles MacNeill 5:89031b2f5316 5078 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_3_MAX:
Charles MacNeill 5:89031b2f5316 5079 pdev->tuning_parms.tp_uwr_lng_z_3_max =
Charles MacNeill 5:89031b2f5316 5080 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5081 break;
Charles MacNeill 5:89031b2f5316 5082 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_4_MIN:
Charles MacNeill 5:89031b2f5316 5083 pdev->tuning_parms.tp_uwr_lng_z_4_min =
Charles MacNeill 5:89031b2f5316 5084 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5085 break;
Charles MacNeill 5:89031b2f5316 5086 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_4_MAX:
Charles MacNeill 5:89031b2f5316 5087 pdev->tuning_parms.tp_uwr_lng_z_4_max =
Charles MacNeill 5:89031b2f5316 5088 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5089 break;
Charles MacNeill 5:89031b2f5316 5090 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_5_MIN:
Charles MacNeill 5:89031b2f5316 5091 pdev->tuning_parms.tp_uwr_lng_z_5_min =
Charles MacNeill 5:89031b2f5316 5092 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5093 break;
Charles MacNeill 5:89031b2f5316 5094 case VL53LX_TUNINGPARM_UWR_LONG_ZONE_5_MAX:
Charles MacNeill 5:89031b2f5316 5095 pdev->tuning_parms.tp_uwr_lng_z_5_max =
Charles MacNeill 5:89031b2f5316 5096 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5097 break;
Charles MacNeill 5:89031b2f5316 5098 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA:
Charles MacNeill 5:89031b2f5316 5099 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea =
Charles MacNeill 5:89031b2f5316 5100 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5101 break;
Charles MacNeill 5:89031b2f5316 5102 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB:
Charles MacNeill 5:89031b2f5316 5103 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb =
Charles MacNeill 5:89031b2f5316 5104 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5105 break;
Charles MacNeill 5:89031b2f5316 5106 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA:
Charles MacNeill 5:89031b2f5316 5107 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea =
Charles MacNeill 5:89031b2f5316 5108 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5109 break;
Charles MacNeill 5:89031b2f5316 5110 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB:
Charles MacNeill 5:89031b2f5316 5111 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb =
Charles MacNeill 5:89031b2f5316 5112 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5113 break;
Charles MacNeill 5:89031b2f5316 5114 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA:
Charles MacNeill 5:89031b2f5316 5115 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea =
Charles MacNeill 5:89031b2f5316 5116 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5117 break;
Charles MacNeill 5:89031b2f5316 5118 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB:
Charles MacNeill 5:89031b2f5316 5119 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb =
Charles MacNeill 5:89031b2f5316 5120 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5121 break;
Charles MacNeill 5:89031b2f5316 5122 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA:
Charles MacNeill 5:89031b2f5316 5123 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea =
Charles MacNeill 5:89031b2f5316 5124 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5125 break;
Charles MacNeill 5:89031b2f5316 5126 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB:
Charles MacNeill 5:89031b2f5316 5127 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb =
Charles MacNeill 5:89031b2f5316 5128 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5129 break;
Charles MacNeill 5:89031b2f5316 5130 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA:
Charles MacNeill 5:89031b2f5316 5131 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea =
Charles MacNeill 5:89031b2f5316 5132 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5133 break;
Charles MacNeill 5:89031b2f5316 5134 case VL53LX_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB:
Charles MacNeill 5:89031b2f5316 5135 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb =
Charles MacNeill 5:89031b2f5316 5136 (int16_t)tuning_parm_value;
Charles MacNeill 5:89031b2f5316 5137 break;
Charles MacNeill 5:89031b2f5316 5138
Charles MacNeill 5:89031b2f5316 5139 default:
Charles MacNeill 5:89031b2f5316 5140 status = VL53LX_ERROR_INVALID_PARAMS;
Charles MacNeill 5:89031b2f5316 5141 break;
Charles MacNeill 5:89031b2f5316 5142
Charles MacNeill 5:89031b2f5316 5143 }
Charles MacNeill 5:89031b2f5316 5144
Charles MacNeill 5:89031b2f5316 5145 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5146
Charles MacNeill 5:89031b2f5316 5147 return status;
Charles MacNeill 5:89031b2f5316 5148 }
Charles MacNeill 5:89031b2f5316 5149
Charles MacNeill 5:89031b2f5316 5150
Charles MacNeill 5:89031b2f5316 5151
Charles MacNeill 5:89031b2f5316 5152
Charles MacNeill 5:89031b2f5316 5153
Charles MacNeill 5:89031b2f5316 5154 VL53LX_Error VL53LX_dynamic_xtalk_correction_enable(
Charles MacNeill 5:89031b2f5316 5155 VL53LX_DEV Dev
Charles MacNeill 5:89031b2f5316 5156 )
Charles MacNeill 5:89031b2f5316 5157 {
Charles MacNeill 5:89031b2f5316 5158
Charles MacNeill 5:89031b2f5316 5159
Charles MacNeill 5:89031b2f5316 5160
Charles MacNeill 5:89031b2f5316 5161 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 5162
Charles MacNeill 5:89031b2f5316 5163 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 5164
Charles MacNeill 5:89031b2f5316 5165 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 5166
Charles MacNeill 5:89031b2f5316 5167 pdev->smudge_correct_config.smudge_corr_enabled = 1;
Charles MacNeill 5:89031b2f5316 5168
Charles MacNeill 5:89031b2f5316 5169 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5170
Charles MacNeill 5:89031b2f5316 5171 return status;
Charles MacNeill 5:89031b2f5316 5172 }
Charles MacNeill 5:89031b2f5316 5173
Charles MacNeill 5:89031b2f5316 5174 VL53LX_Error VL53LX_dynamic_xtalk_correction_disable(
Charles MacNeill 5:89031b2f5316 5175 VL53LX_DEV Dev
Charles MacNeill 5:89031b2f5316 5176 )
Charles MacNeill 5:89031b2f5316 5177 {
Charles MacNeill 5:89031b2f5316 5178
Charles MacNeill 5:89031b2f5316 5179
Charles MacNeill 5:89031b2f5316 5180
Charles MacNeill 5:89031b2f5316 5181 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 5182
Charles MacNeill 5:89031b2f5316 5183 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 5184
Charles MacNeill 5:89031b2f5316 5185 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 5186
Charles MacNeill 5:89031b2f5316 5187 pdev->smudge_correct_config.smudge_corr_enabled = 0;
Charles MacNeill 5:89031b2f5316 5188
Charles MacNeill 5:89031b2f5316 5189 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5190
Charles MacNeill 5:89031b2f5316 5191 return status;
Charles MacNeill 5:89031b2f5316 5192 }
Charles MacNeill 5:89031b2f5316 5193
Charles MacNeill 5:89031b2f5316 5194 VL53LX_Error VL53LX_dynamic_xtalk_correction_apply_disable(
Charles MacNeill 5:89031b2f5316 5195 VL53LX_DEV Dev
Charles MacNeill 5:89031b2f5316 5196 )
Charles MacNeill 5:89031b2f5316 5197 {
Charles MacNeill 5:89031b2f5316 5198
Charles MacNeill 5:89031b2f5316 5199
Charles MacNeill 5:89031b2f5316 5200
Charles MacNeill 5:89031b2f5316 5201 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 5202
Charles MacNeill 5:89031b2f5316 5203 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 5204
Charles MacNeill 5:89031b2f5316 5205 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 5206
Charles MacNeill 5:89031b2f5316 5207 pdev->smudge_correct_config.smudge_corr_apply_enabled = 0;
Charles MacNeill 5:89031b2f5316 5208
Charles MacNeill 5:89031b2f5316 5209 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5210
Charles MacNeill 5:89031b2f5316 5211 return status;
Charles MacNeill 5:89031b2f5316 5212 }
Charles MacNeill 5:89031b2f5316 5213
Charles MacNeill 5:89031b2f5316 5214 VL53LX_Error VL53LX_dynamic_xtalk_correction_single_apply_enable(
Charles MacNeill 5:89031b2f5316 5215 VL53LX_DEV Dev
Charles MacNeill 5:89031b2f5316 5216 )
Charles MacNeill 5:89031b2f5316 5217 {
Charles MacNeill 5:89031b2f5316 5218
Charles MacNeill 5:89031b2f5316 5219
Charles MacNeill 5:89031b2f5316 5220
Charles MacNeill 5:89031b2f5316 5221 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 5222
Charles MacNeill 5:89031b2f5316 5223 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 5224
Charles MacNeill 5:89031b2f5316 5225 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 5226
Charles MacNeill 5:89031b2f5316 5227 pdev->smudge_correct_config.smudge_corr_single_apply = 1;
Charles MacNeill 5:89031b2f5316 5228
Charles MacNeill 5:89031b2f5316 5229 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5230
Charles MacNeill 5:89031b2f5316 5231 return status;
Charles MacNeill 5:89031b2f5316 5232 }
Charles MacNeill 5:89031b2f5316 5233
Charles MacNeill 5:89031b2f5316 5234 VL53LX_Error VL53LX_dynamic_xtalk_correction_single_apply_disable(
Charles MacNeill 5:89031b2f5316 5235 VL53LX_DEV Dev
Charles MacNeill 5:89031b2f5316 5236 )
Charles MacNeill 5:89031b2f5316 5237 {
Charles MacNeill 5:89031b2f5316 5238
Charles MacNeill 5:89031b2f5316 5239
Charles MacNeill 5:89031b2f5316 5240
Charles MacNeill 5:89031b2f5316 5241 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 5242
Charles MacNeill 5:89031b2f5316 5243 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 5244
Charles MacNeill 5:89031b2f5316 5245 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 5246
Charles MacNeill 5:89031b2f5316 5247 pdev->smudge_correct_config.smudge_corr_single_apply = 0;
Charles MacNeill 5:89031b2f5316 5248
Charles MacNeill 5:89031b2f5316 5249 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5250
Charles MacNeill 5:89031b2f5316 5251 return status;
Charles MacNeill 5:89031b2f5316 5252 }
Charles MacNeill 5:89031b2f5316 5253
Charles MacNeill 5:89031b2f5316 5254
Charles MacNeill 5:89031b2f5316 5255 VL53LX_Error VL53LX_dynamic_xtalk_correction_apply_enable(
Charles MacNeill 5:89031b2f5316 5256 VL53LX_DEV Dev
Charles MacNeill 5:89031b2f5316 5257 )
Charles MacNeill 5:89031b2f5316 5258 {
Charles MacNeill 5:89031b2f5316 5259
Charles MacNeill 5:89031b2f5316 5260
Charles MacNeill 5:89031b2f5316 5261
Charles MacNeill 5:89031b2f5316 5262 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 5263
Charles MacNeill 5:89031b2f5316 5264 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 5265
Charles MacNeill 5:89031b2f5316 5266 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 5267
Charles MacNeill 5:89031b2f5316 5268 pdev->smudge_correct_config.smudge_corr_apply_enabled = 1;
Charles MacNeill 5:89031b2f5316 5269
Charles MacNeill 5:89031b2f5316 5270 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5271
Charles MacNeill 5:89031b2f5316 5272 return status;
Charles MacNeill 5:89031b2f5316 5273 }
Charles MacNeill 5:89031b2f5316 5274
Charles MacNeill 5:89031b2f5316 5275
Charles MacNeill 5:89031b2f5316 5276
Charles MacNeill 5:89031b2f5316 5277
Charles MacNeill 5:89031b2f5316 5278
Charles MacNeill 5:89031b2f5316 5279
Charles MacNeill 5:89031b2f5316 5280 VL53LX_Error VL53LX_get_current_xtalk_settings(
Charles MacNeill 5:89031b2f5316 5281 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 5282 VL53LX_xtalk_calibration_results_t *pxtalk
Charles MacNeill 5:89031b2f5316 5283 )
Charles MacNeill 5:89031b2f5316 5284 {
Charles MacNeill 5:89031b2f5316 5285
Charles MacNeill 5:89031b2f5316 5286
Charles MacNeill 5:89031b2f5316 5287 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 5288 uint8_t i;
Charles MacNeill 5:89031b2f5316 5289
Charles MacNeill 5:89031b2f5316 5290 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 5291
Charles MacNeill 5:89031b2f5316 5292 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 5293
Charles MacNeill 5:89031b2f5316 5294 pxtalk->algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 5295 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps;
Charles MacNeill 5:89031b2f5316 5296 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 5297 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 5298 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 5299 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 5300 for (i = 0; i < VL53LX_BIN_REC_SIZE; i++)
Charles MacNeill 5:89031b2f5316 5301 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i] =
Charles MacNeill 5:89031b2f5316 5302 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i];
Charles MacNeill 5:89031b2f5316 5303
Charles MacNeill 5:89031b2f5316 5304 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5305
Charles MacNeill 5:89031b2f5316 5306 return status;
Charles MacNeill 5:89031b2f5316 5307
Charles MacNeill 5:89031b2f5316 5308 }
Charles MacNeill 5:89031b2f5316 5309
Charles MacNeill 5:89031b2f5316 5310
Charles MacNeill 5:89031b2f5316 5311
Charles MacNeill 5:89031b2f5316 5312
Charles MacNeill 5:89031b2f5316 5313
Charles MacNeill 5:89031b2f5316 5314 VL53LX_Error VL53LX_set_current_xtalk_settings(
Charles MacNeill 5:89031b2f5316 5315 VL53LX_DEV Dev,
Charles MacNeill 5:89031b2f5316 5316 VL53LX_xtalk_calibration_results_t *pxtalk
Charles MacNeill 5:89031b2f5316 5317 )
Charles MacNeill 5:89031b2f5316 5318 {
Charles MacNeill 5:89031b2f5316 5319
Charles MacNeill 5:89031b2f5316 5320 uint8_t i;
Charles MacNeill 5:89031b2f5316 5321 VL53LX_Error status = VL53LX_ERROR_NONE;
Charles MacNeill 5:89031b2f5316 5322
Charles MacNeill 5:89031b2f5316 5323 VL53LX_LLDriverData_t *pdev = VL53LXDevStructGetLLDriverHandle(Dev);
Charles MacNeill 5:89031b2f5316 5324
Charles MacNeill 5:89031b2f5316 5325 LOG_FUNCTION_START("");
Charles MacNeill 5:89031b2f5316 5326
Charles MacNeill 5:89031b2f5316 5327 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps =
Charles MacNeill 5:89031b2f5316 5328 pxtalk->algo__crosstalk_compensation_plane_offset_kcps;
Charles MacNeill 5:89031b2f5316 5329 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 5330 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 5331 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps =
Charles MacNeill 5:89031b2f5316 5332 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps;
Charles MacNeill 5:89031b2f5316 5333 for (i = 0; i < VL53LX_BIN_REC_SIZE; i++)
Charles MacNeill 5:89031b2f5316 5334 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i] =
Charles MacNeill 5:89031b2f5316 5335 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i];
Charles MacNeill 5:89031b2f5316 5336
Charles MacNeill 5:89031b2f5316 5337 LOG_FUNCTION_END(status);
Charles MacNeill 5:89031b2f5316 5338
Charles MacNeill 5:89031b2f5316 5339 return status;
Charles MacNeill 5:89031b2f5316 5340
Charles MacNeill 5:89031b2f5316 5341 }
Charles MacNeill 5:89031b2f5316 5342
Charles MacNeill 5:89031b2f5316 5343
Charles MacNeill 5:89031b2f5316 5344