vl53l1_register_settings.h

00001 
00002 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
00003 /******************************************************************************
00004  * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
00005 
00006  This file is part of VL53L1 and is dual licensed,
00007  either GPL-2.0+
00008  or 'BSD 3-clause "New" or "Revised" License' , at your option.
00009  ******************************************************************************
00010  */
00011 
00012 
00013 
00014 
00015 #ifndef _VL53L1_REGISTER_SETTINGS_H_
00016 #define _VL53L1_REGISTER_SETTINGS_H_
00017 
00018 
00019 
00020 
00021 
00022 
00023 #define VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO  0x00
00024 #define VL53L1_DEVICESCHEDULERMODE_STREAMING    0x01
00025 #define VL53L1_DEVICESCHEDULERMODE_HISTOGRAM    0x02
00026 
00027 
00028 
00029 
00030 
00031 #define VL53L1_DEVICEREADOUTMODE_SINGLE_SD        (0x00 << 2)
00032 #define VL53L1_DEVICEREADOUTMODE_DUAL_SD          (0x01 << 2)
00033 #define VL53L1_DEVICEREADOUTMODE_SPLIT_READOUT    (0x02 << 2)
00034 #define VL53L1_DEVICEREADOUTMODE_SPLIT_MANUAL     (0x03 << 2)
00035 
00036 
00037 
00038 
00039 
00040 
00041 #define VL53L1_DEVICEMEASUREMENTMODE_MODE_MASK          0xF0
00042 #define VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK          0x0F
00043 
00044 #define VL53L1_GROUPEDPARAMETERHOLD_ID_MASK             0x02
00045 
00046 
00047 
00048 #define VL53L1_EWOK_I2C_DEV_ADDR_DEFAULT                0x29
00049 
00050 #define VL53L1_OSC_FREQUENCY                            0x00
00051 #define VL53L1_OSC_TRIM_DEFAULT                         0x00
00052 #define VL53L1_OSC_FREQ_SET_DEFAULT                     0x00
00053 
00054 #define VL53L1_RANGE_HISTOGRAM_REF                      0x08
00055 #define VL53L1_RANGE_HISTOGRAM_RET                      0x10
00056 #define VL53L1_RANGE_HISTOGRAM_BOTH                     0x18
00057 #define VL53L1_RANGE_HISTOGRAM_INIT                     0x20
00058 #define VL53L1_RANGE_VHV_INIT                           0x40
00059 
00060 
00061 #define VL53L1_RESULT_RANGE_STATUS                      0x1F
00062 
00063 
00064 #define VL53L1_SYSTEM__SEED_CONFIG__MANUAL              0x00
00065 #define VL53L1_SYSTEM__SEED_CONFIG__STANDARD            0x01
00066 #define VL53L1_SYSTEM__SEED_CONFIG__EVEN_UPDATE_ONLY    0x02
00067 
00068 
00069 #define VL53L1_INTERRUPT_CONFIG_LEVEL_LOW               0x00
00070 #define VL53L1_INTERRUPT_CONFIG_LEVEL_HIGH              0x01
00071 #define VL53L1_INTERRUPT_CONFIG_OUT_OF_WINDOW           0x02
00072 #define VL53L1_INTERRUPT_CONFIG_IN_WINDOW               0x03
00073 #define VL53L1_INTERRUPT_CONFIG_NEW_SAMPLE_READY        0x20
00074 
00075 
00076 #define VL53L1_CLEAR_RANGE_INT                          0x01
00077 #define VL53L1_CLEAR_ERROR_INT                          0x02
00078 
00079 
00080 #define VL53L1_SEQUENCE_VHV_EN                          0x01
00081 #define VL53L1_SEQUENCE_PHASECAL_EN                     0x02
00082 #define VL53L1_SEQUENCE_REFERENCE_PHASE_EN              0x04
00083 #define VL53L1_SEQUENCE_DSS1_EN                         0x08
00084 #define VL53L1_SEQUENCE_DSS2_EN                         0x10
00085 #define VL53L1_SEQUENCE_MM1_EN                          0x20
00086 #define VL53L1_SEQUENCE_MM2_EN                          0x40
00087 #define VL53L1_SEQUENCE_RANGE_EN                        0x80
00088 
00089 
00090 #define VL53L1_DSS_CONTROL__ROI_SUBTRACT                0x20
00091 #define VL53L1_DSS_CONTROL__ROI_INTERSECT               0x10
00092 
00093 #define VL53L1_DSS_CONTROL__MODE_DISABLED               0x00
00094 #define VL53L1_DSS_CONTROL__MODE_TARGET_RATE            0x01
00095 #define VL53L1_DSS_CONTROL__MODE_EFFSPADS               0x02
00096 #define VL53L1_DSS_CONTROL__MODE_BLOCKSELECT            0x03
00097 
00098 
00099 
00100 #define VL53L1_RANGING_CORE__SPAD_READOUT__STANDARD              0x45
00101 #define VL53L1_RANGING_CORE__SPAD_READOUT__RETURN_ARRAY_ONLY     0x05
00102 #define VL53L1_RANGING_CORE__SPAD_READOUT__REFERENCE_ARRAY_ONLY  0x55
00103 #define VL53L1_RANGING_CORE__SPAD_READOUT__RETURN_SPLIT_ARRAY    0x25
00104 #define VL53L1_RANGING_CORE__SPAD_READOUT__CALIB_PULSES          0xF5
00105 
00106 
00107 #define VL53L1_LASER_SAFETY__KEY_VALUE                  0x6C
00108 
00109 
00110 
00111 #define VL53L1_RANGE_STATUS__RANGE_STATUS_MASK          0x1F
00112 #define VL53L1_RANGE_STATUS__MAX_THRESHOLD_HIT_MASK     0x20
00113 #define VL53L1_RANGE_STATUS__MIN_THRESHOLD_HIT_MASK     0x40
00114 #define VL53L1_RANGE_STATUS__GPH_ID_RANGE_STATUS_MASK   0x80
00115 
00116 
00117 
00118 #define VL53L1_INTERRUPT_STATUS__INT_STATUS_MASK            0x07
00119 #define VL53L1_INTERRUPT_STATUS__INT_ERROR_STATUS_MASK      0x18
00120 #define VL53L1_INTERRUPT_STATUS__GPH_ID_INT_STATUS_MASK     0x20
00121 
00122 
00123 
00124 
00125 #endif
00126 
00127 
00128 
00129 
00130