ST Expansion SW Team
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VL53L1
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Dependencies: X_NUCLEO_COMMON ST_INTERFACES
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vl53l1_nvm_map.h
00001 00002 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ 00003 /****************************************************************************** 00004 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved 00005 00006 This file is part of VL53L1 and is dual licensed, 00007 either GPL-2.0+ 00008 or 'BSD 3-clause "New" or "Revised" License' , at your option. 00009 ****************************************************************************** 00010 */ 00011 00012 00013 00014 00015 00016 00017 00018 #ifndef _VL53L1_NVM_MAP_H_ 00019 #define _VL53L1_NVM_MAP_H_ 00020 00021 00022 #ifdef __cplusplus 00023 extern "C" 00024 { 00025 #endif 00026 00027 00028 00029 00030 #define VL53L1_NVM__IDENTIFICATION__MODEL_ID 0x0008 00031 00032 #define VL53L1_NVM__IDENTIFICATION__MODULE_TYPE 0x000C 00033 00034 #define VL53L1_NVM__IDENTIFICATION__REVISION_ID 0x000D 00035 00036 #define VL53L1_NVM__IDENTIFICATION__MODULE_ID 0x000E 00037 00038 #define VL53L1_NVM__I2C_VALID 0x0010 00039 00040 #define VL53L1_NVM__I2C_SLAVE__DEVICE_ADDRESS 0x0011 00041 00042 #define VL53L1_NVM__EWS__OSC_MEASURED__FAST_OSC_FREQUENCY 0x0014 00043 00044 #define VL53L1_NVM__EWS__FAST_OSC_TRIM_MAX 0x0016 00045 00046 #define VL53L1_NVM__EWS__FAST_OSC_FREQ_SET 0x0017 00047 00048 #define VL53L1_NVM__EWS__SLOW_OSC_CALIBRATION 0x0018 00049 00050 #define VL53L1_NVM__FMT__OSC_MEASURED__FAST_OSC_FREQUENCY 0x001C 00051 00052 #define VL53L1_NVM__FMT__FAST_OSC_TRIM_MAX 0x001E 00053 00054 #define VL53L1_NVM__FMT__FAST_OSC_FREQ_SET 0x001F 00055 00056 #define VL53L1_NVM__FMT__SLOW_OSC_CALIBRATION 0x0020 00057 00058 #define VL53L1_NVM__VHV_CONFIG_UNLOCK 0x0028 00059 00060 #define VL53L1_NVM__REF_SELVDDPIX 0x0029 00061 00062 #define VL53L1_NVM__REF_SELVQUENCH 0x002A 00063 00064 #define VL53L1_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL 0x002B 00065 00066 #define VL53L1_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x002C 00067 00068 #define VL53L1_NVM__VHV_CONFIG__COUNT_THRESH 0x002D 00069 00070 #define VL53L1_NVM__VHV_CONFIG__OFFSET 0x002E 00071 00072 #define VL53L1_NVM__VHV_CONFIG__INIT 0x002F 00073 00074 #define VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LL 0x0030 00075 00076 #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LL 0x0031 00077 00078 #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LL 0x0032 00079 00080 #define VL53L1_NVM__LASER_SAFETY__MULT_LL 0x0034 00081 00082 #define VL53L1_NVM__LASER_SAFETY__CLIP_LL 0x0035 00083 00084 #define VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LD 0x0038 00085 00086 #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LD 0x0039 00087 00088 #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LD 0x003A 00089 00090 #define VL53L1_NVM__LASER_SAFETY__MULT_LD 0x003C 00091 00092 #define VL53L1_NVM__LASER_SAFETY__CLIP_LD 0x003D 00093 00094 #define VL53L1_NVM__LASER_SAFETY_LOCK_BYTE 0x0040 00095 00096 #define VL53L1_NVM__LASER_SAFETY_UNLOCK_BYTE 0x0044 00097 00098 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_0_ 0x0048 00099 00100 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_1_ 0x0049 00101 00102 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_2_ 0x004A 00103 00104 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_3_ 0x004B 00105 00106 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_4_ 0x004C 00107 00108 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_5_ 0x004D 00109 00110 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_6_ 0x004E 00111 00112 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_7_ 0x004F 00113 00114 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_8_ 0x0050 00115 00116 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_9_ 0x0051 00117 00118 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_10_ 0x0052 00119 00120 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_11_ 0x0053 00121 00122 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_12_ 0x0054 00123 00124 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_13_ 0x0055 00125 00126 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_14_ 0x0056 00127 00128 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_15_ 0x0057 00129 00130 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_16_ 0x0058 00131 00132 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_17_ 0x0059 00133 00134 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_18_ 0x005A 00135 00136 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_19_ 0x005B 00137 00138 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_20_ 0x005C 00139 00140 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_21_ 0x005D 00141 00142 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_22_ 0x005E 00143 00144 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_23_ 0x005F 00145 00146 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_24_ 0x0060 00147 00148 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_25_ 0x0061 00149 00150 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_26_ 0x0062 00151 00152 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_27_ 0x0063 00153 00154 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_28_ 0x0064 00155 00156 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_29_ 0x0065 00157 00158 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_30_ 0x0066 00159 00160 #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_31_ 0x0067 00161 00162 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_0_ 0x0068 00163 00164 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_1_ 0x0069 00165 00166 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_2_ 0x006A 00167 00168 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_3_ 0x006B 00169 00170 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_4_ 0x006C 00171 00172 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_5_ 0x006D 00173 00174 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_0_ 0x0070 00175 00176 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_1_ 0x0071 00177 00178 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_2_ 0x0072 00179 00180 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_3_ 0x0073 00181 00182 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_4_ 0x0074 00183 00184 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_5_ 0x0075 00185 00186 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_0_ 0x0078 00187 00188 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_1_ 0x0079 00189 00190 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_2_ 0x007A 00191 00192 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_3_ 0x007B 00193 00194 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_4_ 0x007C 00195 00196 #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_5_ 0x007D 00197 00198 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_0_ 0x0080 00199 00200 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_1_ 0x0081 00201 00202 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_2_ 0x0082 00203 00204 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_3_ 0x0083 00205 00206 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_4_ 0x0084 00207 00208 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_5_ 0x0085 00209 00210 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_6_ 0x0086 00211 00212 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_7_ 0x0087 00213 00214 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_8_ 0x0088 00215 00216 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_9_ 0x0089 00217 00218 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_10_ 0x008A 00219 00220 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_11_ 0x008B 00221 00222 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_12_ 0x008C 00223 00224 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_13_ 0x008D 00225 00226 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_14_ 0x008E 00227 00228 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_15_ 0x008F 00229 00230 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_16_ 0x0090 00231 00232 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_17_ 0x0091 00233 00234 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_18_ 0x0092 00235 00236 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_19_ 0x0093 00237 00238 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_20_ 0x0094 00239 00240 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_21_ 0x0095 00241 00242 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_22_ 0x0096 00243 00244 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_23_ 0x0097 00245 00246 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_24_ 0x0098 00247 00248 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_25_ 0x0099 00249 00250 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_26_ 0x009A 00251 00252 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_27_ 0x009B 00253 00254 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_28_ 0x009C 00255 00256 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_29_ 0x009D 00257 00258 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_30_ 0x009E 00259 00260 #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_31_ 0x009F 00261 00262 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_0_ 0x00A0 00263 00264 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_1_ 0x00A1 00265 00266 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_2_ 0x00A2 00267 00268 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_3_ 0x00A3 00269 00270 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_4_ 0x00A4 00271 00272 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_5_ 0x00A5 00273 00274 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_0_ 0x00A8 00275 00276 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_1_ 0x00A9 00277 00278 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_2_ 0x00AA 00279 00280 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_3_ 0x00AB 00281 00282 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_4_ 0x00AC 00283 00284 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_5_ 0x00AD 00285 00286 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_0_ 0x00B0 00287 00288 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_1_ 0x00B1 00289 00290 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_2_ 0x00B2 00291 00292 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_3_ 0x00B3 00293 00294 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_4_ 0x00B4 00295 00296 #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_5_ 0x00B5 00297 00298 #define VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x00B8 00299 00300 #define VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE 0x00B9 00301 00302 #define VL53L1_NVM__FMT__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD 0x00BC 00303 00304 #define VL53L1_NVM__FMT__REF_SPAD_MAN__REF_LOCATION 0x00BD 00305 00306 #define VL53L1_NVM__FMT__MM_CONFIG__INNER_OFFSET_MM 0x00C0 00307 00308 #define VL53L1_NVM__FMT__MM_CONFIG__OUTER_OFFSET_MM 0x00C2 00309 00310 #define VL53L1_NVM__FMT__ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x00C4 00311 00312 #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x00C8 00313 00314 #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS \ 00315 0x00CA 00316 00317 #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS \ 00318 0x00CC 00319 00320 #define VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0 0x00CE 00321 00322 #define VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1 0x00CF 00323 00324 #define VL53L1_NVM__CUSTOMER_NVM_SPACE_PROGRAMMED 0x00E0 00325 00326 #define VL53L1_NVM__CUST__I2C_SLAVE__DEVICE_ADDRESS 0x00E4 00327 00328 #define VL53L1_NVM__CUST__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD 0x00E8 00329 00330 #define VL53L1_NVM__CUST__REF_SPAD_MAN__REF_LOCATION 0x00E9 00331 00332 #define VL53L1_NVM__CUST__MM_CONFIG__INNER_OFFSET_MM 0x00EC 00333 00334 #define VL53L1_NVM__CUST__MM_CONFIG__OUTER_OFFSET_MM 0x00EE 00335 00336 #define VL53L1_NVM__CUST__ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x00F0 00337 00338 #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x00F4 00339 00340 #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS \ 00341 0x00F6 00342 00343 #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS \ 00344 0x00F8 00345 00346 #define VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0 0x00FA 00347 00348 #define VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1 0x00FB 00349 00350 #define VL53L1_NVM__FMT__FGC__BYTE_0 0x01DC 00351 00352 #define VL53L1_NVM__FMT__FGC__BYTE_1 0x01DD 00353 00354 #define VL53L1_NVM__FMT__FGC__BYTE_2 0x01DE 00355 00356 #define VL53L1_NVM__FMT__FGC__BYTE_3 0x01DF 00357 00358 #define VL53L1_NVM__FMT__FGC__BYTE_4 0x01E0 00359 00360 #define VL53L1_NVM__FMT__FGC__BYTE_5 0x01E1 00361 00362 #define VL53L1_NVM__FMT__FGC__BYTE_6 0x01E2 00363 00364 #define VL53L1_NVM__FMT__FGC__BYTE_7 0x01E3 00365 00366 #define VL53L1_NVM__FMT__FGC__BYTE_8 0x01E4 00367 00368 #define VL53L1_NVM__FMT__FGC__BYTE_9 0x01E5 00369 00370 #define VL53L1_NVM__FMT__FGC__BYTE_10 0x01E6 00371 00372 #define VL53L1_NVM__FMT__FGC__BYTE_11 0x01E7 00373 00374 #define VL53L1_NVM__FMT__FGC__BYTE_12 0x01E8 00375 00376 #define VL53L1_NVM__FMT__FGC__BYTE_13 0x01E9 00377 00378 #define VL53L1_NVM__FMT__FGC__BYTE_14 0x01EA 00379 00380 #define VL53L1_NVM__FMT__FGC__BYTE_15 0x01EB 00381 00382 #define VL53L1_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR 0x01EC 00383 00384 #define VL53L1_NVM__FMT__MAP_MAJOR_MINOR 0x01ED 00385 00386 #define VL53L1_NVM__FMT__YEAR_MONTH 0x01EE 00387 00388 #define VL53L1_NVM__FMT__DAY_MODULE_DATE_PHASE 0x01EF 00389 00390 #define VL53L1_NVM__FMT__TIME 0x01F0 00391 00392 #define VL53L1_NVM__FMT__TESTER_ID 0x01F2 00393 00394 #define VL53L1_NVM__FMT__SITE_ID 0x01F3 00395 00396 #define VL53L1_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR 0x01F4 00397 00398 #define VL53L1_NVM__EWS__PROBE_CARD_MAJOR_MINOR 0x01F5 00399 00400 #define VL53L1_NVM__EWS__TESTER_ID 0x01F6 00401 00402 #define VL53L1_NVM__EWS__LOT__BYTE_0 0x01F8 00403 00404 #define VL53L1_NVM__EWS__LOT__BYTE_1 0x01F9 00405 00406 #define VL53L1_NVM__EWS__LOT__BYTE_2 0x01FA 00407 00408 #define VL53L1_NVM__EWS__LOT__BYTE_3 0x01FB 00409 00410 #define VL53L1_NVM__EWS__LOT__BYTE_4 0x01FC 00411 00412 #define VL53L1_NVM__EWS__LOT__BYTE_5 0x01FD 00413 00414 #define VL53L1_NVM__EWS__WAFER 0x01FD 00415 00416 #define VL53L1_NVM__EWS__XCOORD 0x01FE 00417 00418 #define VL53L1_NVM__EWS__YCOORD 0x01FF 00419 00420 00421 #define VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX 0x00B8 00422 #define VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE 4 00423 00424 #define VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX 0x015C 00425 #define VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE 56 00426 00427 #define VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX 0x0194 00428 #define VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE 8 00429 00430 #define VL53L1_NVM__FMT__RANGE_RESULTS__140MM_MM_PRE_RANGE 0x019C 00431 #define VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK 0x01AC 00432 #define VL53L1_NVM__FMT__RANGE_RESULTS__400MM_DARK 0x01BC 00433 #define VL53L1_NVM__FMT__RANGE_RESULTS__400MM_AMBIENT 0x01CC 00434 #define VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES 16 00435 00436 00437 00438 00439 00440 00441 00442 #ifdef __cplusplus 00443 } 00444 #endif 00445 00446 #endif 00447
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