vl53l1_nvm.c

00001 
00002 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
00003 /******************************************************************************
00004  * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
00005 
00006  This file is part of VL53L1 and is dual licensed,
00007  either GPL-2.0+
00008  or 'BSD 3-clause "New" or "Revised" License' , at your option.
00009  ******************************************************************************
00010  */
00011 
00012 
00013 
00014 
00015 
00016 #ifdef _MSC_VER
00017 #define snprintf _snprintf
00018 #endif
00019 
00020 
00021 
00022 #include "vl53l1_ll_def.h"
00023 #include "vl53l1_platform.h"
00024 #include "vl53l1_platform_log.h"
00025 #include "vl53l1_register_map.h"
00026 #include "vl53l1_core.h"
00027 #include "vl53l1_nvm_structs.h"
00028 #include "vl53l1_nvm_map.h"
00029 #include "vl53l1_nvm.h"
00030 
00031 
00032 
00033 #define LOG_FUNCTION_START(fmt, ...) \
00034     _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_NVM, fmt, ##__VA_ARGS__)
00035 #define LOG_FUNCTION_END(status, ...) \
00036     _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_NVM, status, ##__VA_ARGS__)
00037 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
00038     _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_NVM,\
00039         status, fmt, ##__VA_ARGS__)
00040 
00041 #define trace_print(level, ...) \
00042     _LOG_TRACE_PRINT(VL53L1_TRACE_MODULE_NVM, \
00043     level, VL53L1_TRACE_FUNCTION_NONE, ##__VA_ARGS__)
00044 
00045 
00046 VL53L1_Error VL53L1_nvm_enable(
00047     VL53L1_DEV      Dev,
00048     uint16_t        nvm_ctrl_pulse_width,
00049     int32_t         nvm_power_up_delay_us)
00050 {
00051 
00052 
00053     VL53L1_Error status = VL53L1_ERROR_NONE;
00054 
00055     LOG_FUNCTION_START("");
00056 
00057 
00058 
00059 
00060     if (status == VL53L1_ERROR_NONE)
00061         status = VL53L1_disable_firmware(Dev);
00062 
00063 
00064 
00065 
00066     if (status == VL53L1_ERROR_NONE)
00067         status = VL53L1_enable_powerforce(Dev);
00068 
00069 
00070 
00071     if (status == VL53L1_ERROR_NONE)
00072         status = VL53L1_WaitUs(
00073             Dev,
00074             VL53L1_ENABLE_POWERFORCE_SETTLING_TIME_US);
00075 
00076 
00077 
00078     if (status == VL53L1_ERROR_NONE)
00079         status = VL53L1_WrByte(
00080                     Dev,
00081                     VL53L1_RANGING_CORE__NVM_CTRL__PDN,
00082                     0x01);
00083 
00084 
00085 
00086     if (status == VL53L1_ERROR_NONE)
00087         status = VL53L1_WrByte(
00088                     Dev,
00089                     VL53L1_RANGING_CORE__CLK_CTRL1,
00090                     0x05);
00091 
00092 
00093 
00094     if (status == VL53L1_ERROR_NONE)
00095         status = VL53L1_WaitUs(
00096                     Dev,
00097                     nvm_power_up_delay_us);
00098 
00099 
00100 
00101     if (status == VL53L1_ERROR_NONE)
00102         status = VL53L1_WrByte(
00103                     Dev,
00104                     VL53L1_RANGING_CORE__NVM_CTRL__MODE,
00105                     0x01);
00106 
00107     if (status == VL53L1_ERROR_NONE)
00108         status = VL53L1_WrWord(
00109             Dev,
00110             VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB,
00111             nvm_ctrl_pulse_width);
00112 
00113     LOG_FUNCTION_END(status);
00114 
00115     return status;
00116 
00117 }
00118 
00119 
00120 VL53L1_Error VL53L1_nvm_read(
00121     VL53L1_DEV    Dev,
00122     uint8_t       start_address,
00123     uint8_t       count,
00124     uint8_t      *pdata)
00125 {
00126 
00127 
00128     VL53L1_Error status   = VL53L1_ERROR_NONE;
00129     uint8_t      nvm_addr = 0;
00130 
00131     LOG_FUNCTION_START("");
00132 
00133     trace_print(
00134            VL53L1_TRACE_LEVEL_INFO,
00135            "%-12s = 0x%02X (%3u)\n",
00136            "nvm_addr", nvm_addr, nvm_addr);
00137 
00138     trace_print(
00139            VL53L1_TRACE_LEVEL_INFO,
00140            "%-12s = 0x%02X (%3u)\n",
00141            "count", count, count);
00142 
00143     for (nvm_addr = start_address;
00144         nvm_addr < (start_address+count) ; nvm_addr++) {
00145 
00146 
00147 
00148         if (status == VL53L1_ERROR_NONE)
00149             status = VL53L1_WrByte(
00150                 Dev,
00151                 VL53L1_RANGING_CORE__NVM_CTRL__ADDR,
00152                 nvm_addr);
00153 
00154 
00155 
00156         if (status == VL53L1_ERROR_NONE)
00157             status = VL53L1_WrByte(
00158                 Dev,
00159                 VL53L1_RANGING_CORE__NVM_CTRL__READN,
00160                 0x00);
00161 
00162 
00163 
00164         if (status == VL53L1_ERROR_NONE)
00165             status = VL53L1_WaitUs(
00166                 Dev,
00167                 VL53L1_NVM_READ_TRIGGER_DELAY_US);
00168 
00169         if (status == VL53L1_ERROR_NONE)
00170             status = VL53L1_WrByte(
00171                 Dev,
00172                 VL53L1_RANGING_CORE__NVM_CTRL__READN,
00173                 0x01);
00174 
00175 
00176         if (status == VL53L1_ERROR_NONE)
00177             status = VL53L1_ReadMulti(
00178                 Dev,
00179                 VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_MMM,
00180                 pdata,
00181                 4);
00182 
00183         trace_print(
00184             VL53L1_TRACE_LEVEL_INFO,
00185             "NVM address : 0x%02X = 0x%02X%02X%02X%02X\n",
00186             nvm_addr, *pdata, *(pdata+1), *(pdata+2), *(pdata+3));
00187 
00188 
00189 
00190         pdata = pdata + 4;
00191 
00192 
00193     }
00194 
00195     LOG_FUNCTION_END(status);
00196 
00197     return status;
00198 }
00199 
00200 
00201 VL53L1_Error VL53L1_nvm_disable(
00202     VL53L1_DEV    Dev)
00203 {
00204 
00205 
00206     VL53L1_Error status = VL53L1_ERROR_NONE;
00207 
00208     LOG_FUNCTION_START("");
00209 
00210     if (status == VL53L1_ERROR_NONE)
00211         status = VL53L1_WrByte(
00212                     Dev,
00213                     VL53L1_RANGING_CORE__NVM_CTRL__READN,
00214                     0x01);
00215 
00216 
00217 
00218     if (status == VL53L1_ERROR_NONE)
00219         status = VL53L1_WrByte(
00220                     Dev,
00221                     VL53L1_RANGING_CORE__NVM_CTRL__PDN,
00222                     0x00);
00223 
00224 
00225 
00226     if (status == VL53L1_ERROR_NONE)
00227         status = VL53L1_disable_powerforce(Dev);
00228 
00229 
00230 
00231     if (status == VL53L1_ERROR_NONE)
00232         status = VL53L1_enable_firmware(Dev);
00233 
00234     LOG_FUNCTION_END(status);
00235 
00236     return status;
00237 
00238 }
00239 
00240 
00241 VL53L1_Error VL53L1_nvm_format_decode(
00242     uint16_t                   buf_size,
00243     uint8_t                   *pbuffer,
00244     VL53L1_decoded_nvm_data_t *pdata)
00245 {
00246 
00247 
00248 
00249     VL53L1_Error status = VL53L1_ERROR_NONE;
00250 
00251     uint8_t    i        = 0;
00252     uint8_t   *ptmp     = NULL;
00253     int        pptmp[VL53L1_NVM_MAX_FMT_RANGE_DATA];
00254 
00255     LOG_FUNCTION_START("");
00256 
00257     if (buf_size < VL53L1_NVM_SIZE_IN_BYTES)
00258         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00259 
00260     pdata->nvm__identification_model_id =
00261         (uint8_t)VL53L1_i2c_decode_with_mask(
00262             1,
00263             pbuffer + VL53L1_NVM__IDENTIFICATION__MODEL_ID,
00264             0x000000FF,
00265             0,
00266             0);
00267     pdata->nvm__identification_module_type =
00268         (uint8_t)VL53L1_i2c_decode_with_mask(
00269             1,
00270             pbuffer + VL53L1_NVM__IDENTIFICATION__MODULE_TYPE,
00271             0x000000FF,
00272             0,
00273             0);
00274     pdata->nvm__identification_revision_id =
00275         (uint8_t)VL53L1_i2c_decode_with_mask(
00276             1,
00277             pbuffer + VL53L1_NVM__IDENTIFICATION__REVISION_ID,
00278             0x0000000F,
00279             0,
00280             0);
00281     pdata->nvm__identification_module_id =
00282         (uint16_t)VL53L1_i2c_decode_with_mask(
00283             2,
00284             pbuffer + VL53L1_NVM__IDENTIFICATION__MODULE_ID,
00285             0x0000FFFF,
00286             0,
00287             0);
00288     pdata->nvm__i2c_valid =
00289         (uint8_t)VL53L1_i2c_decode_with_mask(
00290             1,
00291             pbuffer + VL53L1_NVM__I2C_VALID,
00292             0x000000FF,
00293             0,
00294             0);
00295     pdata->nvm__i2c_device_address_ews =
00296         (uint8_t)VL53L1_i2c_decode_with_mask(
00297             1,
00298             pbuffer + VL53L1_NVM__I2C_SLAVE__DEVICE_ADDRESS,
00299             0x000000FF,
00300             0,
00301             0);
00302     pdata->nvm__ews__fast_osc_frequency =
00303         (uint16_t)VL53L1_i2c_decode_with_mask(
00304             2,
00305             pbuffer +
00306             VL53L1_NVM__EWS__OSC_MEASURED__FAST_OSC_FREQUENCY,
00307             0x0000FFFF,
00308             0,
00309             0);
00310     pdata->nvm__ews__fast_osc_trim_max =
00311         (uint8_t)VL53L1_i2c_decode_with_mask(
00312             1,
00313             pbuffer + VL53L1_NVM__EWS__FAST_OSC_TRIM_MAX,
00314             0x0000007F,
00315             0,
00316             0);
00317     pdata->nvm__ews__fast_osc_freq_set =
00318         (uint8_t)VL53L1_i2c_decode_with_mask(
00319             1,
00320             pbuffer + VL53L1_NVM__EWS__FAST_OSC_FREQ_SET,
00321             0x00000007,
00322             0,
00323             0);
00324     pdata->nvm__ews__slow_osc_calibration =
00325         (uint16_t)VL53L1_i2c_decode_with_mask(
00326             2,
00327             pbuffer + VL53L1_NVM__EWS__SLOW_OSC_CALIBRATION,
00328             0x000003FF,
00329             0,
00330             0);
00331     pdata->nvm__fmt__fast_osc_frequency =
00332         (uint16_t)VL53L1_i2c_decode_with_mask(
00333             2,
00334             pbuffer +
00335             VL53L1_NVM__FMT__OSC_MEASURED__FAST_OSC_FREQUENCY,
00336             0x0000FFFF,
00337             0,
00338             0);
00339     pdata->nvm__fmt__fast_osc_trim_max =
00340         (uint8_t)VL53L1_i2c_decode_with_mask(
00341             1,
00342             pbuffer + VL53L1_NVM__FMT__FAST_OSC_TRIM_MAX,
00343             0x0000007F,
00344             0,
00345             0);
00346     pdata->nvm__fmt__fast_osc_freq_set =
00347         (uint8_t)VL53L1_i2c_decode_with_mask(
00348             1,
00349             pbuffer + VL53L1_NVM__FMT__FAST_OSC_FREQ_SET,
00350             0x00000007,
00351             0,
00352             0);
00353     pdata->nvm__fmt__slow_osc_calibration =
00354         (uint16_t)VL53L1_i2c_decode_with_mask(
00355             2,
00356             pbuffer + VL53L1_NVM__FMT__SLOW_OSC_CALIBRATION,
00357             0x000003FF,
00358             0,
00359             0);
00360     pdata->nvm__vhv_config_unlock =
00361         (uint8_t)VL53L1_i2c_decode_with_mask(
00362             1,
00363             pbuffer + VL53L1_NVM__VHV_CONFIG_UNLOCK,
00364             0x000000FF,
00365             0,
00366             0);
00367     pdata->nvm__ref_selvddpix =
00368         (uint8_t)VL53L1_i2c_decode_with_mask(
00369             1,
00370             pbuffer + VL53L1_NVM__REF_SELVDDPIX,
00371             0x0000000F,
00372             0,
00373             0);
00374     pdata->nvm__ref_selvquench =
00375         (uint8_t)VL53L1_i2c_decode_with_mask(
00376             1,
00377             pbuffer + VL53L1_NVM__REF_SELVQUENCH,
00378             0x00000078,
00379             3,
00380             0);
00381     pdata->nvm__regavdd1v2_sel =
00382         (uint8_t)VL53L1_i2c_decode_with_mask(
00383             1,
00384             pbuffer + VL53L1_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL,
00385             0x0000000C,
00386             2,
00387             0);
00388     pdata->nvm__regdvdd1v2_sel =
00389         (uint8_t)VL53L1_i2c_decode_with_mask(
00390             1,
00391             pbuffer + VL53L1_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL,
00392             0x00000003,
00393             0,
00394             0);
00395     pdata->nvm__vhv_timeout__macrop =
00396         (uint8_t)VL53L1_i2c_decode_with_mask(
00397             1,
00398             pbuffer +
00399             VL53L1_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND,
00400             0x00000003,
00401             0,
00402             0);
00403     pdata->nvm__vhv_loop_bound =
00404         (uint8_t)VL53L1_i2c_decode_with_mask(
00405             1,
00406             pbuffer +
00407             VL53L1_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND,
00408             0x000000FC,
00409             2,
00410             0);
00411     pdata->nvm__vhv_count_threshold =
00412         (uint8_t)VL53L1_i2c_decode_with_mask(
00413             1,
00414             pbuffer + VL53L1_NVM__VHV_CONFIG__COUNT_THRESH,
00415             0x000000FF,
00416             0,
00417             0);
00418     pdata->nvm__vhv_offset =
00419         (uint8_t)VL53L1_i2c_decode_with_mask(
00420             1,
00421             pbuffer + VL53L1_NVM__VHV_CONFIG__OFFSET,
00422             0x0000003F,
00423             0,
00424             0);
00425     pdata->nvm__vhv_init_enable =
00426         (uint8_t)VL53L1_i2c_decode_with_mask(
00427             1,
00428             pbuffer + VL53L1_NVM__VHV_CONFIG__INIT,
00429             0x00000080,
00430             7,
00431             0);
00432     pdata->nvm__vhv_init_value =
00433         (uint8_t)VL53L1_i2c_decode_with_mask(
00434             1,
00435             pbuffer + VL53L1_NVM__VHV_CONFIG__INIT,
00436             0x0000003F,
00437             0,
00438             0);
00439     pdata->nvm__laser_safety_vcsel_trim_ll =
00440         (uint8_t)VL53L1_i2c_decode_with_mask(
00441             1,
00442             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LL,
00443             0x00000007,
00444             0,
00445             0);
00446     pdata->nvm__laser_safety_vcsel_selion_ll =
00447         (uint8_t)VL53L1_i2c_decode_with_mask(
00448             1,
00449             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LL,
00450             0x0000003F,
00451             0,
00452             0);
00453     pdata->nvm__laser_safety_vcsel_selion_max_ll =
00454         (uint8_t)VL53L1_i2c_decode_with_mask(
00455             1,
00456             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LL,
00457             0x0000003F,
00458             0,
00459             0);
00460     pdata->nvm__laser_safety_mult_ll =
00461         (uint8_t)VL53L1_i2c_decode_with_mask(
00462             1,
00463             pbuffer + VL53L1_NVM__LASER_SAFETY__MULT_LL,
00464             0x0000003F,
00465             0,
00466             0);
00467     pdata->nvm__laser_safety_clip_ll =
00468         (uint8_t)VL53L1_i2c_decode_with_mask(
00469             1,
00470             pbuffer + VL53L1_NVM__LASER_SAFETY__CLIP_LL,
00471             0x0000003F,
00472             0,
00473             0);
00474     pdata->nvm__laser_safety_vcsel_trim_ld =
00475         (uint8_t)VL53L1_i2c_decode_with_mask(
00476             1,
00477             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LD,
00478             0x00000007,
00479             0,
00480             0);
00481     pdata->nvm__laser_safety_vcsel_selion_ld =
00482         (uint8_t)VL53L1_i2c_decode_with_mask(
00483             1,
00484             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LD,
00485             0x0000003F,
00486             0,
00487             0);
00488     pdata->nvm__laser_safety_vcsel_selion_max_ld =
00489         (uint8_t)VL53L1_i2c_decode_with_mask(
00490             1,
00491             pbuffer + VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LD,
00492             0x0000003F,
00493             0,
00494             0);
00495     pdata->nvm__laser_safety_mult_ld =
00496         (uint8_t)VL53L1_i2c_decode_with_mask(
00497             1,
00498             pbuffer + VL53L1_NVM__LASER_SAFETY__MULT_LD,
00499             0x0000003F,
00500             0,
00501             0);
00502     pdata->nvm__laser_safety_clip_ld =
00503         (uint8_t)VL53L1_i2c_decode_with_mask(
00504             1,
00505             pbuffer + VL53L1_NVM__LASER_SAFETY__CLIP_LD,
00506             0x0000003F,
00507             0,
00508             0);
00509     pdata->nvm__laser_safety_lock_byte =
00510         (uint8_t)VL53L1_i2c_decode_with_mask(
00511             1,
00512             pbuffer + VL53L1_NVM__LASER_SAFETY_LOCK_BYTE,
00513             0x000000FF,
00514             0,
00515             0);
00516     pdata->nvm__laser_safety_unlock_byte =
00517         (uint8_t)VL53L1_i2c_decode_with_mask(
00518             1,
00519             pbuffer + VL53L1_NVM__LASER_SAFETY_UNLOCK_BYTE,
00520             0x000000FF,
00521             0,
00522             0);
00523 
00524 
00525 
00526     ptmp = pbuffer + VL53L1_NVM__EWS__SPAD_ENABLES_RTN_0_;
00527     for (i = 0 ; i < VL53L1_RTN_SPAD_BUFFER_SIZE ; i++)
00528         pdata->nvm__ews__spad_enables_rtn[i] = *ptmp++;
00529 
00530     ptmp = pbuffer + VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_0_;
00531     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00532         pdata->nvm__ews__spad_enables_ref__loc1[i] = *ptmp++;
00533 
00534     ptmp = pbuffer + VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_0_;
00535     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00536         pdata->nvm__ews__spad_enables_ref__loc2[i] = *ptmp++;
00537 
00538     ptmp = pbuffer + VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_0_;
00539     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00540         pdata->nvm__ews__spad_enables_ref__loc3[i] = *ptmp++;
00541 
00542 
00543 
00544     ptmp = pbuffer + VL53L1_NVM__FMT__SPAD_ENABLES_RTN_0_;
00545     for (i = 0 ; i < VL53L1_RTN_SPAD_BUFFER_SIZE ; i++)
00546         pdata->nvm__fmt__spad_enables_rtn[i] = *ptmp++;
00547 
00548     ptmp = pbuffer + VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_0_;
00549     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00550         pdata->nvm__fmt__spad_enables_ref__loc1[i] = *ptmp++;
00551 
00552     ptmp = pbuffer + VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_0_;
00553     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00554         pdata->nvm__fmt__spad_enables_ref__loc2[i] = *ptmp++;
00555 
00556     ptmp = pbuffer + VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_0_;
00557     for (i = 0 ; i < VL53L1_REF_SPAD_BUFFER_SIZE ; i++)
00558         pdata->nvm__fmt__spad_enables_ref__loc3[i] = *ptmp++;
00559 
00560 
00561     pdata->nvm__fmt__roi_config__mode_roi_centre_spad =
00562         (uint8_t)VL53L1_i2c_decode_with_mask(
00563             1,
00564             pbuffer +
00565             VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_CENTRE_SPAD,
00566             0x000000FF,
00567             0,
00568             0);
00569     pdata->nvm__fmt__roi_config__mode_roi_x_size =
00570         (uint8_t)VL53L1_i2c_decode_with_mask(
00571             1,
00572             pbuffer +
00573             VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE,
00574             0x000000F0,
00575             4,
00576             0);
00577     pdata->nvm__fmt__roi_config__mode_roi_y_size =
00578         (uint8_t)VL53L1_i2c_decode_with_mask(
00579             1,
00580             pbuffer + VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE,
00581             0x0000000F,
00582             0,
00583             0);
00584     pdata->nvm__fmt__ref_spad_apply__num_requested_ref_spad =
00585         (uint8_t)VL53L1_i2c_decode_with_mask(
00586             1,
00587             pbuffer +
00588             VL53L1_NVM__FMT__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD,
00589             0x000000FF,
00590             0,
00591             0);
00592     pdata->nvm__fmt__ref_spad_man__ref_location =
00593         (uint8_t)VL53L1_i2c_decode_with_mask(
00594             1,
00595             pbuffer + VL53L1_NVM__FMT__REF_SPAD_MAN__REF_LOCATION,
00596             0x00000003,
00597             0,
00598             0);
00599     pdata->nvm__fmt__mm_config__inner_offset_mm =
00600         (uint16_t)VL53L1_i2c_decode_with_mask(
00601             2,
00602             pbuffer + VL53L1_NVM__FMT__MM_CONFIG__INNER_OFFSET_MM,
00603             0x0000FFFF,
00604             0,
00605             0);
00606     pdata->nvm__fmt__mm_config__outer_offset_mm =
00607         (uint16_t)VL53L1_i2c_decode_with_mask(
00608             2,
00609             pbuffer + VL53L1_NVM__FMT__MM_CONFIG__OUTER_OFFSET_MM,
00610             0x0000FFFF,
00611             0,
00612             0);
00613     pdata->nvm__fmt__algo_part_to_part_range_offset_mm =
00614         (uint16_t)VL53L1_i2c_decode_with_mask(
00615             2,
00616             pbuffer +
00617             VL53L1_NVM__FMT__ALGO__PART_TO_PART_RANGE_OFFSET_MM,
00618             0x00000FFF,
00619             0,
00620             0);
00621     pdata->nvm__fmt__algo__crosstalk_compensation_plane_offset_kcps =
00622         (uint16_t)VL53L1_i2c_decode_with_mask(
00623         2,
00624         pbuffer +
00625         VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS,
00626         0x0000FFFF,
00627         0,
00628         0);
00629     pdata->nvm__fmt__algo__crosstalk_compensation_x_plane_gradient_kcps =
00630     (uint16_t)VL53L1_i2c_decode_with_mask(
00631     2,
00632     pbuffer +
00633     VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS,
00634     0x0000FFFF,
00635     0,
00636     0);
00637     pdata->nvm__fmt__algo__crosstalk_compensation_y_plane_gradient_kcps =
00638     (uint16_t)VL53L1_i2c_decode_with_mask(
00639     2,
00640     pbuffer +
00641     VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS,
00642     0x0000FFFF,
00643     0,
00644     0);
00645     pdata->nvm__fmt__spare__host_config__nvm_config_spare_0 =
00646         (uint8_t)VL53L1_i2c_decode_with_mask(
00647             1,
00648             pbuffer +
00649             VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0,
00650             0x000000FF,
00651             0,
00652             0);
00653     pdata->nvm__fmt__spare__host_config__nvm_config_spare_1 =
00654         (uint8_t)VL53L1_i2c_decode_with_mask(
00655             1,
00656             pbuffer +
00657             VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1,
00658             0x000000FF,
00659             0,
00660             0);
00661     pdata->nvm__customer_space_programmed =
00662         (uint8_t)VL53L1_i2c_decode_with_mask(
00663             1,
00664             pbuffer + VL53L1_NVM__CUSTOMER_NVM_SPACE_PROGRAMMED,
00665             0x000000FF,
00666             0,
00667             0);
00668     pdata->nvm__cust__i2c_device_address =
00669         (uint8_t)VL53L1_i2c_decode_with_mask(
00670             1,
00671             pbuffer + VL53L1_NVM__CUST__I2C_SLAVE__DEVICE_ADDRESS,
00672             0x000000FF,
00673             0,
00674             0);
00675     pdata->nvm__cust__ref_spad_apply__num_requested_ref_spad =
00676         (uint8_t)VL53L1_i2c_decode_with_mask(
00677         1,
00678         pbuffer +
00679         VL53L1_NVM__CUST__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD,
00680         0x000000FF,
00681         0,
00682         0);
00683     pdata->nvm__cust__ref_spad_man__ref_location =
00684         (uint8_t)VL53L1_i2c_decode_with_mask(
00685             1,
00686             pbuffer + VL53L1_NVM__CUST__REF_SPAD_MAN__REF_LOCATION,
00687             0x00000003,
00688             0,
00689             0);
00690     pdata->nvm__cust__mm_config__inner_offset_mm =
00691         (uint16_t)VL53L1_i2c_decode_with_mask(
00692             2,
00693             pbuffer + VL53L1_NVM__CUST__MM_CONFIG__INNER_OFFSET_MM,
00694             0x0000FFFF,
00695             0,
00696             0);
00697     pdata->nvm__cust__mm_config__outer_offset_mm =
00698         (uint16_t)VL53L1_i2c_decode_with_mask(
00699             2,
00700             pbuffer + VL53L1_NVM__CUST__MM_CONFIG__OUTER_OFFSET_MM,
00701             0x0000FFFF,
00702             0,
00703             0);
00704     pdata->nvm__cust__algo_part_to_part_range_offset_mm =
00705         (uint16_t)VL53L1_i2c_decode_with_mask(
00706             2,
00707             pbuffer +
00708             VL53L1_NVM__CUST__ALGO__PART_TO_PART_RANGE_OFFSET_MM,
00709             0x00000FFF,
00710             0,
00711             0);
00712     pdata->nvm__cust__algo__crosstalk_compensation_plane_offset_kcps =
00713     (uint16_t)VL53L1_i2c_decode_with_mask(
00714     2,
00715     pbuffer +
00716     VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS,
00717     0x0000FFFF,
00718     0,
00719     0);
00720     pdata->nvm__cust__algo__crosstalk_compensation_x_plane_gradient_kcps =
00721     (uint16_t)VL53L1_i2c_decode_with_mask(
00722     2,
00723     pbuffer +
00724     VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS,
00725     0x0000FFFF,
00726     0,
00727     0);
00728     pdata->nvm__cust__algo__crosstalk_compensation_y_plane_gradient_kcps =
00729     (uint16_t)VL53L1_i2c_decode_with_mask(
00730     2,
00731     pbuffer +
00732     VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS,
00733     0x0000FFFF,
00734     0,
00735     0);
00736     pdata->nvm__cust__spare__host_config__nvm_config_spare_0 =
00737     (uint8_t)VL53L1_i2c_decode_with_mask(
00738     1,
00739     pbuffer + VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0,
00740     0x000000FF,
00741     0,
00742     0);
00743     pdata->nvm__cust__spare__host_config__nvm_config_spare_1 =
00744         (uint8_t)VL53L1_i2c_decode_with_mask(
00745         1,
00746         pbuffer +
00747         VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1,
00748         0x000000FF,
00749         0,
00750         0);
00751 
00752 
00753 
00754     if (status == VL53L1_ERROR_NONE)
00755         status =
00756         VL53L1_nvm_decode_optical_centre(
00757             buf_size,
00758             pbuffer + VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX,
00759             &(pdata->fmt_optical_centre));
00760 
00761 
00762 
00763     if (status == VL53L1_ERROR_NONE)
00764         status =
00765         VL53L1_nvm_decode_cal_peak_rate_map(
00766             buf_size,
00767             pbuffer + VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX,
00768             &(pdata->fmt_peak_rate_map));
00769 
00770 
00771 
00772     if (status == VL53L1_ERROR_NONE)
00773         status =
00774         VL53L1_nvm_decode_additional_offset_cal_data(
00775             buf_size,
00776             pbuffer +
00777             VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX,
00778             &(pdata->fmt_add_offset_data));
00779 
00780 
00781 
00782     pptmp[0] = VL53L1_NVM__FMT__RANGE_RESULTS__140MM_MM_PRE_RANGE;
00783     pptmp[1] = VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK;
00784     pptmp[2] = VL53L1_NVM__FMT__RANGE_RESULTS__400MM_DARK;
00785     pptmp[3] = VL53L1_NVM__FMT__RANGE_RESULTS__400MM_AMBIENT;
00786 
00787     for (i = 0 ; i < VL53L1_NVM_MAX_FMT_RANGE_DATA ; i++) {
00788         if (status == VL53L1_ERROR_NONE)
00789             status =
00790                 VL53L1_nvm_decode_fmt_range_results_data(
00791                     buf_size,
00792                     pbuffer + pptmp[i],
00793                     &(pdata->fmt_range_data[i]));
00794     }
00795 
00796 
00797     if (status == VL53L1_ERROR_NONE)
00798         status =
00799             VL53L1_nvm_decode_fmt_info(
00800                 buf_size,
00801                 pbuffer,
00802                 &(pdata->fmt_info));
00803 
00804     if (status == VL53L1_ERROR_NONE)
00805         status =
00806             VL53L1_nvm_decode_ews_info(
00807                 buf_size,
00808                 pbuffer,
00809                 &(pdata->ews_info));
00810 
00811     LOG_FUNCTION_END(status);
00812 
00813     return status;
00814 
00815 }
00816 
00817 
00818 VL53L1_Error VL53L1_nvm_decode_optical_centre(
00819     uint16_t                    buf_size,
00820     uint8_t                    *pbuffer,
00821     VL53L1_optical_centre_t    *pdata)
00822 {
00823 
00824     VL53L1_Error status   = VL53L1_ERROR_NONE;
00825 
00826     uint16_t  tmp = 0;
00827 
00828     if (buf_size < VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE)
00829         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00830 
00831 
00832     tmp  = 0x0100;
00833     tmp -= (uint16_t)*(pbuffer + 2);
00834     if (tmp > 0x0FF)
00835         tmp = 0;
00836 
00837     pdata->x_centre = (uint8_t)tmp;
00838     pdata->y_centre = *(pbuffer + 3);
00839 
00840     return status;
00841 }
00842 
00843 
00844 VL53L1_Error VL53L1_nvm_decode_cal_peak_rate_map(
00845     uint16_t                    buf_size,
00846     uint8_t                    *pbuffer,
00847     VL53L1_cal_peak_rate_map_t *pdata)
00848 {
00849 
00850     VL53L1_Error status   = VL53L1_ERROR_NONE;
00851 
00852     uint8_t   *ptmp = NULL;
00853     uint8_t       i = 0;
00854 
00855     if (buf_size < VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE)
00856         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00857 
00858     pdata->cal_distance_mm =
00859         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer);
00860 
00861     pdata->cal_reflectance_pc =
00862         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 2);
00863     pdata->cal_reflectance_pc =
00864         pdata->cal_reflectance_pc >> 6;
00865 
00866     pdata->max_samples = VL53L1_NVM_PEAK_RATE_MAP_SAMPLES;
00867     pdata->width       = VL53L1_NVM_PEAK_RATE_MAP_WIDTH;
00868     pdata->height      = VL53L1_NVM_PEAK_RATE_MAP_HEIGHT;
00869 
00870     ptmp = pbuffer + 4;
00871     for (i = 0 ; i < VL53L1_NVM_PEAK_RATE_MAP_SAMPLES ; i++) {
00872         pdata->peak_rate_mcps[i] =
00873             (uint16_t)VL53L1_i2c_decode_uint16_t(2, ptmp);
00874         ptmp += 2;
00875     }
00876 
00877     return status;
00878 }
00879 
00880 
00881 VL53L1_Error VL53L1_nvm_decode_additional_offset_cal_data(
00882     uint16_t                             buf_size,
00883     uint8_t                             *pbuffer,
00884     VL53L1_additional_offset_cal_data_t *pdata)
00885 {
00886 
00887     VL53L1_Error status   = VL53L1_ERROR_NONE;
00888 
00889     if (buf_size < VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE)
00890         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00891 
00892     pdata->result__mm_inner_actual_effective_spads =
00893         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer);
00894 
00895     pdata->result__mm_outer_actual_effective_spads =
00896         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 2);
00897 
00898     pdata->result__mm_inner_peak_signal_count_rtn_mcps =
00899         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 4);
00900 
00901     pdata->result__mm_outer_peak_signal_count_rtn_mcps =
00902         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 6);
00903 
00904     return status;
00905 }
00906 
00907 
00908 VL53L1_Error VL53L1_nvm_decode_fmt_range_results_data(
00909     uint16_t                             buf_size,
00910     uint8_t                             *pbuffer,
00911     VL53L1_decoded_nvm_fmt_range_data_t *pdata)
00912 {
00913 
00914     VL53L1_Error status   = VL53L1_ERROR_NONE;
00915 
00916     if (buf_size < VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES)
00917         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00918 
00919     pdata->result__actual_effective_rtn_spads =
00920         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer);
00921 
00922     pdata->ref_spad_array__num_requested_ref_spads =
00923         *(pbuffer+2);
00924 
00925     pdata->ref_spad_array__ref_location =
00926         *(pbuffer+3);
00927 
00928     pdata->result__peak_signal_count_rate_rtn_mcps =
00929         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 4);
00930 
00931     pdata->result__ambient_count_rate_rtn_mcps =
00932         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 6);
00933 
00934     pdata->result__peak_signal_count_rate_ref_mcps =
00935         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 8);
00936 
00937     pdata->result__ambient_count_rate_ref_mcps =
00938         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 10);
00939 
00940     pdata->measured_distance_mm =
00941         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 12);
00942 
00943     pdata->measured_distance_stdev_mm =
00944         (uint16_t)VL53L1_i2c_decode_uint16_t(2, pbuffer + 14);
00945 
00946     return status;
00947 }
00948 
00949 
00950 VL53L1_Error VL53L1_nvm_decode_fmt_info(
00951     uint16_t                       buf_size,
00952     uint8_t                       *pbuffer,
00953     VL53L1_decoded_nvm_fmt_info_t *pdata)
00954 {
00955 
00956     VL53L1_Error status   = VL53L1_ERROR_NONE;
00957 
00958     if (buf_size < VL53L1_NVM_SIZE_IN_BYTES)
00959         return VL53L1_ERROR_BUFFER_TOO_SMALL;
00960 
00961     pdata->nvm__fmt__fgc[0] =
00962         (char)VL53L1_i2c_decode_with_mask(
00963             1,
00964             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_0,
00965             0x000000FE,
00966             1,
00967             0);
00968     pdata->nvm__fmt__fgc[1] =
00969         (char)VL53L1_i2c_decode_with_mask(
00970             1,
00971             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_1,
00972             0x000001FC,
00973             2,
00974             0);
00975     pdata->nvm__fmt__fgc[2] =
00976         (char)VL53L1_i2c_decode_with_mask(
00977             1,
00978             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_2 - 1,
00979             0x000003F8,
00980             3,
00981             0);
00982     pdata->nvm__fmt__fgc[3] =
00983         (char)VL53L1_i2c_decode_with_mask(
00984             1,
00985             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_3 - 1,
00986             0x000007F0,
00987             4,
00988             0);
00989     pdata->nvm__fmt__fgc[4] =
00990         (char)VL53L1_i2c_decode_with_mask(
00991             1,
00992             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_4 - 1,
00993             0x00000FE0,
00994             5,
00995             0);
00996     pdata->nvm__fmt__fgc[5] =
00997         (char)VL53L1_i2c_decode_with_mask(
00998             1,
00999             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_5 - 1,
01000             0x00001FC0,
01001             6,
01002             0);
01003     pdata->nvm__fmt__fgc[6] =
01004         (char)VL53L1_i2c_decode_with_mask(
01005             1,
01006             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_6 - 1,
01007             0x00003F80,
01008             7,
01009             0);
01010     pdata->nvm__fmt__fgc[7] =
01011         (char)VL53L1_i2c_decode_with_mask(
01012             1,
01013             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_6,
01014             0x0000007F,
01015             0,
01016             0);
01017     pdata->nvm__fmt__fgc[8] =
01018         (char)VL53L1_i2c_decode_with_mask(
01019             1,
01020             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_7,
01021             0x000000FE,
01022             1,
01023             0);
01024     pdata->nvm__fmt__fgc[9] =
01025         (char)VL53L1_i2c_decode_with_mask(
01026             1,
01027             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_8,
01028             0x000001FC,
01029             2,
01030             0);
01031     pdata->nvm__fmt__fgc[10] =
01032         (char)VL53L1_i2c_decode_with_mask(
01033             1,
01034             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_9 - 1,
01035             0x000003F8,
01036             3,
01037             0);
01038     pdata->nvm__fmt__fgc[11] =
01039         (char)VL53L1_i2c_decode_with_mask(
01040             1,
01041             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_10 - 1,
01042             0x000007F0,
01043             4,
01044             0);
01045     pdata->nvm__fmt__fgc[12] =
01046         (char)VL53L1_i2c_decode_with_mask(
01047             1,
01048             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_11 - 1,
01049             0x00000FE0,
01050             5,
01051             0);
01052     pdata->nvm__fmt__fgc[13] =
01053         (char)VL53L1_i2c_decode_with_mask(
01054             1,
01055             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_12 - 1,
01056             0x00001FC0,
01057             6,
01058             0);
01059     pdata->nvm__fmt__fgc[14] =
01060         (char)VL53L1_i2c_decode_with_mask(
01061             1,
01062             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_13 - 1,
01063             0x00003F80,
01064             7,
01065             0);
01066     pdata->nvm__fmt__fgc[15] =
01067         (char)VL53L1_i2c_decode_with_mask(
01068             1,
01069             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_13,
01070             0x0000007F,
01071             0,
01072             0);
01073     pdata->nvm__fmt__fgc[16] =
01074         (char)VL53L1_i2c_decode_with_mask(
01075             1,
01076             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_14,
01077             0x000000FE,
01078             1,
01079             0);
01080     pdata->nvm__fmt__fgc[17] =
01081         (char)VL53L1_i2c_decode_with_mask(
01082             1,
01083             pbuffer + VL53L1_NVM__FMT__FGC__BYTE_15,
01084             0x000001FC,
01085             2,
01086             0);
01087     pdata->nvm__fmt__fgc[18] = 0x00;
01088 
01089             pdata->nvm__fmt__test_program_major =
01090         (uint8_t)VL53L1_i2c_decode_with_mask(
01091             1,
01092             pbuffer + VL53L1_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR,
01093             0x000000E0,
01094             5,
01095             0);
01096     pdata->nvm__fmt__test_program_minor =
01097         (uint8_t)VL53L1_i2c_decode_with_mask(
01098             1,
01099             pbuffer + VL53L1_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR,
01100             0x0000001F,
01101             0,
01102             0);
01103     pdata->nvm__fmt__map_major =
01104         (uint8_t)VL53L1_i2c_decode_with_mask(
01105             1,
01106             pbuffer + VL53L1_NVM__FMT__MAP_MAJOR_MINOR,
01107             0x000000E0,
01108             5,
01109             0);
01110     pdata->nvm__fmt__map_minor =
01111         (uint8_t)VL53L1_i2c_decode_with_mask(
01112             1,
01113             pbuffer + VL53L1_NVM__FMT__MAP_MAJOR_MINOR,
01114             0x0000001F,
01115             0,
01116             0);
01117     pdata->nvm__fmt__year =
01118         (uint8_t)VL53L1_i2c_decode_with_mask(
01119             1,
01120             pbuffer + VL53L1_NVM__FMT__YEAR_MONTH,
01121             0x000000F0,
01122             4,
01123             0);
01124     pdata->nvm__fmt__month =
01125         (uint8_t)VL53L1_i2c_decode_with_mask(
01126             1,
01127             pbuffer + VL53L1_NVM__FMT__YEAR_MONTH,
01128             0x0000000F,
01129             0,
01130             0);
01131     pdata->nvm__fmt__day =
01132         (uint8_t)VL53L1_i2c_decode_with_mask(
01133             1,
01134             pbuffer + VL53L1_NVM__FMT__DAY_MODULE_DATE_PHASE,
01135             0x000000F8,
01136             3,
01137             0);
01138     pdata->nvm__fmt__module_date_phase =
01139         (uint8_t)VL53L1_i2c_decode_with_mask(
01140             1,
01141             pbuffer + VL53L1_NVM__FMT__DAY_MODULE_DATE_PHASE,
01142             0x00000007,
01143             0,
01144             0);
01145     pdata->nvm__fmt__time =
01146         (uint16_t)VL53L1_i2c_decode_with_mask(
01147             2,
01148             pbuffer + VL53L1_NVM__FMT__TIME,
01149             0x0000FFFF,
01150             0,
01151             0);
01152     pdata->nvm__fmt__tester_id =
01153         (uint8_t)VL53L1_i2c_decode_with_mask(
01154             1,
01155             pbuffer + VL53L1_NVM__FMT__TESTER_ID,
01156             0x000000FF,
01157             0,
01158             0);
01159     pdata->nvm__fmt__site_id =
01160         (uint8_t)VL53L1_i2c_decode_with_mask(
01161             1,
01162             pbuffer + VL53L1_NVM__FMT__SITE_ID,
01163             0x000000FF,
01164             0,
01165             0);
01166 
01167     return status;
01168 }
01169 
01170 
01171 VL53L1_Error VL53L1_nvm_decode_ews_info(
01172     uint16_t                       buf_size,
01173     uint8_t                       *pbuffer,
01174     VL53L1_decoded_nvm_ews_info_t *pdata)
01175 {
01176 
01177     VL53L1_Error status   = VL53L1_ERROR_NONE;
01178 
01179     if (buf_size < VL53L1_NVM_SIZE_IN_BYTES)
01180         return VL53L1_ERROR_BUFFER_TOO_SMALL;
01181 
01182     pdata->nvm__ews__test_program_major =
01183         (uint8_t)VL53L1_i2c_decode_with_mask(
01184             1,
01185             pbuffer + VL53L1_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR,
01186             0x000000E0,
01187             5,
01188             0);
01189     pdata->nvm__ews__test_program_minor =
01190         (uint8_t)VL53L1_i2c_decode_with_mask(
01191             1,
01192             pbuffer + VL53L1_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR,
01193             0x0000001F,
01194             0,
01195             0);
01196     pdata->nvm__ews__probe_card_major =
01197         (uint8_t)VL53L1_i2c_decode_with_mask(
01198             1,
01199             pbuffer + VL53L1_NVM__EWS__PROBE_CARD_MAJOR_MINOR,
01200             0x000000F0,
01201             4,
01202             0);
01203     pdata->nvm__ews__probe_card_minor =
01204         (uint8_t)VL53L1_i2c_decode_with_mask(
01205             1,
01206             pbuffer + VL53L1_NVM__EWS__PROBE_CARD_MAJOR_MINOR,
01207             0x0000000F,
01208             0,
01209             0);
01210     pdata->nvm__ews__tester_id =
01211         (uint8_t)VL53L1_i2c_decode_with_mask(
01212             1,
01213             pbuffer + VL53L1_NVM__EWS__TESTER_ID,
01214             0x000000FF,
01215             0,
01216             0);
01217     pdata->nvm__ews__lot[0] =
01218         (char)VL53L1_i2c_decode_with_mask(
01219             1,
01220             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_0,
01221             0x000000FC,
01222             2,
01223             32);
01224     pdata->nvm__ews__lot[1] =
01225         (char)VL53L1_i2c_decode_with_mask(
01226             2,
01227             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_1 - 1,
01228             0x000003F0,
01229             4,
01230             32);
01231     pdata->nvm__ews__lot[2] =
01232         (char)VL53L1_i2c_decode_with_mask(
01233             2,
01234             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_2 - 1,
01235             0x00000FC0,
01236             6,
01237             32);
01238     pdata->nvm__ews__lot[3] =
01239         (char)VL53L1_i2c_decode_with_mask(
01240             1,
01241             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_2,
01242             0x0000003F,
01243             0,
01244             32);
01245     pdata->nvm__ews__lot[4] =
01246         (char)VL53L1_i2c_decode_with_mask(
01247             1,
01248             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_3,
01249             0x000000FC,
01250             2,
01251             32);
01252     pdata->nvm__ews__lot[5] =
01253         (char)VL53L1_i2c_decode_with_mask(
01254             2,
01255             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_4 - 1,
01256             0x000003F0,
01257             4,
01258             32);
01259     pdata->nvm__ews__lot[6] =
01260         (char)VL53L1_i2c_decode_with_mask(
01261             2,
01262             pbuffer + VL53L1_NVM__EWS__LOT__BYTE_5 - 1,
01263             0x00000FC0,
01264             6,
01265             32);
01266 
01267     pdata->nvm__ews__lot[7] = 0x00;
01268 
01269     pdata->nvm__ews__wafer =
01270         (uint8_t)VL53L1_i2c_decode_with_mask(
01271             1,
01272             pbuffer + VL53L1_NVM__EWS__WAFER,
01273             0x0000001F,
01274             0,
01275             0);
01276     pdata->nvm__ews__xcoord =
01277         (uint8_t)VL53L1_i2c_decode_with_mask(
01278             1,
01279             pbuffer + VL53L1_NVM__EWS__XCOORD,
01280             0x000000FF,
01281             0,
01282             0);
01283     pdata->nvm__ews__ycoord =
01284         (uint8_t)VL53L1_i2c_decode_with_mask(
01285             1,
01286             pbuffer + VL53L1_NVM__EWS__YCOORD,
01287             0x000000FF,
01288             0,
01289             0);
01290 
01291     return status;
01292 
01293 }
01294 
01295 
01296 void VL53L1_nvm_format_encode(
01297     VL53L1_decoded_nvm_data_t *pnvm_info,
01298     uint8_t                   *pnvm_data)
01299 {
01300     SUPPRESS_UNUSED_WARNING(pnvm_info);
01301     SUPPRESS_UNUSED_WARNING(pnvm_data);
01302 }
01303 
01304 
01305 VL53L1_Error VL53L1_read_nvm_raw_data(
01306     VL53L1_DEV     Dev,
01307     uint8_t        start_address,
01308     uint8_t        count,
01309     uint8_t       *pnvm_raw_data)
01310 {
01311 
01312 
01313 
01314     VL53L1_Error status = VL53L1_ERROR_NONE;
01315 
01316     LOG_FUNCTION_START("");
01317 
01318 
01319 
01320     if (status == VL53L1_ERROR_NONE)
01321         status = VL53L1_nvm_enable(
01322                     Dev,
01323                     0x0004,
01324                     VL53L1_NVM_POWER_UP_DELAY_US);
01325 
01326 
01327 
01328     if (status == VL53L1_ERROR_NONE)
01329         status = VL53L1_nvm_read(
01330             Dev,
01331             start_address,
01332             count,
01333             pnvm_raw_data);
01334 
01335 
01336 
01337     if (status == VL53L1_ERROR_NONE)
01338         status = VL53L1_nvm_disable(Dev);
01339 
01340     LOG_FUNCTION_END(status);
01341 
01342     return status;
01343 
01344 }
01345 
01346 
01347 VL53L1_Error VL53L1_read_nvm(
01348     VL53L1_DEV                 Dev,
01349     uint8_t                    nvm_format,
01350     VL53L1_decoded_nvm_data_t *pnvm_info)
01351 {
01352 
01353 
01354 
01355     VL53L1_Error status = VL53L1_ERROR_NONE;
01356 
01357     uint8_t nvm_data[VL53L1_NVM_SIZE_IN_BYTES];
01358 
01359     LOG_FUNCTION_START("");
01360 
01361     SUPPRESS_UNUSED_WARNING(nvm_format);
01362 
01363 
01364 
01365     status = VL53L1_read_nvm_raw_data(
01366                 Dev,
01367                 0,
01368                 VL53L1_NVM_SIZE_IN_BYTES >> 2,
01369                 nvm_data);
01370 
01371 
01372 
01373 
01374 
01375     if (status == VL53L1_ERROR_NONE)
01376         status = VL53L1_nvm_format_decode(
01377             VL53L1_NVM_SIZE_IN_BYTES,
01378             nvm_data,
01379             pnvm_info);
01380 
01381     LOG_FUNCTION_END(status);
01382 
01383     return status;
01384 
01385 }
01386 
01387 
01388 VL53L1_Error VL53L1_read_nvm_optical_centre(
01389     VL53L1_DEV                        Dev,
01390     VL53L1_optical_centre_t          *pcentre)
01391 {
01392 
01393 
01394     VL53L1_Error status = VL53L1_ERROR_NONE;
01395 
01396     uint8_t nvm_data[VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE];
01397 
01398     LOG_FUNCTION_START("");
01399 
01400 
01401 
01402     status =
01403         VL53L1_read_nvm_raw_data(
01404             Dev,
01405             (uint8_t)(VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX
01406                     >> 2),
01407             (uint8_t)(VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE
01408                     >> 2),
01409             nvm_data);
01410 
01411 
01412 
01413     if (status == VL53L1_ERROR_NONE)
01414         status =
01415             VL53L1_nvm_decode_optical_centre(
01416                 VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE,
01417                 nvm_data,
01418                 pcentre);
01419 
01420     LOG_FUNCTION_END(status);
01421 
01422     return status;
01423 }
01424 
01425 
01426 VL53L1_Error VL53L1_read_nvm_cal_peak_rate_map(
01427     VL53L1_DEV                           Dev,
01428     VL53L1_cal_peak_rate_map_t          *pcal_data)
01429 {
01430 
01431 
01432     VL53L1_Error status = VL53L1_ERROR_NONE;
01433 
01434     uint8_t nvm_data[VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE];
01435 
01436     LOG_FUNCTION_START("");
01437 
01438 
01439 
01440     status =
01441         VL53L1_read_nvm_raw_data(
01442             Dev,
01443             (uint8_t)(VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX
01444                     >> 2),
01445             (uint8_t)(VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE
01446                     >> 2),
01447             nvm_data);
01448 
01449 
01450 
01451     if (status == VL53L1_ERROR_NONE)
01452         status =
01453             VL53L1_nvm_decode_cal_peak_rate_map(
01454                 VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE,
01455                 nvm_data,
01456                 pcal_data);
01457 
01458     LOG_FUNCTION_END(status);
01459 
01460     return status;
01461 }
01462 
01463 
01464 VL53L1_Error VL53L1_read_nvm_additional_offset_cal_data(
01465     VL53L1_DEV                           Dev,
01466     VL53L1_additional_offset_cal_data_t *pcal_data)
01467 {
01468 
01469 
01470 
01471     VL53L1_Error status = VL53L1_ERROR_NONE;
01472 
01473     uint8_t nvm_data[VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE];
01474 
01475     LOG_FUNCTION_START("");
01476 
01477 
01478 
01479     status =
01480         VL53L1_read_nvm_raw_data(
01481             Dev,
01482             (uint8_t)(
01483             VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX >> 2),
01484             (uint8_t)(
01485             VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE >> 2),
01486             nvm_data);
01487 
01488 
01489 
01490     if (status == VL53L1_ERROR_NONE)
01491         status = VL53L1_nvm_decode_additional_offset_cal_data(
01492             VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE,
01493             nvm_data,
01494             pcal_data);
01495 
01496     LOG_FUNCTION_END(status);
01497 
01498     return status;
01499 
01500 }
01501 
01502 
01503 VL53L1_Error VL53L1_read_nvm_fmt_range_results_data(
01504     VL53L1_DEV                           Dev,
01505     uint16_t                             range_results_select,
01506     VL53L1_decoded_nvm_fmt_range_data_t *prange_data)
01507 {
01508 
01509 
01510 
01511     VL53L1_Error status = VL53L1_ERROR_NONE;
01512 
01513     uint8_t nvm_data[VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES];
01514 
01515     LOG_FUNCTION_START("");
01516 
01517 
01518 
01519     status = VL53L1_read_nvm_raw_data(
01520         Dev,
01521         (uint8_t)(range_results_select >> 2),
01522         (uint8_t)(VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES >> 2),
01523         nvm_data);
01524 
01525 
01526 
01527     if (status == VL53L1_ERROR_NONE)
01528         status =
01529             VL53L1_nvm_decode_fmt_range_results_data(
01530                 VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES,
01531                 nvm_data,
01532                 prange_data);
01533 
01534     LOG_FUNCTION_END(status);
01535 
01536     return status;
01537 
01538 }
01539 
01540