ST Expansion SW Team
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VL53L1
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vl53l1_api_preset_modes.c
00001 00002 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 00003 /****************************************************************************** 00004 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved 00005 00006 This file is part of VL53L1 and is dual licensed, 00007 either GPL-2.0+ 00008 or 'BSD 3-clause "New" or "Revised" License' , at your option. 00009 ****************************************************************************** 00010 */ 00011 00012 00013 00014 00015 #include "vl53l1_ll_def.h" 00016 #include "vl53l1_platform_log.h" 00017 #include "vl53l1_register_structs.h" 00018 #include "vl53l1_register_settings.h" 00019 #include "vl53l1_hist_structs.h" 00020 #include "vl53l1_zone_presets.h" 00021 #include "vl53l1_core.h" 00022 #include "vl53l1_api_preset_modes.h" 00023 #include "vl53l1_tuning_parm_defaults.h" 00024 00025 00026 #define LOG_FUNCTION_START(fmt, ...) \ 00027 _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_API, fmt, ##__VA_ARGS__) 00028 #define LOG_FUNCTION_END(status, ...) \ 00029 _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_API, status, ##__VA_ARGS__) 00030 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \ 00031 _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_API,\ 00032 status, fmt, ##__VA_ARGS__) 00033 00034 00035 VL53L1_Error VL53L1_init_refspadchar_config_struct( 00036 VL53L1_refspadchar_config_t *pdata) 00037 { 00038 00039 00040 VL53L1_Error status = VL53L1_ERROR_NONE; 00041 00042 LOG_FUNCTION_START(""); 00043 00044 00045 00046 pdata->device_test_mode = 00047 VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE_DEFAULT; 00048 pdata->VL53L1_p_009 = 00049 VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD_DEFAULT; 00050 pdata->timeout_us = 00051 VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US_DEFAULT; 00052 pdata->target_count_rate_mcps = 00053 VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS_DEFAULT; 00054 pdata->min_count_rate_limit_mcps = 00055 VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS_DEFAULT; 00056 pdata->max_count_rate_limit_mcps = 00057 VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS_DEFAULT; 00058 00059 LOG_FUNCTION_END(status); 00060 00061 return status; 00062 } 00063 00064 00065 VL53L1_Error VL53L1_init_ssc_config_struct( 00066 VL53L1_ssc_config_t *pdata) 00067 { 00068 00069 00070 VL53L1_Error status = VL53L1_ERROR_NONE; 00071 00072 LOG_FUNCTION_START(""); 00073 00074 00075 00076 00077 pdata->array_select = VL53L1_DEVICESSCARRAY_RTN; 00078 00079 00080 pdata->VL53L1_p_009 = 00081 VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD_DEFAULT; 00082 00083 00084 pdata->vcsel_start = 00085 VL53L1_TUNINGPARM_SPADMAP_VCSEL_START_DEFAULT; 00086 00087 00088 pdata->vcsel_width = 0x02; 00089 00090 00091 pdata->timeout_us = 36000; 00092 00093 00094 pdata->rate_limit_mcps = 00095 VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS_DEFAULT; 00096 00097 LOG_FUNCTION_END(status); 00098 00099 return status; 00100 } 00101 00102 00103 VL53L1_Error VL53L1_init_xtalk_config_struct( 00104 VL53L1_customer_nvm_managed_t *pnvm, 00105 VL53L1_xtalk_config_t *pdata) 00106 { 00107 00108 00109 VL53L1_Error status = VL53L1_ERROR_NONE; 00110 00111 LOG_FUNCTION_START(""); 00112 00113 00114 00115 00116 00117 pdata->algo__crosstalk_compensation_plane_offset_kcps = 00118 pnvm->algo__crosstalk_compensation_plane_offset_kcps; 00119 pdata->algo__crosstalk_compensation_x_plane_gradient_kcps = 00120 pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps; 00121 pdata->algo__crosstalk_compensation_y_plane_gradient_kcps = 00122 pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps; 00123 00124 00125 00126 pdata->nvm_default__crosstalk_compensation_plane_offset_kcps = 00127 (uint32_t)pnvm->algo__crosstalk_compensation_plane_offset_kcps; 00128 pdata->nvm_default__crosstalk_compensation_x_plane_gradient_kcps = 00129 pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps; 00130 pdata->nvm_default__crosstalk_compensation_y_plane_gradient_kcps = 00131 pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps; 00132 00133 pdata->histogram_mode_crosstalk_margin_kcps = 00134 VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS_DEFAULT; 00135 pdata->lite_mode_crosstalk_margin_kcps = 00136 VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS_DEFAULT; 00137 00138 00139 00140 pdata->crosstalk_range_ignore_threshold_mult = 00141 VL53L1_TUNINGPARM_LITE_RIT_MULT_DEFAULT; 00142 00143 if ((pdata->algo__crosstalk_compensation_plane_offset_kcps == 0x00) 00144 && (pdata->algo__crosstalk_compensation_x_plane_gradient_kcps 00145 == 0x00) 00146 && (pdata->algo__crosstalk_compensation_y_plane_gradient_kcps 00147 == 0x00)) 00148 pdata->global_crosstalk_compensation_enable = 0x00; 00149 else 00150 pdata->global_crosstalk_compensation_enable = 0x01; 00151 00152 00153 if ((status == VL53L1_ERROR_NONE) && 00154 (pdata->global_crosstalk_compensation_enable == 0x01)) { 00155 pdata->crosstalk_range_ignore_threshold_rate_mcps = 00156 VL53L1_calc_range_ignore_threshold( 00157 pdata->algo__crosstalk_compensation_plane_offset_kcps, 00158 pdata->algo__crosstalk_compensation_x_plane_gradient_kcps, 00159 pdata->algo__crosstalk_compensation_y_plane_gradient_kcps, 00160 pdata->crosstalk_range_ignore_threshold_mult); 00161 } else { 00162 pdata->crosstalk_range_ignore_threshold_rate_mcps = 0; 00163 } 00164 00165 00166 00167 00168 pdata->algo__crosstalk_detect_min_valid_range_mm = 00169 VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT; 00170 pdata->algo__crosstalk_detect_max_valid_range_mm = 00171 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT; 00172 pdata->algo__crosstalk_detect_max_valid_rate_kcps = 00173 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT; 00174 pdata->algo__crosstalk_detect_max_sigma_mm = 00175 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT; 00176 00177 LOG_FUNCTION_END(status); 00178 00179 return status; 00180 } 00181 00182 VL53L1_Error VL53L1_init_xtalk_extract_config_struct( 00183 VL53L1_xtalkextract_config_t *pdata) 00184 { 00185 00186 00187 VL53L1_Error status = VL53L1_ERROR_NONE; 00188 00189 LOG_FUNCTION_START(""); 00190 00191 00192 00193 pdata->dss_config__target_total_rate_mcps = 00194 VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS_DEFAULT; 00195 00196 pdata->mm_config_timeout_us = 00197 VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US_DEFAULT; 00198 00199 pdata->num_of_samples = 00200 VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES_DEFAULT; 00201 00202 pdata->phasecal_config_timeout_us = 00203 VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US_DEFAULT; 00204 00205 pdata->range_config_timeout_us = 00206 VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US_DEFAULT; 00207 00208 00209 00210 00211 pdata->algo__crosstalk_extract_min_valid_range_mm = 00212 VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM_DEFAULT; 00213 pdata->algo__crosstalk_extract_max_valid_range_mm = 00214 VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM_DEFAULT; 00215 pdata->algo__crosstalk_extract_max_valid_rate_kcps = 00216 VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS_DEFAULT; 00217 pdata->algo__crosstalk_extract_max_sigma_mm = 00218 VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM_DEFAULT; 00219 00220 00221 LOG_FUNCTION_END(status); 00222 00223 return status; 00224 } 00225 00226 00227 VL53L1_Error VL53L1_init_offset_cal_config_struct( 00228 VL53L1_offsetcal_config_t *pdata) 00229 { 00230 00231 00232 VL53L1_Error status = VL53L1_ERROR_NONE; 00233 00234 LOG_FUNCTION_START(""); 00235 00236 00237 00238 pdata->dss_config__target_total_rate_mcps = 00239 VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS_DEFAULT; 00240 00241 pdata->phasecal_config_timeout_us = 00242 VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US_DEFAULT; 00243 00244 pdata->range_config_timeout_us = 00245 VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US_DEFAULT; 00246 00247 pdata->mm_config_timeout_us = 00248 VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US_DEFAULT; 00249 00250 00251 00252 00253 pdata->pre_num_of_samples = 00254 VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES_DEFAULT; 00255 pdata->mm1_num_of_samples = 00256 VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES_DEFAULT; 00257 pdata->mm2_num_of_samples = 00258 VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES_DEFAULT; 00259 00260 LOG_FUNCTION_END(status); 00261 00262 return status; 00263 } 00264 00265 VL53L1_Error VL53L1_init_zone_cal_config_struct( 00266 VL53L1_zonecal_config_t *pdata) 00267 { 00268 00269 00270 VL53L1_Error status = VL53L1_ERROR_NONE; 00271 00272 LOG_FUNCTION_START(""); 00273 00274 00275 00276 pdata->dss_config__target_total_rate_mcps = 00277 VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS_DEFAULT; 00278 00279 pdata->phasecal_config_timeout_us = 00280 VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US_DEFAULT; 00281 00282 pdata->range_config_timeout_us = 00283 VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US_DEFAULT; 00284 00285 pdata->mm_config_timeout_us = 00286 VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US_DEFAULT; 00287 00288 00289 00290 00291 pdata->phasecal_num_of_samples = 00292 VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES_DEFAULT; 00293 pdata->zone_num_of_samples = 00294 VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES_DEFAULT; 00295 00296 LOG_FUNCTION_END(status); 00297 00298 return status; 00299 } 00300 00301 00302 VL53L1_Error VL53L1_init_hist_post_process_config_struct( 00303 uint8_t xtalk_compensation_enable, 00304 VL53L1_hist_post_process_config_t *pdata) 00305 { 00306 00307 00308 VL53L1_Error status = VL53L1_ERROR_NONE; 00309 00310 LOG_FUNCTION_START(""); 00311 00312 00313 00314 pdata->hist_algo_select = 00315 VL53L1_TUNINGPARM_HIST_ALGO_SELECT_DEFAULT; 00316 00317 00318 00319 pdata->hist_target_order = 00320 VL53L1_TUNINGPARM_HIST_TARGET_ORDER_DEFAULT; 00321 00322 00323 00324 pdata->filter_woi0 = 00325 VL53L1_TUNINGPARM_HIST_FILTER_WOI_0_DEFAULT; 00326 pdata->filter_woi1 = 00327 VL53L1_TUNINGPARM_HIST_FILTER_WOI_1_DEFAULT; 00328 00329 00330 pdata->hist_amb_est_method = 00331 VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD_DEFAULT; 00332 00333 pdata->ambient_thresh_sigma0 = 00334 VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0_DEFAULT; 00335 pdata->ambient_thresh_sigma1 = 00336 VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1_DEFAULT; 00337 00338 00339 pdata->ambient_thresh_events_scaler = 00340 VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER_DEFAULT; 00341 00342 00343 pdata->min_ambient_thresh_events = 00344 VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS_DEFAULT; 00345 00346 pdata->noise_threshold = 00347 VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD_DEFAULT; 00348 00349 pdata->signal_total_events_limit = 00350 VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT_DEFAULT; 00351 pdata->sigma_estimator__sigma_ref_mm = 00352 VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM_DEFAULT; 00353 00354 00355 pdata->sigma_thresh = 00356 VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM_DEFAULT; 00357 00358 pdata->range_offset_mm = 0; 00359 00360 pdata->gain_factor = 00361 VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT; 00362 00363 00364 00365 pdata->valid_phase_low = 0x08; 00366 pdata->valid_phase_high = 0x88; 00367 00368 00369 00370 pdata->algo__consistency_check__phase_tolerance = 00371 VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE_DEFAULT; 00372 00373 00374 00375 pdata->algo__consistency_check__event_sigma = 00376 VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_DEFAULT; 00377 00378 00379 pdata->algo__consistency_check__event_min_spad_count = 00380 VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT_DEFAULT; 00381 00382 00383 00384 pdata->algo__consistency_check__min_max_tolerance = 00385 VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM_DEFAULT; 00386 00387 00388 pdata->algo__crosstalk_compensation_enable = xtalk_compensation_enable; 00389 00390 00391 pdata->algo__crosstalk_detect_min_valid_range_mm = 00392 VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT; 00393 pdata->algo__crosstalk_detect_max_valid_range_mm = 00394 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT; 00395 pdata->algo__crosstalk_detect_max_valid_rate_kcps = 00396 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT; 00397 pdata->algo__crosstalk_detect_max_sigma_mm = 00398 VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT; 00399 00400 00401 00402 00403 00404 pdata->algo__crosstalk_detect_event_sigma = 00405 VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA_DEFAULT; 00406 00407 00408 00409 pdata->algo__crosstalk_detect_min_max_tolerance = 00410 VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE_DEFAULT; 00411 00412 00413 00414 LOG_FUNCTION_END(status); 00415 00416 return status; 00417 } 00418 00419 00420 VL53L1_Error VL53L1_init_dmax_calibration_data_struct( 00421 VL53L1_dmax_calibration_data_t *pdata) 00422 { 00423 00424 00425 VL53L1_Error status = VL53L1_ERROR_NONE; 00426 00427 LOG_FUNCTION_START(""); 00428 00429 00430 00431 00432 pdata->ref__actual_effective_spads = 0x5F2D; 00433 00434 pdata->ref__peak_signal_count_rate_mcps = 0x0844; 00435 00436 pdata->ref__distance_mm = 0x08A5; 00437 00438 00439 pdata->ref_reflectance_pc = 0x0014; 00440 00441 00442 pdata->coverglass_transmission = 0x0100; 00443 00444 LOG_FUNCTION_END(status); 00445 00446 return status; 00447 } 00448 00449 00450 VL53L1_Error VL53L1_init_tuning_parm_storage_struct( 00451 VL53L1_tuning_parm_storage_t *pdata) 00452 { 00453 00454 00455 VL53L1_Error status = VL53L1_ERROR_NONE; 00456 00457 LOG_FUNCTION_START(""); 00458 00459 00460 00461 pdata->tp_tuning_parm_version = 00462 VL53L1_TUNINGPARM_VERSION_DEFAULT; 00463 pdata->tp_tuning_parm_key_table_version = 00464 VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT; 00465 pdata->tp_tuning_parm_lld_version = 00466 VL53L1_TUNINGPARM_LLD_VERSION_DEFAULT; 00467 pdata->tp_init_phase_rtn_lite_long = 00468 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE_DEFAULT; 00469 pdata->tp_init_phase_rtn_lite_med = 00470 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE_DEFAULT; 00471 pdata->tp_init_phase_rtn_lite_short = 00472 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE_DEFAULT; 00473 pdata->tp_init_phase_ref_lite_long = 00474 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE_DEFAULT; 00475 pdata->tp_init_phase_ref_lite_med = 00476 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE_DEFAULT; 00477 pdata->tp_init_phase_ref_lite_short = 00478 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE_DEFAULT; 00479 pdata->tp_init_phase_rtn_hist_long = 00480 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE_DEFAULT; 00481 pdata->tp_init_phase_rtn_hist_med = 00482 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE_DEFAULT; 00483 pdata->tp_init_phase_rtn_hist_short = 00484 VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE_DEFAULT; 00485 pdata->tp_init_phase_ref_hist_long = 00486 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE_DEFAULT; 00487 pdata->tp_init_phase_ref_hist_med = 00488 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE_DEFAULT; 00489 pdata->tp_init_phase_ref_hist_short = 00490 VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE_DEFAULT; 00491 pdata->tp_consistency_lite_phase_tolerance = 00492 VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE_DEFAULT; 00493 pdata->tp_phasecal_target = 00494 VL53L1_TUNINGPARM_PHASECAL_TARGET_DEFAULT; 00495 pdata->tp_cal_repeat_rate = 00496 VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE_DEFAULT; 00497 pdata->tp_lite_min_clip = 00498 VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM_DEFAULT; 00499 pdata->tp_lite_long_sigma_thresh_mm = 00500 VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM_DEFAULT; 00501 pdata->tp_lite_med_sigma_thresh_mm = 00502 VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM_DEFAULT; 00503 pdata->tp_lite_short_sigma_thresh_mm = 00504 VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM_DEFAULT; 00505 pdata->tp_lite_long_min_count_rate_rtn_mcps = 00506 VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS_DEFAULT; 00507 pdata->tp_lite_med_min_count_rate_rtn_mcps = 00508 VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS_DEFAULT; 00509 pdata->tp_lite_short_min_count_rate_rtn_mcps = 00510 VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS_DEFAULT; 00511 pdata->tp_lite_sigma_est_pulse_width_ns = 00512 VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH_DEFAULT; 00513 pdata->tp_lite_sigma_est_amb_width_ns = 00514 VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS_DEFAULT; 00515 pdata->tp_lite_sigma_ref_mm = 00516 VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM_DEFAULT; 00517 pdata->tp_lite_seed_cfg = 00518 VL53L1_TUNINGPARM_LITE_SEED_CONFIG_DEFAULT; 00519 pdata->tp_timed_seed_cfg = 00520 VL53L1_TUNINGPARM_TIMED_SEED_CONFIG_DEFAULT; 00521 pdata->tp_lite_quantifier = 00522 VL53L1_TUNINGPARM_LITE_QUANTIFIER_DEFAULT; 00523 pdata->tp_lite_first_order_select = 00524 VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT_DEFAULT; 00525 00526 00527 00528 00529 pdata->tp_dss_target_lite_mcps = 00530 VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT; 00531 pdata->tp_dss_target_histo_mcps = 00532 VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT; 00533 pdata->tp_dss_target_histo_mz_mcps = 00534 VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT; 00535 pdata->tp_dss_target_timed_mcps = 00536 VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT; 00537 pdata->tp_phasecal_timeout_lite_us = 00538 VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT; 00539 pdata->tp_phasecal_timeout_hist_long_us = 00540 VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT; 00541 pdata->tp_phasecal_timeout_hist_med_us = 00542 VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT; 00543 pdata->tp_phasecal_timeout_hist_short_us = 00544 VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT; 00545 pdata->tp_phasecal_timeout_mz_long_us = 00546 VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT; 00547 pdata->tp_phasecal_timeout_mz_med_us = 00548 VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT; 00549 pdata->tp_phasecal_timeout_mz_short_us = 00550 VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT; 00551 pdata->tp_phasecal_timeout_timed_us = 00552 VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT; 00553 pdata->tp_mm_timeout_lite_us = 00554 VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US_DEFAULT; 00555 pdata->tp_mm_timeout_histo_us = 00556 VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US_DEFAULT; 00557 pdata->tp_mm_timeout_mz_us = 00558 VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US_DEFAULT; 00559 pdata->tp_mm_timeout_timed_us = 00560 VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US_DEFAULT; 00561 pdata->tp_range_timeout_lite_us = 00562 VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US_DEFAULT; 00563 pdata->tp_range_timeout_histo_us = 00564 VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US_DEFAULT; 00565 pdata->tp_range_timeout_mz_us = 00566 VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US_DEFAULT; 00567 pdata->tp_range_timeout_timed_us = 00568 VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US_DEFAULT; 00569 00570 00571 00572 pdata->tp_mm_timeout_lpa_us = 00573 VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US_DEFAULT; 00574 pdata->tp_range_timeout_lpa_us = 00575 VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US_DEFAULT; 00576 00577 pdata->tp_dss_target_very_short_mcps = 00578 VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS_DEFAULT; 00579 00580 pdata->tp_phasecal_patch_power = 00581 VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER_DEFAULT; 00582 00583 pdata->tp_hist_merge = 00584 VL53L1_TUNINGPARM_HIST_MERGE_DEFAULT; 00585 00586 pdata->tp_reset_merge_threshold = 00587 VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD_DEFAULT; 00588 00589 pdata->tp_hist_merge_max_size = 00590 VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE_DEFAULT; 00591 00592 pdata->tp_uwr_enable = 00593 VL53L1_TUNINGPARM_UWR_ENABLE_DEFAULT; 00594 pdata->tp_uwr_med_z_1_min = 00595 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN_DEFAULT; 00596 pdata->tp_uwr_med_z_1_max = 00597 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX_DEFAULT; 00598 pdata->tp_uwr_med_z_2_min = 00599 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN_DEFAULT; 00600 pdata->tp_uwr_med_z_2_max = 00601 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX_DEFAULT; 00602 pdata->tp_uwr_med_z_3_min = 00603 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN_DEFAULT; 00604 pdata->tp_uwr_med_z_3_max = 00605 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX_DEFAULT; 00606 pdata->tp_uwr_med_z_4_min = 00607 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN_DEFAULT; 00608 pdata->tp_uwr_med_z_4_max = 00609 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX_DEFAULT; 00610 pdata->tp_uwr_med_z_5_min = 00611 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN_DEFAULT; 00612 pdata->tp_uwr_med_z_5_max = 00613 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX_DEFAULT; 00614 pdata->tp_uwr_med_z_6_min = 00615 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN_DEFAULT; 00616 pdata->tp_uwr_med_z_6_max = 00617 VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX_DEFAULT; 00618 pdata->tp_uwr_med_corr_z_1_rangea = 00619 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA_DEFAULT; 00620 pdata->tp_uwr_med_corr_z_1_rangeb = 00621 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB_DEFAULT; 00622 pdata->tp_uwr_med_corr_z_2_rangea = 00623 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA_DEFAULT; 00624 pdata->tp_uwr_med_corr_z_2_rangeb = 00625 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB_DEFAULT; 00626 pdata->tp_uwr_med_corr_z_3_rangea = 00627 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA_DEFAULT; 00628 pdata->tp_uwr_med_corr_z_3_rangeb = 00629 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB_DEFAULT; 00630 pdata->tp_uwr_med_corr_z_4_rangea = 00631 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA_DEFAULT; 00632 pdata->tp_uwr_med_corr_z_4_rangeb = 00633 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB_DEFAULT; 00634 pdata->tp_uwr_med_corr_z_5_rangea = 00635 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA_DEFAULT; 00636 pdata->tp_uwr_med_corr_z_5_rangeb = 00637 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB_DEFAULT; 00638 pdata->tp_uwr_med_corr_z_6_rangea = 00639 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA_DEFAULT; 00640 pdata->tp_uwr_med_corr_z_6_rangeb = 00641 VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB_DEFAULT; 00642 pdata->tp_uwr_lng_z_1_min = 00643 VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN_DEFAULT; 00644 pdata->tp_uwr_lng_z_1_max = 00645 VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX_DEFAULT; 00646 pdata->tp_uwr_lng_z_2_min = 00647 VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN_DEFAULT; 00648 pdata->tp_uwr_lng_z_2_max = 00649 VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX_DEFAULT; 00650 pdata->tp_uwr_lng_z_3_min = 00651 VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN_DEFAULT; 00652 pdata->tp_uwr_lng_z_3_max = 00653 VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX_DEFAULT; 00654 pdata->tp_uwr_lng_z_4_min = 00655 VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN_DEFAULT; 00656 pdata->tp_uwr_lng_z_4_max = 00657 VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX_DEFAULT; 00658 pdata->tp_uwr_lng_z_5_min = 00659 VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN_DEFAULT; 00660 pdata->tp_uwr_lng_z_5_max = 00661 VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX_DEFAULT; 00662 pdata->tp_uwr_lng_corr_z_1_rangea = 00663 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA_DEFAULT; 00664 pdata->tp_uwr_lng_corr_z_1_rangeb = 00665 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB_DEFAULT; 00666 pdata->tp_uwr_lng_corr_z_2_rangea = 00667 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA_DEFAULT; 00668 pdata->tp_uwr_lng_corr_z_2_rangeb = 00669 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB_DEFAULT; 00670 pdata->tp_uwr_lng_corr_z_3_rangea = 00671 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA_DEFAULT; 00672 pdata->tp_uwr_lng_corr_z_3_rangeb = 00673 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB_DEFAULT; 00674 pdata->tp_uwr_lng_corr_z_4_rangea = 00675 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA_DEFAULT; 00676 pdata->tp_uwr_lng_corr_z_4_rangeb = 00677 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB_DEFAULT; 00678 pdata->tp_uwr_lng_corr_z_5_rangea = 00679 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA_DEFAULT; 00680 pdata->tp_uwr_lng_corr_z_5_rangeb = 00681 VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB_DEFAULT; 00682 00683 LOG_FUNCTION_END(status); 00684 00685 return status; 00686 } 00687 00688 00689 VL53L1_Error VL53L1_init_hist_gen3_dmax_config_struct( 00690 VL53L1_hist_gen3_dmax_config_t *pdata) 00691 { 00692 00693 00694 VL53L1_Error status = VL53L1_ERROR_NONE; 00695 00696 LOG_FUNCTION_START(""); 00697 00698 00699 pdata->dss_config__target_total_rate_mcps = 0x1400; 00700 pdata->dss_config__aperture_attenuation = 0x38; 00701 00702 pdata->signal_thresh_sigma = 00703 VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA_DEFAULT; 00704 pdata->ambient_thresh_sigma = 0x70; 00705 pdata->min_ambient_thresh_events = 16; 00706 pdata->signal_total_events_limit = 100; 00707 pdata->max_effective_spads = 0xFFFF; 00708 00709 00710 00711 pdata->target_reflectance_for_dmax_calc[0] = 00712 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0_DEFAULT; 00713 pdata->target_reflectance_for_dmax_calc[1] = 00714 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1_DEFAULT; 00715 pdata->target_reflectance_for_dmax_calc[2] = 00716 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2_DEFAULT; 00717 pdata->target_reflectance_for_dmax_calc[3] = 00718 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3_DEFAULT; 00719 pdata->target_reflectance_for_dmax_calc[4] = 00720 VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4_DEFAULT; 00721 00722 LOG_FUNCTION_END(status); 00723 00724 return status; 00725 } 00726 00727 00728 VL53L1_Error VL53L1_preset_mode_standard_ranging( 00729 VL53L1_static_config_t *pstatic, 00730 VL53L1_histogram_config_t *phistogram, 00731 VL53L1_general_config_t *pgeneral, 00732 VL53L1_timing_config_t *ptiming, 00733 VL53L1_dynamic_config_t *pdynamic, 00734 VL53L1_system_control_t *psystem, 00735 VL53L1_tuning_parm_storage_t *ptuning_parms, 00736 VL53L1_zone_config_t *pzone_cfg) 00737 { 00738 00739 00740 VL53L1_Error status = VL53L1_ERROR_NONE; 00741 00742 LOG_FUNCTION_START(""); 00743 00744 00745 00746 00747 pstatic->dss_config__target_total_rate_mcps = 0x0A00; 00748 pstatic->debug__ctrl = 0x00; 00749 pstatic->test_mode__ctrl = 0x00; 00750 pstatic->clk_gating__ctrl = 0x00; 00751 pstatic->nvm_bist__ctrl = 0x00; 00752 pstatic->nvm_bist__num_nvm_words = 0x00; 00753 pstatic->nvm_bist__start_address = 0x00; 00754 pstatic->host_if__status = 0x00; 00755 pstatic->pad_i2c_hv__config = 0x00; 00756 pstatic->pad_i2c_hv__extsup_config = 0x00; 00757 00758 00759 pstatic->gpio_hv_pad__ctrl = 0x00; 00760 00761 00762 pstatic->gpio_hv_mux__ctrl = 00763 VL53L1_DEVICEINTERRUPTPOLARITY_ACTIVE_LOW | 00764 VL53L1_DEVICEGPIOMODE_OUTPUT_RANGE_AND_ERROR_INTERRUPTS; 00765 00766 pstatic->gpio__tio_hv_status = 0x02; 00767 pstatic->gpio__fio_hv_status = 0x00; 00768 pstatic->ana_config__spad_sel_pswidth = 0x02; 00769 pstatic->ana_config__vcsel_pulse_width_offset = 0x08; 00770 pstatic->ana_config__fast_osc__config_ctrl = 0x00; 00771 00772 pstatic->sigma_estimator__effective_pulse_width_ns = 00773 ptuning_parms->tp_lite_sigma_est_pulse_width_ns; 00774 pstatic->sigma_estimator__effective_ambient_width_ns = 00775 ptuning_parms->tp_lite_sigma_est_amb_width_ns; 00776 pstatic->sigma_estimator__sigma_ref_mm = 00777 ptuning_parms->tp_lite_sigma_ref_mm; 00778 00779 pstatic->algo__crosstalk_compensation_valid_height_mm = 0x01; 00780 pstatic->spare_host_config__static_config_spare_0 = 0x00; 00781 pstatic->spare_host_config__static_config_spare_1 = 0x00; 00782 00783 pstatic->algo__range_ignore_threshold_mcps = 0x0000; 00784 00785 00786 pstatic->algo__range_ignore_valid_height_mm = 0xff; 00787 pstatic->algo__range_min_clip = 00788 ptuning_parms->tp_lite_min_clip; 00789 00790 pstatic->algo__consistency_check__tolerance = 00791 ptuning_parms->tp_consistency_lite_phase_tolerance; 00792 pstatic->spare_host_config__static_config_spare_2 = 0x00; 00793 pstatic->sd_config__reset_stages_msb = 0x00; 00794 pstatic->sd_config__reset_stages_lsb = 0x00; 00795 00796 pgeneral->gph_config__stream_count_update_value = 0x00; 00797 pgeneral->global_config__stream_divider = 0x00; 00798 pgeneral->system__interrupt_config_gpio = 00799 VL53L1_INTERRUPT_CONFIG_NEW_SAMPLE_READY; 00800 pgeneral->cal_config__vcsel_start = 0x0B; 00801 00802 00803 pgeneral->cal_config__repeat_rate = 00804 ptuning_parms->tp_cal_repeat_rate; 00805 pgeneral->global_config__vcsel_width = 0x02; 00806 00807 pgeneral->phasecal_config__timeout_macrop = 0x0D; 00808 00809 pgeneral->phasecal_config__target = 00810 ptuning_parms->tp_phasecal_target; 00811 pgeneral->phasecal_config__override = 0x00; 00812 pgeneral->dss_config__roi_mode_control = 00813 VL53L1_DEVICEDSSMODE__TARGET_RATE; 00814 00815 pgeneral->system__thresh_rate_high = 0x0000; 00816 pgeneral->system__thresh_rate_low = 0x0000; 00817 00818 pgeneral->dss_config__manual_effective_spads_select = 0x8C00; 00819 pgeneral->dss_config__manual_block_select = 0x00; 00820 00821 00822 pgeneral->dss_config__aperture_attenuation = 0x38; 00823 pgeneral->dss_config__max_spads_limit = 0xFF; 00824 pgeneral->dss_config__min_spads_limit = 0x01; 00825 00826 00827 00828 00829 ptiming->mm_config__timeout_macrop_a_hi = 0x00; 00830 ptiming->mm_config__timeout_macrop_a_lo = 0x1a; 00831 ptiming->mm_config__timeout_macrop_b_hi = 0x00; 00832 ptiming->mm_config__timeout_macrop_b_lo = 0x20; 00833 00834 ptiming->range_config__timeout_macrop_a_hi = 0x01; 00835 ptiming->range_config__timeout_macrop_a_lo = 0xCC; 00836 00837 ptiming->range_config__vcsel_period_a = 0x0B; 00838 00839 ptiming->range_config__timeout_macrop_b_hi = 0x01; 00840 ptiming->range_config__timeout_macrop_b_lo = 0xF5; 00841 00842 ptiming->range_config__vcsel_period_b = 0x09; 00843 00844 ptiming->range_config__sigma_thresh = 00845 ptuning_parms->tp_lite_med_sigma_thresh_mm; 00846 00847 ptiming->range_config__min_count_rate_rtn_limit_mcps = 00848 ptuning_parms->tp_lite_med_min_count_rate_rtn_mcps; 00849 00850 00851 ptiming->range_config__valid_phase_low = 0x08; 00852 ptiming->range_config__valid_phase_high = 0x78; 00853 ptiming->system__intermeasurement_period = 0x00000000; 00854 ptiming->system__fractional_enable = 0x00; 00855 00856 00857 00858 phistogram->histogram_config__low_amb_even_bin_0_1 = 0x07; 00859 phistogram->histogram_config__low_amb_even_bin_2_3 = 0x21; 00860 phistogram->histogram_config__low_amb_even_bin_4_5 = 0x43; 00861 00862 phistogram->histogram_config__low_amb_odd_bin_0_1 = 0x10; 00863 phistogram->histogram_config__low_amb_odd_bin_2_3 = 0x32; 00864 phistogram->histogram_config__low_amb_odd_bin_4_5 = 0x54; 00865 00866 phistogram->histogram_config__mid_amb_even_bin_0_1 = 0x07; 00867 phistogram->histogram_config__mid_amb_even_bin_2_3 = 0x21; 00868 phistogram->histogram_config__mid_amb_even_bin_4_5 = 0x43; 00869 00870 phistogram->histogram_config__mid_amb_odd_bin_0_1 = 0x10; 00871 phistogram->histogram_config__mid_amb_odd_bin_2 = 0x02; 00872 phistogram->histogram_config__mid_amb_odd_bin_3_4 = 0x43; 00873 phistogram->histogram_config__mid_amb_odd_bin_5 = 0x05; 00874 00875 phistogram->histogram_config__user_bin_offset = 0x00; 00876 00877 phistogram->histogram_config__high_amb_even_bin_0_1 = 0x07; 00878 phistogram->histogram_config__high_amb_even_bin_2_3 = 0x21; 00879 phistogram->histogram_config__high_amb_even_bin_4_5 = 0x43; 00880 00881 phistogram->histogram_config__high_amb_odd_bin_0_1 = 0x10; 00882 phistogram->histogram_config__high_amb_odd_bin_2_3 = 0x32; 00883 phistogram->histogram_config__high_amb_odd_bin_4_5 = 0x54; 00884 00885 phistogram->histogram_config__amb_thresh_low = 0xFFFF; 00886 phistogram->histogram_config__amb_thresh_high = 0xFFFF; 00887 00888 phistogram->histogram_config__spad_array_selection = 0x00; 00889 00890 00891 pzone_cfg->max_zones = VL53L1_MAX_USER_ZONES; 00892 pzone_cfg->active_zones = 0x00; 00893 pzone_cfg->user_zones[0].height = 0x0f; 00894 pzone_cfg->user_zones[0].width = 0x0f; 00895 pzone_cfg->user_zones[0].x_centre = 0x08; 00896 pzone_cfg->user_zones[0].y_centre = 0x08; 00897 00898 00899 00900 pdynamic->system__grouped_parameter_hold_0 = 0x01; 00901 00902 pdynamic->system__thresh_high = 0x0000; 00903 pdynamic->system__thresh_low = 0x0000; 00904 pdynamic->system__enable_xtalk_per_quadrant = 0x00; 00905 pdynamic->system__seed_config = 00906 ptuning_parms->tp_lite_seed_cfg; 00907 00908 00909 pdynamic->sd_config__woi_sd0 = 0x0B; 00910 00911 pdynamic->sd_config__woi_sd1 = 0x09; 00912 00913 pdynamic->sd_config__initial_phase_sd0 = 00914 ptuning_parms->tp_init_phase_rtn_lite_med; 00915 pdynamic->sd_config__initial_phase_sd1 = 00916 ptuning_parms->tp_init_phase_ref_lite_med; 00917 00918 pdynamic->system__grouped_parameter_hold_1 = 0x01; 00919 00920 00921 00922 pdynamic->sd_config__first_order_select = 00923 ptuning_parms->tp_lite_first_order_select; 00924 pdynamic->sd_config__quantifier = 00925 ptuning_parms->tp_lite_quantifier; 00926 00927 00928 pdynamic->roi_config__user_roi_centre_spad = 0xC7; 00929 00930 pdynamic->roi_config__user_roi_requested_global_xy_size = 0xFF; 00931 00932 00933 pdynamic->system__sequence_config = 00934 VL53L1_SEQUENCE_VHV_EN | 00935 VL53L1_SEQUENCE_PHASECAL_EN | 00936 VL53L1_SEQUENCE_DSS1_EN | 00937 VL53L1_SEQUENCE_DSS2_EN | 00938 VL53L1_SEQUENCE_MM2_EN | 00939 VL53L1_SEQUENCE_RANGE_EN; 00940 00941 pdynamic->system__grouped_parameter_hold = 0x02; 00942 00943 00944 00945 00946 psystem->system__stream_count_ctrl = 0x00; 00947 psystem->firmware__enable = 0x01; 00948 psystem->system__interrupt_clear = 00949 VL53L1_CLEAR_RANGE_INT; 00950 00951 psystem->system__mode_start = 00952 VL53L1_DEVICESCHEDULERMODE_STREAMING | 00953 VL53L1_DEVICEREADOUTMODE_SINGLE_SD | 00954 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 00955 00956 LOG_FUNCTION_END(status); 00957 00958 return status; 00959 } 00960 00961 00962 VL53L1_Error VL53L1_preset_mode_standard_ranging_short_range( 00963 VL53L1_static_config_t *pstatic, 00964 VL53L1_histogram_config_t *phistogram, 00965 VL53L1_general_config_t *pgeneral, 00966 VL53L1_timing_config_t *ptiming, 00967 VL53L1_dynamic_config_t *pdynamic, 00968 VL53L1_system_control_t *psystem, 00969 VL53L1_tuning_parm_storage_t *ptuning_parms, 00970 VL53L1_zone_config_t *pzone_cfg) 00971 { 00972 00973 00974 VL53L1_Error status = VL53L1_ERROR_NONE; 00975 00976 LOG_FUNCTION_START(""); 00977 00978 00979 00980 status = VL53L1_preset_mode_standard_ranging( 00981 pstatic, 00982 phistogram, 00983 pgeneral, 00984 ptiming, 00985 pdynamic, 00986 psystem, 00987 ptuning_parms, 00988 pzone_cfg); 00989 00990 00991 00992 if (status == VL53L1_ERROR_NONE) { 00993 00994 00995 00996 ptiming->range_config__vcsel_period_a = 0x07; 00997 ptiming->range_config__vcsel_period_b = 0x05; 00998 ptiming->range_config__sigma_thresh = 00999 ptuning_parms->tp_lite_short_sigma_thresh_mm; 01000 ptiming->range_config__min_count_rate_rtn_limit_mcps = 01001 ptuning_parms->tp_lite_short_min_count_rate_rtn_mcps; 01002 ptiming->range_config__valid_phase_low = 0x08; 01003 ptiming->range_config__valid_phase_high = 0x38; 01004 01005 01006 01007 pdynamic->sd_config__woi_sd0 = 0x07; 01008 pdynamic->sd_config__woi_sd1 = 0x05; 01009 pdynamic->sd_config__initial_phase_sd0 = 01010 ptuning_parms->tp_init_phase_rtn_lite_short; 01011 pdynamic->sd_config__initial_phase_sd1 = 01012 ptuning_parms->tp_init_phase_ref_lite_short; 01013 } 01014 01015 LOG_FUNCTION_END(status); 01016 01017 return status; 01018 } 01019 01020 01021 VL53L1_Error VL53L1_preset_mode_standard_ranging_long_range( 01022 VL53L1_static_config_t *pstatic, 01023 VL53L1_histogram_config_t *phistogram, 01024 VL53L1_general_config_t *pgeneral, 01025 VL53L1_timing_config_t *ptiming, 01026 VL53L1_dynamic_config_t *pdynamic, 01027 VL53L1_system_control_t *psystem, 01028 VL53L1_tuning_parm_storage_t *ptuning_parms, 01029 VL53L1_zone_config_t *pzone_cfg) 01030 { 01031 01032 01033 VL53L1_Error status = VL53L1_ERROR_NONE; 01034 01035 LOG_FUNCTION_START(""); 01036 01037 01038 01039 status = VL53L1_preset_mode_standard_ranging( 01040 pstatic, 01041 phistogram, 01042 pgeneral, 01043 ptiming, 01044 pdynamic, 01045 psystem, 01046 ptuning_parms, 01047 pzone_cfg); 01048 01049 01050 01051 if (status == VL53L1_ERROR_NONE) { 01052 01053 01054 01055 ptiming->range_config__vcsel_period_a = 0x0F; 01056 ptiming->range_config__vcsel_period_b = 0x0D; 01057 ptiming->range_config__sigma_thresh = 01058 ptuning_parms->tp_lite_long_sigma_thresh_mm; 01059 ptiming->range_config__min_count_rate_rtn_limit_mcps = 01060 ptuning_parms->tp_lite_long_min_count_rate_rtn_mcps; 01061 ptiming->range_config__valid_phase_low = 0x08; 01062 ptiming->range_config__valid_phase_high = 0xB8; 01063 01064 01065 01066 pdynamic->sd_config__woi_sd0 = 0x0F; 01067 pdynamic->sd_config__woi_sd1 = 0x0D; 01068 pdynamic->sd_config__initial_phase_sd0 = 01069 ptuning_parms->tp_init_phase_rtn_lite_long; 01070 pdynamic->sd_config__initial_phase_sd1 = 01071 ptuning_parms->tp_init_phase_ref_lite_long; 01072 } 01073 01074 LOG_FUNCTION_END(status); 01075 01076 return status; 01077 } 01078 01079 01080 VL53L1_Error VL53L1_preset_mode_standard_ranging_mm1_cal( 01081 VL53L1_static_config_t *pstatic, 01082 VL53L1_histogram_config_t *phistogram, 01083 VL53L1_general_config_t *pgeneral, 01084 VL53L1_timing_config_t *ptiming, 01085 VL53L1_dynamic_config_t *pdynamic, 01086 VL53L1_system_control_t *psystem, 01087 VL53L1_tuning_parm_storage_t *ptuning_parms, 01088 VL53L1_zone_config_t *pzone_cfg) 01089 { 01090 01091 01092 VL53L1_Error status = VL53L1_ERROR_NONE; 01093 01094 LOG_FUNCTION_START(""); 01095 01096 01097 01098 status = VL53L1_preset_mode_standard_ranging( 01099 pstatic, 01100 phistogram, 01101 pgeneral, 01102 ptiming, 01103 pdynamic, 01104 psystem, 01105 ptuning_parms, 01106 pzone_cfg); 01107 01108 01109 01110 if (status == VL53L1_ERROR_NONE) { 01111 01112 pgeneral->dss_config__roi_mode_control = 01113 VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS; 01114 01115 pdynamic->system__sequence_config = 01116 VL53L1_SEQUENCE_VHV_EN | 01117 VL53L1_SEQUENCE_PHASECAL_EN | 01118 VL53L1_SEQUENCE_DSS1_EN | 01119 VL53L1_SEQUENCE_DSS2_EN | 01120 VL53L1_SEQUENCE_MM1_EN; 01121 } 01122 01123 LOG_FUNCTION_END(status); 01124 01125 return status; 01126 } 01127 01128 01129 VL53L1_Error VL53L1_preset_mode_standard_ranging_mm2_cal( 01130 VL53L1_static_config_t *pstatic, 01131 VL53L1_histogram_config_t *phistogram, 01132 VL53L1_general_config_t *pgeneral, 01133 VL53L1_timing_config_t *ptiming, 01134 VL53L1_dynamic_config_t *pdynamic, 01135 VL53L1_system_control_t *psystem, 01136 VL53L1_tuning_parm_storage_t *ptuning_parms, 01137 VL53L1_zone_config_t *pzone_cfg) 01138 { 01139 01140 01141 VL53L1_Error status = VL53L1_ERROR_NONE; 01142 01143 LOG_FUNCTION_START(""); 01144 01145 01146 01147 status = VL53L1_preset_mode_standard_ranging( 01148 pstatic, 01149 phistogram, 01150 pgeneral, 01151 ptiming, 01152 pdynamic, 01153 psystem, 01154 ptuning_parms, 01155 pzone_cfg); 01156 01157 01158 01159 if (status == VL53L1_ERROR_NONE) { 01160 01161 pgeneral->dss_config__roi_mode_control = 01162 VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS; 01163 01164 pdynamic->system__sequence_config = 01165 VL53L1_SEQUENCE_VHV_EN | 01166 VL53L1_SEQUENCE_PHASECAL_EN | 01167 VL53L1_SEQUENCE_DSS1_EN | 01168 VL53L1_SEQUENCE_DSS2_EN | 01169 VL53L1_SEQUENCE_MM2_EN; 01170 } 01171 01172 LOG_FUNCTION_END(status); 01173 01174 return status; 01175 } 01176 01177 01178 VL53L1_Error VL53L1_preset_mode_timed_ranging( 01179 01180 VL53L1_static_config_t *pstatic, 01181 VL53L1_histogram_config_t *phistogram, 01182 VL53L1_general_config_t *pgeneral, 01183 VL53L1_timing_config_t *ptiming, 01184 VL53L1_dynamic_config_t *pdynamic, 01185 VL53L1_system_control_t *psystem, 01186 VL53L1_tuning_parm_storage_t *ptuning_parms, 01187 VL53L1_zone_config_t *pzone_cfg) 01188 { 01189 01190 01191 VL53L1_Error status = VL53L1_ERROR_NONE; 01192 01193 LOG_FUNCTION_START(""); 01194 01195 01196 01197 status = VL53L1_preset_mode_standard_ranging( 01198 pstatic, 01199 phistogram, 01200 pgeneral, 01201 ptiming, 01202 pdynamic, 01203 psystem, 01204 ptuning_parms, 01205 pzone_cfg); 01206 01207 01208 01209 if (status == VL53L1_ERROR_NONE) { 01210 01211 01212 01213 01214 pdynamic->system__grouped_parameter_hold = 0x00; 01215 01216 01217 ptiming->range_config__timeout_macrop_a_hi = 0x00; 01218 ptiming->range_config__timeout_macrop_a_lo = 0xB1; 01219 01220 ptiming->range_config__timeout_macrop_b_hi = 0x00; 01221 ptiming->range_config__timeout_macrop_b_lo = 0xD4; 01222 01223 01224 01225 ptiming->system__intermeasurement_period = 0x00000600; 01226 pdynamic->system__seed_config = 01227 ptuning_parms->tp_timed_seed_cfg; 01228 01229 01230 01231 01232 psystem->system__mode_start = 01233 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO | 01234 VL53L1_DEVICEREADOUTMODE_SINGLE_SD | 01235 VL53L1_DEVICEMEASUREMENTMODE_TIMED; 01236 } 01237 01238 LOG_FUNCTION_END(status); 01239 01240 return status; 01241 } 01242 01243 VL53L1_Error VL53L1_preset_mode_timed_ranging_short_range( 01244 01245 VL53L1_static_config_t *pstatic, 01246 VL53L1_histogram_config_t *phistogram, 01247 VL53L1_general_config_t *pgeneral, 01248 VL53L1_timing_config_t *ptiming, 01249 VL53L1_dynamic_config_t *pdynamic, 01250 VL53L1_system_control_t *psystem, 01251 VL53L1_tuning_parm_storage_t *ptuning_parms, 01252 VL53L1_zone_config_t *pzone_cfg) 01253 { 01254 01255 01256 VL53L1_Error status = VL53L1_ERROR_NONE; 01257 01258 LOG_FUNCTION_START(""); 01259 01260 01261 01262 status = VL53L1_preset_mode_standard_ranging_short_range( 01263 pstatic, 01264 phistogram, 01265 pgeneral, 01266 ptiming, 01267 pdynamic, 01268 psystem, 01269 ptuning_parms, 01270 pzone_cfg); 01271 01272 01273 01274 if (status == VL53L1_ERROR_NONE) { 01275 01276 01277 01278 01279 pdynamic->system__grouped_parameter_hold = 0x00; 01280 01281 01282 01283 01284 01285 ptiming->range_config__timeout_macrop_a_hi = 0x01; 01286 ptiming->range_config__timeout_macrop_a_lo = 0x84; 01287 01288 ptiming->range_config__timeout_macrop_b_hi = 0x01; 01289 ptiming->range_config__timeout_macrop_b_lo = 0xB1; 01290 01291 ptiming->system__intermeasurement_period = 0x00000600; 01292 pdynamic->system__seed_config = 01293 ptuning_parms->tp_timed_seed_cfg; 01294 01295 01296 01297 01298 psystem->system__mode_start = 01299 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO | 01300 VL53L1_DEVICEREADOUTMODE_SINGLE_SD | 01301 VL53L1_DEVICEMEASUREMENTMODE_TIMED; 01302 } 01303 01304 LOG_FUNCTION_END(status); 01305 01306 return status; 01307 } 01308 01309 VL53L1_Error VL53L1_preset_mode_timed_ranging_long_range( 01310 01311 VL53L1_static_config_t *pstatic, 01312 VL53L1_histogram_config_t *phistogram, 01313 VL53L1_general_config_t *pgeneral, 01314 VL53L1_timing_config_t *ptiming, 01315 VL53L1_dynamic_config_t *pdynamic, 01316 VL53L1_system_control_t *psystem, 01317 VL53L1_tuning_parm_storage_t *ptuning_parms, 01318 VL53L1_zone_config_t *pzone_cfg) 01319 { 01320 01321 01322 VL53L1_Error status = VL53L1_ERROR_NONE; 01323 01324 LOG_FUNCTION_START(""); 01325 01326 01327 01328 status = VL53L1_preset_mode_standard_ranging_long_range( 01329 pstatic, 01330 phistogram, 01331 pgeneral, 01332 ptiming, 01333 pdynamic, 01334 psystem, 01335 ptuning_parms, 01336 pzone_cfg); 01337 01338 01339 01340 if (status == VL53L1_ERROR_NONE) { 01341 01342 01343 01344 01345 pdynamic->system__grouped_parameter_hold = 0x00; 01346 01347 01348 01349 01350 01351 ptiming->range_config__timeout_macrop_a_hi = 0x00; 01352 ptiming->range_config__timeout_macrop_a_lo = 0x97; 01353 01354 ptiming->range_config__timeout_macrop_b_hi = 0x00; 01355 ptiming->range_config__timeout_macrop_b_lo = 0xB1; 01356 01357 ptiming->system__intermeasurement_period = 0x00000600; 01358 pdynamic->system__seed_config = 01359 ptuning_parms->tp_timed_seed_cfg; 01360 01361 01362 01363 01364 psystem->system__mode_start = 01365 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO | 01366 VL53L1_DEVICEREADOUTMODE_SINGLE_SD | 01367 VL53L1_DEVICEMEASUREMENTMODE_TIMED; 01368 } 01369 01370 LOG_FUNCTION_END(status); 01371 01372 return status; 01373 } 01374 01375 01376 VL53L1_Error VL53L1_preset_mode_low_power_auto_ranging( 01377 01378 VL53L1_static_config_t *pstatic, 01379 VL53L1_histogram_config_t *phistogram, 01380 VL53L1_general_config_t *pgeneral, 01381 VL53L1_timing_config_t *ptiming, 01382 VL53L1_dynamic_config_t *pdynamic, 01383 VL53L1_system_control_t *psystem, 01384 VL53L1_tuning_parm_storage_t *ptuning_parms, 01385 VL53L1_zone_config_t *pzone_cfg, 01386 VL53L1_low_power_auto_data_t *plpadata) 01387 { 01388 01389 01390 VL53L1_Error status = VL53L1_ERROR_NONE; 01391 01392 LOG_FUNCTION_START(""); 01393 01394 01395 01396 status = VL53L1_preset_mode_timed_ranging( 01397 pstatic, 01398 phistogram, 01399 pgeneral, 01400 ptiming, 01401 pdynamic, 01402 psystem, 01403 ptuning_parms, 01404 pzone_cfg); 01405 01406 01407 01408 if (status == VL53L1_ERROR_NONE) { 01409 status = VL53L1_config_low_power_auto_mode( 01410 pgeneral, 01411 pdynamic, 01412 plpadata 01413 ); 01414 } 01415 01416 LOG_FUNCTION_END(status); 01417 01418 return status; 01419 } 01420 01421 VL53L1_Error VL53L1_preset_mode_low_power_auto_short_ranging( 01422 01423 VL53L1_static_config_t *pstatic, 01424 VL53L1_histogram_config_t *phistogram, 01425 VL53L1_general_config_t *pgeneral, 01426 VL53L1_timing_config_t *ptiming, 01427 VL53L1_dynamic_config_t *pdynamic, 01428 VL53L1_system_control_t *psystem, 01429 VL53L1_tuning_parm_storage_t *ptuning_parms, 01430 VL53L1_zone_config_t *pzone_cfg, 01431 VL53L1_low_power_auto_data_t *plpadata) 01432 { 01433 01434 01435 VL53L1_Error status = VL53L1_ERROR_NONE; 01436 01437 LOG_FUNCTION_START(""); 01438 01439 01440 01441 status = VL53L1_preset_mode_timed_ranging_short_range( 01442 pstatic, 01443 phistogram, 01444 pgeneral, 01445 ptiming, 01446 pdynamic, 01447 psystem, 01448 ptuning_parms, 01449 pzone_cfg); 01450 01451 01452 01453 if (status == VL53L1_ERROR_NONE) { 01454 status = VL53L1_config_low_power_auto_mode( 01455 pgeneral, 01456 pdynamic, 01457 plpadata 01458 ); 01459 } 01460 01461 LOG_FUNCTION_END(status); 01462 01463 return status; 01464 } 01465 01466 VL53L1_Error VL53L1_preset_mode_low_power_auto_long_ranging( 01467 01468 VL53L1_static_config_t *pstatic, 01469 VL53L1_histogram_config_t *phistogram, 01470 VL53L1_general_config_t *pgeneral, 01471 VL53L1_timing_config_t *ptiming, 01472 VL53L1_dynamic_config_t *pdynamic, 01473 VL53L1_system_control_t *psystem, 01474 VL53L1_tuning_parm_storage_t *ptuning_parms, 01475 VL53L1_zone_config_t *pzone_cfg, 01476 VL53L1_low_power_auto_data_t *plpadata) 01477 { 01478 01479 01480 VL53L1_Error status = VL53L1_ERROR_NONE; 01481 01482 LOG_FUNCTION_START(""); 01483 01484 01485 01486 status = VL53L1_preset_mode_timed_ranging_long_range( 01487 pstatic, 01488 phistogram, 01489 pgeneral, 01490 ptiming, 01491 pdynamic, 01492 psystem, 01493 ptuning_parms, 01494 pzone_cfg); 01495 01496 01497 01498 if (status == VL53L1_ERROR_NONE) { 01499 status = VL53L1_config_low_power_auto_mode( 01500 pgeneral, 01501 pdynamic, 01502 plpadata 01503 ); 01504 } 01505 01506 LOG_FUNCTION_END(status); 01507 01508 return status; 01509 } 01510 01511 01512 01513 VL53L1_Error VL53L1_preset_mode_singleshot_ranging( 01514 01515 VL53L1_static_config_t *pstatic, 01516 VL53L1_histogram_config_t *phistogram, 01517 VL53L1_general_config_t *pgeneral, 01518 VL53L1_timing_config_t *ptiming, 01519 VL53L1_dynamic_config_t *pdynamic, 01520 VL53L1_system_control_t *psystem, 01521 VL53L1_tuning_parm_storage_t *ptuning_parms, 01522 VL53L1_zone_config_t *pzone_cfg) 01523 { 01524 01525 01526 VL53L1_Error status = VL53L1_ERROR_NONE; 01527 01528 LOG_FUNCTION_START(""); 01529 01530 01531 01532 status = VL53L1_preset_mode_standard_ranging( 01533 pstatic, 01534 phistogram, 01535 pgeneral, 01536 ptiming, 01537 pdynamic, 01538 psystem, 01539 ptuning_parms, 01540 pzone_cfg); 01541 01542 01543 01544 if (status == VL53L1_ERROR_NONE) { 01545 01546 01547 01548 01549 pdynamic->system__grouped_parameter_hold = 0x00; 01550 01551 01552 01553 01554 ptiming->range_config__timeout_macrop_a_hi = 0x00; 01555 ptiming->range_config__timeout_macrop_a_lo = 0xB1; 01556 01557 ptiming->range_config__timeout_macrop_b_hi = 0x00; 01558 ptiming->range_config__timeout_macrop_b_lo = 0xD4; 01559 01560 pdynamic->system__seed_config = 01561 ptuning_parms->tp_timed_seed_cfg; 01562 01563 01564 01565 01566 psystem->system__mode_start = 01567 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO | 01568 VL53L1_DEVICEREADOUTMODE_SINGLE_SD | 01569 VL53L1_DEVICEMEASUREMENTMODE_SINGLESHOT; 01570 } 01571 01572 LOG_FUNCTION_END(status); 01573 01574 return status; 01575 } 01576 01577 01578 VL53L1_Error VL53L1_preset_mode_histogram_ranging( 01579 VL53L1_hist_post_process_config_t *phistpostprocess, 01580 VL53L1_static_config_t *pstatic, 01581 VL53L1_histogram_config_t *phistogram, 01582 VL53L1_general_config_t *pgeneral, 01583 VL53L1_timing_config_t *ptiming, 01584 VL53L1_dynamic_config_t *pdynamic, 01585 VL53L1_system_control_t *psystem, 01586 VL53L1_tuning_parm_storage_t *ptuning_parms, 01587 VL53L1_zone_config_t *pzone_cfg) 01588 { 01589 01590 01591 VL53L1_Error status = VL53L1_ERROR_NONE; 01592 01593 LOG_FUNCTION_START(""); 01594 01595 01596 01597 status = 01598 VL53L1_preset_mode_standard_ranging( 01599 pstatic, 01600 phistogram, 01601 pgeneral, 01602 ptiming, 01603 pdynamic, 01604 psystem, 01605 ptuning_parms, 01606 pzone_cfg); 01607 01608 01609 01610 if (status == VL53L1_ERROR_NONE) { 01611 01612 01613 01614 pstatic->dss_config__target_total_rate_mcps = 0x1400; 01615 01616 01617 01618 VL53L1_init_histogram_config_structure( 01619 7, 0, 1, 2, 3, 4, 01620 0, 1, 2, 3, 4, 5, 01621 phistogram); 01622 01623 01624 VL53L1_init_histogram_multizone_config_structure( 01625 7, 0, 1, 2, 3, 4, 01626 0, 1, 2, 3, 4, 5, 01627 &(pzone_cfg->multizone_hist_cfg)); 01628 01629 01630 01631 01632 ptiming->range_config__vcsel_period_a = 0x09; 01633 ptiming->range_config__vcsel_period_b = 0x0B; 01634 pdynamic->sd_config__woi_sd0 = 0x09; 01635 pdynamic->sd_config__woi_sd1 = 0x0B; 01636 01637 01638 01639 01640 ptiming->mm_config__timeout_macrop_a_hi = 0x00; 01641 ptiming->mm_config__timeout_macrop_a_lo = 0x20; 01642 ptiming->mm_config__timeout_macrop_b_hi = 0x00; 01643 ptiming->mm_config__timeout_macrop_b_lo = 0x1A; 01644 01645 01646 ptiming->range_config__timeout_macrop_a_hi = 0x00; 01647 ptiming->range_config__timeout_macrop_a_lo = 0x28; 01648 01649 01650 ptiming->range_config__timeout_macrop_b_hi = 0x00; 01651 ptiming->range_config__timeout_macrop_b_lo = 0x21; 01652 01653 01654 pgeneral->phasecal_config__timeout_macrop = 0xF5; 01655 01656 01657 01658 phistpostprocess->valid_phase_low = 0x08; 01659 phistpostprocess->valid_phase_high = 0x88; 01660 01661 01662 01663 VL53L1_copy_hist_cfg_to_static_cfg( 01664 phistogram, 01665 pstatic, 01666 pgeneral, 01667 ptiming, 01668 pdynamic); 01669 01670 01671 01672 01673 pdynamic->system__sequence_config = 01674 VL53L1_SEQUENCE_VHV_EN | 01675 VL53L1_SEQUENCE_PHASECAL_EN | 01676 VL53L1_SEQUENCE_DSS1_EN | 01677 VL53L1_SEQUENCE_DSS2_EN | 01678 01679 01680 VL53L1_SEQUENCE_RANGE_EN; 01681 01682 01683 01684 01685 psystem->system__mode_start = 01686 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM | 01687 VL53L1_DEVICEREADOUTMODE_DUAL_SD | 01688 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 01689 } 01690 01691 LOG_FUNCTION_END(status); 01692 01693 return status; 01694 } 01695 01696 01697 VL53L1_Error VL53L1_preset_mode_histogram_ranging_with_mm1( 01698 VL53L1_hist_post_process_config_t *phistpostprocess, 01699 VL53L1_static_config_t *pstatic, 01700 VL53L1_histogram_config_t *phistogram, 01701 VL53L1_general_config_t *pgeneral, 01702 VL53L1_timing_config_t *ptiming, 01703 VL53L1_dynamic_config_t *pdynamic, 01704 VL53L1_system_control_t *psystem, 01705 VL53L1_tuning_parm_storage_t *ptuning_parms, 01706 VL53L1_zone_config_t *pzone_cfg) 01707 { 01708 01709 01710 VL53L1_Error status = VL53L1_ERROR_NONE; 01711 01712 LOG_FUNCTION_START(""); 01713 01714 01715 01716 status = 01717 VL53L1_preset_mode_histogram_ranging( 01718 phistpostprocess, 01719 pstatic, 01720 phistogram, 01721 pgeneral, 01722 ptiming, 01723 pdynamic, 01724 psystem, 01725 ptuning_parms, 01726 pzone_cfg); 01727 01728 01729 01730 if (status == VL53L1_ERROR_NONE) { 01731 01732 01733 01734 VL53L1_init_histogram_config_structure( 01735 7, 0, 1, 2, 3, 4, 01736 8+0, 8+1, 8+2, 3, 4, 5, 01737 phistogram); 01738 01739 01740 VL53L1_init_histogram_multizone_config_structure( 01741 7, 0, 1, 2, 3, 4, 01742 8+0, 8+1, 8+2, 3, 4, 5, 01743 &(pzone_cfg->multizone_hist_cfg)); 01744 01745 01746 01747 VL53L1_copy_hist_cfg_to_static_cfg( 01748 phistogram, 01749 pstatic, 01750 pgeneral, 01751 ptiming, 01752 pdynamic); 01753 01754 01755 01756 pdynamic->system__sequence_config = 01757 VL53L1_SEQUENCE_VHV_EN | 01758 VL53L1_SEQUENCE_PHASECAL_EN | 01759 VL53L1_SEQUENCE_DSS1_EN | 01760 VL53L1_SEQUENCE_DSS2_EN | 01761 VL53L1_SEQUENCE_MM1_EN | 01762 VL53L1_SEQUENCE_RANGE_EN; 01763 01764 01765 01766 psystem->system__mode_start = 01767 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM | 01768 VL53L1_DEVICEREADOUTMODE_DUAL_SD | 01769 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 01770 } 01771 01772 LOG_FUNCTION_END(status); 01773 01774 return status; 01775 } 01776 01777 01778 VL53L1_Error VL53L1_preset_mode_histogram_ranging_with_mm2( 01779 VL53L1_hist_post_process_config_t *phistpostprocess, 01780 VL53L1_static_config_t *pstatic, 01781 VL53L1_histogram_config_t *phistogram, 01782 VL53L1_general_config_t *pgeneral, 01783 VL53L1_timing_config_t *ptiming, 01784 VL53L1_dynamic_config_t *pdynamic, 01785 VL53L1_system_control_t *psystem, 01786 VL53L1_tuning_parm_storage_t *ptuning_parms, 01787 VL53L1_zone_config_t *pzone_cfg) 01788 { 01789 01790 01791 VL53L1_Error status = VL53L1_ERROR_NONE; 01792 01793 LOG_FUNCTION_START(""); 01794 01795 01796 01797 status = 01798 VL53L1_preset_mode_histogram_ranging_with_mm1( 01799 phistpostprocess, 01800 pstatic, 01801 phistogram, 01802 pgeneral, 01803 ptiming, 01804 pdynamic, 01805 psystem, 01806 ptuning_parms, 01807 pzone_cfg); 01808 01809 01810 01811 if (status == VL53L1_ERROR_NONE) { 01812 01813 01814 01815 pdynamic->system__sequence_config = 01816 VL53L1_SEQUENCE_VHV_EN | 01817 VL53L1_SEQUENCE_PHASECAL_EN | 01818 VL53L1_SEQUENCE_DSS1_EN | 01819 VL53L1_SEQUENCE_DSS2_EN | 01820 VL53L1_SEQUENCE_MM2_EN | 01821 VL53L1_SEQUENCE_RANGE_EN; 01822 } 01823 01824 LOG_FUNCTION_END(status); 01825 01826 return status; 01827 } 01828 01829 01830 VL53L1_Error VL53L1_preset_mode_histogram_ranging_mm1_cal( 01831 VL53L1_hist_post_process_config_t *phistpostprocess, 01832 VL53L1_static_config_t *pstatic, 01833 VL53L1_histogram_config_t *phistogram, 01834 VL53L1_general_config_t *pgeneral, 01835 VL53L1_timing_config_t *ptiming, 01836 VL53L1_dynamic_config_t *pdynamic, 01837 VL53L1_system_control_t *psystem, 01838 VL53L1_tuning_parm_storage_t *ptuning_parms, 01839 VL53L1_zone_config_t *pzone_cfg) 01840 { 01841 01842 01843 VL53L1_Error status = VL53L1_ERROR_NONE; 01844 01845 LOG_FUNCTION_START(""); 01846 01847 01848 01849 status = 01850 VL53L1_preset_mode_histogram_ranging( 01851 phistpostprocess, 01852 pstatic, 01853 phistogram, 01854 pgeneral, 01855 ptiming, 01856 pdynamic, 01857 psystem, 01858 ptuning_parms, 01859 pzone_cfg); 01860 01861 01862 01863 if (status == VL53L1_ERROR_NONE) { 01864 01865 01866 01867 VL53L1_init_histogram_config_structure( 01868 7, 8+0, 8+1, 8+2, 8+3, 8+4, 01869 8+0, 8+1, 8+2, 8+3, 8+4, 8+5, 01870 phistogram); 01871 01872 01873 VL53L1_init_histogram_multizone_config_structure( 01874 7, 8+0, 8+1, 8+2, 8+3, 8+4, 01875 8+0, 8+1, 8+2, 8+3, 8+4, 8+5, 01876 &(pzone_cfg->multizone_hist_cfg)); 01877 01878 01879 01880 VL53L1_copy_hist_cfg_to_static_cfg( 01881 phistogram, 01882 pstatic, 01883 pgeneral, 01884 ptiming, 01885 pdynamic); 01886 01887 01888 01889 pgeneral->dss_config__roi_mode_control = 01890 VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS; 01891 01892 01893 01894 pdynamic->system__sequence_config = 01895 VL53L1_SEQUENCE_VHV_EN | 01896 VL53L1_SEQUENCE_PHASECAL_EN | 01897 VL53L1_SEQUENCE_DSS1_EN | 01898 VL53L1_SEQUENCE_DSS2_EN | 01899 VL53L1_SEQUENCE_MM1_EN | 01900 VL53L1_SEQUENCE_RANGE_EN; 01901 01902 } 01903 01904 LOG_FUNCTION_END(status); 01905 01906 return status; 01907 } 01908 01909 01910 VL53L1_Error VL53L1_preset_mode_histogram_ranging_mm2_cal( 01911 VL53L1_hist_post_process_config_t *phistpostprocess, 01912 VL53L1_static_config_t *pstatic, 01913 VL53L1_histogram_config_t *phistogram, 01914 VL53L1_general_config_t *pgeneral, 01915 VL53L1_timing_config_t *ptiming, 01916 VL53L1_dynamic_config_t *pdynamic, 01917 VL53L1_system_control_t *psystem, 01918 VL53L1_tuning_parm_storage_t *ptuning_parms, 01919 VL53L1_zone_config_t *pzone_cfg) 01920 { 01921 01922 01923 VL53L1_Error status = VL53L1_ERROR_NONE; 01924 01925 LOG_FUNCTION_START(""); 01926 01927 01928 01929 status = 01930 VL53L1_preset_mode_histogram_ranging_mm1_cal( 01931 phistpostprocess, 01932 pstatic, 01933 phistogram, 01934 pgeneral, 01935 ptiming, 01936 pdynamic, 01937 psystem, 01938 ptuning_parms, 01939 pzone_cfg); 01940 01941 if (status == VL53L1_ERROR_NONE) { 01942 01943 01944 01945 pdynamic->system__sequence_config = 01946 VL53L1_SEQUENCE_VHV_EN | 01947 VL53L1_SEQUENCE_PHASECAL_EN | 01948 VL53L1_SEQUENCE_DSS1_EN | 01949 VL53L1_SEQUENCE_DSS2_EN | 01950 VL53L1_SEQUENCE_MM2_EN | 01951 VL53L1_SEQUENCE_RANGE_EN; 01952 01953 } 01954 01955 LOG_FUNCTION_END(status); 01956 01957 return status; 01958 } 01959 01960 01961 VL53L1_Error VL53L1_preset_mode_histogram_ranging_short_timing( 01962 VL53L1_hist_post_process_config_t *phistpostprocess, 01963 VL53L1_static_config_t *pstatic, 01964 VL53L1_histogram_config_t *phistogram, 01965 VL53L1_general_config_t *pgeneral, 01966 VL53L1_timing_config_t *ptiming, 01967 VL53L1_dynamic_config_t *pdynamic, 01968 VL53L1_system_control_t *psystem, 01969 VL53L1_tuning_parm_storage_t *ptuning_parms, 01970 VL53L1_zone_config_t *pzone_cfg) 01971 { 01972 01973 01974 VL53L1_Error status = VL53L1_ERROR_NONE; 01975 01976 LOG_FUNCTION_START(""); 01977 01978 01979 01980 status = 01981 VL53L1_preset_mode_histogram_ranging( 01982 phistpostprocess, 01983 pstatic, 01984 phistogram, 01985 pgeneral, 01986 ptiming, 01987 pdynamic, 01988 psystem, 01989 ptuning_parms, 01990 pzone_cfg); 01991 01992 01993 01994 if (status == VL53L1_ERROR_NONE) { 01995 01996 01997 01998 pstatic->dss_config__target_total_rate_mcps = 0x1400; 01999 02000 02001 02002 VL53L1_init_histogram_config_structure( 02003 7, 0, 1, 2, 3, 4, 02004 7, 0, 1, 2, 3, 4, 02005 phistogram); 02006 02007 02008 VL53L1_init_histogram_multizone_config_structure( 02009 7, 0, 1, 2, 3, 4, 02010 7, 0, 1, 2, 3, 4, 02011 &(pzone_cfg->multizone_hist_cfg)); 02012 02013 02014 02015 VL53L1_copy_hist_cfg_to_static_cfg( 02016 phistogram, 02017 pstatic, 02018 pgeneral, 02019 ptiming, 02020 pdynamic); 02021 02022 02023 02024 ptiming->range_config__vcsel_period_a = 0x04; 02025 ptiming->range_config__vcsel_period_b = 0x03; 02026 ptiming->mm_config__timeout_macrop_a_hi = 0x00; 02027 ptiming->mm_config__timeout_macrop_a_lo = 0x42; 02028 ptiming->mm_config__timeout_macrop_b_hi = 0x00; 02029 ptiming->mm_config__timeout_macrop_b_lo = 0x42; 02030 ptiming->range_config__timeout_macrop_a_hi = 0x00; 02031 ptiming->range_config__timeout_macrop_a_lo = 0x52; 02032 ptiming->range_config__timeout_macrop_b_hi = 0x00; 02033 ptiming->range_config__timeout_macrop_b_lo = 0x66; 02034 02035 pgeneral->cal_config__vcsel_start = 0x04; 02036 02037 02038 02039 pgeneral->phasecal_config__timeout_macrop = 0xa4; 02040 02041 02042 02043 pdynamic->system__sequence_config = 02044 VL53L1_SEQUENCE_VHV_EN | 02045 VL53L1_SEQUENCE_PHASECAL_EN | 02046 VL53L1_SEQUENCE_DSS1_EN | 02047 VL53L1_SEQUENCE_DSS2_EN | 02048 02049 02050 VL53L1_SEQUENCE_RANGE_EN; 02051 02052 02053 02054 02055 psystem->system__mode_start = 02056 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM | 02057 VL53L1_DEVICEREADOUTMODE_DUAL_SD | 02058 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 02059 } 02060 02061 LOG_FUNCTION_END(status); 02062 02063 return status; 02064 } 02065 02066 02067 VL53L1_Error VL53L1_preset_mode_histogram_long_range( 02068 VL53L1_hist_post_process_config_t *phistpostprocess, 02069 VL53L1_static_config_t *pstatic, 02070 VL53L1_histogram_config_t *phistogram, 02071 VL53L1_general_config_t *pgeneral, 02072 VL53L1_timing_config_t *ptiming, 02073 VL53L1_dynamic_config_t *pdynamic, 02074 VL53L1_system_control_t *psystem, 02075 VL53L1_tuning_parm_storage_t *ptuning_parms, 02076 VL53L1_zone_config_t *pzone_cfg) 02077 { 02078 02079 02080 VL53L1_Error status = VL53L1_ERROR_NONE; 02081 02082 LOG_FUNCTION_START(""); 02083 02084 02085 02086 status = 02087 VL53L1_preset_mode_histogram_ranging( 02088 phistpostprocess, 02089 pstatic, 02090 phistogram, 02091 pgeneral, 02092 ptiming, 02093 pdynamic, 02094 psystem, 02095 ptuning_parms, 02096 pzone_cfg); 02097 02098 02099 02100 if (status == VL53L1_ERROR_NONE) { 02101 02102 02103 02104 02105 02106 VL53L1_init_histogram_config_structure( 02107 7, 0, 1, 2, 3, 4, 02108 0, 1, 2, 3, 4, 5, 02109 phistogram); 02110 02111 02112 VL53L1_init_histogram_multizone_config_structure( 02113 7, 0, 1, 2, 3, 4, 02114 0, 1, 2, 3, 4, 5, 02115 &(pzone_cfg->multizone_hist_cfg)); 02116 02117 02118 02119 VL53L1_copy_hist_cfg_to_static_cfg( 02120 phistogram, 02121 pstatic, 02122 pgeneral, 02123 ptiming, 02124 pdynamic); 02125 02126 02127 02128 ptiming->range_config__vcsel_period_a = 0x09; 02129 ptiming->range_config__vcsel_period_b = 0x0b; 02130 02131 02132 02133 ptiming->mm_config__timeout_macrop_a_hi = 0x00; 02134 ptiming->mm_config__timeout_macrop_a_lo = 0x21; 02135 ptiming->mm_config__timeout_macrop_b_hi = 0x00; 02136 ptiming->mm_config__timeout_macrop_b_lo = 0x1b; 02137 02138 02139 02140 ptiming->range_config__timeout_macrop_a_hi = 0x00; 02141 ptiming->range_config__timeout_macrop_a_lo = 0x29; 02142 ptiming->range_config__timeout_macrop_b_hi = 0x00; 02143 ptiming->range_config__timeout_macrop_b_lo = 0x22; 02144 02145 02146 02147 pgeneral->cal_config__vcsel_start = 0x09; 02148 02149 02150 02151 pgeneral->phasecal_config__timeout_macrop = 0xF5; 02152 02153 02154 02155 pdynamic->sd_config__woi_sd0 = 0x09; 02156 pdynamic->sd_config__woi_sd1 = 0x0B; 02157 pdynamic->sd_config__initial_phase_sd0 = 02158 ptuning_parms->tp_init_phase_rtn_hist_long; 02159 pdynamic->sd_config__initial_phase_sd1 = 02160 ptuning_parms->tp_init_phase_ref_hist_long; 02161 02162 02163 02164 phistpostprocess->valid_phase_low = 0x08; 02165 phistpostprocess->valid_phase_high = 0x88; 02166 02167 pdynamic->system__sequence_config = 02168 VL53L1_SEQUENCE_VHV_EN | 02169 VL53L1_SEQUENCE_PHASECAL_EN | 02170 VL53L1_SEQUENCE_DSS1_EN | 02171 VL53L1_SEQUENCE_DSS2_EN | 02172 VL53L1_SEQUENCE_RANGE_EN; 02173 02174 02175 02176 02177 psystem->system__mode_start = 02178 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM | 02179 VL53L1_DEVICEREADOUTMODE_DUAL_SD | 02180 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 02181 } 02182 02183 LOG_FUNCTION_END(status); 02184 02185 return status; 02186 } 02187 02188 02189 VL53L1_Error VL53L1_preset_mode_histogram_long_range_mm1( 02190 VL53L1_hist_post_process_config_t *phistpostprocess, 02191 VL53L1_static_config_t *pstatic, 02192 VL53L1_histogram_config_t *phistogram, 02193 VL53L1_general_config_t *pgeneral, 02194 VL53L1_timing_config_t *ptiming, 02195 VL53L1_dynamic_config_t *pdynamic, 02196 VL53L1_system_control_t *psystem, 02197 VL53L1_tuning_parm_storage_t *ptuning_parms, 02198 VL53L1_zone_config_t *pzone_cfg) 02199 { 02200 02201 02202 VL53L1_Error status = VL53L1_ERROR_NONE; 02203 02204 LOG_FUNCTION_START(""); 02205 02206 02207 02208 status = 02209 VL53L1_preset_mode_histogram_long_range( 02210 phistpostprocess, 02211 pstatic, 02212 phistogram, 02213 pgeneral, 02214 ptiming, 02215 pdynamic, 02216 psystem, 02217 ptuning_parms, 02218 pzone_cfg); 02219 02220 02221 02222 if (status == VL53L1_ERROR_NONE) { 02223 02224 02225 02226 02227 02228 VL53L1_init_histogram_config_structure( 02229 7, 0, 1, 2, 3, 4, 02230 8+0, 8+1, 8+2, 3, 4, 5, 02231 phistogram); 02232 02233 02234 VL53L1_init_histogram_multizone_config_structure( 02235 7, 0, 1, 2, 3, 4, 02236 8+0, 8+1, 8+2, 3, 4, 5, 02237 &(pzone_cfg->multizone_hist_cfg)); 02238 02239 02240 02241 VL53L1_copy_hist_cfg_to_static_cfg( 02242 phistogram, 02243 pstatic, 02244 pgeneral, 02245 ptiming, 02246 pdynamic); 02247 02248 02249 02250 pdynamic->system__sequence_config = 02251 VL53L1_SEQUENCE_VHV_EN | 02252 VL53L1_SEQUENCE_PHASECAL_EN | 02253 VL53L1_SEQUENCE_DSS1_EN | 02254 VL53L1_SEQUENCE_DSS2_EN | 02255 VL53L1_SEQUENCE_MM1_EN | 02256 VL53L1_SEQUENCE_RANGE_EN; 02257 } 02258 02259 LOG_FUNCTION_END(status); 02260 02261 return status; 02262 } 02263 02264 02265 VL53L1_Error VL53L1_preset_mode_histogram_long_range_mm2( 02266 VL53L1_hist_post_process_config_t *phistpostprocess, 02267 VL53L1_static_config_t *pstatic, 02268 VL53L1_histogram_config_t *phistogram, 02269 VL53L1_general_config_t *pgeneral, 02270 VL53L1_timing_config_t *ptiming, 02271 VL53L1_dynamic_config_t *pdynamic, 02272 VL53L1_system_control_t *psystem, 02273 VL53L1_tuning_parm_storage_t *ptuning_parms, 02274 VL53L1_zone_config_t *pzone_cfg) 02275 { 02276 02277 02278 VL53L1_Error status = VL53L1_ERROR_NONE; 02279 02280 LOG_FUNCTION_START(""); 02281 02282 02283 02284 status = 02285 VL53L1_preset_mode_histogram_long_range_mm1( 02286 phistpostprocess, 02287 pstatic, 02288 phistogram, 02289 pgeneral, 02290 ptiming, 02291 pdynamic, 02292 psystem, 02293 ptuning_parms, 02294 pzone_cfg); 02295 02296 02297 02298 if (status == VL53L1_ERROR_NONE) { 02299 02300 02301 02302 pdynamic->system__sequence_config = 02303 VL53L1_SEQUENCE_VHV_EN | 02304 VL53L1_SEQUENCE_PHASECAL_EN | 02305 VL53L1_SEQUENCE_DSS1_EN | 02306 VL53L1_SEQUENCE_DSS2_EN | 02307 VL53L1_SEQUENCE_MM2_EN | 02308 VL53L1_SEQUENCE_RANGE_EN; 02309 } 02310 02311 LOG_FUNCTION_END(status); 02312 02313 return status; 02314 } 02315 02316 02317 02318 VL53L1_Error VL53L1_preset_mode_histogram_medium_range( 02319 VL53L1_hist_post_process_config_t *phistpostprocess, 02320 VL53L1_static_config_t *pstatic, 02321 VL53L1_histogram_config_t *phistogram, 02322 VL53L1_general_config_t *pgeneral, 02323 VL53L1_timing_config_t *ptiming, 02324 VL53L1_dynamic_config_t *pdynamic, 02325 VL53L1_system_control_t *psystem, 02326 VL53L1_tuning_parm_storage_t *ptuning_parms, 02327 VL53L1_zone_config_t *pzone_cfg) 02328 { 02329 02330 02331 VL53L1_Error status = VL53L1_ERROR_NONE; 02332 02333 LOG_FUNCTION_START(""); 02334 02335 02336 02337 status = 02338 VL53L1_preset_mode_histogram_ranging( 02339 phistpostprocess, 02340 pstatic, 02341 phistogram, 02342 pgeneral, 02343 ptiming, 02344 pdynamic, 02345 psystem, 02346 ptuning_parms, 02347 pzone_cfg); 02348 02349 02350 02351 if (status == VL53L1_ERROR_NONE) { 02352 02353 02354 02355 02356 02357 VL53L1_init_histogram_config_structure( 02358 7, 0, 1, 1, 2, 2, 02359 0, 1, 2, 1, 2, 3, 02360 phistogram); 02361 02362 02363 VL53L1_init_histogram_multizone_config_structure( 02364 7, 0, 1, 1, 2, 2, 02365 0, 1, 2, 1, 2, 3, 02366 &(pzone_cfg->multizone_hist_cfg)); 02367 02368 02369 02370 VL53L1_copy_hist_cfg_to_static_cfg( 02371 phistogram, 02372 pstatic, 02373 pgeneral, 02374 ptiming, 02375 pdynamic); 02376 02377 02378 02379 ptiming->range_config__vcsel_period_a = 0x05; 02380 ptiming->range_config__vcsel_period_b = 0x07; 02381 02382 02383 02384 ptiming->mm_config__timeout_macrop_a_hi = 0x00; 02385 ptiming->mm_config__timeout_macrop_a_lo = 0x36; 02386 ptiming->mm_config__timeout_macrop_b_hi = 0x00; 02387 ptiming->mm_config__timeout_macrop_b_lo = 0x28; 02388 02389 02390 02391 ptiming->range_config__timeout_macrop_a_hi = 0x00; 02392 ptiming->range_config__timeout_macrop_a_lo = 0x44; 02393 ptiming->range_config__timeout_macrop_b_hi = 0x00; 02394 ptiming->range_config__timeout_macrop_b_lo = 0x33; 02395 02396 02397 02398 pgeneral->cal_config__vcsel_start = 0x05; 02399 02400 02401 02402 pgeneral->phasecal_config__timeout_macrop = 0xF5; 02403 02404 02405 02406 pdynamic->sd_config__woi_sd0 = 0x05; 02407 pdynamic->sd_config__woi_sd1 = 0x07; 02408 pdynamic->sd_config__initial_phase_sd0 = 02409 ptuning_parms->tp_init_phase_rtn_hist_med; 02410 pdynamic->sd_config__initial_phase_sd1 = 02411 ptuning_parms->tp_init_phase_ref_hist_med; 02412 02413 02414 02415 phistpostprocess->valid_phase_low = 0x08; 02416 phistpostprocess->valid_phase_high = 0x48; 02417 02418 pdynamic->system__sequence_config = 02419 VL53L1_SEQUENCE_VHV_EN | 02420 VL53L1_SEQUENCE_PHASECAL_EN | 02421 VL53L1_SEQUENCE_DSS1_EN | 02422 VL53L1_SEQUENCE_DSS2_EN | 02423 VL53L1_SEQUENCE_RANGE_EN; 02424 02425 02426 02427 02428 psystem->system__mode_start = 02429 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM | 02430 VL53L1_DEVICEREADOUTMODE_DUAL_SD | 02431 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 02432 } 02433 02434 LOG_FUNCTION_END(status); 02435 02436 return status; 02437 } 02438 02439 02440 VL53L1_Error VL53L1_preset_mode_histogram_medium_range_mm1( 02441 VL53L1_hist_post_process_config_t *phistpostprocess, 02442 VL53L1_static_config_t *pstatic, 02443 VL53L1_histogram_config_t *phistogram, 02444 VL53L1_general_config_t *pgeneral, 02445 VL53L1_timing_config_t *ptiming, 02446 VL53L1_dynamic_config_t *pdynamic, 02447 VL53L1_system_control_t *psystem, 02448 VL53L1_tuning_parm_storage_t *ptuning_parms, 02449 VL53L1_zone_config_t *pzone_cfg) 02450 { 02451 02452 02453 VL53L1_Error status = VL53L1_ERROR_NONE; 02454 02455 LOG_FUNCTION_START(""); 02456 02457 02458 02459 status = 02460 VL53L1_preset_mode_histogram_medium_range( 02461 phistpostprocess, 02462 pstatic, 02463 phistogram, 02464 pgeneral, 02465 ptiming, 02466 pdynamic, 02467 psystem, 02468 ptuning_parms, 02469 pzone_cfg); 02470 02471 02472 02473 if (status == VL53L1_ERROR_NONE) { 02474 02475 02476 02477 VL53L1_init_histogram_config_structure( 02478 7, 0, 1, 1, 2, 2, 02479 8+0, 8+1, 8+2, 1, 2, 3, 02480 phistogram); 02481 02482 02483 VL53L1_init_histogram_multizone_config_structure( 02484 7, 0, 1, 1, 2, 2, 02485 8+0, 8+1, 8+2, 1, 2, 3, 02486 &(pzone_cfg->multizone_hist_cfg)); 02487 02488 02489 02490 VL53L1_copy_hist_cfg_to_static_cfg( 02491 phistogram, 02492 pstatic, 02493 pgeneral, 02494 ptiming, 02495 pdynamic); 02496 02497 02498 02499 pdynamic->system__sequence_config = 02500 VL53L1_SEQUENCE_VHV_EN | 02501 VL53L1_SEQUENCE_PHASECAL_EN | 02502 VL53L1_SEQUENCE_DSS1_EN | 02503 VL53L1_SEQUENCE_DSS2_EN | 02504 VL53L1_SEQUENCE_MM1_EN | 02505 VL53L1_SEQUENCE_RANGE_EN; 02506 } 02507 02508 LOG_FUNCTION_END(status); 02509 02510 return status; 02511 } 02512 02513 02514 VL53L1_Error VL53L1_preset_mode_histogram_medium_range_mm2( 02515 VL53L1_hist_post_process_config_t *phistpostprocess, 02516 VL53L1_static_config_t *pstatic, 02517 VL53L1_histogram_config_t *phistogram, 02518 VL53L1_general_config_t *pgeneral, 02519 VL53L1_timing_config_t *ptiming, 02520 VL53L1_dynamic_config_t *pdynamic, 02521 VL53L1_system_control_t *psystem, 02522 VL53L1_tuning_parm_storage_t *ptuning_parms, 02523 VL53L1_zone_config_t *pzone_cfg) 02524 { 02525 02526 02527 VL53L1_Error status = VL53L1_ERROR_NONE; 02528 02529 LOG_FUNCTION_START(""); 02530 02531 02532 02533 status = 02534 VL53L1_preset_mode_histogram_medium_range_mm1( 02535 phistpostprocess, 02536 pstatic, 02537 phistogram, 02538 pgeneral, 02539 ptiming, 02540 pdynamic, 02541 psystem, 02542 ptuning_parms, 02543 pzone_cfg); 02544 02545 02546 02547 if (status == VL53L1_ERROR_NONE) { 02548 02549 02550 02551 pdynamic->system__sequence_config = 02552 VL53L1_SEQUENCE_VHV_EN | 02553 VL53L1_SEQUENCE_PHASECAL_EN | 02554 VL53L1_SEQUENCE_DSS1_EN | 02555 VL53L1_SEQUENCE_DSS2_EN | 02556 VL53L1_SEQUENCE_MM2_EN | 02557 VL53L1_SEQUENCE_RANGE_EN; 02558 } 02559 02560 LOG_FUNCTION_END(status); 02561 02562 return status; 02563 } 02564 02565 02566 VL53L1_Error VL53L1_preset_mode_histogram_short_range( 02567 VL53L1_hist_post_process_config_t *phistpostprocess, 02568 VL53L1_static_config_t *pstatic, 02569 VL53L1_histogram_config_t *phistogram, 02570 VL53L1_general_config_t *pgeneral, 02571 VL53L1_timing_config_t *ptiming, 02572 VL53L1_dynamic_config_t *pdynamic, 02573 VL53L1_system_control_t *psystem, 02574 VL53L1_tuning_parm_storage_t *ptuning_parms, 02575 VL53L1_zone_config_t *pzone_cfg) 02576 { 02577 02578 02579 VL53L1_Error status = VL53L1_ERROR_NONE; 02580 02581 LOG_FUNCTION_START(""); 02582 02583 02584 02585 status = 02586 VL53L1_preset_mode_histogram_ranging( 02587 phistpostprocess, 02588 pstatic, 02589 phistogram, 02590 pgeneral, 02591 ptiming, 02592 pdynamic, 02593 psystem, 02594 ptuning_parms, 02595 pzone_cfg); 02596 02597 02598 02599 if (status == VL53L1_ERROR_NONE) { 02600 02601 02602 02603 02604 02605 VL53L1_init_histogram_config_structure( 02606 7, 7, 0, 1, 1, 1, 02607 0, 1, 1, 1, 2, 2, 02608 phistogram); 02609 02610 02611 VL53L1_init_histogram_multizone_config_structure( 02612 7, 7, 0, 1, 1, 1, 02613 0, 1, 1, 1, 2, 2, 02614 &(pzone_cfg->multizone_hist_cfg)); 02615 02616 02617 02618 VL53L1_copy_hist_cfg_to_static_cfg( 02619 phistogram, 02620 pstatic, 02621 pgeneral, 02622 ptiming, 02623 pdynamic); 02624 02625 02626 02627 ptiming->range_config__vcsel_period_a = 0x03; 02628 ptiming->range_config__vcsel_period_b = 0x05; 02629 02630 02631 02632 ptiming->mm_config__timeout_macrop_a_hi = 0x00; 02633 ptiming->mm_config__timeout_macrop_a_lo = 0x52; 02634 ptiming->mm_config__timeout_macrop_b_hi = 0x00; 02635 ptiming->mm_config__timeout_macrop_b_lo = 0x37; 02636 02637 02638 02639 ptiming->range_config__timeout_macrop_a_hi = 0x00; 02640 ptiming->range_config__timeout_macrop_a_lo = 0x66; 02641 ptiming->range_config__timeout_macrop_b_hi = 0x00; 02642 ptiming->range_config__timeout_macrop_b_lo = 0x44; 02643 02644 02645 02646 pgeneral->cal_config__vcsel_start = 0x03; 02647 02648 02649 02650 pgeneral->phasecal_config__timeout_macrop = 0xF5; 02651 02652 02653 02654 pdynamic->sd_config__woi_sd0 = 0x03; 02655 pdynamic->sd_config__woi_sd1 = 0x05; 02656 pdynamic->sd_config__initial_phase_sd0 = 02657 ptuning_parms->tp_init_phase_rtn_hist_short; 02658 pdynamic->sd_config__initial_phase_sd1 = 02659 ptuning_parms->tp_init_phase_ref_hist_short; 02660 02661 02662 phistpostprocess->valid_phase_low = 0x08; 02663 phistpostprocess->valid_phase_high = 0x28; 02664 02665 pdynamic->system__sequence_config = 02666 VL53L1_SEQUENCE_VHV_EN | 02667 VL53L1_SEQUENCE_PHASECAL_EN | 02668 VL53L1_SEQUENCE_DSS1_EN | 02669 VL53L1_SEQUENCE_DSS2_EN | 02670 VL53L1_SEQUENCE_MM1_EN | 02671 02672 VL53L1_SEQUENCE_RANGE_EN; 02673 02674 02675 02676 02677 psystem->system__mode_start = 02678 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM | 02679 VL53L1_DEVICEREADOUTMODE_DUAL_SD | 02680 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 02681 } 02682 02683 LOG_FUNCTION_END(status); 02684 02685 return status; 02686 } 02687 02688 02689 02690 VL53L1_Error VL53L1_preset_mode_special_histogram_short_range( 02691 VL53L1_hist_post_process_config_t *phistpostprocess, 02692 VL53L1_static_config_t *pstatic, 02693 VL53L1_histogram_config_t *phistogram, 02694 VL53L1_general_config_t *pgeneral, 02695 VL53L1_timing_config_t *ptiming, 02696 VL53L1_dynamic_config_t *pdynamic, 02697 VL53L1_system_control_t *psystem, 02698 VL53L1_tuning_parm_storage_t *ptuning_parms, 02699 VL53L1_zone_config_t *pzone_cfg) 02700 { 02701 02702 02703 VL53L1_Error status = VL53L1_ERROR_NONE; 02704 02705 LOG_FUNCTION_START(""); 02706 02707 02708 02709 status = 02710 VL53L1_preset_mode_histogram_short_range( 02711 phistpostprocess, 02712 pstatic, 02713 phistogram, 02714 pgeneral, 02715 ptiming, 02716 pdynamic, 02717 psystem, 02718 ptuning_parms, 02719 pzone_cfg); 02720 02721 02722 02723 if (status == VL53L1_ERROR_NONE) { 02724 02725 02726 02727 02728 02729 VL53L1_init_histogram_config_structure( 02730 7, 7, 0, 0, 1, 1, 02731 0, 0, 0, 1, 1, 1, 02732 phistogram); 02733 02734 02735 VL53L1_init_histogram_multizone_config_structure( 02736 7, 7, 0, 0, 1, 1, 02737 0, 0, 0, 1, 1, 1, 02738 &(pzone_cfg->multizone_hist_cfg)); 02739 02740 02741 02742 VL53L1_copy_hist_cfg_to_static_cfg( 02743 phistogram, 02744 pstatic, 02745 pgeneral, 02746 ptiming, 02747 pdynamic); 02748 02749 02750 02751 ptiming->range_config__vcsel_period_a = 0x02; 02752 ptiming->range_config__vcsel_period_b = 0x03; 02753 02754 02755 02756 pgeneral->cal_config__vcsel_start = 0x00; 02757 02758 02759 02760 pgeneral->phasecal_config__target = 0x31; 02761 02762 02763 02764 pdynamic->sd_config__woi_sd0 = 0x02; 02765 pdynamic->sd_config__woi_sd1 = 0x03; 02766 pdynamic->sd_config__initial_phase_sd0 = 02767 ptuning_parms->tp_init_phase_rtn_hist_short; 02768 pdynamic->sd_config__initial_phase_sd1 = 02769 ptuning_parms->tp_init_phase_ref_hist_short; 02770 02771 02772 02773 phistpostprocess->valid_phase_low = 0x10; 02774 phistpostprocess->valid_phase_high = 0x18; 02775 02776 } 02777 02778 LOG_FUNCTION_END(status); 02779 02780 return status; 02781 } 02782 02783 02784 02785 VL53L1_Error VL53L1_preset_mode_histogram_short_range_mm1( 02786 VL53L1_hist_post_process_config_t *phistpostprocess, 02787 VL53L1_static_config_t *pstatic, 02788 VL53L1_histogram_config_t *phistogram, 02789 VL53L1_general_config_t *pgeneral, 02790 VL53L1_timing_config_t *ptiming, 02791 VL53L1_dynamic_config_t *pdynamic, 02792 VL53L1_system_control_t *psystem, 02793 VL53L1_tuning_parm_storage_t *ptuning_parms, 02794 VL53L1_zone_config_t *pzone_cfg) 02795 { 02796 02797 02798 VL53L1_Error status = VL53L1_ERROR_NONE; 02799 02800 LOG_FUNCTION_START(""); 02801 02802 02803 02804 status = 02805 VL53L1_preset_mode_histogram_short_range( 02806 phistpostprocess, 02807 pstatic, 02808 phistogram, 02809 pgeneral, 02810 ptiming, 02811 pdynamic, 02812 psystem, 02813 ptuning_parms, 02814 pzone_cfg); 02815 02816 02817 02818 if (status == VL53L1_ERROR_NONE) { 02819 02820 02821 02822 02823 02824 VL53L1_init_histogram_config_structure( 02825 7, 7, 0, 1, 1, 1, 02826 8+0, 8+1, 1, 1, 2, 2, 02827 phistogram); 02828 02829 02830 VL53L1_init_histogram_multizone_config_structure( 02831 7, 7, 0, 1, 1, 1, 02832 8+0, 8+1, 1, 1, 2, 2, 02833 &(pzone_cfg->multizone_hist_cfg)); 02834 02835 02836 02837 VL53L1_copy_hist_cfg_to_static_cfg( 02838 phistogram, 02839 pstatic, 02840 pgeneral, 02841 ptiming, 02842 pdynamic); 02843 02844 02845 02846 pdynamic->system__sequence_config = 02847 VL53L1_SEQUENCE_VHV_EN | 02848 VL53L1_SEQUENCE_PHASECAL_EN | 02849 VL53L1_SEQUENCE_DSS1_EN | 02850 VL53L1_SEQUENCE_DSS2_EN | 02851 VL53L1_SEQUENCE_MM1_EN | 02852 VL53L1_SEQUENCE_RANGE_EN; 02853 02854 } 02855 02856 LOG_FUNCTION_END(status); 02857 02858 return status; 02859 } 02860 02861 02862 VL53L1_Error VL53L1_preset_mode_histogram_short_range_mm2( 02863 VL53L1_hist_post_process_config_t *phistpostprocess, 02864 VL53L1_static_config_t *pstatic, 02865 VL53L1_histogram_config_t *phistogram, 02866 VL53L1_general_config_t *pgeneral, 02867 VL53L1_timing_config_t *ptiming, 02868 VL53L1_dynamic_config_t *pdynamic, 02869 VL53L1_system_control_t *psystem, 02870 VL53L1_tuning_parm_storage_t *ptuning_parms, 02871 VL53L1_zone_config_t *pzone_cfg) 02872 { 02873 02874 02875 VL53L1_Error status = VL53L1_ERROR_NONE; 02876 02877 LOG_FUNCTION_START(""); 02878 02879 02880 02881 status = 02882 VL53L1_preset_mode_histogram_short_range_mm1( 02883 phistpostprocess, 02884 pstatic, 02885 phistogram, 02886 pgeneral, 02887 ptiming, 02888 pdynamic, 02889 psystem, 02890 ptuning_parms, 02891 pzone_cfg); 02892 02893 02894 02895 if (status == VL53L1_ERROR_NONE) { 02896 02897 02898 02899 pdynamic->system__sequence_config = 02900 VL53L1_SEQUENCE_VHV_EN | 02901 VL53L1_SEQUENCE_PHASECAL_EN | 02902 VL53L1_SEQUENCE_DSS1_EN | 02903 VL53L1_SEQUENCE_DSS2_EN | 02904 VL53L1_SEQUENCE_MM2_EN | 02905 VL53L1_SEQUENCE_RANGE_EN; 02906 } 02907 02908 LOG_FUNCTION_END(status); 02909 02910 return status; 02911 } 02912 02913 02914 02915 VL53L1_Error VL53L1_preset_mode_histogram_characterisation( 02916 VL53L1_hist_post_process_config_t *phistpostprocess, 02917 VL53L1_static_config_t *pstatic, 02918 VL53L1_histogram_config_t *phistogram, 02919 VL53L1_general_config_t *pgeneral, 02920 VL53L1_timing_config_t *ptiming, 02921 VL53L1_dynamic_config_t *pdynamic, 02922 VL53L1_system_control_t *psystem, 02923 VL53L1_tuning_parm_storage_t *ptuning_parms, 02924 VL53L1_zone_config_t *pzone_cfg) 02925 { 02926 02927 02928 VL53L1_Error status = VL53L1_ERROR_NONE; 02929 02930 LOG_FUNCTION_START(""); 02931 02932 02933 02934 status = 02935 VL53L1_preset_mode_histogram_ranging( 02936 phistpostprocess, 02937 pstatic, 02938 phistogram, 02939 pgeneral, 02940 ptiming, 02941 pdynamic, 02942 psystem, 02943 ptuning_parms, 02944 pzone_cfg); 02945 02946 02947 02948 if (status == VL53L1_ERROR_NONE) { 02949 02950 02951 02952 pstatic->debug__ctrl = 0x01; 02953 psystem->power_management__go1_power_force = 0x01; 02954 02955 pdynamic->system__sequence_config = 02956 VL53L1_SEQUENCE_VHV_EN | 02957 VL53L1_SEQUENCE_PHASECAL_EN | 02958 VL53L1_SEQUENCE_RANGE_EN; 02959 02960 psystem->system__mode_start = 02961 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM | 02962 VL53L1_DEVICEREADOUTMODE_SPLIT_MANUAL | 02963 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 02964 } 02965 02966 LOG_FUNCTION_END(status); 02967 02968 return status; 02969 } 02970 02971 02972 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_planar( 02973 VL53L1_hist_post_process_config_t *phistpostprocess, 02974 VL53L1_static_config_t *pstatic, 02975 VL53L1_histogram_config_t *phistogram, 02976 VL53L1_general_config_t *pgeneral, 02977 VL53L1_timing_config_t *ptiming, 02978 VL53L1_dynamic_config_t *pdynamic, 02979 VL53L1_system_control_t *psystem, 02980 VL53L1_tuning_parm_storage_t *ptuning_parms, 02981 VL53L1_zone_config_t *pzone_cfg) 02982 { 02983 02984 02985 VL53L1_Error status = VL53L1_ERROR_NONE; 02986 02987 LOG_FUNCTION_START(""); 02988 02989 02990 02991 status = 02992 VL53L1_preset_mode_histogram_multizone_long_range( 02993 phistpostprocess, 02994 pstatic, 02995 phistogram, 02996 pgeneral, 02997 ptiming, 02998 pdynamic, 02999 psystem, 03000 ptuning_parms, 03001 pzone_cfg); 03002 03003 03004 03005 if (status == VL53L1_ERROR_NONE) { 03006 03007 03008 03009 status = 03010 VL53L1_zone_preset_xtalk_planar( 03011 pgeneral, 03012 pzone_cfg); 03013 03014 03015 03016 ptiming->range_config__vcsel_period_a = 0x09; 03017 ptiming->range_config__vcsel_period_b = 0x09; 03018 03019 03020 03021 VL53L1_init_histogram_config_structure( 03022 7, 0, 1, 2, 3, 4, 03023 7, 0, 1, 2, 3, 4, 03024 phistogram); 03025 03026 03027 03028 VL53L1_init_histogram_multizone_config_structure( 03029 7, 0, 1, 2, 3, 4, 03030 7, 0, 1, 2, 3, 4, 03031 &(pzone_cfg->multizone_hist_cfg)); 03032 03033 03034 03035 03036 if (status == VL53L1_ERROR_NONE) { 03037 status = 03038 VL53L1_set_histogram_multizone_initial_bin_config( 03039 pzone_cfg, 03040 phistogram, 03041 &(pzone_cfg->multizone_hist_cfg)); 03042 } 03043 03044 03045 03046 VL53L1_copy_hist_cfg_to_static_cfg( 03047 phistogram, 03048 pstatic, 03049 pgeneral, 03050 ptiming, 03051 pdynamic); 03052 03053 } 03054 03055 LOG_FUNCTION_END(status); 03056 03057 return status; 03058 } 03059 03060 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_mm1( 03061 VL53L1_hist_post_process_config_t *phistpostprocess, 03062 VL53L1_static_config_t *pstatic, 03063 VL53L1_histogram_config_t *phistogram, 03064 VL53L1_general_config_t *pgeneral, 03065 VL53L1_timing_config_t *ptiming, 03066 VL53L1_dynamic_config_t *pdynamic, 03067 VL53L1_system_control_t *psystem, 03068 VL53L1_tuning_parm_storage_t *ptuning_parms, 03069 VL53L1_zone_config_t *pzone_cfg) 03070 { 03071 03072 03073 VL53L1_Error status = VL53L1_ERROR_NONE; 03074 03075 LOG_FUNCTION_START(""); 03076 03077 03078 03079 status = 03080 VL53L1_preset_mode_histogram_ranging( 03081 phistpostprocess, 03082 pstatic, 03083 phistogram, 03084 pgeneral, 03085 ptiming, 03086 pdynamic, 03087 psystem, 03088 ptuning_parms, 03089 pzone_cfg); 03090 03091 03092 03093 03094 if (status == VL53L1_ERROR_NONE) { 03095 03096 03097 03098 03099 03100 VL53L1_init_histogram_config_structure( 03101 8+7, 8+0, 8+1, 8+2, 8+3, 8+4, 03102 8+7, 8+0, 8+1, 8+2, 8+3, 8+4, 03103 phistogram); 03104 03105 03106 VL53L1_init_histogram_multizone_config_structure( 03107 8+7, 8+0, 8+1, 8+2, 8+3, 8+4, 03108 8+7, 8+0, 8+1, 8+2, 8+3, 8+4, 03109 &(pzone_cfg->multizone_hist_cfg)); 03110 03111 03112 03113 VL53L1_copy_hist_cfg_to_static_cfg( 03114 phistogram, 03115 pstatic, 03116 pgeneral, 03117 ptiming, 03118 pdynamic); 03119 03120 03121 03122 ptiming->range_config__vcsel_period_a = 0x09; 03123 ptiming->range_config__vcsel_period_b = 0x09; 03124 03125 03126 03127 ptiming->mm_config__timeout_macrop_a_hi = 0x00; 03128 ptiming->mm_config__timeout_macrop_a_lo = 0x21; 03129 ptiming->mm_config__timeout_macrop_b_hi = 0x00; 03130 ptiming->mm_config__timeout_macrop_b_lo = 0x21; 03131 03132 03133 03134 ptiming->range_config__timeout_macrop_a_hi = 0x00; 03135 ptiming->range_config__timeout_macrop_a_lo = 0x29; 03136 ptiming->range_config__timeout_macrop_b_hi = 0x00; 03137 ptiming->range_config__timeout_macrop_b_lo = 0x29; 03138 03139 03140 03141 pgeneral->cal_config__vcsel_start = 0x09; 03142 03143 03144 03145 pgeneral->phasecal_config__timeout_macrop = 0xF5; 03146 03147 03148 03149 pdynamic->sd_config__woi_sd0 = 0x09; 03150 pdynamic->sd_config__woi_sd1 = 0x09; 03151 pdynamic->sd_config__initial_phase_sd0 = 0x09; 03152 pdynamic->sd_config__initial_phase_sd1 = 0x06; 03153 03154 pdynamic->system__sequence_config = 03155 VL53L1_SEQUENCE_VHV_EN | 03156 VL53L1_SEQUENCE_PHASECAL_EN | 03157 VL53L1_SEQUENCE_DSS1_EN | 03158 VL53L1_SEQUENCE_DSS2_EN | 03159 VL53L1_SEQUENCE_MM1_EN | 03160 VL53L1_SEQUENCE_RANGE_EN; 03161 03162 03163 03164 03165 psystem->system__mode_start = 03166 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM | 03167 VL53L1_DEVICEREADOUTMODE_DUAL_SD | 03168 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK; 03169 } 03170 03171 LOG_FUNCTION_END(status); 03172 03173 return status; 03174 } 03175 03176 03177 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_mm2( 03178 VL53L1_hist_post_process_config_t *phistpostprocess, 03179 VL53L1_static_config_t *pstatic, 03180 VL53L1_histogram_config_t *phistogram, 03181 VL53L1_general_config_t *pgeneral, 03182 VL53L1_timing_config_t *ptiming, 03183 VL53L1_dynamic_config_t *pdynamic, 03184 VL53L1_system_control_t *psystem, 03185 VL53L1_tuning_parm_storage_t *ptuning_parms, 03186 VL53L1_zone_config_t *pzone_cfg) 03187 { 03188 03189 03190 VL53L1_Error status = VL53L1_ERROR_NONE; 03191 03192 LOG_FUNCTION_START(""); 03193 03194 03195 03196 status = 03197 VL53L1_preset_mode_histogram_xtalk_mm1( 03198 phistpostprocess, 03199 pstatic, 03200 phistogram, 03201 pgeneral, 03202 ptiming, 03203 pdynamic, 03204 psystem, 03205 ptuning_parms, 03206 pzone_cfg); 03207 03208 03209 pdynamic->system__sequence_config = 03210 VL53L1_SEQUENCE_VHV_EN | 03211 VL53L1_SEQUENCE_PHASECAL_EN | 03212 VL53L1_SEQUENCE_DSS1_EN | 03213 VL53L1_SEQUENCE_DSS2_EN | 03214 VL53L1_SEQUENCE_MM2_EN | 03215 VL53L1_SEQUENCE_RANGE_EN; 03216 03217 03218 03219 LOG_FUNCTION_END(status); 03220 03221 return status; 03222 } 03223 03224 03225 03226 03227 VL53L1_Error VL53L1_preset_mode_histogram_multizone( 03228 VL53L1_hist_post_process_config_t *phistpostprocess, 03229 VL53L1_static_config_t *pstatic, 03230 VL53L1_histogram_config_t *phistogram, 03231 VL53L1_general_config_t *pgeneral, 03232 VL53L1_timing_config_t *ptiming, 03233 VL53L1_dynamic_config_t *pdynamic, 03234 VL53L1_system_control_t *psystem, 03235 VL53L1_tuning_parm_storage_t *ptuning_parms, 03236 VL53L1_zone_config_t *pzone_cfg) 03237 { 03238 03239 03240 VL53L1_Error status = VL53L1_ERROR_NONE; 03241 03242 LOG_FUNCTION_START(""); 03243 03244 03245 03246 status = 03247 VL53L1_preset_mode_histogram_medium_range( 03248 phistpostprocess, 03249 pstatic, 03250 phistogram, 03251 pgeneral, 03252 ptiming, 03253 pdynamic, 03254 psystem, 03255 ptuning_parms, 03256 pzone_cfg); 03257 03258 03259 03260 if (status == VL53L1_ERROR_NONE) { 03261 03262 03263 03264 status = 03265 VL53L1_init_zone_config_structure( 03266 4, 8, 2, 03267 4, 8, 2, 03268 7, 7, 03269 pzone_cfg); 03270 03271 pgeneral->global_config__stream_divider = 03272 pzone_cfg->active_zones + 1; 03273 03274 03275 03276 if (status == VL53L1_ERROR_NONE) { 03277 status = 03278 VL53L1_set_histogram_multizone_initial_bin_config( 03279 pzone_cfg, 03280 phistogram, 03281 &(pzone_cfg->multizone_hist_cfg)); 03282 } 03283 03284 VL53L1_copy_hist_cfg_to_static_cfg( 03285 phistogram, 03286 pstatic, 03287 pgeneral, 03288 ptiming, 03289 pdynamic); 03290 } 03291 03292 LOG_FUNCTION_END(status); 03293 03294 return status; 03295 } 03296 03297 VL53L1_Error VL53L1_preset_mode_histogram_multizone_short_range( 03298 VL53L1_hist_post_process_config_t *phistpostprocess, 03299 VL53L1_static_config_t *pstatic, 03300 VL53L1_histogram_config_t *phistogram, 03301 VL53L1_general_config_t *pgeneral, 03302 VL53L1_timing_config_t *ptiming, 03303 VL53L1_dynamic_config_t *pdynamic, 03304 VL53L1_system_control_t *psystem, 03305 VL53L1_tuning_parm_storage_t *ptuning_parms, 03306 VL53L1_zone_config_t *pzone_cfg) 03307 { 03308 03309 03310 VL53L1_Error status = VL53L1_ERROR_NONE; 03311 03312 LOG_FUNCTION_START(""); 03313 03314 03315 03316 status = 03317 VL53L1_preset_mode_histogram_short_range( 03318 phistpostprocess, 03319 pstatic, 03320 phistogram, 03321 pgeneral, 03322 ptiming, 03323 pdynamic, 03324 psystem, 03325 ptuning_parms, 03326 pzone_cfg); 03327 03328 03329 03330 if (status == VL53L1_ERROR_NONE) { 03331 03332 03333 03334 status = 03335 VL53L1_init_zone_config_structure( 03336 4, 8, 2, 03337 4, 8, 2, 03338 7, 7, 03339 pzone_cfg); 03340 03341 pgeneral->global_config__stream_divider = 03342 pzone_cfg->active_zones + 1; 03343 03344 03345 03346 if (status == VL53L1_ERROR_NONE) { 03347 status = 03348 VL53L1_set_histogram_multizone_initial_bin_config( 03349 pzone_cfg, 03350 phistogram, 03351 &(pzone_cfg->multizone_hist_cfg) 03352 ); 03353 } 03354 03355 03356 03357 VL53L1_copy_hist_cfg_to_static_cfg( 03358 phistogram, 03359 pstatic, 03360 pgeneral, 03361 ptiming, 03362 pdynamic); 03363 } 03364 03365 LOG_FUNCTION_END(status); 03366 03367 return status; 03368 } 03369 03370 03371 VL53L1_Error VL53L1_preset_mode_histogram_multizone_long_range( 03372 VL53L1_hist_post_process_config_t *phistpostprocess, 03373 VL53L1_static_config_t *pstatic, 03374 VL53L1_histogram_config_t *phistogram, 03375 VL53L1_general_config_t *pgeneral, 03376 VL53L1_timing_config_t *ptiming, 03377 VL53L1_dynamic_config_t *pdynamic, 03378 VL53L1_system_control_t *psystem, 03379 VL53L1_tuning_parm_storage_t *ptuning_parms, 03380 VL53L1_zone_config_t *pzone_cfg) 03381 { 03382 03383 03384 VL53L1_Error status = VL53L1_ERROR_NONE; 03385 03386 LOG_FUNCTION_START(""); 03387 03388 03389 03390 status = 03391 VL53L1_preset_mode_histogram_long_range( 03392 phistpostprocess, 03393 pstatic, 03394 phistogram, 03395 pgeneral, 03396 ptiming, 03397 pdynamic, 03398 psystem, 03399 ptuning_parms, 03400 pzone_cfg); 03401 03402 03403 03404 if (status == VL53L1_ERROR_NONE) { 03405 03406 03407 03408 status = 03409 VL53L1_init_zone_config_structure( 03410 4, 8, 2, 03411 4, 8, 2, 03412 7, 7, 03413 pzone_cfg); 03414 03415 pgeneral->global_config__stream_divider = 03416 pzone_cfg->active_zones + 1; 03417 03418 03419 03420 if (status == VL53L1_ERROR_NONE) { 03421 status = 03422 VL53L1_set_histogram_multizone_initial_bin_config( 03423 pzone_cfg, 03424 phistogram, 03425 &(pzone_cfg->multizone_hist_cfg)); 03426 } 03427 03428 03429 03430 VL53L1_copy_hist_cfg_to_static_cfg( 03431 phistogram, 03432 pstatic, 03433 pgeneral, 03434 ptiming, 03435 pdynamic); 03436 } 03437 03438 LOG_FUNCTION_END(status); 03439 03440 return status; 03441 } 03442 03443 03444 03445 03446 VL53L1_Error VL53L1_preset_mode_olt( 03447 VL53L1_static_config_t *pstatic, 03448 VL53L1_histogram_config_t *phistogram, 03449 VL53L1_general_config_t *pgeneral, 03450 VL53L1_timing_config_t *ptiming, 03451 VL53L1_dynamic_config_t *pdynamic, 03452 VL53L1_system_control_t *psystem, 03453 VL53L1_tuning_parm_storage_t *ptuning_parms, 03454 VL53L1_zone_config_t *pzone_cfg) 03455 { 03456 03457 03458 VL53L1_Error status = VL53L1_ERROR_NONE; 03459 03460 LOG_FUNCTION_START(""); 03461 03462 03463 03464 status = VL53L1_preset_mode_standard_ranging( 03465 pstatic, 03466 phistogram, 03467 pgeneral, 03468 ptiming, 03469 pdynamic, 03470 psystem, 03471 ptuning_parms, 03472 pzone_cfg); 03473 03474 03475 03476 if (status == VL53L1_ERROR_NONE) 03477 03478 psystem->system__stream_count_ctrl = 0x01; 03479 03480 LOG_FUNCTION_END(status); 03481 03482 return status; 03483 } 03484 03485 03486 void VL53L1_copy_hist_cfg_to_static_cfg( 03487 VL53L1_histogram_config_t *phistogram, 03488 VL53L1_static_config_t *pstatic, 03489 VL53L1_general_config_t *pgeneral, 03490 VL53L1_timing_config_t *ptiming, 03491 VL53L1_dynamic_config_t *pdynamic) 03492 { 03493 03494 03495 LOG_FUNCTION_START(""); 03496 03497 SUPPRESS_UNUSED_WARNING(pgeneral); 03498 03499 pstatic->sigma_estimator__effective_pulse_width_ns = 03500 phistogram->histogram_config__high_amb_even_bin_0_1; 03501 pstatic->sigma_estimator__effective_ambient_width_ns = 03502 phistogram->histogram_config__high_amb_even_bin_2_3; 03503 pstatic->sigma_estimator__sigma_ref_mm = 03504 phistogram->histogram_config__high_amb_even_bin_4_5; 03505 03506 pstatic->algo__crosstalk_compensation_valid_height_mm = 03507 phistogram->histogram_config__high_amb_odd_bin_0_1; 03508 03509 pstatic->spare_host_config__static_config_spare_0 = 03510 phistogram->histogram_config__high_amb_odd_bin_2_3; 03511 pstatic->spare_host_config__static_config_spare_1 = 03512 phistogram->histogram_config__high_amb_odd_bin_4_5; 03513 03514 pstatic->algo__range_ignore_threshold_mcps = 03515 (((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1) 03516 << 8) 03517 + (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3; 03518 03519 pstatic->algo__range_ignore_valid_height_mm = 03520 phistogram->histogram_config__mid_amb_even_bin_4_5; 03521 pstatic->algo__range_min_clip = 03522 phistogram->histogram_config__mid_amb_odd_bin_0_1; 03523 pstatic->algo__consistency_check__tolerance = 03524 phistogram->histogram_config__mid_amb_odd_bin_2; 03525 03526 pstatic->spare_host_config__static_config_spare_2 = 03527 phistogram->histogram_config__mid_amb_odd_bin_3_4; 03528 pstatic->sd_config__reset_stages_msb = 03529 phistogram->histogram_config__mid_amb_odd_bin_5; 03530 03531 pstatic->sd_config__reset_stages_lsb = 03532 phistogram->histogram_config__user_bin_offset; 03533 03534 ptiming->range_config__sigma_thresh = 03535 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1) 03536 << 8) 03537 + (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3; 03538 03539 ptiming->range_config__min_count_rate_rtn_limit_mcps = 03540 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5) 03541 << 8) 03542 + (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1; 03543 03544 ptiming->range_config__valid_phase_low = 03545 phistogram->histogram_config__low_amb_odd_bin_2_3; 03546 ptiming->range_config__valid_phase_high = 03547 phistogram->histogram_config__low_amb_odd_bin_4_5; 03548 03549 pdynamic->system__thresh_high = 03550 phistogram->histogram_config__amb_thresh_low; 03551 03552 pdynamic->system__thresh_low = 03553 phistogram->histogram_config__amb_thresh_high; 03554 03555 pdynamic->system__enable_xtalk_per_quadrant = 03556 phistogram->histogram_config__spad_array_selection; 03557 03558 LOG_FUNCTION_END(0); 03559 03560 } 03561 03562 void VL53L1_copy_hist_bins_to_static_cfg( 03563 VL53L1_histogram_config_t *phistogram, 03564 VL53L1_static_config_t *pstatic, 03565 VL53L1_timing_config_t *ptiming) 03566 { 03567 03568 03569 LOG_FUNCTION_START(""); 03570 03571 pstatic->sigma_estimator__effective_pulse_width_ns = 03572 phistogram->histogram_config__high_amb_even_bin_0_1; 03573 pstatic->sigma_estimator__effective_ambient_width_ns = 03574 phistogram->histogram_config__high_amb_even_bin_2_3; 03575 pstatic->sigma_estimator__sigma_ref_mm = 03576 phistogram->histogram_config__high_amb_even_bin_4_5; 03577 03578 pstatic->algo__crosstalk_compensation_valid_height_mm = 03579 phistogram->histogram_config__high_amb_odd_bin_0_1; 03580 03581 pstatic->spare_host_config__static_config_spare_0 = 03582 phistogram->histogram_config__high_amb_odd_bin_2_3; 03583 pstatic->spare_host_config__static_config_spare_1 = 03584 phistogram->histogram_config__high_amb_odd_bin_4_5; 03585 03586 pstatic->algo__range_ignore_threshold_mcps = 03587 (((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1) 03588 << 8) 03589 + (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3; 03590 03591 pstatic->algo__range_ignore_valid_height_mm = 03592 phistogram->histogram_config__mid_amb_even_bin_4_5; 03593 pstatic->algo__range_min_clip = 03594 phistogram->histogram_config__mid_amb_odd_bin_0_1; 03595 pstatic->algo__consistency_check__tolerance = 03596 phistogram->histogram_config__mid_amb_odd_bin_2; 03597 03598 pstatic->spare_host_config__static_config_spare_2 = 03599 phistogram->histogram_config__mid_amb_odd_bin_3_4; 03600 pstatic->sd_config__reset_stages_msb = 03601 phistogram->histogram_config__mid_amb_odd_bin_5; 03602 03603 ptiming->range_config__sigma_thresh = 03604 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1) 03605 << 8) 03606 + (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3; 03607 03608 ptiming->range_config__min_count_rate_rtn_limit_mcps = 03609 (((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5) 03610 << 8) 03611 + (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1; 03612 03613 ptiming->range_config__valid_phase_low = 03614 phistogram->histogram_config__low_amb_odd_bin_2_3; 03615 ptiming->range_config__valid_phase_high = 03616 phistogram->histogram_config__low_amb_odd_bin_4_5; 03617 03618 LOG_FUNCTION_END(0); 03619 03620 } 03621 03622 03623 VL53L1_Error VL53L1_preset_mode_histogram_ranging_ref( 03624 VL53L1_hist_post_process_config_t *phistpostprocess, 03625 VL53L1_static_config_t *pstatic, 03626 VL53L1_histogram_config_t *phistogram, 03627 VL53L1_general_config_t *pgeneral, 03628 VL53L1_timing_config_t *ptiming, 03629 VL53L1_dynamic_config_t *pdynamic, 03630 VL53L1_system_control_t *psystem, 03631 VL53L1_tuning_parm_storage_t *ptuning_parms, 03632 VL53L1_zone_config_t *pzone_cfg) 03633 { 03634 03635 03636 VL53L1_Error status = VL53L1_ERROR_NONE; 03637 03638 LOG_FUNCTION_START(""); 03639 03640 03641 03642 status = 03643 VL53L1_preset_mode_histogram_ranging( 03644 phistpostprocess, 03645 pstatic, 03646 phistogram, 03647 pgeneral, 03648 ptiming, 03649 pdynamic, 03650 psystem, 03651 ptuning_parms, 03652 pzone_cfg); 03653 03654 03655 03656 if (status == VL53L1_ERROR_NONE) { 03657 03658 03659 03660 phistogram->histogram_config__spad_array_selection = 0x01; 03661 03662 03663 03664 VL53L1_copy_hist_cfg_to_static_cfg( 03665 phistogram, 03666 pstatic, 03667 pgeneral, 03668 ptiming, 03669 pdynamic); 03670 } 03671 03672 LOG_FUNCTION_END(status); 03673 03674 return status; 03675 } 03676 03677 03678 03679 03680
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