ST Expansion SW Team / VL53L1

Fork, renaming of VL53L1CB-2

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_53L1CB

inc/vl53l1_hist_structs.h@13:3f1b341901dd, 2021-06-11 (annotated)

Committer:
Charles MacNeill
Date:
Fri Jun 11 17:08:27 2021 +0100
Revision:
13:3f1b341901dd
Parent:
7:1add29d51e72 
changing case of vl53l1cb.* so it works in linux

Who changed what in which revision?

UserRevisionLine numberNew contents of line
charlesmn 0:3ac96e360672 1
Charles MacNeill 7:1add29d51e72 2 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
Charles MacNeill 7:1add29d51e72 3 /******************************************************************************
charlesmn 0:3ac96e360672 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn 0:3ac96e360672 5
Charles MacNeill 7:1add29d51e72 6 This file is part of VL53L1 and is dual licensed,
Charles MacNeill 7:1add29d51e72 7 either GPL-2.0+
charlesmn 0:3ac96e360672 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 7:1add29d51e72 9 ******************************************************************************
Charles MacNeill 7:1add29d51e72 10 */
charlesmn 0:3ac96e360672 11
charlesmn 0:3ac96e360672 12
charlesmn 0:3ac96e360672 13
charlesmn 0:3ac96e360672 14
charlesmn 0:3ac96e360672 15
charlesmn 0:3ac96e360672 16 #ifndef _VL53L1_HIST_STRUCTS_H_
charlesmn 0:3ac96e360672 17 #define _VL53L1_HIST_STRUCTS_H_
charlesmn 0:3ac96e360672 18
charlesmn 0:3ac96e360672 19 #include "vl53l1_ll_device.h"
charlesmn 0:3ac96e360672 20 #include "vl53l1_dmax_structs.h"
charlesmn 0:3ac96e360672 21
charlesmn 0:3ac96e360672 22 #ifdef __cplusplus
charlesmn 0:3ac96e360672 23 extern "C"
charlesmn 0:3ac96e360672 24 {
charlesmn 0:3ac96e360672 25 #endif
charlesmn 0:3ac96e360672 26
charlesmn 0:3ac96e360672 27 #define VL53L1_MAX_BIN_SEQUENCE_LENGTH 6
charlesmn 0:3ac96e360672 28 #define VL53L1_MAX_BIN_SEQUENCE_CODE 15
charlesmn 0:3ac96e360672 29 #define VL53L1_HISTOGRAM_BUFFER_SIZE 24
charlesmn 0:3ac96e360672 30 #define VL53L1_XTALK_HISTO_BINS 12
charlesmn 0:3ac96e360672 31
charlesmn 0:3ac96e360672 32
charlesmn 0:3ac96e360672 33
charlesmn 0:3ac96e360672 34 typedef struct {
charlesmn 0:3ac96e360672 35
charlesmn 0:3ac96e360672 36 uint8_t histogram_config__spad_array_selection;
charlesmn 0:3ac96e360672 37
charlesmn 0:3ac96e360672 38 uint8_t histogram_config__low_amb_even_bin_0_1;
charlesmn 0:3ac96e360672 39 uint8_t histogram_config__low_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 40 uint8_t histogram_config__low_amb_even_bin_4_5;
charlesmn 0:3ac96e360672 41
charlesmn 0:3ac96e360672 42 uint8_t histogram_config__low_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 43 uint8_t histogram_config__low_amb_odd_bin_2_3;
charlesmn 0:3ac96e360672 44 uint8_t histogram_config__low_amb_odd_bin_4_5;
charlesmn 0:3ac96e360672 45
charlesmn 0:3ac96e360672 46 uint8_t histogram_config__mid_amb_even_bin_0_1;
charlesmn 0:3ac96e360672 47 uint8_t histogram_config__mid_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 48 uint8_t histogram_config__mid_amb_even_bin_4_5;
charlesmn 0:3ac96e360672 49
charlesmn 0:3ac96e360672 50 uint8_t histogram_config__mid_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 51 uint8_t histogram_config__mid_amb_odd_bin_2;
charlesmn 0:3ac96e360672 52 uint8_t histogram_config__mid_amb_odd_bin_3_4;
charlesmn 0:3ac96e360672 53 uint8_t histogram_config__mid_amb_odd_bin_5;
charlesmn 0:3ac96e360672 54
charlesmn 0:3ac96e360672 55 uint8_t histogram_config__user_bin_offset;
charlesmn 0:3ac96e360672 56
charlesmn 0:3ac96e360672 57 uint8_t histogram_config__high_amb_even_bin_0_1;
charlesmn 0:3ac96e360672 58 uint8_t histogram_config__high_amb_even_bin_2_3;
charlesmn 0:3ac96e360672 59 uint8_t histogram_config__high_amb_even_bin_4_5;
charlesmn 0:3ac96e360672 60
charlesmn 0:3ac96e360672 61 uint8_t histogram_config__high_amb_odd_bin_0_1;
charlesmn 0:3ac96e360672 62 uint8_t histogram_config__high_amb_odd_bin_2_3;
charlesmn 0:3ac96e360672 63 uint8_t histogram_config__high_amb_odd_bin_4_5;
charlesmn 0:3ac96e360672 64
charlesmn 0:3ac96e360672 65 uint16_t histogram_config__amb_thresh_low;
charlesmn 0:3ac96e360672 66
charlesmn 0:3ac96e360672 67 uint16_t histogram_config__amb_thresh_high;
charlesmn 0:3ac96e360672 68
charlesmn 0:3ac96e360672 69
charlesmn 0:3ac96e360672 70 } VL53L1_histogram_config_t;
charlesmn 0:3ac96e360672 71
charlesmn 0:3ac96e360672 72
charlesmn 0:3ac96e360672 73
charlesmn 0:3ac96e360672 74
charlesmn 0:3ac96e360672 75 typedef struct {
charlesmn 0:3ac96e360672 76
charlesmn 0:3ac96e360672 77 VL53L1_HistAlgoSelect hist_algo_select;
charlesmn 0:3ac96e360672 78
charlesmn 0:3ac96e360672 79
charlesmn 0:3ac96e360672 80 VL53L1_HistTargetOrder hist_target_order;
charlesmn 0:3ac96e360672 81
charlesmn 0:3ac96e360672 82
charlesmn 0:3ac96e360672 83 uint8_t filter_woi0;
charlesmn 0:3ac96e360672 84
charlesmn 0:3ac96e360672 85 uint8_t filter_woi1;
charlesmn 0:3ac96e360672 86
charlesmn 0:3ac96e360672 87
charlesmn 0:3ac96e360672 88 VL53L1_HistAmbEstMethod hist_amb_est_method;
charlesmn 0:3ac96e360672 89
charlesmn 0:3ac96e360672 90 uint8_t ambient_thresh_sigma0;
charlesmn 0:3ac96e360672 91
charlesmn 0:3ac96e360672 92 uint8_t ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 93
charlesmn 0:3ac96e360672 94
charlesmn 0:3ac96e360672 95
charlesmn 0:3ac96e360672 96 uint16_t ambient_thresh_events_scaler;
charlesmn 0:3ac96e360672 97
charlesmn 0:3ac96e360672 98
charlesmn 0:3ac96e360672 99
charlesmn 0:3ac96e360672 100 int32_t min_ambient_thresh_events;
charlesmn 0:3ac96e360672 101
charlesmn 0:3ac96e360672 102 uint16_t noise_threshold;
charlesmn 0:3ac96e360672 103
charlesmn 0:3ac96e360672 104
charlesmn 0:3ac96e360672 105 int32_t signal_total_events_limit;
charlesmn 0:3ac96e360672 106
charlesmn 0:3ac96e360672 107 uint8_t sigma_estimator__sigma_ref_mm;
charlesmn 0:3ac96e360672 108
charlesmn 0:3ac96e360672 109 uint16_t sigma_thresh;
charlesmn 0:3ac96e360672 110
charlesmn 0:3ac96e360672 111 int16_t range_offset_mm;
charlesmn 0:3ac96e360672 112
charlesmn 0:3ac96e360672 113 uint16_t gain_factor;
charlesmn 0:3ac96e360672 114
charlesmn 0:3ac96e360672 115
charlesmn 0:3ac96e360672 116 uint8_t valid_phase_low;
charlesmn 0:3ac96e360672 117
charlesmn 0:3ac96e360672 118 uint8_t valid_phase_high;
charlesmn 0:3ac96e360672 119
charlesmn 0:3ac96e360672 120 uint8_t algo__consistency_check__phase_tolerance;
charlesmn 0:3ac96e360672 121
charlesmn 0:3ac96e360672 122 uint8_t algo__consistency_check__event_sigma;
charlesmn 0:3ac96e360672 123
charlesmn 0:3ac96e360672 124
charlesmn 0:3ac96e360672 125
charlesmn 0:3ac96e360672 126 uint16_t algo__consistency_check__event_min_spad_count;
charlesmn 0:3ac96e360672 127
charlesmn 0:3ac96e360672 128
charlesmn 0:3ac96e360672 129
charlesmn 0:3ac96e360672 130 uint16_t algo__consistency_check__min_max_tolerance;
charlesmn 0:3ac96e360672 131
charlesmn 0:3ac96e360672 132
charlesmn 0:3ac96e360672 133 uint8_t algo__crosstalk_compensation_enable;
charlesmn 0:3ac96e360672 134
charlesmn 0:3ac96e360672 135 uint32_t algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 136
charlesmn 0:3ac96e360672 137 int16_t algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 138
charlesmn 0:3ac96e360672 139 int16_t algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 140
charlesmn 0:3ac96e360672 141
charlesmn 0:3ac96e360672 142 int16_t algo__crosstalk_detect_min_valid_range_mm;
charlesmn 0:3ac96e360672 143
charlesmn 0:3ac96e360672 144 int16_t algo__crosstalk_detect_max_valid_range_mm;
charlesmn 0:3ac96e360672 145
charlesmn 0:3ac96e360672 146 uint16_t algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 147
charlesmn 0:3ac96e360672 148 uint16_t algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 149
charlesmn 0:3ac96e360672 150
charlesmn 0:3ac96e360672 151
charlesmn 0:3ac96e360672 152 uint8_t algo__crosstalk_detect_event_sigma;
charlesmn 0:3ac96e360672 153
charlesmn 0:3ac96e360672 154
charlesmn 0:3ac96e360672 155
charlesmn 0:3ac96e360672 156 uint16_t algo__crosstalk_detect_min_max_tolerance;
charlesmn 0:3ac96e360672 157
charlesmn 0:3ac96e360672 158
charlesmn 0:3ac96e360672 159 } VL53L1_hist_post_process_config_t;
charlesmn 0:3ac96e360672 160
charlesmn 0:3ac96e360672 161
charlesmn 0:3ac96e360672 162
charlesmn 0:3ac96e360672 163 typedef struct {
charlesmn 0:3ac96e360672 164
charlesmn 0:3ac96e360672 165
charlesmn 0:3ac96e360672 166 VL53L1_DeviceState cfg_device_state;
charlesmn 0:3ac96e360672 167
charlesmn 0:3ac96e360672 168 VL53L1_DeviceState rd_device_state;
charlesmn 0:3ac96e360672 169
charlesmn 0:3ac96e360672 170
charlesmn 0:3ac96e360672 171 uint8_t zone_id;
charlesmn 0:3ac96e360672 172
charlesmn 0:3ac96e360672 173 uint32_t time_stamp;
charlesmn 0:3ac96e360672 174
charlesmn 0:3ac96e360672 175
charlesmn 0:3ac96e360672 176 uint8_t VL53L1_p_022;
charlesmn 0:3ac96e360672 177
charlesmn 0:3ac96e360672 178 uint8_t VL53L1_p_023;
charlesmn 0:3ac96e360672 179
charlesmn 0:3ac96e360672 180 uint8_t VL53L1_p_024;
charlesmn 0:3ac96e360672 181
charlesmn 0:3ac96e360672 182 uint8_t number_of_ambient_bins;
charlesmn 0:3ac96e360672 183
charlesmn 0:3ac96e360672 184 uint8_t bin_seq[VL53L1_MAX_BIN_SEQUENCE_LENGTH];
charlesmn 0:3ac96e360672 185
charlesmn 0:3ac96e360672 186 uint8_t bin_rep[VL53L1_MAX_BIN_SEQUENCE_LENGTH];
charlesmn 0:3ac96e360672 187
charlesmn 0:3ac96e360672 188 int32_t bin_data[VL53L1_HISTOGRAM_BUFFER_SIZE];
charlesmn 0:3ac96e360672 189
charlesmn 0:3ac96e360672 190
charlesmn 0:3ac96e360672 191 uint8_t result__interrupt_status;
charlesmn 0:3ac96e360672 192
charlesmn 0:3ac96e360672 193 uint8_t result__range_status;
charlesmn 0:3ac96e360672 194
charlesmn 0:3ac96e360672 195 uint8_t result__report_status;
charlesmn 0:3ac96e360672 196
charlesmn 0:3ac96e360672 197 uint8_t result__stream_count;
charlesmn 0:3ac96e360672 198
charlesmn 0:3ac96e360672 199 uint16_t result__dss_actual_effective_spads;
charlesmn 0:3ac96e360672 200
charlesmn 0:3ac96e360672 201
charlesmn 0:3ac96e360672 202 uint16_t phasecal_result__reference_phase;
charlesmn 0:3ac96e360672 203
charlesmn 0:3ac96e360672 204 uint8_t phasecal_result__vcsel_start;
charlesmn 0:3ac96e360672 205
charlesmn 0:3ac96e360672 206 uint8_t cal_config__vcsel_start;
charlesmn 0:3ac96e360672 207
charlesmn 0:3ac96e360672 208 uint16_t vcsel_width;
charlesmn 0:3ac96e360672 209
charlesmn 0:3ac96e360672 210 uint8_t VL53L1_p_009;
charlesmn 0:3ac96e360672 211
charlesmn 0:3ac96e360672 212 uint16_t VL53L1_p_019;
charlesmn 0:3ac96e360672 213
charlesmn 0:3ac96e360672 214 uint32_t total_periods_elapsed;
charlesmn 0:3ac96e360672 215
charlesmn 0:3ac96e360672 216
charlesmn 0:3ac96e360672 217 uint32_t peak_duration_us;
charlesmn 0:3ac96e360672 218
charlesmn 0:3ac96e360672 219 uint32_t woi_duration_us;
charlesmn 0:3ac96e360672 220
charlesmn 0:3ac96e360672 221
charlesmn 0:3ac96e360672 222 int32_t min_bin_value;
charlesmn 0:3ac96e360672 223
charlesmn 0:3ac96e360672 224 int32_t max_bin_value;
charlesmn 0:3ac96e360672 225
charlesmn 0:3ac96e360672 226
charlesmn 0:3ac96e360672 227 uint16_t zero_distance_phase;
charlesmn 0:3ac96e360672 228
charlesmn 0:3ac96e360672 229 uint8_t number_of_ambient_samples;
charlesmn 0:3ac96e360672 230
charlesmn 0:3ac96e360672 231 int32_t ambient_events_sum;
charlesmn 0:3ac96e360672 232
charlesmn 0:3ac96e360672 233 int32_t VL53L1_p_004;
charlesmn 0:3ac96e360672 234
charlesmn 0:3ac96e360672 235
charlesmn 0:3ac96e360672 236 uint8_t roi_config__user_roi_centre_spad;
charlesmn 0:3ac96e360672 237
charlesmn 0:3ac96e360672 238 uint8_t roi_config__user_roi_requested_global_xy_size;
charlesmn 0:3ac96e360672 239
charlesmn 0:3ac96e360672 240
charlesmn 0:3ac96e360672 241 } VL53L1_histogram_bin_data_t;
charlesmn 0:3ac96e360672 242
charlesmn 0:3ac96e360672 243
charlesmn 0:3ac96e360672 244
charlesmn 0:3ac96e360672 245
charlesmn 0:3ac96e360672 246 typedef struct {
charlesmn 0:3ac96e360672 247
charlesmn 0:3ac96e360672 248
charlesmn 0:3ac96e360672 249 uint8_t zone_id;
charlesmn 0:3ac96e360672 250
charlesmn 0:3ac96e360672 251 uint32_t time_stamp;
charlesmn 0:3ac96e360672 252
charlesmn 0:3ac96e360672 253
charlesmn 0:3ac96e360672 254 uint8_t VL53L1_p_022;
charlesmn 0:3ac96e360672 255
charlesmn 0:3ac96e360672 256 uint8_t VL53L1_p_023;
charlesmn 0:3ac96e360672 257
charlesmn 0:3ac96e360672 258 uint8_t VL53L1_p_024;
charlesmn 0:3ac96e360672 259
charlesmn 0:3ac96e360672 260 uint32_t bin_data[VL53L1_XTALK_HISTO_BINS];
charlesmn 0:3ac96e360672 261
charlesmn 0:3ac96e360672 262
charlesmn 0:3ac96e360672 263
charlesmn 0:3ac96e360672 264 uint16_t phasecal_result__reference_phase;
charlesmn 0:3ac96e360672 265
charlesmn 0:3ac96e360672 266 uint8_t phasecal_result__vcsel_start;
charlesmn 0:3ac96e360672 267
charlesmn 0:3ac96e360672 268 uint8_t cal_config__vcsel_start;
charlesmn 0:3ac96e360672 269
charlesmn 0:3ac96e360672 270 uint16_t vcsel_width;
charlesmn 0:3ac96e360672 271
charlesmn 0:3ac96e360672 272 uint16_t VL53L1_p_019;
charlesmn 0:3ac96e360672 273
charlesmn 0:3ac96e360672 274 uint16_t zero_distance_phase;
charlesmn 0:3ac96e360672 275
charlesmn 0:3ac96e360672 276
charlesmn 0:3ac96e360672 277 } VL53L1_xtalk_histogram_shape_t;
charlesmn 0:3ac96e360672 278
charlesmn 0:3ac96e360672 279
charlesmn 0:3ac96e360672 280
charlesmn 0:3ac96e360672 281
charlesmn 0:3ac96e360672 282 typedef struct {
charlesmn 0:3ac96e360672 283
charlesmn 0:3ac96e360672 284
charlesmn 0:3ac96e360672 285 VL53L1_xtalk_histogram_shape_t xtalk_shape;
charlesmn 0:3ac96e360672 286
charlesmn 0:3ac96e360672 287 VL53L1_histogram_bin_data_t xtalk_hist_removed;
charlesmn 0:3ac96e360672 288
charlesmn 0:3ac96e360672 289 } VL53L1_xtalk_histogram_data_t;
charlesmn 0:3ac96e360672 290
charlesmn 0:3ac96e360672 291
charlesmn 0:3ac96e360672 292
charlesmn 0:3ac96e360672 293
charlesmn 0:3ac96e360672 294 #ifdef __cplusplus
charlesmn 0:3ac96e360672 295 }
charlesmn 0:3ac96e360672 296 #endif
charlesmn 0:3ac96e360672 297
charlesmn 0:3ac96e360672 298 #endif
charlesmn 0:3ac96e360672 299