rfal_analogConfigTbl.h

00001 
00002 /******************************************************************************
00003   * @attention
00004   *
00005   * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
00006   *
00007   * Licensed under ST MYLIBERTY SOFTWARE LICENSE AGREEMENT (the "License");
00008   * You may not use this file except in compliance with the License.
00009   * You may obtain a copy of the License at:
00010   *
00011   *        http://www.st.com/myliberty
00012   *
00013   * Unless required by applicable law or agreed to in writing, software
00014   * distributed under the License is distributed on an "AS IS" BASIS,
00015   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
00016   * AND SPECIFICALLY DISCLAIMING THE IMPLIED WARRANTIES OF MERCHANTABILITY,
00017   * FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT.
00018   * See the License for the specific language governing permissions and
00019   * limitations under the License.
00020   *
00021 ******************************************************************************/
00022 
00023 /*
00024  *      PROJECT:   ST25R391x firmware
00025  *      $Revision: $
00026  *      LANGUAGE:  ISO C99
00027  */
00028 
00029 /*! \file rfal_analogConfig.h
00030  *
00031  *  \author bkam
00032  *
00033  *  \brief ST25R3911 Analog Configuration Settings
00034  *
00035  */
00036 
00037 #ifndef ST25R3911_ANALOGCONFIG_H
00038 #define ST25R3911_ANALOGCONFIG_H
00039 
00040 /*
00041  ******************************************************************************
00042  * INCLUDES
00043  ******************************************************************************
00044  */
00045 #include "rfal_AnalogConfig.h"
00046 #include "st25r3911_com.h"
00047 
00048 /*
00049  ******************************************************************************
00050  * DEFINES
00051  ******************************************************************************
00052  */
00053 
00054 /*
00055  ******************************************************************************
00056  * GLOBAL MACROS
00057  ******************************************************************************
00058  */
00059 
00060 /*! Macro for Configuration Setting with only one register-mask-value set:
00061  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1] */
00062 #define MODE_ENTRY_1_REG(MODE, R0, M0, V0)              \
00063     (MODE >> 8), (MODE & 0xFF), 1, (R0 >> 8), (R0 & 0xFF), (M0), (V0)
00064 
00065 /*! Macro for Configuration Setting with only two register-mask-value sets:
00066  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1] */
00067 #define MODE_ENTRY_2_REG(MODE, R0, M0, V0, R1, M1, V1)  \
00068     (MODE >> 8), (MODE & 0xFF), 2, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00069                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1)
00070 
00071 /*! Macro for Configuration Setting with only three register-mask-value sets:
00072  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00073 #define MODE_ENTRY_3_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2)  \
00074     (MODE >> 8), (MODE & 0xFF), 3, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00075                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00076                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00077 
00078 /*! Macro for Configuration Setting with only four register-mask-value sets:
00079  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00080 #define MODE_ENTRY_4_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3)  \
00081     (MODE >> 8), (MODE & 0xFF), 4, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00082                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00083                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00084                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00085 
00086 /*! Macro for Configuration Setting with only five register-mask-value sets:
00087  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00088 #define MODE_ENTRY_5_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4)  \
00089     (MODE >> 8), (MODE & 0xFF), 5, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00090                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00091                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00092                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00093                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00094 
00095 /*! Macro for Configuration Setting with only six register-mask-value sets:
00096  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00097 #define MODE_ENTRY_6_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4, R5, M5, V5)  \
00098     (MODE >> 8), (MODE & 0xFF), 6, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00099                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00100                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00101                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00102                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00103                                  , (R5 >> 8), (R5 & 0xFF), (M5), (V5) \
00104 
00105 /*! Macro for Configuration Setting with only seven register-mask-value sets:
00106  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00107 #define MODE_ENTRY_7_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4, R5, M5, V5, R6, M6, V6)  \
00108     (MODE >> 8), (MODE & 0xFF), 7, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00109                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00110                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00111                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00112                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00113                                  , (R5 >> 8), (R5 & 0xFF), (M5), (V5) \
00114                                  , (R6 >> 8), (R6 & 0xFF), (M6), (V6) \
00115 
00116 /*! Macro for Configuration Setting with only eight register-mask-value sets:
00117  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00118 #define MODE_ENTRY_8_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4, R5, M5, V5, R6, M6, V6, R7, M7, V7)  \
00119     (MODE >> 8), (MODE & 0xFF), 8, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00120                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00121                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00122                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00123                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00124                                  , (R5 >> 8), (R5 & 0xFF), (M5), (V5) \
00125                                  , (R6 >> 8), (R6 & 0xFF), (M6), (V6) \
00126                                  , (R7 >> 8), (R7 & 0xFF), (M7), (V7) \
00127 
00128 /*! Macro for Configuration Setting with only nine register-mask-value sets:
00129  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00130 #define MODE_ENTRY_9_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4, R5, M5, V5, R6, M6, V6, R7, M7, V7, R8, M8, V8)  \
00131     (MODE >> 8), (MODE & 0xFF), 9, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00132                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00133                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00134                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00135                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00136                                  , (R5 >> 8), (R5 & 0xFF), (M5), (V5) \
00137                                  , (R6 >> 8), (R6 & 0xFF), (M6), (V6) \
00138                                  , (R7 >> 8), (R7 & 0xFF), (M7), (V7) \
00139                                  , (R8 >> 8), (R8 & 0xFF), (M8), (V8) \
00140 
00141 /*! Macro for Configuration Setting with only ten register-mask-value sets:
00142  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00143 #define MODE_ENTRY_10_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4, R5, M5, V5, R6, M6, V6, R7, M7, V7, R8, M8, V8, R9, M9, V9)  \
00144     (MODE >> 8), (MODE & 0xFF),10, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00145                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00146                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00147                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00148                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00149                                  , (R5 >> 8), (R5 & 0xFF), (M5), (V5) \
00150                                  , (R6 >> 8), (R6 & 0xFF), (M6), (V6) \
00151                                  , (R7 >> 8), (R7 & 0xFF), (M7), (V7) \
00152                                  , (R8 >> 8), (R8 & 0xFF), (M8), (V8) \
00153                                  , (R9 >> 8), (R9 & 0xFF), (M9), (V9) \
00154 
00155 /*! Macro for Configuration Setting with eleven register-mask-value sets:
00156  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00157 #define MODE_ENTRY_11_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4, R5, M5, V5, R6, M6, V6, R7, M7, V7, R8, M8, V8, R9, M9, V9, R10, M10, V10)  \
00158     (MODE >> 8), (MODE & 0xFF),11, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00159                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00160                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00161                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00162                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00163                                  , (R5 >> 8), (R5 & 0xFF), (M5), (V5) \
00164                                  , (R6 >> 8), (R6 & 0xFF), (M6), (V6) \
00165                                  , (R7 >> 8), (R7 & 0xFF), (M7), (V7) \
00166                                  , (R8 >> 8), (R8 & 0xFF), (M8), (V8) \
00167                                  , (R9 >> 8), (R9 & 0xFF), (M9), (V9) \
00168                                  , (R10 >> 8), (R10 & 0xFF), (M10), (V10) \
00169 
00170 /*! Macro for Configuration Setting with twelve register-mask-value sets:
00171  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00172 #define MODE_ENTRY_12_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4, R5, M5, V5, R6, M6, V6, R7, M7, V7, R8, M8, V8, R9, M9, V9, R10, M10, V10, R11, M11, V11)  \
00173     (MODE >> 8), (MODE & 0xFF),12, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00174                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00175                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00176                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00177                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00178                                  , (R5 >> 8), (R5 & 0xFF), (M5), (V5) \
00179                                  , (R6 >> 8), (R6 & 0xFF), (M6), (V6) \
00180                                  , (R7 >> 8), (R7 & 0xFF), (M7), (V7) \
00181                                  , (R8 >> 8), (R8 & 0xFF), (M8), (V8) \
00182                                  , (R9 >> 8), (R9 & 0xFF), (M9), (V9) \
00183                                  , (R10 >> 8), (R10 & 0xFF), (M10), (V10) \
00184                                  , (R11 >> 8), (R11 & 0xFF), (M11), (V11) \
00185 
00186 /*! Macro for Configuration Setting with thirteen register-mask-value sets:
00187  *  - Configuration ID[2], Number of Register sets to follow[1], Register[2], Mask[1], Value[1], Register[2], Mask[1], Value[1], Register[2]... */
00188 #define MODE_ENTRY_13_REG(MODE, R0, M0, V0, R1, M1, V1, R2, M2, V2, R3, M3, V3, R4, M4, V4, R5, M5, V5, R6, M6, V6, R7, M7, V7, R8, M8, V8, R9, M9, V9, R10, M10, V10, R11, M11, V11, R12, M12, V12)  \
00189     (MODE >> 8), (MODE & 0xFF),13, (R0 >> 8), (R0 & 0xFF), (M0), (V0) \
00190                                  , (R1 >> 8), (R1 & 0xFF), (M1), (V1) \
00191                                  , (R2 >> 8), (R2 & 0xFF), (M2), (V2) \
00192                                  , (R3 >> 8), (R3 & 0xFF), (M3), (V3) \
00193                                  , (R4 >> 8), (R4 & 0xFF), (M4), (V4) \
00194                                  , (R5 >> 8), (R5 & 0xFF), (M5), (V5) \
00195                                  , (R6 >> 8), (R6 & 0xFF), (M6), (V6) \
00196                                  , (R7 >> 8), (R7 & 0xFF), (M7), (V7) \
00197                                  , (R8 >> 8), (R8 & 0xFF), (M8), (V8) \
00198                                  , (R9 >> 8), (R9 & 0xFF), (M9), (V9) \
00199                                  , (R10 >> 8), (R10 & 0xFF), (M10), (V10) \
00200                                  , (R11 >> 8), (R11 & 0xFF), (M11), (V11) \
00201                                  , (R12 >> 8), (R12 & 0xFF), (M12), (V12) \
00202 /* Setting for approximately 14%: */
00203 #define AM_MOD_DRIVER_LEVEL_DEFAULT 0xb9
00204 /*
00205  ******************************************************************************
00206  * GLOBAL DATA TYPES
00207  ******************************************************************************
00208  */
00209 const uint8_t rfalAnalogConfigDefaultSettings[] = {
00210       /****** Default Analog Configuration for Chip-Specific. ******/
00211       MODE_ENTRY_10_REG( RFAL_ANALOG_CONFIG_TECH_CHIP
00212                       , ST25R3911_REG_OP_CONTROL,             0x30, 0x10 /* default to AM */
00213                       , ST25R3911_REG_IO_CONF1,               0x06, 0x06 /* MCUCLK: HF clk off */
00214                       , ST25R3911_REG_IO_CONF1, ST25R3911_REG_IO_CONF1_lf_clk_off, ST25R3911_REG_IO_CONF1_lf_clk_off /* MCUCLK: LF clk off */
00215                       , ST25R3911_REG_IO_CONF2,               0x18, 0x18 /* pull downs */
00216                       , ST25R3911_REG_RX_CONF4,               ST25R3911_REG_RX_CONF4_mask_rg2_pm, 0x1<<ST25R3911_REG_RX_CONF4_shift_rg2_pm /* increase digitizer window for PM */
00217                       , ST25R3911_REG_ANT_CAL_TARGET,         0xFF, 0x80 /* 90degrees */
00218                       , ST25R3911_REG_ANT_CAL_CONTROL,        0xF8, 0x00 /* trim value from calibrate antenna */
00219                       , ST25R3911_REG_AM_MOD_DEPTH_CONTROL,   ST25R3911_REG_AM_MOD_DEPTH_CONTROL_am_s, ST25R3911_REG_AM_MOD_DEPTH_CONTROL_am_s /* AM modulated level is defined by RFO AM Modulated Level Def Reg, fixed setting, no automatic adjustment */
00220                       , ST25R3911_REG_FIELD_THRESHOLD,        ST25R3911_REG_FIELD_THRESHOLD_mask_trg, ST25R3911_REG_FIELD_THRESHOLD_trg_75mV
00221                       , ST25R3911_REG_FIELD_THRESHOLD,        ST25R3911_REG_FIELD_THRESHOLD_mask_rfe, ST25R3911_REG_FIELD_THRESHOLD_rfe_75mV
00222                       )
00223 
00224       /****** Default Analog Configuration for Poll NFC-A Tx. ******/
00225     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX)
00226                       , ST25R3911_REG_RFO_AM_ON_LEVEL, 0xff, 0xf0 /* Used for 848 TX: very high AM to keep wave shapes */
00227                       )
00228 
00229     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_106 | RFAL_ANALOG_CONFIG_TX)
00230                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am,        0x00        /* OOK */
00231                       )
00232 
00233     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_212 | RFAL_ANALOG_CONFIG_TX)
00234                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am,        0x00        /* OOK */
00235                       )
00236 
00237     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_424 | RFAL_ANALOG_CONFIG_TX)
00238                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am,        0x00        /* OOK */
00239                       )
00240 
00241     , MODE_ENTRY_2_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_848 | RFAL_ANALOG_CONFIG_TX)
00242                       , ST25R3911_REG_AUX,  ST25R3911_REG_AUX_tr_am,  ST25R3911_REG_AUX_tr_am       /* AM! */
00243                       , ST25R3911_REG_RFO_AM_ON_LEVEL, 0xff, 0xf0 /* Used for 848 TX: very high AM to keep wave shapes */
00244                       )
00245 
00246       /****** Default Analog Configuration for Poll NFC-A Rx. ******/
00247     , MODE_ENTRY_3_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX)
00248                       , ST25R3911_REG_RX_CONF3, 0xff, 0x18
00249                       , ST25R3911_REG_RX_CONF4,               ST25R3911_REG_RX_CONF4_mask_rg2_am, 0x2<<ST25R3911_REG_RX_CONF4_shift_rg2_am /* increase digitizer window for AM */
00250                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_rx_tol, 0x00                                               /* rx_tol Off */
00251                       )
00252 
00253     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_106 | RFAL_ANALOG_CONFIG_RX)
00254                       , ST25R3911_REG_RX_CONF1, 0x7f, 0x00
00255                       )
00256 
00257     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_212 | RFAL_ANALOG_CONFIG_RX)
00258                       , ST25R3911_REG_RX_CONF1, 0x7f, 0x04
00259                       )
00260 
00261     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_424 | RFAL_ANALOG_CONFIG_RX)
00262                       , ST25R3911_REG_RX_CONF1, 0x7f, 0x22
00263                       )
00264 
00265     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_848 | RFAL_ANALOG_CONFIG_RX)
00266                       , ST25R3911_REG_RX_CONF1, 0x7f, 0x22
00267                       )
00268 
00269       /****** Default Analog Configuration for Poll NFC-B Tx. ******/
00270     , MODE_ENTRY_2_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX)
00271                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am, ST25R3911_REG_AUX_tr_am   /* AM */
00272                       , ST25R3911_REG_RFO_AM_ON_LEVEL,        0xff, AM_MOD_DRIVER_LEVEL_DEFAULT                  /* Fixed driver for AM level: ~14% */
00273                       )
00274 
00275       /****** Default Analog Configuration for Poll NFC-B Rx. ******/
00276     , MODE_ENTRY_3_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX)
00277                       , ST25R3911_REG_RX_CONF3, 0xff, 0x18
00278                       , ST25R3911_REG_RX_CONF4,               ST25R3911_REG_RX_CONF4_mask_rg2_am, 0x1<<ST25R3911_REG_RX_CONF4_shift_rg2_am /* increase digitizer window for AM */
00279                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_rx_tol, ST25R3911_REG_AUX_rx_tol                           /* rx_tol On as default */
00280                       )
00281 
00282     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_106 | RFAL_ANALOG_CONFIG_RX)
00283                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x04
00284                       )
00285 
00286     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_212 | RFAL_ANALOG_CONFIG_RX)
00287                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x04
00288                       )
00289 
00290     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_424 | RFAL_ANALOG_CONFIG_RX)
00291                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x22
00292                       )
00293 
00294     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_848 | RFAL_ANALOG_CONFIG_RX)
00295                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x22
00296                       )
00297 
00298     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_1695 | RFAL_ANALOG_CONFIG_RX)
00299                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x6c
00300                       )
00301 
00302     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_3390 | RFAL_ANALOG_CONFIG_RX)
00303                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x6c
00304                       )
00305 
00306       /****** Default Analog Configuration for Poll NFC-F Tx. ******/
00307     , MODE_ENTRY_2_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCF | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX)
00308                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am, ST25R3911_REG_AUX_tr_am /* AM */
00309                       , ST25R3911_REG_RFO_AM_ON_LEVEL,        0xff, AM_MOD_DRIVER_LEVEL_DEFAULT /* Fixed driver for AM level: ~14% */
00310                       )
00311 
00312       /****** Default Analog Configuration for Poll NFC-F Common bitrate Rx. ******/
00313     , MODE_ENTRY_3_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCF | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX)
00314                       , ST25R3911_REG_RX_CONF3, 0xff, 0x18
00315                       , ST25R3911_REG_RX_CONF4,               ST25R3911_REG_RX_CONF4_mask_rg2_am, 0x1<<ST25R3911_REG_RX_CONF4_shift_rg2_am /* increase digitizer window for AM */
00316                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_rx_tol, ST25R3911_REG_AUX_rx_tol                           /* rx_tol On as default */
00317                       )
00318 
00319     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCF | RFAL_ANALOG_CONFIG_BITRATE_212 | RFAL_ANALOG_CONFIG_RX)
00320                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x13   /* dev. from data sheet: lp 300kKz */
00321                       )
00322 
00323     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCF | RFAL_ANALOG_CONFIG_BITRATE_424 | RFAL_ANALOG_CONFIG_RX)
00324                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x0b   /* dev. from data sheet: lp 600kHz */
00325                       )
00326 
00327     /****** Default Analog Configuration for Poll NFC-V Common bitrate Tx ******/
00328     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX)
00329                       , ST25R3911_REG_AUX, ST25R3911_REG_AUX_tr_am, 0x00
00330                       )
00331 
00332     /****** Default Analog Configuration for Poll NFC-V Common bitrate Rx ******/
00333     , MODE_ENTRY_4_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX)
00334                       , ST25R3911_REG_RX_CONF1, 0x7f, 0x0c /* use filter settings from table 9: "Recommended for 424/484 kHz sub-carrier" */
00335                       , ST25R3911_REG_RX_CONF3, 0xff, 0x18
00336                       , ST25R3911_REG_RX_CONF4,               ST25R3911_REG_RX_CONF4_mask_rg2_am, 0x1<<ST25R3911_REG_RX_CONF4_shift_rg2_am /* increase digitizer window for AM */
00337                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_rx_tol, ST25R3911_REG_AUX_rx_tol                           /* rx_tol On as default */
00338                       )
00339 
00340       /****** Default Analog Configuration for Poll AP2P Common bitrate Tx. ******/
00341     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX)
00342                       , ST25R3911_REG_RFO_AM_ON_LEVEL,        0xff, AM_MOD_DRIVER_LEVEL_DEFAULT /* Fixed driver for AM level: ~14% */
00343                       )
00344 
00345     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_106 | RFAL_ANALOG_CONFIG_TX)
00346                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am, 0x00 /* OOK */
00347                       )
00348 
00349     , MODE_ENTRY_2_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_212 | RFAL_ANALOG_CONFIG_TX)
00350                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am, ST25R3911_REG_AUX_tr_am /* AM */
00351                       , ST25R3911_REG_RFO_AM_ON_LEVEL,        0xff, AM_MOD_DRIVER_LEVEL_DEFAULT /* Fixed driver for AM level: ~14% */
00352                       )
00353 
00354     , MODE_ENTRY_2_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_424 | RFAL_ANALOG_CONFIG_TX)
00355                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am, ST25R3911_REG_AUX_tr_am /* AM */
00356                       , ST25R3911_REG_RFO_AM_ON_LEVEL,        0xff, AM_MOD_DRIVER_LEVEL_DEFAULT /* Fixed driver for AM level: ~14% */
00357                       )
00358 
00359       /****** Default Analog Configuration for Poll AP2P Common bitrate Rx. ******/
00360     , MODE_ENTRY_4_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX)
00361                       , ST25R3911_REG_RX_CONF1,               0x7f, 0x45
00362                       , ST25R3911_REG_RX_CONF3,              (ST25R3911_REG_RX_CONF3_lim | ST25R3911_REG_RX_CONF3_rg_nfc), (ST25R3911_REG_RX_CONF3_lim | ST25R3911_REG_RX_CONF3_rg_nfc)
00363                       , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_rx_tol, ST25R3911_REG_AUX_rx_tol                           /* rx_tol On as default */
00364                       , ST25R3911_REG_RX_CONF4,               ST25R3911_REG_RX_CONF4_mask_rg2_am, 0x1<<ST25R3911_REG_RX_CONF4_shift_rg2_am /* increase digitizer window for AM */
00365                       )
00366 
00367     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_106 | RFAL_ANALOG_CONFIG_RX)
00368                       , ST25R3911_REG_RX_CONF3,               ST25R3911_REG_RX_CONF3_mask_rg1_am, 0xc0
00369                       )
00370 
00371     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_212 | RFAL_ANALOG_CONFIG_RX)
00372                       , ST25R3911_REG_RX_CONF3,               ST25R3911_REG_RX_CONF3_mask_rg1_am, 0x00
00373                       )
00374 
00375     , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_424 | RFAL_ANALOG_CONFIG_RX)
00376                       , ST25R3911_REG_RX_CONF3,               ST25R3911_REG_RX_CONF3_mask_rg1_am, 0x00
00377                       )
00378 
00379       /****** Default Analog Configuration for Listen AP2P Common bitrate Tx. ******/
00380       , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX)
00381                         , ST25R3911_REG_RFO_AM_ON_LEVEL,        0xff, AM_MOD_DRIVER_LEVEL_DEFAULT /* Fixed driver for AM level: ~14% */
00382                         )
00383 
00384       , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_106 | RFAL_ANALOG_CONFIG_TX)
00385                         , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am, 0x00 /* OOK */
00386                         )
00387 
00388       , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_212 | RFAL_ANALOG_CONFIG_TX)
00389                         , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am, ST25R3911_REG_AUX_tr_am /* AM */
00390                         )
00391 
00392       , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_424 | RFAL_ANALOG_CONFIG_TX)
00393                         , ST25R3911_REG_AUX,                    ST25R3911_REG_AUX_tr_am, ST25R3911_REG_AUX_tr_am /* AM */
00394                         )
00395 
00396         /****** Default Analog Configuration for Listen AP2P Common bitrate Rx. ******/
00397       , MODE_ENTRY_3_REG( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX)
00398                         , ST25R3911_REG_RX_CONF1,               0x7f, 0x45
00399                         , ST25R3911_REG_RX_CONF3,              (ST25R3911_REG_RX_CONF3_lim | ST25R3911_REG_RX_CONF3_rg_nfc), (ST25R3911_REG_RX_CONF3_lim | ST25R3911_REG_RX_CONF3_rg_nfc)
00400                         , ST25R3911_REG_RX_CONF4,               ST25R3911_REG_RX_CONF4_mask_rg2_am, 0x1<<ST25R3911_REG_RX_CONF4_shift_rg2_am /* increase digitizer window for AM */
00401                         )
00402 
00403       , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_106 | RFAL_ANALOG_CONFIG_RX)
00404                         , ST25R3911_REG_RX_CONF3,               ST25R3911_REG_RX_CONF3_mask_rg1_am, 0xc0
00405                         )
00406 
00407       , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_212 | RFAL_ANALOG_CONFIG_RX)
00408                         , ST25R3911_REG_RX_CONF3,               ST25R3911_REG_RX_CONF3_mask_rg1_am, 0x00
00409                         )
00410 
00411       , MODE_ENTRY_1_REG( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_424 | RFAL_ANALOG_CONFIG_RX)
00412                         , ST25R3911_REG_RX_CONF3,               ST25R3911_REG_RX_CONF3_mask_rg1_am, 0x00
00413                         )
00414 };
00415 
00416 #endif /* ST25R3911_ANALOGCONFIG_H */