mbed SDK library sources

Fork of mbed-src by mbed official

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Committer:
mbed_official
Date:
Tue Jan 07 11:00:05 2014 +0000
Revision:
70:c1fbde68b492
Parent:
52:a51c77007319
Child:
84:f54042cbc282
Synchronized with git revision 3f438a307904431f2782db3c8fa49946b9fc1d85

Full URL: https://github.com/mbedmicro/mbed/commit/3f438a307904431f2782db3c8fa49946b9fc1d85/

[NUCLEO_F103RB] license text changed + sleep hal updated

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 52:a51c77007319 1 /**
mbed_official 52:a51c77007319 2 ******************************************************************************
mbed_official 52:a51c77007319 3 * @file stm32f10x_spi.c
mbed_official 52:a51c77007319 4 * @author MCD Application Team
mbed_official 52:a51c77007319 5 * @version V3.5.0
mbed_official 52:a51c77007319 6 * @date 11-March-2011
mbed_official 52:a51c77007319 7 * @brief This file provides all the SPI firmware functions.
mbed_official 70:c1fbde68b492 8 *******************************************************************************
mbed_official 70:c1fbde68b492 9 * Copyright (c) 2014, STMicroelectronics
mbed_official 70:c1fbde68b492 10 * All rights reserved.
mbed_official 70:c1fbde68b492 11 *
mbed_official 70:c1fbde68b492 12 * Redistribution and use in source and binary forms, with or without
mbed_official 70:c1fbde68b492 13 * modification, are permitted provided that the following conditions are met:
mbed_official 70:c1fbde68b492 14 *
mbed_official 70:c1fbde68b492 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 70:c1fbde68b492 16 * this list of conditions and the following disclaimer.
mbed_official 70:c1fbde68b492 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 70:c1fbde68b492 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 70:c1fbde68b492 19 * and/or other materials provided with the distribution.
mbed_official 70:c1fbde68b492 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 70:c1fbde68b492 21 * may be used to endorse or promote products derived from this software
mbed_official 70:c1fbde68b492 22 * without specific prior written permission.
mbed_official 70:c1fbde68b492 23 *
mbed_official 70:c1fbde68b492 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 70:c1fbde68b492 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 70:c1fbde68b492 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 70:c1fbde68b492 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 70:c1fbde68b492 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 70:c1fbde68b492 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 70:c1fbde68b492 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 70:c1fbde68b492 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 70:c1fbde68b492 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 70:c1fbde68b492 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 70:c1fbde68b492 34 *******************************************************************************
mbed_official 70:c1fbde68b492 35 */
mbed_official 52:a51c77007319 36
mbed_official 52:a51c77007319 37 /* Includes ------------------------------------------------------------------*/
mbed_official 52:a51c77007319 38 #include "stm32f10x_spi.h"
mbed_official 52:a51c77007319 39 #include "stm32f10x_rcc.h"
mbed_official 52:a51c77007319 40
mbed_official 52:a51c77007319 41 /** @addtogroup STM32F10x_StdPeriph_Driver
mbed_official 52:a51c77007319 42 * @{
mbed_official 52:a51c77007319 43 */
mbed_official 52:a51c77007319 44
mbed_official 52:a51c77007319 45 /** @defgroup SPI
mbed_official 52:a51c77007319 46 * @brief SPI driver modules
mbed_official 52:a51c77007319 47 * @{
mbed_official 52:a51c77007319 48 */
mbed_official 52:a51c77007319 49
mbed_official 52:a51c77007319 50 /** @defgroup SPI_Private_TypesDefinitions
mbed_official 52:a51c77007319 51 * @{
mbed_official 52:a51c77007319 52 */
mbed_official 52:a51c77007319 53
mbed_official 52:a51c77007319 54 /**
mbed_official 52:a51c77007319 55 * @}
mbed_official 52:a51c77007319 56 */
mbed_official 52:a51c77007319 57
mbed_official 52:a51c77007319 58
mbed_official 52:a51c77007319 59 /** @defgroup SPI_Private_Defines
mbed_official 52:a51c77007319 60 * @{
mbed_official 52:a51c77007319 61 */
mbed_official 52:a51c77007319 62
mbed_official 52:a51c77007319 63 /* SPI SPE mask */
mbed_official 52:a51c77007319 64 #define CR1_SPE_Set ((uint16_t)0x0040)
mbed_official 52:a51c77007319 65 #define CR1_SPE_Reset ((uint16_t)0xFFBF)
mbed_official 52:a51c77007319 66
mbed_official 52:a51c77007319 67 /* I2S I2SE mask */
mbed_official 52:a51c77007319 68 #define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
mbed_official 52:a51c77007319 69 #define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
mbed_official 52:a51c77007319 70
mbed_official 52:a51c77007319 71 /* SPI CRCNext mask */
mbed_official 52:a51c77007319 72 #define CR1_CRCNext_Set ((uint16_t)0x1000)
mbed_official 52:a51c77007319 73
mbed_official 52:a51c77007319 74 /* SPI CRCEN mask */
mbed_official 52:a51c77007319 75 #define CR1_CRCEN_Set ((uint16_t)0x2000)
mbed_official 52:a51c77007319 76 #define CR1_CRCEN_Reset ((uint16_t)0xDFFF)
mbed_official 52:a51c77007319 77
mbed_official 52:a51c77007319 78 /* SPI SSOE mask */
mbed_official 52:a51c77007319 79 #define CR2_SSOE_Set ((uint16_t)0x0004)
mbed_official 52:a51c77007319 80 #define CR2_SSOE_Reset ((uint16_t)0xFFFB)
mbed_official 52:a51c77007319 81
mbed_official 52:a51c77007319 82 /* SPI registers Masks */
mbed_official 52:a51c77007319 83 #define CR1_CLEAR_Mask ((uint16_t)0x3040)
mbed_official 52:a51c77007319 84 #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
mbed_official 52:a51c77007319 85
mbed_official 52:a51c77007319 86 /* SPI or I2S mode selection masks */
mbed_official 52:a51c77007319 87 #define SPI_Mode_Select ((uint16_t)0xF7FF)
mbed_official 52:a51c77007319 88 #define I2S_Mode_Select ((uint16_t)0x0800)
mbed_official 52:a51c77007319 89
mbed_official 52:a51c77007319 90 /* I2S clock source selection masks */
mbed_official 52:a51c77007319 91 #define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
mbed_official 52:a51c77007319 92 #define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
mbed_official 52:a51c77007319 93 #define I2S_MUL_MASK ((uint32_t)(0x0000F000))
mbed_official 52:a51c77007319 94 #define I2S_DIV_MASK ((uint32_t)(0x000000F0))
mbed_official 52:a51c77007319 95
mbed_official 52:a51c77007319 96 /**
mbed_official 52:a51c77007319 97 * @}
mbed_official 52:a51c77007319 98 */
mbed_official 52:a51c77007319 99
mbed_official 52:a51c77007319 100 /** @defgroup SPI_Private_Macros
mbed_official 52:a51c77007319 101 * @{
mbed_official 52:a51c77007319 102 */
mbed_official 52:a51c77007319 103
mbed_official 52:a51c77007319 104 /**
mbed_official 52:a51c77007319 105 * @}
mbed_official 52:a51c77007319 106 */
mbed_official 52:a51c77007319 107
mbed_official 52:a51c77007319 108 /** @defgroup SPI_Private_Variables
mbed_official 52:a51c77007319 109 * @{
mbed_official 52:a51c77007319 110 */
mbed_official 52:a51c77007319 111
mbed_official 52:a51c77007319 112 /**
mbed_official 52:a51c77007319 113 * @}
mbed_official 52:a51c77007319 114 */
mbed_official 52:a51c77007319 115
mbed_official 52:a51c77007319 116 /** @defgroup SPI_Private_FunctionPrototypes
mbed_official 52:a51c77007319 117 * @{
mbed_official 52:a51c77007319 118 */
mbed_official 52:a51c77007319 119
mbed_official 52:a51c77007319 120 /**
mbed_official 52:a51c77007319 121 * @}
mbed_official 52:a51c77007319 122 */
mbed_official 52:a51c77007319 123
mbed_official 52:a51c77007319 124 /** @defgroup SPI_Private_Functions
mbed_official 52:a51c77007319 125 * @{
mbed_official 52:a51c77007319 126 */
mbed_official 52:a51c77007319 127
mbed_official 52:a51c77007319 128 /**
mbed_official 52:a51c77007319 129 * @brief Deinitializes the SPIx peripheral registers to their default
mbed_official 52:a51c77007319 130 * reset values (Affects also the I2Ss).
mbed_official 52:a51c77007319 131 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 132 * @retval None
mbed_official 52:a51c77007319 133 */
mbed_official 52:a51c77007319 134 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
mbed_official 52:a51c77007319 135 {
mbed_official 52:a51c77007319 136 /* Check the parameters */
mbed_official 52:a51c77007319 137 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 138
mbed_official 52:a51c77007319 139 if (SPIx == SPI1)
mbed_official 52:a51c77007319 140 {
mbed_official 52:a51c77007319 141 /* Enable SPI1 reset state */
mbed_official 52:a51c77007319 142 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
mbed_official 52:a51c77007319 143 /* Release SPI1 from reset state */
mbed_official 52:a51c77007319 144 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
mbed_official 52:a51c77007319 145 }
mbed_official 52:a51c77007319 146 else if (SPIx == SPI2)
mbed_official 52:a51c77007319 147 {
mbed_official 52:a51c77007319 148 /* Enable SPI2 reset state */
mbed_official 52:a51c77007319 149 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
mbed_official 52:a51c77007319 150 /* Release SPI2 from reset state */
mbed_official 52:a51c77007319 151 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
mbed_official 52:a51c77007319 152 }
mbed_official 52:a51c77007319 153 else
mbed_official 52:a51c77007319 154 {
mbed_official 52:a51c77007319 155 if (SPIx == SPI3)
mbed_official 52:a51c77007319 156 {
mbed_official 52:a51c77007319 157 /* Enable SPI3 reset state */
mbed_official 52:a51c77007319 158 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
mbed_official 52:a51c77007319 159 /* Release SPI3 from reset state */
mbed_official 52:a51c77007319 160 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
mbed_official 52:a51c77007319 161 }
mbed_official 52:a51c77007319 162 }
mbed_official 52:a51c77007319 163 }
mbed_official 52:a51c77007319 164
mbed_official 52:a51c77007319 165 /**
mbed_official 52:a51c77007319 166 * @brief Initializes the SPIx peripheral according to the specified
mbed_official 52:a51c77007319 167 * parameters in the SPI_InitStruct.
mbed_official 52:a51c77007319 168 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 169 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
mbed_official 52:a51c77007319 170 * contains the configuration information for the specified SPI peripheral.
mbed_official 52:a51c77007319 171 * @retval None
mbed_official 52:a51c77007319 172 */
mbed_official 52:a51c77007319 173 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
mbed_official 52:a51c77007319 174 {
mbed_official 52:a51c77007319 175 uint16_t tmpreg = 0;
mbed_official 52:a51c77007319 176
mbed_official 52:a51c77007319 177 /* check the parameters */
mbed_official 52:a51c77007319 178 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 179
mbed_official 52:a51c77007319 180 /* Check the SPI parameters */
mbed_official 52:a51c77007319 181 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
mbed_official 52:a51c77007319 182 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
mbed_official 52:a51c77007319 183 assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
mbed_official 52:a51c77007319 184 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
mbed_official 52:a51c77007319 185 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
mbed_official 52:a51c77007319 186 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
mbed_official 52:a51c77007319 187 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
mbed_official 52:a51c77007319 188 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
mbed_official 52:a51c77007319 189 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
mbed_official 52:a51c77007319 190
mbed_official 52:a51c77007319 191 /*---------------------------- SPIx CR1 Configuration ------------------------*/
mbed_official 52:a51c77007319 192 /* Get the SPIx CR1 value */
mbed_official 52:a51c77007319 193 tmpreg = SPIx->CR1;
mbed_official 52:a51c77007319 194 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
mbed_official 52:a51c77007319 195 tmpreg &= CR1_CLEAR_Mask;
mbed_official 52:a51c77007319 196 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
mbed_official 52:a51c77007319 197 master/salve mode, CPOL and CPHA */
mbed_official 52:a51c77007319 198 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
mbed_official 52:a51c77007319 199 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
mbed_official 52:a51c77007319 200 /* Set LSBFirst bit according to SPI_FirstBit value */
mbed_official 52:a51c77007319 201 /* Set BR bits according to SPI_BaudRatePrescaler value */
mbed_official 52:a51c77007319 202 /* Set CPOL bit according to SPI_CPOL value */
mbed_official 52:a51c77007319 203 /* Set CPHA bit according to SPI_CPHA value */
mbed_official 52:a51c77007319 204 tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
mbed_official 52:a51c77007319 205 SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
mbed_official 52:a51c77007319 206 SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
mbed_official 52:a51c77007319 207 SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
mbed_official 52:a51c77007319 208 /* Write to SPIx CR1 */
mbed_official 52:a51c77007319 209 SPIx->CR1 = tmpreg;
mbed_official 52:a51c77007319 210
mbed_official 52:a51c77007319 211 /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
mbed_official 52:a51c77007319 212 SPIx->I2SCFGR &= SPI_Mode_Select;
mbed_official 52:a51c77007319 213
mbed_official 52:a51c77007319 214 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
mbed_official 52:a51c77007319 215 /* Write to SPIx CRCPOLY */
mbed_official 52:a51c77007319 216 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
mbed_official 52:a51c77007319 217 }
mbed_official 52:a51c77007319 218
mbed_official 52:a51c77007319 219 /**
mbed_official 52:a51c77007319 220 * @brief Initializes the SPIx peripheral according to the specified
mbed_official 52:a51c77007319 221 * parameters in the I2S_InitStruct.
mbed_official 52:a51c77007319 222 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral
mbed_official 52:a51c77007319 223 * (configured in I2S mode).
mbed_official 52:a51c77007319 224 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
mbed_official 52:a51c77007319 225 * contains the configuration information for the specified SPI peripheral
mbed_official 52:a51c77007319 226 * configured in I2S mode.
mbed_official 52:a51c77007319 227 * @note
mbed_official 52:a51c77007319 228 * The function calculates the optimal prescaler needed to obtain the most
mbed_official 52:a51c77007319 229 * accurate audio frequency (depending on the I2S clock source, the PLL values
mbed_official 52:a51c77007319 230 * and the product configuration). But in case the prescaler value is greater
mbed_official 52:a51c77007319 231 * than 511, the default value (0x02) will be configured instead. *
mbed_official 52:a51c77007319 232 * @retval None
mbed_official 52:a51c77007319 233 */
mbed_official 52:a51c77007319 234 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
mbed_official 52:a51c77007319 235 {
mbed_official 52:a51c77007319 236 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official 52:a51c77007319 237 uint32_t tmp = 0;
mbed_official 52:a51c77007319 238 RCC_ClocksTypeDef RCC_Clocks;
mbed_official 52:a51c77007319 239 uint32_t sourceclock = 0;
mbed_official 52:a51c77007319 240
mbed_official 52:a51c77007319 241 /* Check the I2S parameters */
mbed_official 52:a51c77007319 242 assert_param(IS_SPI_23_PERIPH(SPIx));
mbed_official 52:a51c77007319 243 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
mbed_official 52:a51c77007319 244 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
mbed_official 52:a51c77007319 245 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
mbed_official 52:a51c77007319 246 assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
mbed_official 52:a51c77007319 247 assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
mbed_official 52:a51c77007319 248 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
mbed_official 52:a51c77007319 249
mbed_official 52:a51c77007319 250 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
mbed_official 52:a51c77007319 251 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 52:a51c77007319 252 SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
mbed_official 52:a51c77007319 253 SPIx->I2SPR = 0x0002;
mbed_official 52:a51c77007319 254
mbed_official 52:a51c77007319 255 /* Get the I2SCFGR register value */
mbed_official 52:a51c77007319 256 tmpreg = SPIx->I2SCFGR;
mbed_official 52:a51c77007319 257
mbed_official 52:a51c77007319 258 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
mbed_official 52:a51c77007319 259 if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
mbed_official 52:a51c77007319 260 {
mbed_official 52:a51c77007319 261 i2sodd = (uint16_t)0;
mbed_official 52:a51c77007319 262 i2sdiv = (uint16_t)2;
mbed_official 52:a51c77007319 263 }
mbed_official 52:a51c77007319 264 /* If the requested audio frequency is not the default, compute the prescaler */
mbed_official 52:a51c77007319 265 else
mbed_official 52:a51c77007319 266 {
mbed_official 52:a51c77007319 267 /* Check the frame length (For the Prescaler computing) */
mbed_official 52:a51c77007319 268 if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
mbed_official 52:a51c77007319 269 {
mbed_official 52:a51c77007319 270 /* Packet length is 16 bits */
mbed_official 52:a51c77007319 271 packetlength = 1;
mbed_official 52:a51c77007319 272 }
mbed_official 52:a51c77007319 273 else
mbed_official 52:a51c77007319 274 {
mbed_official 52:a51c77007319 275 /* Packet length is 32 bits */
mbed_official 52:a51c77007319 276 packetlength = 2;
mbed_official 52:a51c77007319 277 }
mbed_official 52:a51c77007319 278
mbed_official 52:a51c77007319 279 /* Get the I2S clock source mask depending on the peripheral number */
mbed_official 52:a51c77007319 280 if(((uint32_t)SPIx) == SPI2_BASE)
mbed_official 52:a51c77007319 281 {
mbed_official 52:a51c77007319 282 /* The mask is relative to I2S2 */
mbed_official 52:a51c77007319 283 tmp = I2S2_CLOCK_SRC;
mbed_official 52:a51c77007319 284 }
mbed_official 52:a51c77007319 285 else
mbed_official 52:a51c77007319 286 {
mbed_official 52:a51c77007319 287 /* The mask is relative to I2S3 */
mbed_official 52:a51c77007319 288 tmp = I2S3_CLOCK_SRC;
mbed_official 52:a51c77007319 289 }
mbed_official 52:a51c77007319 290
mbed_official 52:a51c77007319 291 /* Check the I2S clock source configuration depending on the Device:
mbed_official 52:a51c77007319 292 Only Connectivity line devices have the PLL3 VCO clock */
mbed_official 52:a51c77007319 293 #ifdef STM32F10X_CL
mbed_official 52:a51c77007319 294 if((RCC->CFGR2 & tmp) != 0)
mbed_official 52:a51c77007319 295 {
mbed_official 52:a51c77007319 296 /* Get the configuration bits of RCC PLL3 multiplier */
mbed_official 52:a51c77007319 297 tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12);
mbed_official 52:a51c77007319 298
mbed_official 52:a51c77007319 299 /* Get the value of the PLL3 multiplier */
mbed_official 52:a51c77007319 300 if((tmp > 5) && (tmp < 15))
mbed_official 52:a51c77007319 301 {
mbed_official 52:a51c77007319 302 /* Multiplier is between 8 and 14 (value 15 is forbidden) */
mbed_official 52:a51c77007319 303 tmp += 2;
mbed_official 52:a51c77007319 304 }
mbed_official 52:a51c77007319 305 else
mbed_official 52:a51c77007319 306 {
mbed_official 52:a51c77007319 307 if (tmp == 15)
mbed_official 52:a51c77007319 308 {
mbed_official 52:a51c77007319 309 /* Multiplier is 20 */
mbed_official 52:a51c77007319 310 tmp = 20;
mbed_official 52:a51c77007319 311 }
mbed_official 52:a51c77007319 312 }
mbed_official 52:a51c77007319 313 /* Get the PREDIV2 value */
mbed_official 52:a51c77007319 314 sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1);
mbed_official 52:a51c77007319 315
mbed_official 52:a51c77007319 316 /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */
mbed_official 52:a51c77007319 317 sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2);
mbed_official 52:a51c77007319 318 }
mbed_official 52:a51c77007319 319 else
mbed_official 52:a51c77007319 320 {
mbed_official 52:a51c77007319 321 /* I2S Clock source is System clock: Get System Clock frequency */
mbed_official 52:a51c77007319 322 RCC_GetClocksFreq(&RCC_Clocks);
mbed_official 52:a51c77007319 323
mbed_official 52:a51c77007319 324 /* Get the source clock value: based on System Clock value */
mbed_official 52:a51c77007319 325 sourceclock = RCC_Clocks.SYSCLK_Frequency;
mbed_official 52:a51c77007319 326 }
mbed_official 52:a51c77007319 327 #else /* STM32F10X_HD */
mbed_official 52:a51c77007319 328 /* I2S Clock source is System clock: Get System Clock frequency */
mbed_official 52:a51c77007319 329 RCC_GetClocksFreq(&RCC_Clocks);
mbed_official 52:a51c77007319 330
mbed_official 52:a51c77007319 331 /* Get the source clock value: based on System Clock value */
mbed_official 52:a51c77007319 332 sourceclock = RCC_Clocks.SYSCLK_Frequency;
mbed_official 52:a51c77007319 333 #endif /* STM32F10X_CL */
mbed_official 52:a51c77007319 334
mbed_official 52:a51c77007319 335 /* Compute the Real divider depending on the MCLK output state with a floating point */
mbed_official 52:a51c77007319 336 if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
mbed_official 52:a51c77007319 337 {
mbed_official 52:a51c77007319 338 /* MCLK output is enabled */
mbed_official 52:a51c77007319 339 tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official 52:a51c77007319 340 }
mbed_official 52:a51c77007319 341 else
mbed_official 52:a51c77007319 342 {
mbed_official 52:a51c77007319 343 /* MCLK output is disabled */
mbed_official 52:a51c77007319 344 tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official 52:a51c77007319 345 }
mbed_official 52:a51c77007319 346
mbed_official 52:a51c77007319 347 /* Remove the floating point */
mbed_official 52:a51c77007319 348 tmp = tmp / 10;
mbed_official 52:a51c77007319 349
mbed_official 52:a51c77007319 350 /* Check the parity of the divider */
mbed_official 52:a51c77007319 351 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
mbed_official 52:a51c77007319 352
mbed_official 52:a51c77007319 353 /* Compute the i2sdiv prescaler */
mbed_official 52:a51c77007319 354 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
mbed_official 52:a51c77007319 355
mbed_official 52:a51c77007319 356 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official 52:a51c77007319 357 i2sodd = (uint16_t) (i2sodd << 8);
mbed_official 52:a51c77007319 358 }
mbed_official 52:a51c77007319 359
mbed_official 52:a51c77007319 360 /* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official 52:a51c77007319 361 if ((i2sdiv < 2) || (i2sdiv > 0xFF))
mbed_official 52:a51c77007319 362 {
mbed_official 52:a51c77007319 363 /* Set the default values */
mbed_official 52:a51c77007319 364 i2sdiv = 2;
mbed_official 52:a51c77007319 365 i2sodd = 0;
mbed_official 52:a51c77007319 366 }
mbed_official 52:a51c77007319 367
mbed_official 52:a51c77007319 368 /* Write to SPIx I2SPR register the computed value */
mbed_official 52:a51c77007319 369 SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
mbed_official 52:a51c77007319 370
mbed_official 52:a51c77007319 371 /* Configure the I2S with the SPI_InitStruct values */
mbed_official 52:a51c77007319 372 tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \
mbed_official 52:a51c77007319 373 (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
mbed_official 52:a51c77007319 374 (uint16_t)I2S_InitStruct->I2S_CPOL))));
mbed_official 52:a51c77007319 375
mbed_official 52:a51c77007319 376 /* Write to SPIx I2SCFGR */
mbed_official 52:a51c77007319 377 SPIx->I2SCFGR = tmpreg;
mbed_official 52:a51c77007319 378 }
mbed_official 52:a51c77007319 379
mbed_official 52:a51c77007319 380 /**
mbed_official 52:a51c77007319 381 * @brief Fills each SPI_InitStruct member with its default value.
mbed_official 52:a51c77007319 382 * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
mbed_official 52:a51c77007319 383 * @retval None
mbed_official 52:a51c77007319 384 */
mbed_official 52:a51c77007319 385 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
mbed_official 52:a51c77007319 386 {
mbed_official 52:a51c77007319 387 /*--------------- Reset SPI init structure parameters values -----------------*/
mbed_official 52:a51c77007319 388 /* Initialize the SPI_Direction member */
mbed_official 52:a51c77007319 389 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
mbed_official 52:a51c77007319 390 /* initialize the SPI_Mode member */
mbed_official 52:a51c77007319 391 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
mbed_official 52:a51c77007319 392 /* initialize the SPI_DataSize member */
mbed_official 52:a51c77007319 393 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
mbed_official 52:a51c77007319 394 /* Initialize the SPI_CPOL member */
mbed_official 52:a51c77007319 395 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
mbed_official 52:a51c77007319 396 /* Initialize the SPI_CPHA member */
mbed_official 52:a51c77007319 397 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
mbed_official 52:a51c77007319 398 /* Initialize the SPI_NSS member */
mbed_official 52:a51c77007319 399 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
mbed_official 52:a51c77007319 400 /* Initialize the SPI_BaudRatePrescaler member */
mbed_official 52:a51c77007319 401 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
mbed_official 52:a51c77007319 402 /* Initialize the SPI_FirstBit member */
mbed_official 52:a51c77007319 403 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
mbed_official 52:a51c77007319 404 /* Initialize the SPI_CRCPolynomial member */
mbed_official 52:a51c77007319 405 SPI_InitStruct->SPI_CRCPolynomial = 7;
mbed_official 52:a51c77007319 406 }
mbed_official 52:a51c77007319 407
mbed_official 52:a51c77007319 408 /**
mbed_official 52:a51c77007319 409 * @brief Fills each I2S_InitStruct member with its default value.
mbed_official 52:a51c77007319 410 * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized.
mbed_official 52:a51c77007319 411 * @retval None
mbed_official 52:a51c77007319 412 */
mbed_official 52:a51c77007319 413 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
mbed_official 52:a51c77007319 414 {
mbed_official 52:a51c77007319 415 /*--------------- Reset I2S init structure parameters values -----------------*/
mbed_official 52:a51c77007319 416 /* Initialize the I2S_Mode member */
mbed_official 52:a51c77007319 417 I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
mbed_official 52:a51c77007319 418
mbed_official 52:a51c77007319 419 /* Initialize the I2S_Standard member */
mbed_official 52:a51c77007319 420 I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
mbed_official 52:a51c77007319 421
mbed_official 52:a51c77007319 422 /* Initialize the I2S_DataFormat member */
mbed_official 52:a51c77007319 423 I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
mbed_official 52:a51c77007319 424
mbed_official 52:a51c77007319 425 /* Initialize the I2S_MCLKOutput member */
mbed_official 52:a51c77007319 426 I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
mbed_official 52:a51c77007319 427
mbed_official 52:a51c77007319 428 /* Initialize the I2S_AudioFreq member */
mbed_official 52:a51c77007319 429 I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
mbed_official 52:a51c77007319 430
mbed_official 52:a51c77007319 431 /* Initialize the I2S_CPOL member */
mbed_official 52:a51c77007319 432 I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
mbed_official 52:a51c77007319 433 }
mbed_official 52:a51c77007319 434
mbed_official 52:a51c77007319 435 /**
mbed_official 52:a51c77007319 436 * @brief Enables or disables the specified SPI peripheral.
mbed_official 52:a51c77007319 437 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 438 * @param NewState: new state of the SPIx peripheral.
mbed_official 52:a51c77007319 439 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 440 * @retval None
mbed_official 52:a51c77007319 441 */
mbed_official 52:a51c77007319 442 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 52:a51c77007319 443 {
mbed_official 52:a51c77007319 444 /* Check the parameters */
mbed_official 52:a51c77007319 445 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 446 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 447 if (NewState != DISABLE)
mbed_official 52:a51c77007319 448 {
mbed_official 52:a51c77007319 449 /* Enable the selected SPI peripheral */
mbed_official 52:a51c77007319 450 SPIx->CR1 |= CR1_SPE_Set;
mbed_official 52:a51c77007319 451 }
mbed_official 52:a51c77007319 452 else
mbed_official 52:a51c77007319 453 {
mbed_official 52:a51c77007319 454 /* Disable the selected SPI peripheral */
mbed_official 52:a51c77007319 455 SPIx->CR1 &= CR1_SPE_Reset;
mbed_official 52:a51c77007319 456 }
mbed_official 52:a51c77007319 457 }
mbed_official 52:a51c77007319 458
mbed_official 52:a51c77007319 459 /**
mbed_official 52:a51c77007319 460 * @brief Enables or disables the specified SPI peripheral (in I2S mode).
mbed_official 52:a51c77007319 461 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 462 * @param NewState: new state of the SPIx peripheral.
mbed_official 52:a51c77007319 463 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 464 * @retval None
mbed_official 52:a51c77007319 465 */
mbed_official 52:a51c77007319 466 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 52:a51c77007319 467 {
mbed_official 52:a51c77007319 468 /* Check the parameters */
mbed_official 52:a51c77007319 469 assert_param(IS_SPI_23_PERIPH(SPIx));
mbed_official 52:a51c77007319 470 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 471 if (NewState != DISABLE)
mbed_official 52:a51c77007319 472 {
mbed_official 52:a51c77007319 473 /* Enable the selected SPI peripheral (in I2S mode) */
mbed_official 52:a51c77007319 474 SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
mbed_official 52:a51c77007319 475 }
mbed_official 52:a51c77007319 476 else
mbed_official 52:a51c77007319 477 {
mbed_official 52:a51c77007319 478 /* Disable the selected SPI peripheral (in I2S mode) */
mbed_official 52:a51c77007319 479 SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
mbed_official 52:a51c77007319 480 }
mbed_official 52:a51c77007319 481 }
mbed_official 52:a51c77007319 482
mbed_official 52:a51c77007319 483 /**
mbed_official 52:a51c77007319 484 * @brief Enables or disables the specified SPI/I2S interrupts.
mbed_official 52:a51c77007319 485 * @param SPIx: where x can be
mbed_official 52:a51c77007319 486 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 487 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 488 * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled.
mbed_official 52:a51c77007319 489 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 490 * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
mbed_official 52:a51c77007319 491 * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
mbed_official 52:a51c77007319 492 * @arg SPI_I2S_IT_ERR: Error interrupt mask
mbed_official 52:a51c77007319 493 * @param NewState: new state of the specified SPI/I2S interrupt.
mbed_official 52:a51c77007319 494 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 495 * @retval None
mbed_official 52:a51c77007319 496 */
mbed_official 52:a51c77007319 497 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
mbed_official 52:a51c77007319 498 {
mbed_official 52:a51c77007319 499 uint16_t itpos = 0, itmask = 0 ;
mbed_official 52:a51c77007319 500 /* Check the parameters */
mbed_official 52:a51c77007319 501 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 502 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 503 assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
mbed_official 52:a51c77007319 504
mbed_official 52:a51c77007319 505 /* Get the SPI/I2S IT index */
mbed_official 52:a51c77007319 506 itpos = SPI_I2S_IT >> 4;
mbed_official 52:a51c77007319 507
mbed_official 52:a51c77007319 508 /* Set the IT mask */
mbed_official 52:a51c77007319 509 itmask = (uint16_t)1 << (uint16_t)itpos;
mbed_official 52:a51c77007319 510
mbed_official 52:a51c77007319 511 if (NewState != DISABLE)
mbed_official 52:a51c77007319 512 {
mbed_official 52:a51c77007319 513 /* Enable the selected SPI/I2S interrupt */
mbed_official 52:a51c77007319 514 SPIx->CR2 |= itmask;
mbed_official 52:a51c77007319 515 }
mbed_official 52:a51c77007319 516 else
mbed_official 52:a51c77007319 517 {
mbed_official 52:a51c77007319 518 /* Disable the selected SPI/I2S interrupt */
mbed_official 52:a51c77007319 519 SPIx->CR2 &= (uint16_t)~itmask;
mbed_official 52:a51c77007319 520 }
mbed_official 52:a51c77007319 521 }
mbed_official 52:a51c77007319 522
mbed_official 52:a51c77007319 523 /**
mbed_official 52:a51c77007319 524 * @brief Enables or disables the SPIx/I2Sx DMA interface.
mbed_official 52:a51c77007319 525 * @param SPIx: where x can be
mbed_official 52:a51c77007319 526 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 527 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 528 * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled.
mbed_official 52:a51c77007319 529 * This parameter can be any combination of the following values:
mbed_official 52:a51c77007319 530 * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
mbed_official 52:a51c77007319 531 * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
mbed_official 52:a51c77007319 532 * @param NewState: new state of the selected SPI/I2S DMA transfer request.
mbed_official 52:a51c77007319 533 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 534 * @retval None
mbed_official 52:a51c77007319 535 */
mbed_official 52:a51c77007319 536 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
mbed_official 52:a51c77007319 537 {
mbed_official 52:a51c77007319 538 /* Check the parameters */
mbed_official 52:a51c77007319 539 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 540 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 541 assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
mbed_official 52:a51c77007319 542 if (NewState != DISABLE)
mbed_official 52:a51c77007319 543 {
mbed_official 52:a51c77007319 544 /* Enable the selected SPI/I2S DMA requests */
mbed_official 52:a51c77007319 545 SPIx->CR2 |= SPI_I2S_DMAReq;
mbed_official 52:a51c77007319 546 }
mbed_official 52:a51c77007319 547 else
mbed_official 52:a51c77007319 548 {
mbed_official 52:a51c77007319 549 /* Disable the selected SPI/I2S DMA requests */
mbed_official 52:a51c77007319 550 SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
mbed_official 52:a51c77007319 551 }
mbed_official 52:a51c77007319 552 }
mbed_official 52:a51c77007319 553
mbed_official 52:a51c77007319 554 /**
mbed_official 52:a51c77007319 555 * @brief Transmits a Data through the SPIx/I2Sx peripheral.
mbed_official 52:a51c77007319 556 * @param SPIx: where x can be
mbed_official 52:a51c77007319 557 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 558 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 559 * @param Data : Data to be transmitted.
mbed_official 52:a51c77007319 560 * @retval None
mbed_official 52:a51c77007319 561 */
mbed_official 52:a51c77007319 562 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
mbed_official 52:a51c77007319 563 {
mbed_official 52:a51c77007319 564 /* Check the parameters */
mbed_official 52:a51c77007319 565 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 566
mbed_official 52:a51c77007319 567 /* Write in the DR register the data to be sent */
mbed_official 52:a51c77007319 568 SPIx->DR = Data;
mbed_official 52:a51c77007319 569 }
mbed_official 52:a51c77007319 570
mbed_official 52:a51c77007319 571 /**
mbed_official 52:a51c77007319 572 * @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
mbed_official 52:a51c77007319 573 * @param SPIx: where x can be
mbed_official 52:a51c77007319 574 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 575 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 576 * @retval The value of the received data.
mbed_official 52:a51c77007319 577 */
mbed_official 52:a51c77007319 578 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
mbed_official 52:a51c77007319 579 {
mbed_official 52:a51c77007319 580 /* Check the parameters */
mbed_official 52:a51c77007319 581 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 582
mbed_official 52:a51c77007319 583 /* Return the data in the DR register */
mbed_official 52:a51c77007319 584 return SPIx->DR;
mbed_official 52:a51c77007319 585 }
mbed_official 52:a51c77007319 586
mbed_official 52:a51c77007319 587 /**
mbed_official 52:a51c77007319 588 * @brief Configures internally by software the NSS pin for the selected SPI.
mbed_official 52:a51c77007319 589 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 590 * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
mbed_official 52:a51c77007319 591 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 592 * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
mbed_official 52:a51c77007319 593 * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
mbed_official 52:a51c77007319 594 * @retval None
mbed_official 52:a51c77007319 595 */
mbed_official 52:a51c77007319 596 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
mbed_official 52:a51c77007319 597 {
mbed_official 52:a51c77007319 598 /* Check the parameters */
mbed_official 52:a51c77007319 599 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 600 assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
mbed_official 52:a51c77007319 601 if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
mbed_official 52:a51c77007319 602 {
mbed_official 52:a51c77007319 603 /* Set NSS pin internally by software */
mbed_official 52:a51c77007319 604 SPIx->CR1 |= SPI_NSSInternalSoft_Set;
mbed_official 52:a51c77007319 605 }
mbed_official 52:a51c77007319 606 else
mbed_official 52:a51c77007319 607 {
mbed_official 52:a51c77007319 608 /* Reset NSS pin internally by software */
mbed_official 52:a51c77007319 609 SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
mbed_official 52:a51c77007319 610 }
mbed_official 52:a51c77007319 611 }
mbed_official 52:a51c77007319 612
mbed_official 52:a51c77007319 613 /**
mbed_official 52:a51c77007319 614 * @brief Enables or disables the SS output for the selected SPI.
mbed_official 52:a51c77007319 615 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 616 * @param NewState: new state of the SPIx SS output.
mbed_official 52:a51c77007319 617 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 618 * @retval None
mbed_official 52:a51c77007319 619 */
mbed_official 52:a51c77007319 620 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 52:a51c77007319 621 {
mbed_official 52:a51c77007319 622 /* Check the parameters */
mbed_official 52:a51c77007319 623 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 624 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 625 if (NewState != DISABLE)
mbed_official 52:a51c77007319 626 {
mbed_official 52:a51c77007319 627 /* Enable the selected SPI SS output */
mbed_official 52:a51c77007319 628 SPIx->CR2 |= CR2_SSOE_Set;
mbed_official 52:a51c77007319 629 }
mbed_official 52:a51c77007319 630 else
mbed_official 52:a51c77007319 631 {
mbed_official 52:a51c77007319 632 /* Disable the selected SPI SS output */
mbed_official 52:a51c77007319 633 SPIx->CR2 &= CR2_SSOE_Reset;
mbed_official 52:a51c77007319 634 }
mbed_official 52:a51c77007319 635 }
mbed_official 52:a51c77007319 636
mbed_official 52:a51c77007319 637 /**
mbed_official 52:a51c77007319 638 * @brief Configures the data size for the selected SPI.
mbed_official 52:a51c77007319 639 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 640 * @param SPI_DataSize: specifies the SPI data size.
mbed_official 52:a51c77007319 641 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 642 * @arg SPI_DataSize_16b: Set data frame format to 16bit
mbed_official 52:a51c77007319 643 * @arg SPI_DataSize_8b: Set data frame format to 8bit
mbed_official 52:a51c77007319 644 * @retval None
mbed_official 52:a51c77007319 645 */
mbed_official 52:a51c77007319 646 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
mbed_official 52:a51c77007319 647 {
mbed_official 52:a51c77007319 648 /* Check the parameters */
mbed_official 52:a51c77007319 649 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 650 assert_param(IS_SPI_DATASIZE(SPI_DataSize));
mbed_official 52:a51c77007319 651 /* Clear DFF bit */
mbed_official 52:a51c77007319 652 SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
mbed_official 52:a51c77007319 653 /* Set new DFF bit value */
mbed_official 52:a51c77007319 654 SPIx->CR1 |= SPI_DataSize;
mbed_official 52:a51c77007319 655 }
mbed_official 52:a51c77007319 656
mbed_official 52:a51c77007319 657 /**
mbed_official 52:a51c77007319 658 * @brief Transmit the SPIx CRC value.
mbed_official 52:a51c77007319 659 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 660 * @retval None
mbed_official 52:a51c77007319 661 */
mbed_official 52:a51c77007319 662 void SPI_TransmitCRC(SPI_TypeDef* SPIx)
mbed_official 52:a51c77007319 663 {
mbed_official 52:a51c77007319 664 /* Check the parameters */
mbed_official 52:a51c77007319 665 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 666
mbed_official 52:a51c77007319 667 /* Enable the selected SPI CRC transmission */
mbed_official 52:a51c77007319 668 SPIx->CR1 |= CR1_CRCNext_Set;
mbed_official 52:a51c77007319 669 }
mbed_official 52:a51c77007319 670
mbed_official 52:a51c77007319 671 /**
mbed_official 52:a51c77007319 672 * @brief Enables or disables the CRC value calculation of the transferred bytes.
mbed_official 52:a51c77007319 673 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 674 * @param NewState: new state of the SPIx CRC value calculation.
mbed_official 52:a51c77007319 675 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 676 * @retval None
mbed_official 52:a51c77007319 677 */
mbed_official 52:a51c77007319 678 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 52:a51c77007319 679 {
mbed_official 52:a51c77007319 680 /* Check the parameters */
mbed_official 52:a51c77007319 681 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 682 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 683 if (NewState != DISABLE)
mbed_official 52:a51c77007319 684 {
mbed_official 52:a51c77007319 685 /* Enable the selected SPI CRC calculation */
mbed_official 52:a51c77007319 686 SPIx->CR1 |= CR1_CRCEN_Set;
mbed_official 52:a51c77007319 687 }
mbed_official 52:a51c77007319 688 else
mbed_official 52:a51c77007319 689 {
mbed_official 52:a51c77007319 690 /* Disable the selected SPI CRC calculation */
mbed_official 52:a51c77007319 691 SPIx->CR1 &= CR1_CRCEN_Reset;
mbed_official 52:a51c77007319 692 }
mbed_official 52:a51c77007319 693 }
mbed_official 52:a51c77007319 694
mbed_official 52:a51c77007319 695 /**
mbed_official 52:a51c77007319 696 * @brief Returns the transmit or the receive CRC register value for the specified SPI.
mbed_official 52:a51c77007319 697 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 698 * @param SPI_CRC: specifies the CRC register to be read.
mbed_official 52:a51c77007319 699 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 700 * @arg SPI_CRC_Tx: Selects Tx CRC register
mbed_official 52:a51c77007319 701 * @arg SPI_CRC_Rx: Selects Rx CRC register
mbed_official 52:a51c77007319 702 * @retval The selected CRC register value..
mbed_official 52:a51c77007319 703 */
mbed_official 52:a51c77007319 704 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
mbed_official 52:a51c77007319 705 {
mbed_official 52:a51c77007319 706 uint16_t crcreg = 0;
mbed_official 52:a51c77007319 707 /* Check the parameters */
mbed_official 52:a51c77007319 708 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 709 assert_param(IS_SPI_CRC(SPI_CRC));
mbed_official 52:a51c77007319 710 if (SPI_CRC != SPI_CRC_Rx)
mbed_official 52:a51c77007319 711 {
mbed_official 52:a51c77007319 712 /* Get the Tx CRC register */
mbed_official 52:a51c77007319 713 crcreg = SPIx->TXCRCR;
mbed_official 52:a51c77007319 714 }
mbed_official 52:a51c77007319 715 else
mbed_official 52:a51c77007319 716 {
mbed_official 52:a51c77007319 717 /* Get the Rx CRC register */
mbed_official 52:a51c77007319 718 crcreg = SPIx->RXCRCR;
mbed_official 52:a51c77007319 719 }
mbed_official 52:a51c77007319 720 /* Return the selected CRC register */
mbed_official 52:a51c77007319 721 return crcreg;
mbed_official 52:a51c77007319 722 }
mbed_official 52:a51c77007319 723
mbed_official 52:a51c77007319 724 /**
mbed_official 52:a51c77007319 725 * @brief Returns the CRC Polynomial register value for the specified SPI.
mbed_official 52:a51c77007319 726 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 727 * @retval The CRC Polynomial register value.
mbed_official 52:a51c77007319 728 */
mbed_official 52:a51c77007319 729 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
mbed_official 52:a51c77007319 730 {
mbed_official 52:a51c77007319 731 /* Check the parameters */
mbed_official 52:a51c77007319 732 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 733
mbed_official 52:a51c77007319 734 /* Return the CRC polynomial register */
mbed_official 52:a51c77007319 735 return SPIx->CRCPR;
mbed_official 52:a51c77007319 736 }
mbed_official 52:a51c77007319 737
mbed_official 52:a51c77007319 738 /**
mbed_official 52:a51c77007319 739 * @brief Selects the data transfer direction in bi-directional mode for the specified SPI.
mbed_official 52:a51c77007319 740 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 741 * @param SPI_Direction: specifies the data transfer direction in bi-directional mode.
mbed_official 52:a51c77007319 742 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 743 * @arg SPI_Direction_Tx: Selects Tx transmission direction
mbed_official 52:a51c77007319 744 * @arg SPI_Direction_Rx: Selects Rx receive direction
mbed_official 52:a51c77007319 745 * @retval None
mbed_official 52:a51c77007319 746 */
mbed_official 52:a51c77007319 747 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
mbed_official 52:a51c77007319 748 {
mbed_official 52:a51c77007319 749 /* Check the parameters */
mbed_official 52:a51c77007319 750 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 751 assert_param(IS_SPI_DIRECTION(SPI_Direction));
mbed_official 52:a51c77007319 752 if (SPI_Direction == SPI_Direction_Tx)
mbed_official 52:a51c77007319 753 {
mbed_official 52:a51c77007319 754 /* Set the Tx only mode */
mbed_official 52:a51c77007319 755 SPIx->CR1 |= SPI_Direction_Tx;
mbed_official 52:a51c77007319 756 }
mbed_official 52:a51c77007319 757 else
mbed_official 52:a51c77007319 758 {
mbed_official 52:a51c77007319 759 /* Set the Rx only mode */
mbed_official 52:a51c77007319 760 SPIx->CR1 &= SPI_Direction_Rx;
mbed_official 52:a51c77007319 761 }
mbed_official 52:a51c77007319 762 }
mbed_official 52:a51c77007319 763
mbed_official 52:a51c77007319 764 /**
mbed_official 52:a51c77007319 765 * @brief Checks whether the specified SPI/I2S flag is set or not.
mbed_official 52:a51c77007319 766 * @param SPIx: where x can be
mbed_official 52:a51c77007319 767 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 768 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 769 * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check.
mbed_official 52:a51c77007319 770 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 771 * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
mbed_official 52:a51c77007319 772 * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
mbed_official 52:a51c77007319 773 * @arg SPI_I2S_FLAG_BSY: Busy flag.
mbed_official 52:a51c77007319 774 * @arg SPI_I2S_FLAG_OVR: Overrun flag.
mbed_official 52:a51c77007319 775 * @arg SPI_FLAG_MODF: Mode Fault flag.
mbed_official 52:a51c77007319 776 * @arg SPI_FLAG_CRCERR: CRC Error flag.
mbed_official 52:a51c77007319 777 * @arg I2S_FLAG_UDR: Underrun Error flag.
mbed_official 52:a51c77007319 778 * @arg I2S_FLAG_CHSIDE: Channel Side flag.
mbed_official 52:a51c77007319 779 * @retval The new state of SPI_I2S_FLAG (SET or RESET).
mbed_official 52:a51c77007319 780 */
mbed_official 52:a51c77007319 781 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official 52:a51c77007319 782 {
mbed_official 52:a51c77007319 783 FlagStatus bitstatus = RESET;
mbed_official 52:a51c77007319 784 /* Check the parameters */
mbed_official 52:a51c77007319 785 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 786 assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
mbed_official 52:a51c77007319 787 /* Check the status of the specified SPI/I2S flag */
mbed_official 52:a51c77007319 788 if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
mbed_official 52:a51c77007319 789 {
mbed_official 52:a51c77007319 790 /* SPI_I2S_FLAG is set */
mbed_official 52:a51c77007319 791 bitstatus = SET;
mbed_official 52:a51c77007319 792 }
mbed_official 52:a51c77007319 793 else
mbed_official 52:a51c77007319 794 {
mbed_official 52:a51c77007319 795 /* SPI_I2S_FLAG is reset */
mbed_official 52:a51c77007319 796 bitstatus = RESET;
mbed_official 52:a51c77007319 797 }
mbed_official 52:a51c77007319 798 /* Return the SPI_I2S_FLAG status */
mbed_official 52:a51c77007319 799 return bitstatus;
mbed_official 52:a51c77007319 800 }
mbed_official 52:a51c77007319 801
mbed_official 52:a51c77007319 802 /**
mbed_official 52:a51c77007319 803 * @brief Clears the SPIx CRC Error (CRCERR) flag.
mbed_official 52:a51c77007319 804 * @param SPIx: where x can be
mbed_official 52:a51c77007319 805 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 806 * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
mbed_official 52:a51c77007319 807 * This function clears only CRCERR flag.
mbed_official 52:a51c77007319 808 * @note
mbed_official 52:a51c77007319 809 * - OVR (OverRun error) flag is cleared by software sequence: a read
mbed_official 52:a51c77007319 810 * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
mbed_official 52:a51c77007319 811 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
mbed_official 52:a51c77007319 812 * - UDR (UnderRun error) flag is cleared by a read operation to
mbed_official 52:a51c77007319 813 * SPI_SR register (SPI_I2S_GetFlagStatus()).
mbed_official 52:a51c77007319 814 * - MODF (Mode Fault) flag is cleared by software sequence: a read/write
mbed_official 52:a51c77007319 815 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
mbed_official 52:a51c77007319 816 * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
mbed_official 52:a51c77007319 817 * @retval None
mbed_official 52:a51c77007319 818 */
mbed_official 52:a51c77007319 819 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official 52:a51c77007319 820 {
mbed_official 52:a51c77007319 821 /* Check the parameters */
mbed_official 52:a51c77007319 822 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 823 assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
mbed_official 52:a51c77007319 824
mbed_official 52:a51c77007319 825 /* Clear the selected SPI CRC Error (CRCERR) flag */
mbed_official 52:a51c77007319 826 SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
mbed_official 52:a51c77007319 827 }
mbed_official 52:a51c77007319 828
mbed_official 52:a51c77007319 829 /**
mbed_official 52:a51c77007319 830 * @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
mbed_official 52:a51c77007319 831 * @param SPIx: where x can be
mbed_official 52:a51c77007319 832 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 833 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 834 * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.
mbed_official 52:a51c77007319 835 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 836 * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
mbed_official 52:a51c77007319 837 * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
mbed_official 52:a51c77007319 838 * @arg SPI_I2S_IT_OVR: Overrun interrupt.
mbed_official 52:a51c77007319 839 * @arg SPI_IT_MODF: Mode Fault interrupt.
mbed_official 52:a51c77007319 840 * @arg SPI_IT_CRCERR: CRC Error interrupt.
mbed_official 52:a51c77007319 841 * @arg I2S_IT_UDR: Underrun Error interrupt.
mbed_official 52:a51c77007319 842 * @retval The new state of SPI_I2S_IT (SET or RESET).
mbed_official 52:a51c77007319 843 */
mbed_official 52:a51c77007319 844 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
mbed_official 52:a51c77007319 845 {
mbed_official 52:a51c77007319 846 ITStatus bitstatus = RESET;
mbed_official 52:a51c77007319 847 uint16_t itpos = 0, itmask = 0, enablestatus = 0;
mbed_official 52:a51c77007319 848
mbed_official 52:a51c77007319 849 /* Check the parameters */
mbed_official 52:a51c77007319 850 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 851 assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
mbed_official 52:a51c77007319 852
mbed_official 52:a51c77007319 853 /* Get the SPI/I2S IT index */
mbed_official 52:a51c77007319 854 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
mbed_official 52:a51c77007319 855
mbed_official 52:a51c77007319 856 /* Get the SPI/I2S IT mask */
mbed_official 52:a51c77007319 857 itmask = SPI_I2S_IT >> 4;
mbed_official 52:a51c77007319 858
mbed_official 52:a51c77007319 859 /* Set the IT mask */
mbed_official 52:a51c77007319 860 itmask = 0x01 << itmask;
mbed_official 52:a51c77007319 861
mbed_official 52:a51c77007319 862 /* Get the SPI_I2S_IT enable bit status */
mbed_official 52:a51c77007319 863 enablestatus = (SPIx->CR2 & itmask) ;
mbed_official 52:a51c77007319 864
mbed_official 52:a51c77007319 865 /* Check the status of the specified SPI/I2S interrupt */
mbed_official 52:a51c77007319 866 if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
mbed_official 52:a51c77007319 867 {
mbed_official 52:a51c77007319 868 /* SPI_I2S_IT is set */
mbed_official 52:a51c77007319 869 bitstatus = SET;
mbed_official 52:a51c77007319 870 }
mbed_official 52:a51c77007319 871 else
mbed_official 52:a51c77007319 872 {
mbed_official 52:a51c77007319 873 /* SPI_I2S_IT is reset */
mbed_official 52:a51c77007319 874 bitstatus = RESET;
mbed_official 52:a51c77007319 875 }
mbed_official 52:a51c77007319 876 /* Return the SPI_I2S_IT status */
mbed_official 52:a51c77007319 877 return bitstatus;
mbed_official 52:a51c77007319 878 }
mbed_official 52:a51c77007319 879
mbed_official 52:a51c77007319 880 /**
mbed_official 52:a51c77007319 881 * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
mbed_official 52:a51c77007319 882 * @param SPIx: where x can be
mbed_official 52:a51c77007319 883 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 884 * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
mbed_official 52:a51c77007319 885 * This function clears only CRCERR interrupt pending bit.
mbed_official 52:a51c77007319 886 * @note
mbed_official 52:a51c77007319 887 * - OVR (OverRun Error) interrupt pending bit is cleared by software
mbed_official 52:a51c77007319 888 * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
mbed_official 52:a51c77007319 889 * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
mbed_official 52:a51c77007319 890 * - UDR (UnderRun Error) interrupt pending bit is cleared by a read
mbed_official 52:a51c77007319 891 * operation to SPI_SR register (SPI_I2S_GetITStatus()).
mbed_official 52:a51c77007319 892 * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
mbed_official 52:a51c77007319 893 * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
mbed_official 52:a51c77007319 894 * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
mbed_official 52:a51c77007319 895 * the SPI).
mbed_official 52:a51c77007319 896 * @retval None
mbed_official 52:a51c77007319 897 */
mbed_official 52:a51c77007319 898 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
mbed_official 52:a51c77007319 899 {
mbed_official 52:a51c77007319 900 uint16_t itpos = 0;
mbed_official 52:a51c77007319 901 /* Check the parameters */
mbed_official 52:a51c77007319 902 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 903 assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
mbed_official 52:a51c77007319 904
mbed_official 52:a51c77007319 905 /* Get the SPI IT index */
mbed_official 52:a51c77007319 906 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
mbed_official 52:a51c77007319 907
mbed_official 52:a51c77007319 908 /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
mbed_official 52:a51c77007319 909 SPIx->SR = (uint16_t)~itpos;
mbed_official 52:a51c77007319 910 }
mbed_official 52:a51c77007319 911 /**
mbed_official 52:a51c77007319 912 * @}
mbed_official 52:a51c77007319 913 */
mbed_official 52:a51c77007319 914
mbed_official 52:a51c77007319 915 /**
mbed_official 52:a51c77007319 916 * @}
mbed_official 52:a51c77007319 917 */
mbed_official 52:a51c77007319 918
mbed_official 52:a51c77007319 919 /**
mbed_official 52:a51c77007319 920 * @}
mbed_official 52:a51c77007319 921 */
mbed_official 52:a51c77007319 922
mbed_official 52:a51c77007319 923 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/