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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_sdio.c@80:66393a7b209d, 2014-01-30 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Jan 30 12:15:05 2014 +0000
- Revision:
- 80:66393a7b209d
- Parent:
- 76:aeb1df146756
Synchronized with git revision dba523f83fe09b7fce11fc1299dd1216e9776359
Full URL: https://github.com/mbedmicro/mbed/commit/dba523f83fe09b7fce11fc1299dd1216e9776359/
Update of I2C, SPI, SLEEP for NUCLEO_F103RB and L152RE
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 76:aeb1df146756 | 1 | /** |
mbed_official | 76:aeb1df146756 | 2 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 3 | * @file stm32l1xx_sdio.c |
mbed_official | 76:aeb1df146756 | 4 | * @author MCD Application Team |
mbed_official | 80:66393a7b209d | 5 | * @version V1.3.0 |
mbed_official | 80:66393a7b209d | 6 | * @date 31-January-2014 |
mbed_official | 76:aeb1df146756 | 7 | * @brief This file provides firmware functions to manage the following |
mbed_official | 76:aeb1df146756 | 8 | * functionalities of the SDIO peripheral: |
mbed_official | 76:aeb1df146756 | 9 | * + Initialization |
mbed_official | 76:aeb1df146756 | 10 | * + Interrupts and flags management |
mbed_official | 76:aeb1df146756 | 11 | * |
mbed_official | 76:aeb1df146756 | 12 | * @verbatim |
mbed_official | 76:aeb1df146756 | 13 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 14 | ##### How to use this driver ##### |
mbed_official | 76:aeb1df146756 | 15 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 16 | [..] |
mbed_official | 76:aeb1df146756 | 17 | (#) The SDIO clock (SDIOCLK = 48 MHz) is coming from a specific output of PLL |
mbed_official | 76:aeb1df146756 | 18 | (PLLVCO) througth a fixed divider by 2. |
mbed_official | 76:aeb1df146756 | 19 | Before to start working with SDIO peripheral make sure that the PLLVCO is |
mbed_official | 76:aeb1df146756 | 20 | well configured to 96MHz. |
mbed_official | 76:aeb1df146756 | 21 | The SDIO peripheral uses two clock signals: |
mbed_official | 76:aeb1df146756 | 22 | (++) SDIO adapter clock (SDIOCLK = 48 MHz). |
mbed_official | 76:aeb1df146756 | 23 | (++) APB2 bus clock (PCLK2). |
mbed_official | 76:aeb1df146756 | 24 | PCLK2 and SDIO_CK clock frequencies must respect the following |
mbed_official | 76:aeb1df146756 | 25 | condition: Frequenc(PCLK2) >= (3 / 8 x Frequency(SDIO_CK)). |
mbed_official | 76:aeb1df146756 | 26 | (#) Enable peripheral clock using |
mbed_official | 76:aeb1df146756 | 27 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, ENABLE). |
mbed_official | 76:aeb1df146756 | 28 | (#) According to the SDIO mode, enable the GPIO clocks using |
mbed_official | 76:aeb1df146756 | 29 | RCC_AHBPeriphClockCmd() function. |
mbed_official | 76:aeb1df146756 | 30 | The I/O can be one of the following configurations: |
mbed_official | 76:aeb1df146756 | 31 | (++) 1-bit data length: SDIO_CMD, SDIO_CK and D0. |
mbed_official | 76:aeb1df146756 | 32 | (++) 4-bit data length: SDIO_CMD, SDIO_CK and D[3:0]. |
mbed_official | 76:aeb1df146756 | 33 | (++) 8-bit data length: SDIO_CMD, SDIO_CK and D[7:0]. |
mbed_official | 76:aeb1df146756 | 34 | |
mbed_official | 76:aeb1df146756 | 35 | (#) Peripheral's alternate function: |
mbed_official | 76:aeb1df146756 | 36 | (++) Connect the pin to the desired peripherals' Alternate |
mbed_official | 76:aeb1df146756 | 37 | Function (AF) using GPIO_PinAFConfig() function. |
mbed_official | 76:aeb1df146756 | 38 | (++) Configure the desired pin in alternate function by: |
mbed_official | 76:aeb1df146756 | 39 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF. |
mbed_official | 76:aeb1df146756 | 40 | (++) Select the type, pull-up/pull-down and output speed via |
mbed_official | 76:aeb1df146756 | 41 | GPIO_PuPd, GPIO_OType and GPIO_Speed members. |
mbed_official | 76:aeb1df146756 | 42 | (++) Call GPIO_Init() function. |
mbed_official | 76:aeb1df146756 | 43 | |
mbed_official | 76:aeb1df146756 | 44 | (#) Program the Clock Edge, Clock Bypass, Clock Power Save, Bus Wide, |
mbed_official | 76:aeb1df146756 | 45 | hardware, flow control and the Clock Divider using the SDIO_Init() |
mbed_official | 76:aeb1df146756 | 46 | function. |
mbed_official | 76:aeb1df146756 | 47 | (#) Enable the Power ON State using the SDIO_SetPowerState(SDIO_PowerState_ON) |
mbed_official | 76:aeb1df146756 | 48 | function. |
mbed_official | 76:aeb1df146756 | 49 | (#) Enable the clock using the SDIO_ClockCmd() function. |
mbed_official | 76:aeb1df146756 | 50 | (#) Enable the NVIC and the corresponding interrupt using the function |
mbed_official | 76:aeb1df146756 | 51 | SDIO_ITConfig() if you need to use interrupt mode. |
mbed_official | 76:aeb1df146756 | 52 | (#) When using the DMA mode |
mbed_official | 76:aeb1df146756 | 53 | (++) Configure the DMA using DMA_Init() function. |
mbed_official | 76:aeb1df146756 | 54 | (++) Active the needed channel Request using SDIO_DMACmd() function. |
mbed_official | 76:aeb1df146756 | 55 | (#) Enable the DMA using the DMA_Cmd() function, when using DMA mode. |
mbed_official | 76:aeb1df146756 | 56 | (#) To control the CPSM (Command Path State Machine) and send commands to the |
mbed_official | 76:aeb1df146756 | 57 | card use the SDIO_SendCommand(), SDIO_GetCommandResponse() and |
mbed_official | 76:aeb1df146756 | 58 | SDIO_GetResponse() functions. First, user has to fill the command |
mbed_official | 76:aeb1df146756 | 59 | structure (pointer to SDIO_CmdInitTypeDef) according to the selected |
mbed_official | 76:aeb1df146756 | 60 | command to be sent. The parameters that should be filled are: |
mbed_official | 76:aeb1df146756 | 61 | (++) Command Argument. |
mbed_official | 76:aeb1df146756 | 62 | (++) Command Index. |
mbed_official | 76:aeb1df146756 | 63 | (++) Command Response type. |
mbed_official | 76:aeb1df146756 | 64 | (++) Command Wait. |
mbed_official | 76:aeb1df146756 | 65 | (++) CPSM Status (Enable or Disable). |
mbed_official | 76:aeb1df146756 | 66 | To check if the command is well received, read the SDIO_CMDRESP register |
mbed_official | 76:aeb1df146756 | 67 | using the SDIO_GetCommandResponse(). The SDIO responses registers |
mbed_official | 76:aeb1df146756 | 68 | (SDIO_RESP1 to SDIO_RESP2), use the SDIO_GetResponse() function. |
mbed_official | 76:aeb1df146756 | 69 | (#) To control the DPSM (Data Path State Machine) and send/receive |
mbed_official | 76:aeb1df146756 | 70 | data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(), |
mbed_official | 76:aeb1df146756 | 71 | SDIO_ReadData(), SDIO_WriteData() and SDIO_GetFIFOCount() functions. |
mbed_official | 76:aeb1df146756 | 72 | |
mbed_official | 76:aeb1df146756 | 73 | *** Read Operations *** |
mbed_official | 76:aeb1df146756 | 74 | ----------------------- |
mbed_official | 76:aeb1df146756 | 75 | [..] |
mbed_official | 76:aeb1df146756 | 76 | (#) First, user has to fill the data structure (pointer to |
mbed_official | 76:aeb1df146756 | 77 | SDIO_DataInitTypeDef) according to the selected data type to be received. |
mbed_official | 76:aeb1df146756 | 78 | The parameters that should be filled are: |
mbed_official | 76:aeb1df146756 | 79 | (++) Data TimeOut. |
mbed_official | 76:aeb1df146756 | 80 | (++) Data Length. |
mbed_official | 76:aeb1df146756 | 81 | (++) Data Block size. |
mbed_official | 76:aeb1df146756 | 82 | (++) Data Transfer direction: should be from card (To SDIO). |
mbed_official | 76:aeb1df146756 | 83 | (++) Data Transfer mode. |
mbed_official | 76:aeb1df146756 | 84 | (++) DPSM Status (Enable or Disable). |
mbed_official | 76:aeb1df146756 | 85 | (#) Configure the SDIO resources to receive the data from the card |
mbed_official | 76:aeb1df146756 | 86 | according to selected transfer mode (Refer to Step 8, 9 and 10). |
mbed_official | 76:aeb1df146756 | 87 | (#) Send the selected Read command (refer to step 11). |
mbed_official | 76:aeb1df146756 | 88 | (#) Use the SDIO flags/interrupts to check the transfer status. |
mbed_official | 76:aeb1df146756 | 89 | |
mbed_official | 76:aeb1df146756 | 90 | *** Write Operations *** |
mbed_official | 76:aeb1df146756 | 91 | ------------------------ |
mbed_official | 76:aeb1df146756 | 92 | [..] |
mbed_official | 76:aeb1df146756 | 93 | (#) First, user has to fill the data structure (pointer to |
mbed_official | 76:aeb1df146756 | 94 | SDIO_DataInitTypeDef) according to the selected data type to be received. |
mbed_official | 76:aeb1df146756 | 95 | The parameters that should be filled are: |
mbed_official | 76:aeb1df146756 | 96 | (++) Data TimeOut. |
mbed_official | 76:aeb1df146756 | 97 | (++) Data Length. |
mbed_official | 76:aeb1df146756 | 98 | (++) Data Block size. |
mbed_official | 76:aeb1df146756 | 99 | (++) Data Transfer direction: should be to card (To CARD). |
mbed_official | 76:aeb1df146756 | 100 | (++) Data Transfer mode. |
mbed_official | 76:aeb1df146756 | 101 | (++) DPSM Status (Enable or Disable). |
mbed_official | 76:aeb1df146756 | 102 | (#) Configure the SDIO resources to send the data to the card |
mbed_official | 76:aeb1df146756 | 103 | according to selected transfer mode (Refer to Step 8, 9 and 10). |
mbed_official | 76:aeb1df146756 | 104 | (#) Send the selected Write command (refer to step 11). |
mbed_official | 76:aeb1df146756 | 105 | (#) Use the SDIO flags/interrupts to check the transfer status. |
mbed_official | 76:aeb1df146756 | 106 | |
mbed_official | 76:aeb1df146756 | 107 | @endverbatim |
mbed_official | 76:aeb1df146756 | 108 | * |
mbed_official | 76:aeb1df146756 | 109 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 110 | * @attention |
mbed_official | 76:aeb1df146756 | 111 | * |
mbed_official | 80:66393a7b209d | 112 | * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
mbed_official | 76:aeb1df146756 | 113 | * |
mbed_official | 76:aeb1df146756 | 114 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
mbed_official | 76:aeb1df146756 | 115 | * You may not use this file except in compliance with the License. |
mbed_official | 76:aeb1df146756 | 116 | * You may obtain a copy of the License at: |
mbed_official | 76:aeb1df146756 | 117 | * |
mbed_official | 76:aeb1df146756 | 118 | * http://www.st.com/software_license_agreement_liberty_v2 |
mbed_official | 76:aeb1df146756 | 119 | * |
mbed_official | 76:aeb1df146756 | 120 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 76:aeb1df146756 | 121 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 76:aeb1df146756 | 122 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 76:aeb1df146756 | 123 | * See the License for the specific language governing permissions and |
mbed_official | 76:aeb1df146756 | 124 | * limitations under the License. |
mbed_official | 76:aeb1df146756 | 125 | * |
mbed_official | 76:aeb1df146756 | 126 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 127 | */ |
mbed_official | 76:aeb1df146756 | 128 | |
mbed_official | 76:aeb1df146756 | 129 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 130 | #include "stm32l1xx_sdio.h" |
mbed_official | 76:aeb1df146756 | 131 | #include "stm32l1xx_rcc.h" |
mbed_official | 76:aeb1df146756 | 132 | |
mbed_official | 76:aeb1df146756 | 133 | /** @addtogroup STM32L1xx_StdPeriph_Driver |
mbed_official | 76:aeb1df146756 | 134 | * @{ |
mbed_official | 76:aeb1df146756 | 135 | */ |
mbed_official | 76:aeb1df146756 | 136 | |
mbed_official | 76:aeb1df146756 | 137 | /** @defgroup SDIO |
mbed_official | 76:aeb1df146756 | 138 | * @brief SDIO driver modules |
mbed_official | 76:aeb1df146756 | 139 | * @{ |
mbed_official | 76:aeb1df146756 | 140 | */ |
mbed_official | 76:aeb1df146756 | 141 | |
mbed_official | 76:aeb1df146756 | 142 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 143 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 144 | |
mbed_official | 76:aeb1df146756 | 145 | /* ------------ SDIO registers bit address in the alias region ----------- */ |
mbed_official | 76:aeb1df146756 | 146 | #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE) |
mbed_official | 76:aeb1df146756 | 147 | |
mbed_official | 76:aeb1df146756 | 148 | /* --- CLKCR Register ---*/ |
mbed_official | 76:aeb1df146756 | 149 | |
mbed_official | 76:aeb1df146756 | 150 | /* Alias word address of CLKEN bit */ |
mbed_official | 76:aeb1df146756 | 151 | #define CLKCR_OFFSET (SDIO_OFFSET + 0x04) |
mbed_official | 76:aeb1df146756 | 152 | #define CLKEN_BitNumber 0x08 |
mbed_official | 76:aeb1df146756 | 153 | #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 154 | |
mbed_official | 76:aeb1df146756 | 155 | /* --- CMD Register ---*/ |
mbed_official | 76:aeb1df146756 | 156 | |
mbed_official | 76:aeb1df146756 | 157 | /* Alias word address of SDIOSUSPEND bit */ |
mbed_official | 76:aeb1df146756 | 158 | #define CMD_OFFSET (SDIO_OFFSET + 0x0C) |
mbed_official | 76:aeb1df146756 | 159 | #define SDIOSUSPEND_BitNumber 0x0B |
mbed_official | 76:aeb1df146756 | 160 | #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 161 | |
mbed_official | 76:aeb1df146756 | 162 | /* Alias word address of ENCMDCOMPL bit */ |
mbed_official | 76:aeb1df146756 | 163 | #define ENCMDCOMPL_BitNumber 0x0C |
mbed_official | 76:aeb1df146756 | 164 | #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 165 | |
mbed_official | 76:aeb1df146756 | 166 | /* Alias word address of NIEN bit */ |
mbed_official | 76:aeb1df146756 | 167 | #define NIEN_BitNumber 0x0D |
mbed_official | 76:aeb1df146756 | 168 | #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 169 | |
mbed_official | 76:aeb1df146756 | 170 | /* Alias word address of ATACMD bit */ |
mbed_official | 76:aeb1df146756 | 171 | #define ATACMD_BitNumber 0x0E |
mbed_official | 76:aeb1df146756 | 172 | #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 173 | |
mbed_official | 76:aeb1df146756 | 174 | /* --- DCTRL Register ---*/ |
mbed_official | 76:aeb1df146756 | 175 | |
mbed_official | 76:aeb1df146756 | 176 | /* Alias word address of DMAEN bit */ |
mbed_official | 76:aeb1df146756 | 177 | #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C) |
mbed_official | 76:aeb1df146756 | 178 | #define DMAEN_BitNumber 0x03 |
mbed_official | 76:aeb1df146756 | 179 | #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 180 | |
mbed_official | 76:aeb1df146756 | 181 | /* Alias word address of RWSTART bit */ |
mbed_official | 76:aeb1df146756 | 182 | #define RWSTART_BitNumber 0x08 |
mbed_official | 76:aeb1df146756 | 183 | #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 184 | |
mbed_official | 76:aeb1df146756 | 185 | /* Alias word address of RWSTOP bit */ |
mbed_official | 76:aeb1df146756 | 186 | #define RWSTOP_BitNumber 0x09 |
mbed_official | 76:aeb1df146756 | 187 | #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 188 | |
mbed_official | 76:aeb1df146756 | 189 | /* Alias word address of RWMOD bit */ |
mbed_official | 76:aeb1df146756 | 190 | #define RWMOD_BitNumber 0x0A |
mbed_official | 76:aeb1df146756 | 191 | #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 192 | |
mbed_official | 76:aeb1df146756 | 193 | /* Alias word address of SDIOEN bit */ |
mbed_official | 76:aeb1df146756 | 194 | #define SDIOEN_BitNumber 0x0B |
mbed_official | 76:aeb1df146756 | 195 | #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4)) |
mbed_official | 76:aeb1df146756 | 196 | |
mbed_official | 76:aeb1df146756 | 197 | /* ---------------------- SDIO registers bit mask ------------------------ */ |
mbed_official | 76:aeb1df146756 | 198 | |
mbed_official | 76:aeb1df146756 | 199 | /* --- CLKCR Register ---*/ |
mbed_official | 76:aeb1df146756 | 200 | |
mbed_official | 76:aeb1df146756 | 201 | /* CLKCR register clear mask */ |
mbed_official | 76:aeb1df146756 | 202 | #define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100) |
mbed_official | 76:aeb1df146756 | 203 | |
mbed_official | 76:aeb1df146756 | 204 | /* --- PWRCTRL Register ---*/ |
mbed_official | 76:aeb1df146756 | 205 | |
mbed_official | 76:aeb1df146756 | 206 | /* SDIO PWRCTRL Mask */ |
mbed_official | 76:aeb1df146756 | 207 | #define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC) |
mbed_official | 76:aeb1df146756 | 208 | |
mbed_official | 76:aeb1df146756 | 209 | /* --- DCTRL Register ---*/ |
mbed_official | 76:aeb1df146756 | 210 | |
mbed_official | 76:aeb1df146756 | 211 | /* SDIO DCTRL Clear Mask */ |
mbed_official | 76:aeb1df146756 | 212 | #define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08) |
mbed_official | 76:aeb1df146756 | 213 | |
mbed_official | 76:aeb1df146756 | 214 | /* --- CMD Register ---*/ |
mbed_official | 76:aeb1df146756 | 215 | |
mbed_official | 76:aeb1df146756 | 216 | /* CMD Register clear mask */ |
mbed_official | 76:aeb1df146756 | 217 | #define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800) |
mbed_official | 76:aeb1df146756 | 218 | |
mbed_official | 76:aeb1df146756 | 219 | /* SDIO RESP Registers Address */ |
mbed_official | 76:aeb1df146756 | 220 | #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14)) |
mbed_official | 76:aeb1df146756 | 221 | |
mbed_official | 76:aeb1df146756 | 222 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 223 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 224 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 225 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 226 | |
mbed_official | 76:aeb1df146756 | 227 | /** @defgroup SDIO_Private_Functions |
mbed_official | 76:aeb1df146756 | 228 | * @{ |
mbed_official | 76:aeb1df146756 | 229 | */ |
mbed_official | 76:aeb1df146756 | 230 | |
mbed_official | 76:aeb1df146756 | 231 | /** @defgroup SDIO_Group1 Initialization and Configuration functions |
mbed_official | 76:aeb1df146756 | 232 | * @brief Initialization and Configuration functions |
mbed_official | 76:aeb1df146756 | 233 | * |
mbed_official | 76:aeb1df146756 | 234 | @verbatim |
mbed_official | 76:aeb1df146756 | 235 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 236 | ##### Initialization and Configuration functions ##### |
mbed_official | 76:aeb1df146756 | 237 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 238 | |
mbed_official | 76:aeb1df146756 | 239 | @endverbatim |
mbed_official | 76:aeb1df146756 | 240 | * @{ |
mbed_official | 76:aeb1df146756 | 241 | */ |
mbed_official | 76:aeb1df146756 | 242 | |
mbed_official | 76:aeb1df146756 | 243 | /** |
mbed_official | 76:aeb1df146756 | 244 | * @brief Deinitializes the SDIO peripheral registers to their default reset values. |
mbed_official | 76:aeb1df146756 | 245 | * @param None |
mbed_official | 76:aeb1df146756 | 246 | * @retval None |
mbed_official | 76:aeb1df146756 | 247 | */ |
mbed_official | 76:aeb1df146756 | 248 | void SDIO_DeInit(void) |
mbed_official | 76:aeb1df146756 | 249 | { |
mbed_official | 76:aeb1df146756 | 250 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SDIO, ENABLE); |
mbed_official | 76:aeb1df146756 | 251 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SDIO, DISABLE); |
mbed_official | 76:aeb1df146756 | 252 | } |
mbed_official | 76:aeb1df146756 | 253 | |
mbed_official | 76:aeb1df146756 | 254 | /** |
mbed_official | 76:aeb1df146756 | 255 | * @brief Initializes the SDIO peripheral according to the specified |
mbed_official | 76:aeb1df146756 | 256 | * parameters in the SDIO_InitStruct. |
mbed_official | 76:aeb1df146756 | 257 | * @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure |
mbed_official | 76:aeb1df146756 | 258 | * that contains the configuration information for the SDIO peripheral. |
mbed_official | 76:aeb1df146756 | 259 | * @retval None |
mbed_official | 76:aeb1df146756 | 260 | */ |
mbed_official | 76:aeb1df146756 | 261 | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct) |
mbed_official | 76:aeb1df146756 | 262 | { |
mbed_official | 76:aeb1df146756 | 263 | uint32_t tmpreg = 0; |
mbed_official | 76:aeb1df146756 | 264 | |
mbed_official | 76:aeb1df146756 | 265 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 266 | assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge)); |
mbed_official | 76:aeb1df146756 | 267 | assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass)); |
mbed_official | 76:aeb1df146756 | 268 | assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave)); |
mbed_official | 76:aeb1df146756 | 269 | assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide)); |
mbed_official | 76:aeb1df146756 | 270 | assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); |
mbed_official | 76:aeb1df146756 | 271 | |
mbed_official | 76:aeb1df146756 | 272 | /*---------------------------- SDIO CLKCR Configuration ------------------------*/ |
mbed_official | 76:aeb1df146756 | 273 | /* Get the SDIO CLKCR value */ |
mbed_official | 76:aeb1df146756 | 274 | tmpreg = SDIO->CLKCR; |
mbed_official | 76:aeb1df146756 | 275 | |
mbed_official | 76:aeb1df146756 | 276 | /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ |
mbed_official | 76:aeb1df146756 | 277 | tmpreg &= CLKCR_CLEAR_MASK; |
mbed_official | 76:aeb1df146756 | 278 | |
mbed_official | 76:aeb1df146756 | 279 | /* Set CLKDIV bits according to SDIO_ClockDiv value */ |
mbed_official | 76:aeb1df146756 | 280 | /* Set PWRSAV bit according to SDIO_ClockPowerSave value */ |
mbed_official | 76:aeb1df146756 | 281 | /* Set BYPASS bit according to SDIO_ClockBypass value */ |
mbed_official | 76:aeb1df146756 | 282 | /* Set WIDBUS bits according to SDIO_BusWide value */ |
mbed_official | 76:aeb1df146756 | 283 | /* Set NEGEDGE bits according to SDIO_ClockEdge value */ |
mbed_official | 76:aeb1df146756 | 284 | /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */ |
mbed_official | 76:aeb1df146756 | 285 | tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave | |
mbed_official | 76:aeb1df146756 | 286 | SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide | |
mbed_official | 76:aeb1df146756 | 287 | SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); |
mbed_official | 76:aeb1df146756 | 288 | |
mbed_official | 76:aeb1df146756 | 289 | /* Write to SDIO CLKCR */ |
mbed_official | 76:aeb1df146756 | 290 | SDIO->CLKCR = tmpreg; |
mbed_official | 76:aeb1df146756 | 291 | } |
mbed_official | 76:aeb1df146756 | 292 | |
mbed_official | 76:aeb1df146756 | 293 | /** |
mbed_official | 76:aeb1df146756 | 294 | * @brief Fills each SDIO_InitStruct member with its default value. |
mbed_official | 76:aeb1df146756 | 295 | * @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which |
mbed_official | 76:aeb1df146756 | 296 | * will be initialized. |
mbed_official | 76:aeb1df146756 | 297 | * @retval None |
mbed_official | 76:aeb1df146756 | 298 | */ |
mbed_official | 76:aeb1df146756 | 299 | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct) |
mbed_official | 76:aeb1df146756 | 300 | { |
mbed_official | 76:aeb1df146756 | 301 | /* SDIO_InitStruct members default value */ |
mbed_official | 76:aeb1df146756 | 302 | SDIO_InitStruct->SDIO_ClockDiv = 0x00; |
mbed_official | 76:aeb1df146756 | 303 | SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising; |
mbed_official | 76:aeb1df146756 | 304 | SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable; |
mbed_official | 76:aeb1df146756 | 305 | SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; |
mbed_official | 76:aeb1df146756 | 306 | SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b; |
mbed_official | 76:aeb1df146756 | 307 | SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; |
mbed_official | 76:aeb1df146756 | 308 | } |
mbed_official | 76:aeb1df146756 | 309 | |
mbed_official | 76:aeb1df146756 | 310 | /** |
mbed_official | 76:aeb1df146756 | 311 | * @brief Enables or disables the SDIO Clock. |
mbed_official | 76:aeb1df146756 | 312 | * @param NewState: new state of the SDIO Clock. This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 313 | * @retval None |
mbed_official | 76:aeb1df146756 | 314 | */ |
mbed_official | 76:aeb1df146756 | 315 | void SDIO_ClockCmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 316 | { |
mbed_official | 76:aeb1df146756 | 317 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 318 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 319 | |
mbed_official | 76:aeb1df146756 | 320 | *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState; |
mbed_official | 76:aeb1df146756 | 321 | } |
mbed_official | 76:aeb1df146756 | 322 | |
mbed_official | 76:aeb1df146756 | 323 | /** |
mbed_official | 76:aeb1df146756 | 324 | * @brief Sets the power status of the controller. |
mbed_official | 76:aeb1df146756 | 325 | * @param SDIO_PowerState: new state of the Power state. |
mbed_official | 76:aeb1df146756 | 326 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 327 | * @arg SDIO_PowerState_OFF: SDIO Power OFF. |
mbed_official | 76:aeb1df146756 | 328 | * @arg SDIO_PowerState_ON: SDIO Power ON. |
mbed_official | 76:aeb1df146756 | 329 | * @retval None |
mbed_official | 76:aeb1df146756 | 330 | */ |
mbed_official | 76:aeb1df146756 | 331 | void SDIO_SetPowerState(uint32_t SDIO_PowerState) |
mbed_official | 76:aeb1df146756 | 332 | { |
mbed_official | 76:aeb1df146756 | 333 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 334 | assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState)); |
mbed_official | 76:aeb1df146756 | 335 | |
mbed_official | 76:aeb1df146756 | 336 | SDIO->POWER = SDIO_PowerState; |
mbed_official | 76:aeb1df146756 | 337 | } |
mbed_official | 76:aeb1df146756 | 338 | |
mbed_official | 76:aeb1df146756 | 339 | /** |
mbed_official | 76:aeb1df146756 | 340 | * @brief Gets the power status of the controller. |
mbed_official | 76:aeb1df146756 | 341 | * @param None |
mbed_official | 76:aeb1df146756 | 342 | * @retval Power status of the controller. The returned value can |
mbed_official | 76:aeb1df146756 | 343 | * be one of the following: |
mbed_official | 76:aeb1df146756 | 344 | * - 0x00: Power OFF |
mbed_official | 76:aeb1df146756 | 345 | * - 0x02: Power UP |
mbed_official | 76:aeb1df146756 | 346 | * - 0x03: Power ON |
mbed_official | 76:aeb1df146756 | 347 | */ |
mbed_official | 76:aeb1df146756 | 348 | uint32_t SDIO_GetPowerState(void) |
mbed_official | 76:aeb1df146756 | 349 | { |
mbed_official | 76:aeb1df146756 | 350 | return (SDIO->POWER & (~PWR_PWRCTRL_MASK)); |
mbed_official | 76:aeb1df146756 | 351 | } |
mbed_official | 76:aeb1df146756 | 352 | |
mbed_official | 76:aeb1df146756 | 353 | /** |
mbed_official | 76:aeb1df146756 | 354 | * @} |
mbed_official | 76:aeb1df146756 | 355 | */ |
mbed_official | 76:aeb1df146756 | 356 | |
mbed_official | 76:aeb1df146756 | 357 | /** @defgroup SDIO_Group2 DMA transfers management functions |
mbed_official | 76:aeb1df146756 | 358 | * @brief DMA transfers management functions |
mbed_official | 76:aeb1df146756 | 359 | * |
mbed_official | 76:aeb1df146756 | 360 | @verbatim |
mbed_official | 76:aeb1df146756 | 361 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 362 | ##### DMA transfers management functions ##### |
mbed_official | 76:aeb1df146756 | 363 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 364 | [..] This section provide functions allowing to program SDIO DMA transfer. |
mbed_official | 76:aeb1df146756 | 365 | |
mbed_official | 76:aeb1df146756 | 366 | @endverbatim |
mbed_official | 76:aeb1df146756 | 367 | * @{ |
mbed_official | 76:aeb1df146756 | 368 | */ |
mbed_official | 76:aeb1df146756 | 369 | |
mbed_official | 76:aeb1df146756 | 370 | /** |
mbed_official | 76:aeb1df146756 | 371 | * @brief Enables or disables the SDIO DMA request. |
mbed_official | 76:aeb1df146756 | 372 | * @param NewState: new state of the selected SDIO DMA request. |
mbed_official | 76:aeb1df146756 | 373 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 374 | * @retval None |
mbed_official | 76:aeb1df146756 | 375 | */ |
mbed_official | 76:aeb1df146756 | 376 | void SDIO_DMACmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 377 | { |
mbed_official | 76:aeb1df146756 | 378 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 379 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 380 | |
mbed_official | 76:aeb1df146756 | 381 | *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState; |
mbed_official | 76:aeb1df146756 | 382 | } |
mbed_official | 76:aeb1df146756 | 383 | |
mbed_official | 76:aeb1df146756 | 384 | /** |
mbed_official | 76:aeb1df146756 | 385 | * @} |
mbed_official | 76:aeb1df146756 | 386 | */ |
mbed_official | 76:aeb1df146756 | 387 | |
mbed_official | 76:aeb1df146756 | 388 | /** @defgroup SDIO_Group3 Command path state machine (CPSM) management functions |
mbed_official | 76:aeb1df146756 | 389 | * @brief Command path state machine (CPSM) management functions |
mbed_official | 76:aeb1df146756 | 390 | * |
mbed_official | 76:aeb1df146756 | 391 | @verbatim |
mbed_official | 76:aeb1df146756 | 392 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 393 | ##### Command path state machine (CPSM) management functions ##### |
mbed_official | 76:aeb1df146756 | 394 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 395 | [..] This section provide functions allowing to program and read the Command |
mbed_official | 76:aeb1df146756 | 396 | path state machine (CPSM). |
mbed_official | 76:aeb1df146756 | 397 | |
mbed_official | 76:aeb1df146756 | 398 | @endverbatim |
mbed_official | 76:aeb1df146756 | 399 | * @{ |
mbed_official | 76:aeb1df146756 | 400 | */ |
mbed_official | 76:aeb1df146756 | 401 | |
mbed_official | 76:aeb1df146756 | 402 | /** |
mbed_official | 76:aeb1df146756 | 403 | * @brief Initializes the SDIO Command according to the specified |
mbed_official | 76:aeb1df146756 | 404 | * parameters in the SDIO_CmdInitStruct and send the command. |
mbed_official | 76:aeb1df146756 | 405 | * @param SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef |
mbed_official | 76:aeb1df146756 | 406 | * structure that contains the configuration information for the SDIO command. |
mbed_official | 76:aeb1df146756 | 407 | * @retval None |
mbed_official | 76:aeb1df146756 | 408 | */ |
mbed_official | 76:aeb1df146756 | 409 | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct) |
mbed_official | 76:aeb1df146756 | 410 | { |
mbed_official | 76:aeb1df146756 | 411 | uint32_t tmpreg = 0; |
mbed_official | 76:aeb1df146756 | 412 | |
mbed_official | 76:aeb1df146756 | 413 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 414 | assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex)); |
mbed_official | 76:aeb1df146756 | 415 | assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response)); |
mbed_official | 76:aeb1df146756 | 416 | assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait)); |
mbed_official | 76:aeb1df146756 | 417 | assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM)); |
mbed_official | 76:aeb1df146756 | 418 | |
mbed_official | 76:aeb1df146756 | 419 | /*---------------------------- SDIO ARG Configuration ------------------------*/ |
mbed_official | 76:aeb1df146756 | 420 | /* Set the SDIO Argument value */ |
mbed_official | 76:aeb1df146756 | 421 | SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument; |
mbed_official | 76:aeb1df146756 | 422 | |
mbed_official | 76:aeb1df146756 | 423 | /*---------------------------- SDIO CMD Configuration ------------------------*/ |
mbed_official | 76:aeb1df146756 | 424 | /* Get the SDIO CMD value */ |
mbed_official | 76:aeb1df146756 | 425 | tmpreg = SDIO->CMD; |
mbed_official | 76:aeb1df146756 | 426 | /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */ |
mbed_official | 76:aeb1df146756 | 427 | tmpreg &= CMD_CLEAR_MASK; |
mbed_official | 76:aeb1df146756 | 428 | /* Set CMDINDEX bits according to SDIO_CmdIndex value */ |
mbed_official | 76:aeb1df146756 | 429 | /* Set WAITRESP bits according to SDIO_Response value */ |
mbed_official | 76:aeb1df146756 | 430 | /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */ |
mbed_official | 76:aeb1df146756 | 431 | /* Set CPSMEN bits according to SDIO_CPSM value */ |
mbed_official | 76:aeb1df146756 | 432 | tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response |
mbed_official | 76:aeb1df146756 | 433 | | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM; |
mbed_official | 76:aeb1df146756 | 434 | |
mbed_official | 76:aeb1df146756 | 435 | /* Write to SDIO CMD */ |
mbed_official | 76:aeb1df146756 | 436 | SDIO->CMD = tmpreg; |
mbed_official | 76:aeb1df146756 | 437 | } |
mbed_official | 76:aeb1df146756 | 438 | |
mbed_official | 76:aeb1df146756 | 439 | /** |
mbed_official | 76:aeb1df146756 | 440 | * @brief Fills each SDIO_CmdInitStruct member with its default value. |
mbed_official | 76:aeb1df146756 | 441 | * @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef |
mbed_official | 76:aeb1df146756 | 442 | * structure which will be initialized. |
mbed_official | 76:aeb1df146756 | 443 | * @retval None |
mbed_official | 76:aeb1df146756 | 444 | */ |
mbed_official | 76:aeb1df146756 | 445 | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct) |
mbed_official | 76:aeb1df146756 | 446 | { |
mbed_official | 76:aeb1df146756 | 447 | /* SDIO_CmdInitStruct members default value */ |
mbed_official | 76:aeb1df146756 | 448 | SDIO_CmdInitStruct->SDIO_Argument = 0x00; |
mbed_official | 76:aeb1df146756 | 449 | SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00; |
mbed_official | 76:aeb1df146756 | 450 | SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No; |
mbed_official | 76:aeb1df146756 | 451 | SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No; |
mbed_official | 76:aeb1df146756 | 452 | SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable; |
mbed_official | 76:aeb1df146756 | 453 | } |
mbed_official | 76:aeb1df146756 | 454 | |
mbed_official | 76:aeb1df146756 | 455 | /** |
mbed_official | 76:aeb1df146756 | 456 | * @brief Returns command index of last command for which response received. |
mbed_official | 76:aeb1df146756 | 457 | * @param None |
mbed_official | 76:aeb1df146756 | 458 | * @retval Returns the command index of the last command response received. |
mbed_official | 76:aeb1df146756 | 459 | */ |
mbed_official | 76:aeb1df146756 | 460 | uint8_t SDIO_GetCommandResponse(void) |
mbed_official | 76:aeb1df146756 | 461 | { |
mbed_official | 76:aeb1df146756 | 462 | return (uint8_t)(SDIO->RESPCMD); |
mbed_official | 76:aeb1df146756 | 463 | } |
mbed_official | 76:aeb1df146756 | 464 | |
mbed_official | 76:aeb1df146756 | 465 | /** |
mbed_official | 76:aeb1df146756 | 466 | * @brief Returns response received from the card for the last command. |
mbed_official | 76:aeb1df146756 | 467 | * @param SDIO_RESP: Specifies the SDIO response register. |
mbed_official | 76:aeb1df146756 | 468 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 469 | * @arg SDIO_RESP1: Response Register 1. |
mbed_official | 76:aeb1df146756 | 470 | * @arg SDIO_RESP2: Response Register 2. |
mbed_official | 76:aeb1df146756 | 471 | * @arg SDIO_RESP3: Response Register 3. |
mbed_official | 76:aeb1df146756 | 472 | * @arg SDIO_RESP4: Response Register 4. |
mbed_official | 76:aeb1df146756 | 473 | * @retval The Corresponding response register value. |
mbed_official | 76:aeb1df146756 | 474 | */ |
mbed_official | 76:aeb1df146756 | 475 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP) |
mbed_official | 76:aeb1df146756 | 476 | { |
mbed_official | 76:aeb1df146756 | 477 | __IO uint32_t tmp = 0; |
mbed_official | 76:aeb1df146756 | 478 | |
mbed_official | 76:aeb1df146756 | 479 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 480 | assert_param(IS_SDIO_RESP(SDIO_RESP)); |
mbed_official | 76:aeb1df146756 | 481 | |
mbed_official | 76:aeb1df146756 | 482 | tmp = SDIO_RESP_ADDR + SDIO_RESP; |
mbed_official | 76:aeb1df146756 | 483 | |
mbed_official | 76:aeb1df146756 | 484 | return (*(__IO uint32_t *) tmp); |
mbed_official | 76:aeb1df146756 | 485 | } |
mbed_official | 76:aeb1df146756 | 486 | |
mbed_official | 76:aeb1df146756 | 487 | /** |
mbed_official | 76:aeb1df146756 | 488 | * @} |
mbed_official | 76:aeb1df146756 | 489 | */ |
mbed_official | 76:aeb1df146756 | 490 | |
mbed_official | 76:aeb1df146756 | 491 | /** @defgroup SDIO_Group4 Data path state machine (DPSM) management functions |
mbed_official | 76:aeb1df146756 | 492 | * @brief Data path state machine (DPSM) management functions |
mbed_official | 76:aeb1df146756 | 493 | * |
mbed_official | 76:aeb1df146756 | 494 | @verbatim |
mbed_official | 76:aeb1df146756 | 495 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 496 | ##### Data path state machine (DPSM) management functions ##### |
mbed_official | 76:aeb1df146756 | 497 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 498 | [..] This section provide functions allowing to program and read the Data path |
mbed_official | 76:aeb1df146756 | 499 | state machine (DPSM). |
mbed_official | 76:aeb1df146756 | 500 | |
mbed_official | 76:aeb1df146756 | 501 | @endverbatim |
mbed_official | 76:aeb1df146756 | 502 | * @{ |
mbed_official | 76:aeb1df146756 | 503 | */ |
mbed_official | 76:aeb1df146756 | 504 | |
mbed_official | 76:aeb1df146756 | 505 | /** |
mbed_official | 76:aeb1df146756 | 506 | * @brief Initializes the SDIO data path according to the specified |
mbed_official | 76:aeb1df146756 | 507 | * parameters in the SDIO_DataInitStruct. |
mbed_official | 76:aeb1df146756 | 508 | * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that |
mbed_official | 76:aeb1df146756 | 509 | * contains the configuration information for the SDIO command. |
mbed_official | 76:aeb1df146756 | 510 | * @retval None |
mbed_official | 76:aeb1df146756 | 511 | */ |
mbed_official | 76:aeb1df146756 | 512 | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct) |
mbed_official | 76:aeb1df146756 | 513 | { |
mbed_official | 76:aeb1df146756 | 514 | uint32_t tmpreg = 0; |
mbed_official | 76:aeb1df146756 | 515 | |
mbed_official | 76:aeb1df146756 | 516 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 517 | assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength)); |
mbed_official | 76:aeb1df146756 | 518 | assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize)); |
mbed_official | 76:aeb1df146756 | 519 | assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir)); |
mbed_official | 76:aeb1df146756 | 520 | assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode)); |
mbed_official | 76:aeb1df146756 | 521 | assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM)); |
mbed_official | 76:aeb1df146756 | 522 | |
mbed_official | 76:aeb1df146756 | 523 | /*---------------------------- SDIO DTIMER Configuration ---------------------*/ |
mbed_official | 76:aeb1df146756 | 524 | /* Set the SDIO Data TimeOut value */ |
mbed_official | 76:aeb1df146756 | 525 | SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut; |
mbed_official | 76:aeb1df146756 | 526 | |
mbed_official | 76:aeb1df146756 | 527 | /*---------------------------- SDIO DLEN Configuration -----------------------*/ |
mbed_official | 76:aeb1df146756 | 528 | /* Set the SDIO DataLength value */ |
mbed_official | 76:aeb1df146756 | 529 | SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength; |
mbed_official | 76:aeb1df146756 | 530 | |
mbed_official | 76:aeb1df146756 | 531 | /*---------------------------- SDIO DCTRL Configuration ----------------------*/ |
mbed_official | 76:aeb1df146756 | 532 | /* Get the SDIO DCTRL value */ |
mbed_official | 76:aeb1df146756 | 533 | tmpreg = SDIO->DCTRL; |
mbed_official | 76:aeb1df146756 | 534 | /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */ |
mbed_official | 76:aeb1df146756 | 535 | tmpreg &= DCTRL_CLEAR_MASK; |
mbed_official | 76:aeb1df146756 | 536 | /* Set DEN bit according to SDIO_DPSM value */ |
mbed_official | 76:aeb1df146756 | 537 | /* Set DTMODE bit according to SDIO_TransferMode value */ |
mbed_official | 76:aeb1df146756 | 538 | /* Set DTDIR bit according to SDIO_TransferDir value */ |
mbed_official | 76:aeb1df146756 | 539 | /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */ |
mbed_official | 76:aeb1df146756 | 540 | tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir |
mbed_official | 76:aeb1df146756 | 541 | | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM; |
mbed_official | 76:aeb1df146756 | 542 | |
mbed_official | 76:aeb1df146756 | 543 | /* Write to SDIO DCTRL */ |
mbed_official | 76:aeb1df146756 | 544 | SDIO->DCTRL = tmpreg; |
mbed_official | 76:aeb1df146756 | 545 | } |
mbed_official | 76:aeb1df146756 | 546 | |
mbed_official | 76:aeb1df146756 | 547 | /** |
mbed_official | 76:aeb1df146756 | 548 | * @brief Fills each SDIO_DataInitStruct member with its default value. |
mbed_official | 76:aeb1df146756 | 549 | * @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which |
mbed_official | 76:aeb1df146756 | 550 | * will be initialized. |
mbed_official | 76:aeb1df146756 | 551 | * @retval None |
mbed_official | 76:aeb1df146756 | 552 | */ |
mbed_official | 76:aeb1df146756 | 553 | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct) |
mbed_official | 76:aeb1df146756 | 554 | { |
mbed_official | 76:aeb1df146756 | 555 | /* SDIO_DataInitStruct members default value */ |
mbed_official | 76:aeb1df146756 | 556 | SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF; |
mbed_official | 76:aeb1df146756 | 557 | SDIO_DataInitStruct->SDIO_DataLength = 0x00; |
mbed_official | 76:aeb1df146756 | 558 | SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b; |
mbed_official | 76:aeb1df146756 | 559 | SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard; |
mbed_official | 76:aeb1df146756 | 560 | SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block; |
mbed_official | 76:aeb1df146756 | 561 | SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable; |
mbed_official | 76:aeb1df146756 | 562 | } |
mbed_official | 76:aeb1df146756 | 563 | |
mbed_official | 76:aeb1df146756 | 564 | /** |
mbed_official | 76:aeb1df146756 | 565 | * @brief Returns number of remaining data bytes to be transferred. |
mbed_official | 76:aeb1df146756 | 566 | * @param None |
mbed_official | 76:aeb1df146756 | 567 | * @retval Number of remaining data bytes to be transferred |
mbed_official | 76:aeb1df146756 | 568 | */ |
mbed_official | 76:aeb1df146756 | 569 | uint32_t SDIO_GetDataCounter(void) |
mbed_official | 76:aeb1df146756 | 570 | { |
mbed_official | 76:aeb1df146756 | 571 | return SDIO->DCOUNT; |
mbed_official | 76:aeb1df146756 | 572 | } |
mbed_official | 76:aeb1df146756 | 573 | |
mbed_official | 76:aeb1df146756 | 574 | /** |
mbed_official | 76:aeb1df146756 | 575 | * @brief Read one data word from Rx FIFO. |
mbed_official | 76:aeb1df146756 | 576 | * @param None |
mbed_official | 76:aeb1df146756 | 577 | * @retval Data received |
mbed_official | 76:aeb1df146756 | 578 | */ |
mbed_official | 76:aeb1df146756 | 579 | uint32_t SDIO_ReadData(void) |
mbed_official | 76:aeb1df146756 | 580 | { |
mbed_official | 76:aeb1df146756 | 581 | return SDIO->FIFO; |
mbed_official | 76:aeb1df146756 | 582 | } |
mbed_official | 76:aeb1df146756 | 583 | |
mbed_official | 76:aeb1df146756 | 584 | /** |
mbed_official | 76:aeb1df146756 | 585 | * @brief Write one data word to Tx FIFO. |
mbed_official | 76:aeb1df146756 | 586 | * @param Data: 32-bit data word to write. |
mbed_official | 76:aeb1df146756 | 587 | * @retval None |
mbed_official | 76:aeb1df146756 | 588 | */ |
mbed_official | 76:aeb1df146756 | 589 | void SDIO_WriteData(uint32_t Data) |
mbed_official | 76:aeb1df146756 | 590 | { |
mbed_official | 76:aeb1df146756 | 591 | SDIO->FIFO = Data; |
mbed_official | 76:aeb1df146756 | 592 | } |
mbed_official | 76:aeb1df146756 | 593 | |
mbed_official | 76:aeb1df146756 | 594 | /** |
mbed_official | 76:aeb1df146756 | 595 | * @brief Returns the number of words left to be written to or read from FIFO. |
mbed_official | 76:aeb1df146756 | 596 | * @param None |
mbed_official | 76:aeb1df146756 | 597 | * @retval Remaining number of words. |
mbed_official | 76:aeb1df146756 | 598 | */ |
mbed_official | 76:aeb1df146756 | 599 | uint32_t SDIO_GetFIFOCount(void) |
mbed_official | 76:aeb1df146756 | 600 | { |
mbed_official | 76:aeb1df146756 | 601 | return SDIO->FIFOCNT; |
mbed_official | 76:aeb1df146756 | 602 | } |
mbed_official | 76:aeb1df146756 | 603 | |
mbed_official | 76:aeb1df146756 | 604 | /** |
mbed_official | 76:aeb1df146756 | 605 | * @} |
mbed_official | 76:aeb1df146756 | 606 | */ |
mbed_official | 76:aeb1df146756 | 607 | |
mbed_official | 76:aeb1df146756 | 608 | /** @defgroup SDIO_Group5 SDIO IO Cards mode management functions |
mbed_official | 76:aeb1df146756 | 609 | * @brief SDIO IO Cards mode management functions |
mbed_official | 76:aeb1df146756 | 610 | * |
mbed_official | 76:aeb1df146756 | 611 | @verbatim |
mbed_official | 76:aeb1df146756 | 612 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 613 | ##### SDIO IO Cards mode management functions ##### |
mbed_official | 76:aeb1df146756 | 614 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 615 | [..] This section provide functions allowing to program and read the SDIO IO |
mbed_official | 76:aeb1df146756 | 616 | Cards. |
mbed_official | 76:aeb1df146756 | 617 | |
mbed_official | 76:aeb1df146756 | 618 | @endverbatim |
mbed_official | 76:aeb1df146756 | 619 | * @{ |
mbed_official | 76:aeb1df146756 | 620 | */ |
mbed_official | 76:aeb1df146756 | 621 | |
mbed_official | 76:aeb1df146756 | 622 | /** |
mbed_official | 76:aeb1df146756 | 623 | * @brief Starts the SD I/O Read Wait operation. |
mbed_official | 76:aeb1df146756 | 624 | * @param NewState: new state of the Start SDIO Read Wait operation. |
mbed_official | 76:aeb1df146756 | 625 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 626 | * @retval None |
mbed_official | 76:aeb1df146756 | 627 | */ |
mbed_official | 76:aeb1df146756 | 628 | void SDIO_StartSDIOReadWait(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 629 | { |
mbed_official | 76:aeb1df146756 | 630 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 631 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 632 | |
mbed_official | 76:aeb1df146756 | 633 | *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState; |
mbed_official | 76:aeb1df146756 | 634 | } |
mbed_official | 76:aeb1df146756 | 635 | |
mbed_official | 76:aeb1df146756 | 636 | /** |
mbed_official | 76:aeb1df146756 | 637 | * @brief Stops the SD I/O Read Wait operation. |
mbed_official | 76:aeb1df146756 | 638 | * @param NewState: new state of the Stop SDIO Read Wait operation. |
mbed_official | 76:aeb1df146756 | 639 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 640 | * @retval None |
mbed_official | 76:aeb1df146756 | 641 | */ |
mbed_official | 76:aeb1df146756 | 642 | void SDIO_StopSDIOReadWait(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 643 | { |
mbed_official | 76:aeb1df146756 | 644 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 645 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 646 | |
mbed_official | 76:aeb1df146756 | 647 | *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState; |
mbed_official | 76:aeb1df146756 | 648 | } |
mbed_official | 76:aeb1df146756 | 649 | |
mbed_official | 76:aeb1df146756 | 650 | /** |
mbed_official | 76:aeb1df146756 | 651 | * @brief Sets one of the two options of inserting read wait interval. |
mbed_official | 76:aeb1df146756 | 652 | * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode. |
mbed_official | 76:aeb1df146756 | 653 | * This parametre can be: |
mbed_official | 76:aeb1df146756 | 654 | * @arg SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK. |
mbed_official | 76:aeb1df146756 | 655 | * @arg SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2. |
mbed_official | 76:aeb1df146756 | 656 | * @retval None |
mbed_official | 76:aeb1df146756 | 657 | */ |
mbed_official | 76:aeb1df146756 | 658 | void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode) |
mbed_official | 76:aeb1df146756 | 659 | { |
mbed_official | 76:aeb1df146756 | 660 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 661 | assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); |
mbed_official | 76:aeb1df146756 | 662 | |
mbed_official | 76:aeb1df146756 | 663 | *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode; |
mbed_official | 76:aeb1df146756 | 664 | } |
mbed_official | 76:aeb1df146756 | 665 | |
mbed_official | 76:aeb1df146756 | 666 | /** |
mbed_official | 76:aeb1df146756 | 667 | * @brief Enables or disables the SD I/O Mode Operation. |
mbed_official | 76:aeb1df146756 | 668 | * @param NewState: new state of SDIO specific operation. |
mbed_official | 76:aeb1df146756 | 669 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 670 | * @retval None |
mbed_official | 76:aeb1df146756 | 671 | */ |
mbed_official | 76:aeb1df146756 | 672 | void SDIO_SetSDIOOperation(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 673 | { |
mbed_official | 76:aeb1df146756 | 674 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 675 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 676 | |
mbed_official | 76:aeb1df146756 | 677 | *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState; |
mbed_official | 76:aeb1df146756 | 678 | } |
mbed_official | 76:aeb1df146756 | 679 | |
mbed_official | 76:aeb1df146756 | 680 | /** |
mbed_official | 76:aeb1df146756 | 681 | * @brief Enables or disables the SD I/O Mode suspend command sending. |
mbed_official | 76:aeb1df146756 | 682 | * @param NewState: new state of the SD I/O Mode suspend command. |
mbed_official | 76:aeb1df146756 | 683 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 684 | * @retval None |
mbed_official | 76:aeb1df146756 | 685 | */ |
mbed_official | 76:aeb1df146756 | 686 | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 687 | { |
mbed_official | 76:aeb1df146756 | 688 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 689 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 690 | |
mbed_official | 76:aeb1df146756 | 691 | *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState; |
mbed_official | 76:aeb1df146756 | 692 | } |
mbed_official | 76:aeb1df146756 | 693 | |
mbed_official | 76:aeb1df146756 | 694 | /** |
mbed_official | 76:aeb1df146756 | 695 | * @} |
mbed_official | 76:aeb1df146756 | 696 | */ |
mbed_official | 76:aeb1df146756 | 697 | |
mbed_official | 76:aeb1df146756 | 698 | /** @defgroup SDIO_Group6 CE-ATA mode management functions |
mbed_official | 76:aeb1df146756 | 699 | * @brief CE-ATA mode management functions |
mbed_official | 76:aeb1df146756 | 700 | * |
mbed_official | 76:aeb1df146756 | 701 | @verbatim |
mbed_official | 76:aeb1df146756 | 702 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 703 | ##### CE-ATA mode management functions ##### |
mbed_official | 76:aeb1df146756 | 704 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 705 | [..] This section provide functions allowing to program and read the CE-ATA |
mbed_official | 76:aeb1df146756 | 706 | card. |
mbed_official | 76:aeb1df146756 | 707 | |
mbed_official | 76:aeb1df146756 | 708 | @endverbatim |
mbed_official | 76:aeb1df146756 | 709 | * @{ |
mbed_official | 76:aeb1df146756 | 710 | */ |
mbed_official | 76:aeb1df146756 | 711 | |
mbed_official | 76:aeb1df146756 | 712 | /** |
mbed_official | 76:aeb1df146756 | 713 | * @brief Enables or disables the command completion signal. |
mbed_official | 76:aeb1df146756 | 714 | * @param NewState: new state of command completion signal. |
mbed_official | 76:aeb1df146756 | 715 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 716 | * @retval None |
mbed_official | 76:aeb1df146756 | 717 | */ |
mbed_official | 76:aeb1df146756 | 718 | void SDIO_CommandCompletionCmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 719 | { |
mbed_official | 76:aeb1df146756 | 720 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 721 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 722 | |
mbed_official | 76:aeb1df146756 | 723 | *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState; |
mbed_official | 76:aeb1df146756 | 724 | } |
mbed_official | 76:aeb1df146756 | 725 | |
mbed_official | 76:aeb1df146756 | 726 | /** |
mbed_official | 76:aeb1df146756 | 727 | * @brief Enables or disables the CE-ATA interrupt. |
mbed_official | 76:aeb1df146756 | 728 | * @param NewState: new state of CE-ATA interrupt. This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 729 | * @retval None |
mbed_official | 76:aeb1df146756 | 730 | */ |
mbed_official | 76:aeb1df146756 | 731 | void SDIO_CEATAITCmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 732 | { |
mbed_official | 76:aeb1df146756 | 733 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 734 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 735 | |
mbed_official | 76:aeb1df146756 | 736 | *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1)); |
mbed_official | 76:aeb1df146756 | 737 | } |
mbed_official | 76:aeb1df146756 | 738 | |
mbed_official | 76:aeb1df146756 | 739 | /** |
mbed_official | 76:aeb1df146756 | 740 | * @brief Sends CE-ATA command (CMD61). |
mbed_official | 76:aeb1df146756 | 741 | * @param NewState: new state of CE-ATA command. This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 742 | * @retval None |
mbed_official | 76:aeb1df146756 | 743 | */ |
mbed_official | 76:aeb1df146756 | 744 | void SDIO_SendCEATACmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 745 | { |
mbed_official | 76:aeb1df146756 | 746 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 747 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 748 | |
mbed_official | 76:aeb1df146756 | 749 | *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState; |
mbed_official | 76:aeb1df146756 | 750 | } |
mbed_official | 76:aeb1df146756 | 751 | |
mbed_official | 76:aeb1df146756 | 752 | /** |
mbed_official | 76:aeb1df146756 | 753 | * @} |
mbed_official | 76:aeb1df146756 | 754 | */ |
mbed_official | 76:aeb1df146756 | 755 | |
mbed_official | 76:aeb1df146756 | 756 | /** @defgroup SDIO_Group7 Interrupts and flags management functions |
mbed_official | 76:aeb1df146756 | 757 | * @brief Interrupts and flags management functions |
mbed_official | 76:aeb1df146756 | 758 | |
mbed_official | 76:aeb1df146756 | 759 | |
mbed_official | 76:aeb1df146756 | 760 | @verbatim |
mbed_official | 76:aeb1df146756 | 761 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 762 | ##### Interrupts and flags management functions ##### |
mbed_official | 76:aeb1df146756 | 763 | ============================================================================== |
mbed_official | 76:aeb1df146756 | 764 | |
mbed_official | 76:aeb1df146756 | 765 | @endverbatim |
mbed_official | 76:aeb1df146756 | 766 | * @{ |
mbed_official | 76:aeb1df146756 | 767 | */ |
mbed_official | 76:aeb1df146756 | 768 | |
mbed_official | 76:aeb1df146756 | 769 | /** |
mbed_official | 76:aeb1df146756 | 770 | * @brief Enables or disables the SDIO interrupts. |
mbed_official | 76:aeb1df146756 | 771 | * @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled. |
mbed_official | 76:aeb1df146756 | 772 | * This parameter can be one or a combination of the following values: |
mbed_official | 76:aeb1df146756 | 773 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt. |
mbed_official | 76:aeb1df146756 | 774 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt. |
mbed_official | 76:aeb1df146756 | 775 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt. |
mbed_official | 76:aeb1df146756 | 776 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt. |
mbed_official | 76:aeb1df146756 | 777 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt. |
mbed_official | 76:aeb1df146756 | 778 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt. |
mbed_official | 76:aeb1df146756 | 779 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt. |
mbed_official | 76:aeb1df146756 | 780 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt. |
mbed_official | 76:aeb1df146756 | 781 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt. |
mbed_official | 76:aeb1df146756 | 782 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 76:aeb1df146756 | 783 | * bus mode interrupt. |
mbed_official | 76:aeb1df146756 | 784 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt. |
mbed_official | 76:aeb1df146756 | 785 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt. |
mbed_official | 76:aeb1df146756 | 786 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt. |
mbed_official | 76:aeb1df146756 | 787 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt. |
mbed_official | 76:aeb1df146756 | 788 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt. |
mbed_official | 76:aeb1df146756 | 789 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt. |
mbed_official | 76:aeb1df146756 | 790 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt. |
mbed_official | 76:aeb1df146756 | 791 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt. |
mbed_official | 76:aeb1df146756 | 792 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt. |
mbed_official | 76:aeb1df146756 | 793 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt. |
mbed_official | 76:aeb1df146756 | 794 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt. |
mbed_official | 76:aeb1df146756 | 795 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt. |
mbed_official | 76:aeb1df146756 | 796 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt. |
mbed_official | 76:aeb1df146756 | 797 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt. |
mbed_official | 76:aeb1df146756 | 798 | * @param NewState: new state of the specified SDIO interrupts. |
mbed_official | 76:aeb1df146756 | 799 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 800 | * @retval None |
mbed_official | 76:aeb1df146756 | 801 | */ |
mbed_official | 76:aeb1df146756 | 802 | void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 803 | { |
mbed_official | 76:aeb1df146756 | 804 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 805 | assert_param(IS_SDIO_IT(SDIO_IT)); |
mbed_official | 76:aeb1df146756 | 806 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 807 | |
mbed_official | 76:aeb1df146756 | 808 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 809 | { |
mbed_official | 76:aeb1df146756 | 810 | /* Enable the SDIO interrupts */ |
mbed_official | 76:aeb1df146756 | 811 | SDIO->MASK |= SDIO_IT; |
mbed_official | 76:aeb1df146756 | 812 | } |
mbed_official | 76:aeb1df146756 | 813 | else |
mbed_official | 76:aeb1df146756 | 814 | { |
mbed_official | 76:aeb1df146756 | 815 | /* Disable the SDIO interrupts */ |
mbed_official | 76:aeb1df146756 | 816 | SDIO->MASK &= ~SDIO_IT; |
mbed_official | 76:aeb1df146756 | 817 | } |
mbed_official | 76:aeb1df146756 | 818 | } |
mbed_official | 76:aeb1df146756 | 819 | |
mbed_official | 76:aeb1df146756 | 820 | /** |
mbed_official | 76:aeb1df146756 | 821 | * @brief Checks whether the specified SDIO flag is set or not. |
mbed_official | 76:aeb1df146756 | 822 | * @param SDIO_FLAG: specifies the flag to check. |
mbed_official | 76:aeb1df146756 | 823 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 824 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed). |
mbed_official | 76:aeb1df146756 | 825 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed). |
mbed_official | 76:aeb1df146756 | 826 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout. |
mbed_official | 76:aeb1df146756 | 827 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout. |
mbed_official | 76:aeb1df146756 | 828 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error. |
mbed_official | 76:aeb1df146756 | 829 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error. |
mbed_official | 76:aeb1df146756 | 830 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed). |
mbed_official | 76:aeb1df146756 | 831 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required). |
mbed_official | 76:aeb1df146756 | 832 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero). |
mbed_official | 76:aeb1df146756 | 833 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 76:aeb1df146756 | 834 | * bus mode. |
mbed_official | 76:aeb1df146756 | 835 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed). |
mbed_official | 76:aeb1df146756 | 836 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress. |
mbed_official | 76:aeb1df146756 | 837 | * @arg SDIO_FLAG_TXACT: Data transmit in progress. |
mbed_official | 76:aeb1df146756 | 838 | * @arg SDIO_FLAG_RXACT: Data receive in progress. |
mbed_official | 76:aeb1df146756 | 839 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty. |
mbed_official | 76:aeb1df146756 | 840 | * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full. |
mbed_official | 76:aeb1df146756 | 841 | * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full. |
mbed_official | 76:aeb1df146756 | 842 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full. |
mbed_official | 76:aeb1df146756 | 843 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty. |
mbed_official | 76:aeb1df146756 | 844 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty. |
mbed_official | 76:aeb1df146756 | 845 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO. |
mbed_official | 76:aeb1df146756 | 846 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO. |
mbed_official | 76:aeb1df146756 | 847 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received. |
mbed_official | 76:aeb1df146756 | 848 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61. |
mbed_official | 76:aeb1df146756 | 849 | * @retval The new state of SDIO_FLAG (SET or RESET). |
mbed_official | 76:aeb1df146756 | 850 | */ |
mbed_official | 76:aeb1df146756 | 851 | FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG) |
mbed_official | 76:aeb1df146756 | 852 | { |
mbed_official | 76:aeb1df146756 | 853 | FlagStatus bitstatus = RESET; |
mbed_official | 76:aeb1df146756 | 854 | |
mbed_official | 76:aeb1df146756 | 855 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 856 | assert_param(IS_SDIO_FLAG(SDIO_FLAG)); |
mbed_official | 76:aeb1df146756 | 857 | |
mbed_official | 76:aeb1df146756 | 858 | if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET) |
mbed_official | 76:aeb1df146756 | 859 | { |
mbed_official | 76:aeb1df146756 | 860 | bitstatus = SET; |
mbed_official | 76:aeb1df146756 | 861 | } |
mbed_official | 76:aeb1df146756 | 862 | else |
mbed_official | 76:aeb1df146756 | 863 | { |
mbed_official | 76:aeb1df146756 | 864 | bitstatus = RESET; |
mbed_official | 76:aeb1df146756 | 865 | } |
mbed_official | 76:aeb1df146756 | 866 | return bitstatus; |
mbed_official | 76:aeb1df146756 | 867 | } |
mbed_official | 76:aeb1df146756 | 868 | |
mbed_official | 76:aeb1df146756 | 869 | /** |
mbed_official | 76:aeb1df146756 | 870 | * @brief Clears the SDIO's pending flags. |
mbed_official | 76:aeb1df146756 | 871 | * @param SDIO_FLAG: specifies the flag to clear. |
mbed_official | 76:aeb1df146756 | 872 | * This parameter can be one or a combination of the following values: |
mbed_official | 76:aeb1df146756 | 873 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed). |
mbed_official | 76:aeb1df146756 | 874 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed). |
mbed_official | 76:aeb1df146756 | 875 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout. |
mbed_official | 76:aeb1df146756 | 876 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout. |
mbed_official | 76:aeb1df146756 | 877 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error. |
mbed_official | 76:aeb1df146756 | 878 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error. |
mbed_official | 76:aeb1df146756 | 879 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed). |
mbed_official | 76:aeb1df146756 | 880 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required). |
mbed_official | 76:aeb1df146756 | 881 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero). |
mbed_official | 76:aeb1df146756 | 882 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 76:aeb1df146756 | 883 | * bus mode. |
mbed_official | 76:aeb1df146756 | 884 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed). |
mbed_official | 76:aeb1df146756 | 885 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received. |
mbed_official | 76:aeb1df146756 | 886 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61. |
mbed_official | 76:aeb1df146756 | 887 | * @retval None |
mbed_official | 76:aeb1df146756 | 888 | */ |
mbed_official | 76:aeb1df146756 | 889 | void SDIO_ClearFlag(uint32_t SDIO_FLAG) |
mbed_official | 76:aeb1df146756 | 890 | { |
mbed_official | 76:aeb1df146756 | 891 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 892 | assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG)); |
mbed_official | 76:aeb1df146756 | 893 | |
mbed_official | 76:aeb1df146756 | 894 | SDIO->ICR = SDIO_FLAG; |
mbed_official | 76:aeb1df146756 | 895 | } |
mbed_official | 76:aeb1df146756 | 896 | |
mbed_official | 76:aeb1df146756 | 897 | /** |
mbed_official | 76:aeb1df146756 | 898 | * @brief Checks whether the specified SDIO interrupt has occurred or not. |
mbed_official | 76:aeb1df146756 | 899 | * @param SDIO_IT: specifies the SDIO interrupt source to check. |
mbed_official | 76:aeb1df146756 | 900 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 901 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt. |
mbed_official | 76:aeb1df146756 | 902 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt. |
mbed_official | 76:aeb1df146756 | 903 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt. |
mbed_official | 76:aeb1df146756 | 904 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt. |
mbed_official | 76:aeb1df146756 | 905 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt. |
mbed_official | 76:aeb1df146756 | 906 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt. |
mbed_official | 76:aeb1df146756 | 907 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt. |
mbed_official | 76:aeb1df146756 | 908 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt. |
mbed_official | 76:aeb1df146756 | 909 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt. |
mbed_official | 76:aeb1df146756 | 910 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 76:aeb1df146756 | 911 | * bus mode interrupt. |
mbed_official | 76:aeb1df146756 | 912 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt. |
mbed_official | 76:aeb1df146756 | 913 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt. |
mbed_official | 76:aeb1df146756 | 914 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt. |
mbed_official | 76:aeb1df146756 | 915 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt. |
mbed_official | 76:aeb1df146756 | 916 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt. |
mbed_official | 76:aeb1df146756 | 917 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt. |
mbed_official | 76:aeb1df146756 | 918 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt. |
mbed_official | 76:aeb1df146756 | 919 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt. |
mbed_official | 76:aeb1df146756 | 920 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt. |
mbed_official | 76:aeb1df146756 | 921 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt. |
mbed_official | 76:aeb1df146756 | 922 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt. |
mbed_official | 76:aeb1df146756 | 923 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt. |
mbed_official | 76:aeb1df146756 | 924 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt. |
mbed_official | 76:aeb1df146756 | 925 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt. |
mbed_official | 76:aeb1df146756 | 926 | * @retval The new state of SDIO_IT (SET or RESET). |
mbed_official | 76:aeb1df146756 | 927 | */ |
mbed_official | 76:aeb1df146756 | 928 | ITStatus SDIO_GetITStatus(uint32_t SDIO_IT) |
mbed_official | 76:aeb1df146756 | 929 | { |
mbed_official | 76:aeb1df146756 | 930 | ITStatus bitstatus = RESET; |
mbed_official | 76:aeb1df146756 | 931 | |
mbed_official | 76:aeb1df146756 | 932 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 933 | assert_param(IS_SDIO_GET_IT(SDIO_IT)); |
mbed_official | 76:aeb1df146756 | 934 | if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET) |
mbed_official | 76:aeb1df146756 | 935 | { |
mbed_official | 76:aeb1df146756 | 936 | bitstatus = SET; |
mbed_official | 76:aeb1df146756 | 937 | } |
mbed_official | 76:aeb1df146756 | 938 | else |
mbed_official | 76:aeb1df146756 | 939 | { |
mbed_official | 76:aeb1df146756 | 940 | bitstatus = RESET; |
mbed_official | 76:aeb1df146756 | 941 | } |
mbed_official | 76:aeb1df146756 | 942 | return bitstatus; |
mbed_official | 76:aeb1df146756 | 943 | } |
mbed_official | 76:aeb1df146756 | 944 | |
mbed_official | 76:aeb1df146756 | 945 | /** |
mbed_official | 76:aeb1df146756 | 946 | * @brief Clears the SDIO's interrupt pending bits. |
mbed_official | 76:aeb1df146756 | 947 | * @param SDIO_IT: specifies the interrupt pending bit to clear. |
mbed_official | 76:aeb1df146756 | 948 | * This parameter can be one or a combination of the following values: |
mbed_official | 76:aeb1df146756 | 949 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt. |
mbed_official | 76:aeb1df146756 | 950 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt. |
mbed_official | 76:aeb1df146756 | 951 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt. |
mbed_official | 76:aeb1df146756 | 952 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt. |
mbed_official | 76:aeb1df146756 | 953 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt. |
mbed_official | 76:aeb1df146756 | 954 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt. |
mbed_official | 76:aeb1df146756 | 955 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt. |
mbed_official | 76:aeb1df146756 | 956 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt. |
mbed_official | 76:aeb1df146756 | 957 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt. |
mbed_official | 76:aeb1df146756 | 958 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 76:aeb1df146756 | 959 | * bus mode interrupt. |
mbed_official | 76:aeb1df146756 | 960 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt. |
mbed_official | 76:aeb1df146756 | 961 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61. |
mbed_official | 76:aeb1df146756 | 962 | * @retval None |
mbed_official | 76:aeb1df146756 | 963 | */ |
mbed_official | 76:aeb1df146756 | 964 | void SDIO_ClearITPendingBit(uint32_t SDIO_IT) |
mbed_official | 76:aeb1df146756 | 965 | { |
mbed_official | 76:aeb1df146756 | 966 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 967 | assert_param(IS_SDIO_CLEAR_IT(SDIO_IT)); |
mbed_official | 76:aeb1df146756 | 968 | |
mbed_official | 76:aeb1df146756 | 969 | SDIO->ICR = SDIO_IT; |
mbed_official | 76:aeb1df146756 | 970 | } |
mbed_official | 76:aeb1df146756 | 971 | |
mbed_official | 76:aeb1df146756 | 972 | /** |
mbed_official | 76:aeb1df146756 | 973 | * @} |
mbed_official | 76:aeb1df146756 | 974 | */ |
mbed_official | 76:aeb1df146756 | 975 | |
mbed_official | 76:aeb1df146756 | 976 | /** |
mbed_official | 76:aeb1df146756 | 977 | * @} |
mbed_official | 76:aeb1df146756 | 978 | */ |
mbed_official | 76:aeb1df146756 | 979 | |
mbed_official | 76:aeb1df146756 | 980 | /** |
mbed_official | 76:aeb1df146756 | 981 | * @} |
mbed_official | 76:aeb1df146756 | 982 | */ |
mbed_official | 76:aeb1df146756 | 983 | |
mbed_official | 76:aeb1df146756 | 984 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |