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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_uart.h@178:7b4eb50f6890, 2017-11-29 (annotated)

Committer:
misodengaku
Date:
Wed Nov 29 06:30:35 2017 +0000
Revision:
178:7b4eb50f6890
Parent:
165:e614a9f1c9e2 
sco-evb-01 patch

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_hal_uart.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 165:e614a9f1c9e2 5 * @version V1.1.0
AnnaBridge 165:e614a9f1c9e2 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of UART HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F1xx_HAL_UART_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F1xx_HAL_UART_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f1xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup UART
<> 144:ef7eb2e8f9f7 54 * @{
AnnaBridge 165:e614a9f1c9e2 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup UART_Exported_Types UART Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
AnnaBridge 165:e614a9f1c9e2 60 */
<> 144:ef7eb2e8f9f7 61
AnnaBridge 165:e614a9f1c9e2 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief UART Init Structure definition
AnnaBridge 165:e614a9f1c9e2 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 - IntegerDivider = ((PCLKx) / (16 * (huart->Init.BaudRate)))
<> 144:ef7eb2e8f9f7 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 73 This parameter can be a value of @ref UART_Word_Length */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 144:ef7eb2e8f9f7 76 This parameter can be a value of @ref UART_Stop_Bits */
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 79 This parameter can be a value of @ref UART_Parity
<> 144:ef7eb2e8f9f7 80 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 81 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 82 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 83 word length is set to 8 data bits). */
AnnaBridge 165:e614a9f1c9e2 84
AnnaBridge 165:e614a9f1c9e2 85 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 86 This parameter can be a value of @ref UART_Mode */
<> 144:ef7eb2e8f9f7 87
AnnaBridge 165:e614a9f1c9e2 88 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 89 This parameter can be a value of @ref UART_Hardware_Flow_Control */
AnnaBridge 165:e614a9f1c9e2 90
<> 144:ef7eb2e8f9f7 91 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
AnnaBridge 165:e614a9f1c9e2 92 This parameter can be a value of @ref UART_Over_Sampling. This feature is only available
AnnaBridge 165:e614a9f1c9e2 93 on STM32F100xx family, so OverSampling parameter should always be set to 16. */
<> 144:ef7eb2e8f9f7 94 }UART_InitTypeDef;
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /**
AnnaBridge 165:e614a9f1c9e2 97 * @brief HAL UART State structures definition
AnnaBridge 165:e614a9f1c9e2 98 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
AnnaBridge 165:e614a9f1c9e2 99 * - gState contains UART state information related to global Handle management
AnnaBridge 165:e614a9f1c9e2 100 * and also information related to Tx operations.
AnnaBridge 165:e614a9f1c9e2 101 * gState value coding follow below described bitmap :
AnnaBridge 165:e614a9f1c9e2 102 * b7-b6 Error information
AnnaBridge 165:e614a9f1c9e2 103 * 00 : No Error
AnnaBridge 165:e614a9f1c9e2 104 * 01 : (Not Used)
AnnaBridge 165:e614a9f1c9e2 105 * 10 : Timeout
AnnaBridge 165:e614a9f1c9e2 106 * 11 : Error
AnnaBridge 165:e614a9f1c9e2 107 * b5 IP initilisation status
AnnaBridge 165:e614a9f1c9e2 108 * 0 : Reset (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 109 * 1 : Init done (IP not initialized. HAL UART Init function already called)
AnnaBridge 165:e614a9f1c9e2 110 * b4-b3 (not used)
AnnaBridge 165:e614a9f1c9e2 111 * xx : Should be set to 00
AnnaBridge 165:e614a9f1c9e2 112 * b2 Intrinsic process state
AnnaBridge 165:e614a9f1c9e2 113 * 0 : Ready
AnnaBridge 165:e614a9f1c9e2 114 * 1 : Busy (IP busy with some configuration or internal operations)
AnnaBridge 165:e614a9f1c9e2 115 * b1 (not used)
AnnaBridge 165:e614a9f1c9e2 116 * x : Should be set to 0
AnnaBridge 165:e614a9f1c9e2 117 * b0 Tx state
AnnaBridge 165:e614a9f1c9e2 118 * 0 : Ready (no Tx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 119 * 1 : Busy (Tx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 120 * - RxState contains information related to Rx operations.
AnnaBridge 165:e614a9f1c9e2 121 * RxState value coding follow below described bitmap :
AnnaBridge 165:e614a9f1c9e2 122 * b7-b6 (not used)
AnnaBridge 165:e614a9f1c9e2 123 * xx : Should be set to 00
AnnaBridge 165:e614a9f1c9e2 124 * b5 IP initilisation status
AnnaBridge 165:e614a9f1c9e2 125 * 0 : Reset (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 126 * 1 : Init done (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 127 * b4-b2 (not used)
AnnaBridge 165:e614a9f1c9e2 128 * xxx : Should be set to 000
AnnaBridge 165:e614a9f1c9e2 129 * b1 Rx state
AnnaBridge 165:e614a9f1c9e2 130 * 0 : Ready (no Rx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 131 * 1 : Busy (Rx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 132 * b0 (not used)
AnnaBridge 165:e614a9f1c9e2 133 * x : Should be set to 0.
AnnaBridge 165:e614a9f1c9e2 134 */
<> 144:ef7eb2e8f9f7 135 typedef enum
<> 144:ef7eb2e8f9f7 136 {
AnnaBridge 165:e614a9f1c9e2 137 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
AnnaBridge 165:e614a9f1c9e2 138 Value is allowed for gState and RxState */
AnnaBridge 165:e614a9f1c9e2 139 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
AnnaBridge 165:e614a9f1c9e2 140 Value is allowed for gState and RxState */
AnnaBridge 165:e614a9f1c9e2 141 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
AnnaBridge 165:e614a9f1c9e2 142 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 143 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
AnnaBridge 165:e614a9f1c9e2 144 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 145 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
AnnaBridge 165:e614a9f1c9e2 146 Value is allowed for RxState only */
AnnaBridge 165:e614a9f1c9e2 147 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
AnnaBridge 165:e614a9f1c9e2 148 Not to be used for neither gState nor RxState.
AnnaBridge 165:e614a9f1c9e2 149 Value is result of combination (Or) between gState and RxState values */
AnnaBridge 165:e614a9f1c9e2 150 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
AnnaBridge 165:e614a9f1c9e2 151 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 152 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
AnnaBridge 165:e614a9f1c9e2 153 Value is allowed for gState only */
<> 144:ef7eb2e8f9f7 154 }HAL_UART_StateTypeDef;
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 /**
AnnaBridge 165:e614a9f1c9e2 157 * @brief UART handle Structure definition
AnnaBridge 165:e614a9f1c9e2 158 */
<> 144:ef7eb2e8f9f7 159 typedef struct
<> 144:ef7eb2e8f9f7 160 {
<> 144:ef7eb2e8f9f7 161 USART_TypeDef *Instance; /*!< UART registers base address */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 UART_InitTypeDef Init; /*!< UART communication parameters */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 uint16_t TxXferSize; /*!< UART Tx Transfer size */
<> 144:ef7eb2e8f9f7 168
AnnaBridge 165:e614a9f1c9e2 169 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 uint16_t RxXferSize; /*!< UART Rx Transfer size */
<> 144:ef7eb2e8f9f7 174
AnnaBridge 165:e614a9f1c9e2 175 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 182
AnnaBridge 165:e614a9f1c9e2 183 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
AnnaBridge 165:e614a9f1c9e2 184 and also related to Tx operations.
AnnaBridge 165:e614a9f1c9e2 185 This parameter can be a value of @ref HAL_UART_StateTypeDef */
<> 144:ef7eb2e8f9f7 186
AnnaBridge 165:e614a9f1c9e2 187 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
AnnaBridge 165:e614a9f1c9e2 188 This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge 165:e614a9f1c9e2 189
<> 144:ef7eb2e8f9f7 190 __IO uint32_t ErrorCode; /*!< UART Error code */
<> 144:ef7eb2e8f9f7 191 }UART_HandleTypeDef;
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 /**
<> 144:ef7eb2e8f9f7 194 * @}
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 198 /** @defgroup UART_Exported_Constants UART Exported constants
<> 144:ef7eb2e8f9f7 199 * @{
<> 144:ef7eb2e8f9f7 200 */
<> 144:ef7eb2e8f9f7 201
AnnaBridge 165:e614a9f1c9e2 202 /** @defgroup UART_Error_Code UART Error Code
<> 144:ef7eb2e8f9f7 203 * @{
<> 144:ef7eb2e8f9f7 204 */
AnnaBridge 165:e614a9f1c9e2 205 #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 165:e614a9f1c9e2 206 #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
AnnaBridge 165:e614a9f1c9e2 207 #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
AnnaBridge 165:e614a9f1c9e2 208 #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
AnnaBridge 165:e614a9f1c9e2 209 #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
AnnaBridge 165:e614a9f1c9e2 210 #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 211 /**
<> 144:ef7eb2e8f9f7 212 * @}
<> 144:ef7eb2e8f9f7 213 */
<> 144:ef7eb2e8f9f7 214
AnnaBridge 165:e614a9f1c9e2 215 /** @defgroup UART_Word_Length UART Word Length
<> 144:ef7eb2e8f9f7 216 * @{
<> 144:ef7eb2e8f9f7 217 */
AnnaBridge 165:e614a9f1c9e2 218 #define UART_WORDLENGTH_8B 0x00000000U
<> 144:ef7eb2e8f9f7 219 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 144:ef7eb2e8f9f7 220 /**
<> 144:ef7eb2e8f9f7 221 * @}
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223
AnnaBridge 165:e614a9f1c9e2 224 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
<> 144:ef7eb2e8f9f7 225 * @{
<> 144:ef7eb2e8f9f7 226 */
AnnaBridge 165:e614a9f1c9e2 227 #define UART_STOPBITS_1 0x00000000U
<> 144:ef7eb2e8f9f7 228 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<> 144:ef7eb2e8f9f7 229 /**
<> 144:ef7eb2e8f9f7 230 * @}
AnnaBridge 165:e614a9f1c9e2 231 */
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 /** @defgroup UART_Parity UART Parity
<> 144:ef7eb2e8f9f7 234 * @{
AnnaBridge 165:e614a9f1c9e2 235 */
AnnaBridge 165:e614a9f1c9e2 236 #define UART_PARITY_NONE 0x00000000U
<> 144:ef7eb2e8f9f7 237 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 144:ef7eb2e8f9f7 238 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 239 /**
<> 144:ef7eb2e8f9f7 240 * @}
AnnaBridge 165:e614a9f1c9e2 241 */
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
<> 144:ef7eb2e8f9f7 244 * @{
AnnaBridge 165:e614a9f1c9e2 245 */
AnnaBridge 165:e614a9f1c9e2 246 #define UART_HWCONTROL_NONE 0x00000000U
<> 144:ef7eb2e8f9f7 247 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
<> 144:ef7eb2e8f9f7 248 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
<> 144:ef7eb2e8f9f7 249 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
<> 144:ef7eb2e8f9f7 250 /**
<> 144:ef7eb2e8f9f7 251 * @}
<> 144:ef7eb2e8f9f7 252 */
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 /** @defgroup UART_Mode UART Transfer Mode
<> 144:ef7eb2e8f9f7 255 * @{
<> 144:ef7eb2e8f9f7 256 */
<> 144:ef7eb2e8f9f7 257 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
<> 144:ef7eb2e8f9f7 258 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
<> 144:ef7eb2e8f9f7 259 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 260 /**
<> 144:ef7eb2e8f9f7 261 * @}
<> 144:ef7eb2e8f9f7 262 */
AnnaBridge 165:e614a9f1c9e2 263
AnnaBridge 165:e614a9f1c9e2 264 /** @defgroup UART_State UART State
<> 144:ef7eb2e8f9f7 265 * @{
AnnaBridge 165:e614a9f1c9e2 266 */
AnnaBridge 165:e614a9f1c9e2 267 #define UART_STATE_DISABLE 0x00000000U
<> 144:ef7eb2e8f9f7 268 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
<> 144:ef7eb2e8f9f7 269 /**
<> 144:ef7eb2e8f9f7 270 * @}
<> 144:ef7eb2e8f9f7 271 */
<> 144:ef7eb2e8f9f7 272
AnnaBridge 165:e614a9f1c9e2 273
<> 144:ef7eb2e8f9f7 274 /** @defgroup UART_Over_Sampling UART Over Sampling
<> 144:ef7eb2e8f9f7 275 * @{
<> 144:ef7eb2e8f9f7 276 */
AnnaBridge 165:e614a9f1c9e2 277 #define UART_OVERSAMPLING_16 0x00000000U
AnnaBridge 165:e614a9f1c9e2 278 #if defined(USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 279 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 280 #endif /* USART_CR1_OVER8 */
<> 144:ef7eb2e8f9f7 281 /**
<> 144:ef7eb2e8f9f7 282 * @}
<> 144:ef7eb2e8f9f7 283 */
<> 144:ef7eb2e8f9f7 284
AnnaBridge 165:e614a9f1c9e2 285
<> 144:ef7eb2e8f9f7 286 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
<> 144:ef7eb2e8f9f7 287 * @{
<> 144:ef7eb2e8f9f7 288 */
AnnaBridge 165:e614a9f1c9e2 289 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U
<> 144:ef7eb2e8f9f7 290 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
<> 144:ef7eb2e8f9f7 291 /**
<> 144:ef7eb2e8f9f7 292 * @}
<> 144:ef7eb2e8f9f7 293 */
AnnaBridge 165:e614a9f1c9e2 294 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
<> 144:ef7eb2e8f9f7 295 * @{
<> 144:ef7eb2e8f9f7 296 */
AnnaBridge 165:e614a9f1c9e2 297 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U
<> 144:ef7eb2e8f9f7 298 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
<> 144:ef7eb2e8f9f7 299 /**
<> 144:ef7eb2e8f9f7 300 * @}
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /** @defgroup UART_Flags UART FLags
<> 144:ef7eb2e8f9f7 304 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 305 * - 0xXXXX : Flag mask in the SR register
<> 144:ef7eb2e8f9f7 306 * @{
<> 144:ef7eb2e8f9f7 307 */
<> 144:ef7eb2e8f9f7 308 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
<> 144:ef7eb2e8f9f7 309 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
<> 144:ef7eb2e8f9f7 310 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 144:ef7eb2e8f9f7 311 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
<> 144:ef7eb2e8f9f7 312 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 144:ef7eb2e8f9f7 313 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 144:ef7eb2e8f9f7 314 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 144:ef7eb2e8f9f7 315 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
<> 144:ef7eb2e8f9f7 316 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
<> 144:ef7eb2e8f9f7 317 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
<> 144:ef7eb2e8f9f7 318 /**
<> 144:ef7eb2e8f9f7 319 * @}
<> 144:ef7eb2e8f9f7 320 */
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
<> 144:ef7eb2e8f9f7 323 * Elements values convention: 0xY000XXXX
<> 144:ef7eb2e8f9f7 324 * - XXXX : Interrupt mask (16 bits) in the Y register
<> 144:ef7eb2e8f9f7 325 * - Y : Interrupt source register (2bits)
AnnaBridge 165:e614a9f1c9e2 326 * - 01: CR1 register
AnnaBridge 165:e614a9f1c9e2 327 * - 10: CR2 register
AnnaBridge 165:e614a9f1c9e2 328 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 329 * @{
AnnaBridge 165:e614a9f1c9e2 330 */
<> 144:ef7eb2e8f9f7 331
AnnaBridge 165:e614a9f1c9e2 332 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
AnnaBridge 165:e614a9f1c9e2 333 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
AnnaBridge 165:e614a9f1c9e2 334 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
AnnaBridge 165:e614a9f1c9e2 335 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
AnnaBridge 165:e614a9f1c9e2 336 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
<> 144:ef7eb2e8f9f7 337
AnnaBridge 165:e614a9f1c9e2 338 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
<> 144:ef7eb2e8f9f7 339
AnnaBridge 165:e614a9f1c9e2 340 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
AnnaBridge 165:e614a9f1c9e2 341 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
<> 144:ef7eb2e8f9f7 342 /**
<> 144:ef7eb2e8f9f7 343 * @}
<> 144:ef7eb2e8f9f7 344 */
<> 144:ef7eb2e8f9f7 345
<> 144:ef7eb2e8f9f7 346 /**
<> 144:ef7eb2e8f9f7 347 * @}
<> 144:ef7eb2e8f9f7 348 */
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 351 /** @defgroup UART_Exported_Macros UART Exported Macros
<> 144:ef7eb2e8f9f7 352 * @{
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354
AnnaBridge 165:e614a9f1c9e2 355 /** @brief Reset UART handle gstate & RxState
<> 144:ef7eb2e8f9f7 356 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 357 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 358 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 359 */
AnnaBridge 165:e614a9f1c9e2 360 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge 165:e614a9f1c9e2 361 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
AnnaBridge 165:e614a9f1c9e2 362 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
AnnaBridge 165:e614a9f1c9e2 363 } while(0U)
<> 144:ef7eb2e8f9f7 364
AnnaBridge 165:e614a9f1c9e2 365 /** @brief Flushs the UART DR register
<> 144:ef7eb2e8f9f7 366 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 367 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 368 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 369 */
<> 144:ef7eb2e8f9f7 370 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
<> 144:ef7eb2e8f9f7 371
AnnaBridge 165:e614a9f1c9e2 372 /** @brief Checks whether the specified UART flag is set or not.
<> 144:ef7eb2e8f9f7 373 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 374 * This parameter can be UARTx where x: 1, 2, 3, 4 or 5 to select the USART or
AnnaBridge 165:e614a9f1c9e2 375 * UART peripheral.
<> 144:ef7eb2e8f9f7 376 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 377 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 378 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
<> 144:ef7eb2e8f9f7 379 * @arg UART_FLAG_LBD: LIN Break detection flag
<> 144:ef7eb2e8f9f7 380 * @arg UART_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 381 * @arg UART_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 382 * @arg UART_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 383 * @arg UART_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 384 * @arg UART_FLAG_ORE: OverRun Error flag
<> 144:ef7eb2e8f9f7 385 * @arg UART_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 386 * @arg UART_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 387 * @arg UART_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 388 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 389 */
<> 144:ef7eb2e8f9f7 390 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 391
AnnaBridge 165:e614a9f1c9e2 392 /** @brief Clears the specified UART pending flag.
<> 144:ef7eb2e8f9f7 393 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 394 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 395 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 396 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 397 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 398 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
<> 144:ef7eb2e8f9f7 399 * @arg UART_FLAG_LBD: LIN Break detection flag.
<> 144:ef7eb2e8f9f7 400 * @arg UART_FLAG_TC: Transmission Complete flag.
<> 144:ef7eb2e8f9f7 401 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
<> 144:ef7eb2e8f9f7 402 *
<> 144:ef7eb2e8f9f7 403 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
<> 144:ef7eb2e8f9f7 404 * error) and IDLE (Idle line detected) flags are cleared by software
<> 144:ef7eb2e8f9f7 405 * sequence: a read operation to USART_SR register followed by a read
<> 144:ef7eb2e8f9f7 406 * operation to USART_DR register.
<> 144:ef7eb2e8f9f7 407 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 144:ef7eb2e8f9f7 408 * @note TC flag can be also cleared by software sequence: a read operation to
<> 144:ef7eb2e8f9f7 409 * USART_SR register followed by a write operation to USART_DR register.
<> 144:ef7eb2e8f9f7 410 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 144:ef7eb2e8f9f7 411 *
<> 144:ef7eb2e8f9f7 412 */
<> 144:ef7eb2e8f9f7 413 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 144:ef7eb2e8f9f7 414
AnnaBridge 165:e614a9f1c9e2 415 /** @brief Clears the UART PE pending flag.
<> 144:ef7eb2e8f9f7 416 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 417 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 418 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 419 */
AnnaBridge 165:e614a9f1c9e2 420 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
AnnaBridge 165:e614a9f1c9e2 421 do{ \
AnnaBridge 165:e614a9f1c9e2 422 __IO uint32_t tmpreg = 0x00U; \
AnnaBridge 165:e614a9f1c9e2 423 tmpreg = (__HANDLE__)->Instance->SR; \
AnnaBridge 165:e614a9f1c9e2 424 tmpreg = (__HANDLE__)->Instance->DR; \
AnnaBridge 165:e614a9f1c9e2 425 UNUSED(tmpreg); \
AnnaBridge 165:e614a9f1c9e2 426 } while(0U)
<> 144:ef7eb2e8f9f7 427
AnnaBridge 165:e614a9f1c9e2 428 /** @brief Clears the UART FE pending flag.
<> 144:ef7eb2e8f9f7 429 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 430 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 431 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 432 */
<> 144:ef7eb2e8f9f7 433 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 434
AnnaBridge 165:e614a9f1c9e2 435 /** @brief Clears the UART NE pending flag.
<> 144:ef7eb2e8f9f7 436 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 437 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 438 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 439 */
<> 144:ef7eb2e8f9f7 440 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 441
AnnaBridge 165:e614a9f1c9e2 442 /** @brief Clears the UART ORE pending flag.
<> 144:ef7eb2e8f9f7 443 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 444 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 445 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 446 */
<> 144:ef7eb2e8f9f7 447 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 448
AnnaBridge 165:e614a9f1c9e2 449 /** @brief Clears the UART IDLE pending flag.
<> 144:ef7eb2e8f9f7 450 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 451 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 452 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 453 */
<> 144:ef7eb2e8f9f7 454 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
AnnaBridge 165:e614a9f1c9e2 455
<> 144:ef7eb2e8f9f7 456 /** @brief Enable the specified UART interrupt.
<> 144:ef7eb2e8f9f7 457 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 458 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 459 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 460 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
<> 144:ef7eb2e8f9f7 461 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 462 * @arg UART_IT_CTS: CTS change interrupt
<> 144:ef7eb2e8f9f7 463 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 464 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 465 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 466 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 467 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 468 * @arg UART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 469 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 470 */
AnnaBridge 165:e614a9f1c9e2 471 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 472 (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 473 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
<> 144:ef7eb2e8f9f7 474
<> 144:ef7eb2e8f9f7 475 /** @brief Disable the specified UART interrupt.
<> 144:ef7eb2e8f9f7 476 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 477 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 478 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 479 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
<> 144:ef7eb2e8f9f7 480 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 481 * @arg UART_IT_CTS: CTS change interrupt
<> 144:ef7eb2e8f9f7 482 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 483 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 484 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 485 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 486 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 487 * @arg UART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 488 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 489 */
AnnaBridge 165:e614a9f1c9e2 490 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 491 (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 492 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
AnnaBridge 165:e614a9f1c9e2 493
AnnaBridge 165:e614a9f1c9e2 494 /** @brief Checks whether the specified UART interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 495 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 496 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 497 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 498 * @param __IT__: specifies the UART interrupt source to check.
<> 144:ef7eb2e8f9f7 499 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 500 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
<> 144:ef7eb2e8f9f7 501 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 502 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 503 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 504 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 505 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 506 * @arg UART_IT_ERR: Error interrupt
<> 144:ef7eb2e8f9f7 507 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 508 */
AnnaBridge 165:e614a9f1c9e2 509 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \
<> 144:ef7eb2e8f9f7 510 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
<> 144:ef7eb2e8f9f7 511
<> 144:ef7eb2e8f9f7 512 /** @brief Enable CTS flow control
<> 144:ef7eb2e8f9f7 513 * This macro allows to enable CTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 514 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 515 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 516 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 517 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 518 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 519 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 520 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 521 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 522 * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
<> 144:ef7eb2e8f9f7 523 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 524 */
<> 144:ef7eb2e8f9f7 525 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 526 do{ \
<> 144:ef7eb2e8f9f7 527 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
<> 144:ef7eb2e8f9f7 528 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
AnnaBridge 165:e614a9f1c9e2 529 } while(0U)
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /** @brief Disable CTS flow control
<> 144:ef7eb2e8f9f7 532 * This macro allows to disable CTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 533 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 534 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 535 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 536 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 537 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 538 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 539 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 540 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 541 * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
<> 144:ef7eb2e8f9f7 542 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 543 */
<> 144:ef7eb2e8f9f7 544 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 545 do{ \
<> 144:ef7eb2e8f9f7 546 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
<> 144:ef7eb2e8f9f7 547 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
AnnaBridge 165:e614a9f1c9e2 548 } while(0U)
<> 144:ef7eb2e8f9f7 549
<> 144:ef7eb2e8f9f7 550 /** @brief Enable RTS flow control
<> 144:ef7eb2e8f9f7 551 * This macro allows to enable RTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 552 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 553 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 554 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 555 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 556 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 557 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 558 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 559 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 560 * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
<> 144:ef7eb2e8f9f7 561 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 562 */
<> 144:ef7eb2e8f9f7 563 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 564 do{ \
<> 144:ef7eb2e8f9f7 565 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
<> 144:ef7eb2e8f9f7 566 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
AnnaBridge 165:e614a9f1c9e2 567 } while(0U)
<> 144:ef7eb2e8f9f7 568
<> 144:ef7eb2e8f9f7 569 /** @brief Disable RTS flow control
<> 144:ef7eb2e8f9f7 570 * This macro allows to disable RTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 571 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 572 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 573 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 574 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 575 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 576 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 577 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 578 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 579 * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
<> 144:ef7eb2e8f9f7 580 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 581 */
<> 144:ef7eb2e8f9f7 582 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 583 do{ \
<> 144:ef7eb2e8f9f7 584 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
<> 144:ef7eb2e8f9f7 585 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
AnnaBridge 165:e614a9f1c9e2 586 } while(0U)
<> 144:ef7eb2e8f9f7 587
AnnaBridge 165:e614a9f1c9e2 588 #if defined(USART_CR3_ONEBIT)
AnnaBridge 165:e614a9f1c9e2 589 /** @brief macros to enables the UART's one bit sample method
AnnaBridge 165:e614a9f1c9e2 590 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 591 */
AnnaBridge 165:e614a9f1c9e2 592 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
AnnaBridge 165:e614a9f1c9e2 593
AnnaBridge 165:e614a9f1c9e2 594 /** @brief macros to disables the UART's one bit sample method
AnnaBridge 165:e614a9f1c9e2 595 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 596 * @retval None
AnnaBridge 165:e614a9f1c9e2 597 */
AnnaBridge 165:e614a9f1c9e2 598 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
AnnaBridge 165:e614a9f1c9e2 599 #endif /* USART_CR3_ONEBIT */
<> 144:ef7eb2e8f9f7 600
<> 144:ef7eb2e8f9f7 601 /** @brief Enable UART
<> 144:ef7eb2e8f9f7 602 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 603 */
<> 144:ef7eb2e8f9f7 604 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 144:ef7eb2e8f9f7 605
<> 144:ef7eb2e8f9f7 606 /** @brief Disable UART
AnnaBridge 165:e614a9f1c9e2 607 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 608 */
<> 144:ef7eb2e8f9f7 609 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 144:ef7eb2e8f9f7 610 /**
<> 144:ef7eb2e8f9f7 611 * @}
<> 144:ef7eb2e8f9f7 612 */
AnnaBridge 165:e614a9f1c9e2 613 /* Exported functions --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 614 /** @addtogroup UART_Exported_Functions
<> 144:ef7eb2e8f9f7 615 * @{
<> 144:ef7eb2e8f9f7 616 */
<> 144:ef7eb2e8f9f7 617
AnnaBridge 165:e614a9f1c9e2 618 /** @addtogroup UART_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 619 * @{
<> 144:ef7eb2e8f9f7 620 */
AnnaBridge 165:e614a9f1c9e2 621 /* Initialization/de-initialization functions **********************************/
<> 144:ef7eb2e8f9f7 622 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 623 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 624 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
<> 144:ef7eb2e8f9f7 625 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
<> 144:ef7eb2e8f9f7 626 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 627 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 628 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 629 /**
<> 144:ef7eb2e8f9f7 630 * @}
<> 144:ef7eb2e8f9f7 631 */
<> 144:ef7eb2e8f9f7 632
AnnaBridge 165:e614a9f1c9e2 633 /** @addtogroup UART_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 634 * @{
<> 144:ef7eb2e8f9f7 635 */
AnnaBridge 165:e614a9f1c9e2 636 /* IO operation functions *******************************************************/
<> 144:ef7eb2e8f9f7 637 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 638 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 639 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 640 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 641 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 642 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 643 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 644 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 645 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 646 /* Transfer Abort functions */
AnnaBridge 165:e614a9f1c9e2 647 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 648 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 649 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 650 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 651 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 652 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 653
<> 144:ef7eb2e8f9f7 654 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 655 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 656 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 657 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 658 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 659 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 660 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 661 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 662 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 663 /**
<> 144:ef7eb2e8f9f7 664 * @}
<> 144:ef7eb2e8f9f7 665 */
<> 144:ef7eb2e8f9f7 666
AnnaBridge 165:e614a9f1c9e2 667 /** @addtogroup UART_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 668 * @{
<> 144:ef7eb2e8f9f7 669 */
<> 144:ef7eb2e8f9f7 670 /* Peripheral Control functions ************************************************/
<> 144:ef7eb2e8f9f7 671 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 672 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 673 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 674 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 675 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 676 /**
AnnaBridge 165:e614a9f1c9e2 677 * @}
AnnaBridge 165:e614a9f1c9e2 678 */
<> 144:ef7eb2e8f9f7 679
AnnaBridge 165:e614a9f1c9e2 680 /** @addtogroup UART_Exported_Functions_Group4
AnnaBridge 165:e614a9f1c9e2 681 * @{
AnnaBridge 165:e614a9f1c9e2 682 */
AnnaBridge 165:e614a9f1c9e2 683 /* Peripheral State functions **************************************************/
AnnaBridge 165:e614a9f1c9e2 684 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 685 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 686 /**
AnnaBridge 165:e614a9f1c9e2 687 * @}
AnnaBridge 165:e614a9f1c9e2 688 */
AnnaBridge 165:e614a9f1c9e2 689
AnnaBridge 165:e614a9f1c9e2 690 /**
AnnaBridge 165:e614a9f1c9e2 691 * @}
AnnaBridge 165:e614a9f1c9e2 692 */
AnnaBridge 165:e614a9f1c9e2 693 /* Private types -------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 694 /* Private variables ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 695 /* Private constants ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 696 /** @defgroup UART_Private_Constants UART Private Constants
AnnaBridge 165:e614a9f1c9e2 697 * @{
AnnaBridge 165:e614a9f1c9e2 698 */
AnnaBridge 165:e614a9f1c9e2 699 /** @brief UART interruptions flag mask
AnnaBridge 165:e614a9f1c9e2 700 *
AnnaBridge 165:e614a9f1c9e2 701 */
AnnaBridge 165:e614a9f1c9e2 702 #define UART_IT_MASK 0x0000FFFFU
AnnaBridge 165:e614a9f1c9e2 703
AnnaBridge 165:e614a9f1c9e2 704 #define UART_CR1_REG_INDEX 1U
AnnaBridge 165:e614a9f1c9e2 705 #define UART_CR2_REG_INDEX 2U
AnnaBridge 165:e614a9f1c9e2 706 #define UART_CR3_REG_INDEX 3U
<> 144:ef7eb2e8f9f7 707 /**
<> 144:ef7eb2e8f9f7 708 * @}
<> 144:ef7eb2e8f9f7 709 */
<> 144:ef7eb2e8f9f7 710
AnnaBridge 165:e614a9f1c9e2 711 /* Private macros ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 712 /** @defgroup UART_Private_Macros UART Private Macros
<> 144:ef7eb2e8f9f7 713 * @{
<> 144:ef7eb2e8f9f7 714 */
AnnaBridge 165:e614a9f1c9e2 715 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
AnnaBridge 165:e614a9f1c9e2 716 ((LENGTH) == UART_WORDLENGTH_9B))
AnnaBridge 165:e614a9f1c9e2 717 #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
AnnaBridge 165:e614a9f1c9e2 718 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
AnnaBridge 165:e614a9f1c9e2 719 ((STOPBITS) == UART_STOPBITS_2))
AnnaBridge 165:e614a9f1c9e2 720 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
AnnaBridge 165:e614a9f1c9e2 721 ((PARITY) == UART_PARITY_EVEN) || \
AnnaBridge 165:e614a9f1c9e2 722 ((PARITY) == UART_PARITY_ODD))
AnnaBridge 165:e614a9f1c9e2 723 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
AnnaBridge 165:e614a9f1c9e2 724 (((CONTROL) == UART_HWCONTROL_NONE) || \
AnnaBridge 165:e614a9f1c9e2 725 ((CONTROL) == UART_HWCONTROL_RTS) || \
AnnaBridge 165:e614a9f1c9e2 726 ((CONTROL) == UART_HWCONTROL_CTS) || \
AnnaBridge 165:e614a9f1c9e2 727 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
AnnaBridge 165:e614a9f1c9e2 728 #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U))
AnnaBridge 165:e614a9f1c9e2 729 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
AnnaBridge 165:e614a9f1c9e2 730 ((STATE) == UART_STATE_ENABLE))
AnnaBridge 165:e614a9f1c9e2 731 #if defined(USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 732 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
AnnaBridge 165:e614a9f1c9e2 733 ((SAMPLING) == UART_OVERSAMPLING_8))
AnnaBridge 165:e614a9f1c9e2 734 #endif /* USART_CR1_OVER8 */
AnnaBridge 165:e614a9f1c9e2 735 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
AnnaBridge 165:e614a9f1c9e2 736 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
AnnaBridge 165:e614a9f1c9e2 737 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
AnnaBridge 165:e614a9f1c9e2 738 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
AnnaBridge 165:e614a9f1c9e2 739 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
AnnaBridge 165:e614a9f1c9e2 740 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4500001U)
AnnaBridge 165:e614a9f1c9e2 741 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
AnnaBridge 165:e614a9f1c9e2 742
AnnaBridge 165:e614a9f1c9e2 743 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
AnnaBridge 165:e614a9f1c9e2 744 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
AnnaBridge 165:e614a9f1c9e2 745 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
AnnaBridge 165:e614a9f1c9e2 746 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 165:e614a9f1c9e2 747 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
AnnaBridge 165:e614a9f1c9e2 748 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
AnnaBridge 165:e614a9f1c9e2 749 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
AnnaBridge 165:e614a9f1c9e2 750 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
AnnaBridge 165:e614a9f1c9e2 751
AnnaBridge 165:e614a9f1c9e2 752 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
AnnaBridge 165:e614a9f1c9e2 753 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
AnnaBridge 165:e614a9f1c9e2 754 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U)
AnnaBridge 165:e614a9f1c9e2 755 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 165:e614a9f1c9e2 756 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
AnnaBridge 165:e614a9f1c9e2 757 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
AnnaBridge 165:e614a9f1c9e2 758 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
AnnaBridge 165:e614a9f1c9e2 759 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
AnnaBridge 165:e614a9f1c9e2 760 /**
AnnaBridge 165:e614a9f1c9e2 761 * @}
AnnaBridge 165:e614a9f1c9e2 762 */
<> 144:ef7eb2e8f9f7 763
AnnaBridge 165:e614a9f1c9e2 764 /* Private functions ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 765 /** @defgroup UART_Private_Functions UART Private Functions
AnnaBridge 165:e614a9f1c9e2 766 * @{
<> 144:ef7eb2e8f9f7 767 */
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 /**
<> 144:ef7eb2e8f9f7 770 * @}
<> 144:ef7eb2e8f9f7 771 */
<> 144:ef7eb2e8f9f7 772
<> 144:ef7eb2e8f9f7 773 /**
<> 144:ef7eb2e8f9f7 774 * @}
<> 144:ef7eb2e8f9f7 775 */
<> 144:ef7eb2e8f9f7 776
<> 144:ef7eb2e8f9f7 777 /**
<> 144:ef7eb2e8f9f7 778 * @}
<> 144:ef7eb2e8f9f7 779 */
<> 144:ef7eb2e8f9f7 780
<> 144:ef7eb2e8f9f7 781 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 782 }
<> 144:ef7eb2e8f9f7 783 #endif
<> 144:ef7eb2e8f9f7 784
<> 144:ef7eb2e8f9f7 785 #endif /* __STM32F1xx_HAL_UART_H */
<> 144:ef7eb2e8f9f7 786
<> 144:ef7eb2e8f9f7 787 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/