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Diff: targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_crc.h

Revision:
165:e614a9f1c9e2
Parent:
154:37f96f9d4de2
--- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_crc.h	Wed May 10 12:06:41 2017 +0100
+++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_crc.h	Fri May 26 12:39:01 2017 +0100
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f1xx_hal_crc.h
   * @author  MCD Application Team
-  * @version V1.0.5
-  * @date    06-December-2016
+  * @version V1.1.0
+  * @date    14-April-2017
   * @brief   Header file of CRC HAL module.
   ******************************************************************************
   * @attention
@@ -65,11 +65,11 @@
   */ 
 typedef enum
 {
-  HAL_CRC_STATE_RESET     = 0x00,  /*!< CRC not yet initialized or disabled */
-  HAL_CRC_STATE_READY     = 0x01,  /*!< CRC initialized and ready for use   */
-  HAL_CRC_STATE_BUSY      = 0x02,  /*!< CRC internal process is ongoing     */
-  HAL_CRC_STATE_TIMEOUT   = 0x03,  /*!< CRC timeout state                   */
-  HAL_CRC_STATE_ERROR     = 0x04   /*!< CRC error state                     */
+  HAL_CRC_STATE_RESET     = 0x00U,  /*!< CRC not yet initialized or disabled */
+  HAL_CRC_STATE_READY     = 0x01U,  /*!< CRC initialized and ready for use   */
+  HAL_CRC_STATE_BUSY      = 0x02U,  /*!< CRC internal process is ongoing     */
+  HAL_CRC_STATE_TIMEOUT   = 0x03U,  /*!< CRC timeout state                   */
+  HAL_CRC_STATE_ERROR     = 0x04U   /*!< CRC error state                     */
 
 }HAL_CRC_StateTypeDef;