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targets/hal/TARGET_NXP/TARGET_LPC11UXX/spi_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include <math.h>
bogdanm 0:9b334a45a8ff 18 #include "spi_api.h"
bogdanm 0:9b334a45a8ff 19 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 20 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 21 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 22 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 static inline int ssp_disable(spi_t *obj);
bogdanm 0:9b334a45a8ff 25 static inline int ssp_enable(spi_t *obj);
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
bogdanm 0:9b334a45a8ff 28 // determine the SPI to use
bogdanm 0:9b334a45a8ff 29 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 30 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 31 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 32 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 33 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
bogdanm 0:9b334a45a8ff 34 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 obj->spi = (LPC_SSPx_Type*)pinmap_merge(spi_data, spi_cntl);
bogdanm 0:9b334a45a8ff 37 MBED_ASSERT((int)obj->spi != NC);
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 // enable power and clocking
bogdanm 0:9b334a45a8ff 40 switch ((int)obj->spi) {
bogdanm 0:9b334a45a8ff 41 case SPI_0:
bogdanm 0:9b334a45a8ff 42 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
bogdanm 0:9b334a45a8ff 43 LPC_SYSCON->SSP0CLKDIV = 0x01;
bogdanm 0:9b334a45a8ff 44 LPC_SYSCON->PRESETCTRL |= 1 << 0;
bogdanm 0:9b334a45a8ff 45 break;
bogdanm 0:9b334a45a8ff 46 case SPI_1:
bogdanm 0:9b334a45a8ff 47 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
bogdanm 0:9b334a45a8ff 48 LPC_SYSCON->SSP1CLKDIV = 0x01;
bogdanm 0:9b334a45a8ff 49 LPC_SYSCON->PRESETCTRL |= 1 << 2;
bogdanm 0:9b334a45a8ff 50 break;
bogdanm 0:9b334a45a8ff 51 }
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 // pin out the spi pins
bogdanm 0:9b334a45a8ff 54 pinmap_pinout(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 55 pinmap_pinout(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 56 pinmap_pinout(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 57 if (ssel != NC) {
bogdanm 0:9b334a45a8ff 58 pinmap_pinout(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 59 }
bogdanm 0:9b334a45a8ff 60 }
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 void spi_free(spi_t *obj) {}
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 void spi_format(spi_t *obj, int bits, int mode, int slave) {
bogdanm 0:9b334a45a8ff 65 MBED_ASSERT((bits >= 4 && bits <= 16) || (mode >= 0 && mode <= 3));
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 ssp_disable(obj);
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 int polarity = (mode & 0x2) ? 1 : 0;
bogdanm 0:9b334a45a8ff 70 int phase = (mode & 0x1) ? 1 : 0;
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 // set it up
bogdanm 0:9b334a45a8ff 73 int DSS = bits - 1; // DSS (data select size)
bogdanm 0:9b334a45a8ff 74 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
bogdanm 0:9b334a45a8ff 75 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 int FRF = 0; // FRF (frame format) = SPI
bogdanm 0:9b334a45a8ff 78 uint32_t tmp = obj->spi->CR0;
bogdanm 0:9b334a45a8ff 79 tmp &= ~(0xFFFF);
bogdanm 0:9b334a45a8ff 80 tmp |= DSS << 0
bogdanm 0:9b334a45a8ff 81 | FRF << 4
bogdanm 0:9b334a45a8ff 82 | SPO << 6
bogdanm 0:9b334a45a8ff 83 | SPH << 7;
bogdanm 0:9b334a45a8ff 84 obj->spi->CR0 = tmp;
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 tmp = obj->spi->CR1;
bogdanm 0:9b334a45a8ff 87 tmp &= ~(0xD);
bogdanm 0:9b334a45a8ff 88 tmp |= 0 << 0 // LBM - loop back mode - off
bogdanm 0:9b334a45a8ff 89 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
bogdanm 0:9b334a45a8ff 90 | 0 << 3; // SOD - slave output disable - na
bogdanm 0:9b334a45a8ff 91 obj->spi->CR1 = tmp;
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 ssp_enable(obj);
bogdanm 0:9b334a45a8ff 94 }
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 void spi_frequency(spi_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 97 ssp_disable(obj);
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 uint32_t PCLK = SystemCoreClock;
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 int prescaler;
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
bogdanm 0:9b334a45a8ff 104 int prescale_hz = PCLK / prescaler;
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 // calculate the divider
bogdanm 0:9b334a45a8ff 107 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 // check we can support the divider
bogdanm 0:9b334a45a8ff 110 if (divider < 256) {
bogdanm 0:9b334a45a8ff 111 // prescaler
bogdanm 0:9b334a45a8ff 112 obj->spi->CPSR = prescaler;
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 // divider
bogdanm 0:9b334a45a8ff 115 obj->spi->CR0 &= ~(0xFFFF << 8);
bogdanm 0:9b334a45a8ff 116 obj->spi->CR0 |= (divider - 1) << 8;
bogdanm 0:9b334a45a8ff 117 ssp_enable(obj);
bogdanm 0:9b334a45a8ff 118 return;
bogdanm 0:9b334a45a8ff 119 }
bogdanm 0:9b334a45a8ff 120 }
bogdanm 0:9b334a45a8ff 121 error("Couldn't setup requested SPI frequency");
bogdanm 0:9b334a45a8ff 122 }
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 static inline int ssp_disable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 125 return obj->spi->CR1 &= ~(1 << 1);
bogdanm 0:9b334a45a8ff 126 }
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 static inline int ssp_enable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 129 return obj->spi->CR1 |= (1 << 1);
bogdanm 0:9b334a45a8ff 130 }
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 static inline int ssp_readable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 133 return obj->spi->SR & (1 << 2);
bogdanm 0:9b334a45a8ff 134 }
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 static inline int ssp_writeable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 137 return obj->spi->SR & (1 << 1);
bogdanm 0:9b334a45a8ff 138 }
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 static inline void ssp_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 141 while (!ssp_writeable(obj));
bogdanm 0:9b334a45a8ff 142 obj->spi->DR = value;
bogdanm 0:9b334a45a8ff 143 }
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 static inline int ssp_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 146 while (!ssp_readable(obj));
bogdanm 0:9b334a45a8ff 147 return obj->spi->DR;
bogdanm 0:9b334a45a8ff 148 }
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 static inline int ssp_busy(spi_t *obj) {
bogdanm 0:9b334a45a8ff 151 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
bogdanm 0:9b334a45a8ff 152 }
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 int spi_master_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 155 ssp_write(obj, value);
bogdanm 0:9b334a45a8ff 156 return ssp_read(obj);
bogdanm 0:9b334a45a8ff 157 }
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 int spi_slave_receive(spi_t *obj) {
bogdanm 0:9b334a45a8ff 160 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
bogdanm 0:9b334a45a8ff 161 }
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 int spi_slave_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 164 return obj->spi->DR;
bogdanm 0:9b334a45a8ff 165 }
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 void spi_slave_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 168 while (ssp_writeable(obj) == 0) ;
bogdanm 0:9b334a45a8ff 169 obj->spi->DR = value;
bogdanm 0:9b334a45a8ff 170 }
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 int spi_busy(spi_t *obj) {
bogdanm 0:9b334a45a8ff 173 return ssp_busy(obj);
bogdanm 0:9b334a45a8ff 174 }