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targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.h@168:9672193075cf, 2017-07-06 (annotated)

Committer:
AnnaBridge
Date:
Thu Jul 06 15:42:05 2017 +0100
Revision:
168:9672193075cf
Parent:
161:2cc1468da177 
This updates the lib to the mbed lib v 146

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_pwr_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 168:9672193075cf 5 * @version V1.2.2
AnnaBridge 168:9672193075cf 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of PWR HAL Extension module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
AnnaBridge 168:9672193075cf 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F7xx_HAL_PWR_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F7xx_HAL_PWR_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f7xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup PWREx
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
<> 144:ef7eb2e8f9f7 60 * @{
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62 /** @defgroup PWREx_WakeUp_Pins PWREx Wake Up Pins
<> 144:ef7eb2e8f9f7 63 * @{
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 #define PWR_WAKEUP_PIN1 PWR_CSR2_EWUP1
<> 144:ef7eb2e8f9f7 66 #define PWR_WAKEUP_PIN2 PWR_CSR2_EWUP2
<> 144:ef7eb2e8f9f7 67 #define PWR_WAKEUP_PIN3 PWR_CSR2_EWUP3
<> 144:ef7eb2e8f9f7 68 #define PWR_WAKEUP_PIN4 PWR_CSR2_EWUP4
<> 144:ef7eb2e8f9f7 69 #define PWR_WAKEUP_PIN5 PWR_CSR2_EWUP5
<> 144:ef7eb2e8f9f7 70 #define PWR_WAKEUP_PIN6 PWR_CSR2_EWUP6
<> 144:ef7eb2e8f9f7 71 #define PWR_WAKEUP_PIN1_HIGH PWR_CSR2_EWUP1
<> 144:ef7eb2e8f9f7 72 #define PWR_WAKEUP_PIN2_HIGH PWR_CSR2_EWUP2
<> 144:ef7eb2e8f9f7 73 #define PWR_WAKEUP_PIN3_HIGH PWR_CSR2_EWUP3
<> 144:ef7eb2e8f9f7 74 #define PWR_WAKEUP_PIN4_HIGH PWR_CSR2_EWUP4
<> 144:ef7eb2e8f9f7 75 #define PWR_WAKEUP_PIN5_HIGH PWR_CSR2_EWUP5
<> 144:ef7eb2e8f9f7 76 #define PWR_WAKEUP_PIN6_HIGH PWR_CSR2_EWUP6
<> 144:ef7eb2e8f9f7 77 #define PWR_WAKEUP_PIN1_LOW (uint32_t)((PWR_CR2_WUPP1<<6) | PWR_CSR2_EWUP1)
<> 144:ef7eb2e8f9f7 78 #define PWR_WAKEUP_PIN2_LOW (uint32_t)((PWR_CR2_WUPP2<<6) | PWR_CSR2_EWUP2)
<> 144:ef7eb2e8f9f7 79 #define PWR_WAKEUP_PIN3_LOW (uint32_t)((PWR_CR2_WUPP3<<6) | PWR_CSR2_EWUP3)
<> 144:ef7eb2e8f9f7 80 #define PWR_WAKEUP_PIN4_LOW (uint32_t)((PWR_CR2_WUPP4<<6) | PWR_CSR2_EWUP4)
<> 144:ef7eb2e8f9f7 81 #define PWR_WAKEUP_PIN5_LOW (uint32_t)((PWR_CR2_WUPP5<<6) | PWR_CSR2_EWUP5)
<> 144:ef7eb2e8f9f7 82 #define PWR_WAKEUP_PIN6_LOW (uint32_t)((PWR_CR2_WUPP6<<6) | PWR_CSR2_EWUP6)
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /**
<> 144:ef7eb2e8f9f7 85 * @}
<> 144:ef7eb2e8f9f7 86 */
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
<> 144:ef7eb2e8f9f7 89 * @{
<> 144:ef7eb2e8f9f7 90 */
<> 144:ef7eb2e8f9f7 91 #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR1_MRUDS
<> 144:ef7eb2e8f9f7 92 #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR1_LPDS | PWR_CR1_LPUDS))
<> 144:ef7eb2e8f9f7 93 /**
<> 144:ef7eb2e8f9f7 94 * @}
<> 144:ef7eb2e8f9f7 95 */
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
<> 144:ef7eb2e8f9f7 98 * @{
<> 144:ef7eb2e8f9f7 99 */
<> 144:ef7eb2e8f9f7 100 #define PWR_FLAG_ODRDY PWR_CSR1_ODRDY
<> 144:ef7eb2e8f9f7 101 #define PWR_FLAG_ODSWRDY PWR_CSR1_ODSWRDY
<> 144:ef7eb2e8f9f7 102 #define PWR_FLAG_UDRDY PWR_CSR1_UDRDY
<> 144:ef7eb2e8f9f7 103 /**
<> 144:ef7eb2e8f9f7 104 * @}
<> 144:ef7eb2e8f9f7 105 */
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 /** @defgroup PWREx_Wakeup_Pins_Flag PWREx Wake Up Pin Flags
<> 144:ef7eb2e8f9f7 108 * @{
<> 144:ef7eb2e8f9f7 109 */
<> 144:ef7eb2e8f9f7 110 #define PWR_WAKEUP_PIN_FLAG1 PWR_CSR2_WUPF1
<> 144:ef7eb2e8f9f7 111 #define PWR_WAKEUP_PIN_FLAG2 PWR_CSR2_WUPF2
<> 144:ef7eb2e8f9f7 112 #define PWR_WAKEUP_PIN_FLAG3 PWR_CSR2_WUPF3
<> 144:ef7eb2e8f9f7 113 #define PWR_WAKEUP_PIN_FLAG4 PWR_CSR2_WUPF4
<> 144:ef7eb2e8f9f7 114 #define PWR_WAKEUP_PIN_FLAG5 PWR_CSR2_WUPF5
<> 144:ef7eb2e8f9f7 115 #define PWR_WAKEUP_PIN_FLAG6 PWR_CSR2_WUPF6
<> 144:ef7eb2e8f9f7 116 /**
<> 144:ef7eb2e8f9f7 117 * @}
<> 144:ef7eb2e8f9f7 118 */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 /**
<> 144:ef7eb2e8f9f7 121 * @}
<> 144:ef7eb2e8f9f7 122 */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 125 /** @defgroup PWREx_Exported_Macro PWREx Exported Macro
<> 144:ef7eb2e8f9f7 126 * @{
<> 144:ef7eb2e8f9f7 127 */
<> 144:ef7eb2e8f9f7 128 /** @brief Macros to enable or disable the Over drive mode.
<> 144:ef7eb2e8f9f7 129 */
<> 144:ef7eb2e8f9f7 130 #define __HAL_PWR_OVERDRIVE_ENABLE() (PWR->CR1 |= (uint32_t)PWR_CR1_ODEN)
<> 144:ef7eb2e8f9f7 131 #define __HAL_PWR_OVERDRIVE_DISABLE() (PWR->CR1 &= (uint32_t)(~PWR_CR1_ODEN))
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /** @brief Macros to enable or disable the Over drive switching.
<> 144:ef7eb2e8f9f7 134 */
<> 144:ef7eb2e8f9f7 135 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (PWR->CR1 |= (uint32_t)PWR_CR1_ODSWEN)
<> 144:ef7eb2e8f9f7 136 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (PWR->CR1 &= (uint32_t)(~PWR_CR1_ODSWEN))
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /** @brief Macros to enable or disable the Under drive mode.
<> 144:ef7eb2e8f9f7 139 * @note This mode is enabled only with STOP low power mode.
<> 144:ef7eb2e8f9f7 140 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
<> 144:ef7eb2e8f9f7 141 * mode is only available when the main regulator or the low power regulator
<> 144:ef7eb2e8f9f7 142 * is in low voltage mode.
<> 144:ef7eb2e8f9f7 143 * @note If the Under-drive mode was enabled, it is automatically disabled after
<> 144:ef7eb2e8f9f7 144 * exiting Stop mode.
<> 144:ef7eb2e8f9f7 145 * When the voltage regulator operates in Under-drive mode, an additional
<> 144:ef7eb2e8f9f7 146 * startup delay is induced when waking up from Stop mode.
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR1 |= (uint32_t)PWR_CR1_UDEN)
<> 144:ef7eb2e8f9f7 149 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR1 &= (uint32_t)(~PWR_CR1_UDEN))
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /** @brief Check PWR flag is set or not.
<> 144:ef7eb2e8f9f7 152 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 153 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 154 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
<> 144:ef7eb2e8f9f7 155 * is ready
<> 144:ef7eb2e8f9f7 156 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
<> 144:ef7eb2e8f9f7 157 * switching is ready
<> 144:ef7eb2e8f9f7 158 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
<> 144:ef7eb2e8f9f7 159 * is enabled in Stop mode
<> 144:ef7eb2e8f9f7 160 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 /** @brief Clear the Under-Drive Ready flag.
<> 144:ef7eb2e8f9f7 165 */
<> 144:ef7eb2e8f9f7 166 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR1 |= PWR_FLAG_UDRDY)
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 /** @brief Check Wake Up flag is set or not.
<> 144:ef7eb2e8f9f7 169 * @param __WUFLAG__: specifies the Wake Up flag to check.
<> 144:ef7eb2e8f9f7 170 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 171 * @arg PWR_WAKEUP_PIN_FLAG1: Wakeup Pin Flag for PA0
<> 144:ef7eb2e8f9f7 172 * @arg PWR_WAKEUP_PIN_FLAG2: Wakeup Pin Flag for PA2
<> 144:ef7eb2e8f9f7 173 * @arg PWR_WAKEUP_PIN_FLAG3: Wakeup Pin Flag for PC1
<> 144:ef7eb2e8f9f7 174 * @arg PWR_WAKEUP_PIN_FLAG4: Wakeup Pin Flag for PC13
<> 144:ef7eb2e8f9f7 175 * @arg PWR_WAKEUP_PIN_FLAG5: Wakeup Pin Flag for PI8
<> 144:ef7eb2e8f9f7 176 * @arg PWR_WAKEUP_PIN_FLAG6: Wakeup Pin Flag for PI11
<> 144:ef7eb2e8f9f7 177 */
<> 144:ef7eb2e8f9f7 178 #define __HAL_PWR_GET_WAKEUP_FLAG(__WUFLAG__) (PWR->CSR2 & (__WUFLAG__))
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /** @brief Clear the WakeUp pins flags.
<> 144:ef7eb2e8f9f7 181 * @param __WUFLAG__: specifies the Wake Up pin flag to clear.
<> 144:ef7eb2e8f9f7 182 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 183 * @arg PWR_WAKEUP_PIN_FLAG1: Wakeup Pin Flag for PA0
<> 144:ef7eb2e8f9f7 184 * @arg PWR_WAKEUP_PIN_FLAG2: Wakeup Pin Flag for PA2
<> 144:ef7eb2e8f9f7 185 * @arg PWR_WAKEUP_PIN_FLAG3: Wakeup Pin Flag for PC1
<> 144:ef7eb2e8f9f7 186 * @arg PWR_WAKEUP_PIN_FLAG4: Wakeup Pin Flag for PC13
<> 144:ef7eb2e8f9f7 187 * @arg PWR_WAKEUP_PIN_FLAG5: Wakeup Pin Flag for PI8
<> 144:ef7eb2e8f9f7 188 * @arg PWR_WAKEUP_PIN_FLAG6: Wakeup Pin Flag for PI11
<> 144:ef7eb2e8f9f7 189 */
<> 144:ef7eb2e8f9f7 190 #define __HAL_PWR_CLEAR_WAKEUP_FLAG(__WUFLAG__) (PWR->CR2 |= (__WUFLAG__))
<> 144:ef7eb2e8f9f7 191 /**
<> 144:ef7eb2e8f9f7 192 * @}
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 195 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
<> 144:ef7eb2e8f9f7 196 * @{
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /** @addtogroup PWREx_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 200 * @{
<> 144:ef7eb2e8f9f7 201 */
<> 144:ef7eb2e8f9f7 202 uint32_t HAL_PWREx_GetVoltageRange(void);
<> 144:ef7eb2e8f9f7 203 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 void HAL_PWREx_EnableFlashPowerDown(void);
<> 144:ef7eb2e8f9f7 206 void HAL_PWREx_DisableFlashPowerDown(void);
<> 144:ef7eb2e8f9f7 207 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
<> 144:ef7eb2e8f9f7 208 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
<> 144:ef7eb2e8f9f7 211 void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
<> 144:ef7eb2e8f9f7 212 void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
<> 144:ef7eb2e8f9f7 213 void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
<> 144:ef7eb2e8f9f7 216 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
<> 144:ef7eb2e8f9f7 217 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 /**
<> 144:ef7eb2e8f9f7 220 * @}
<> 144:ef7eb2e8f9f7 221 */
<> 144:ef7eb2e8f9f7 222
<> 144:ef7eb2e8f9f7 223 /**
<> 144:ef7eb2e8f9f7 224 * @}
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 227 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 228 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 229 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 230 /** @defgroup PWREx_Private_Macros PWREx Private Macros
<> 144:ef7eb2e8f9f7 231 * @{
<> 144:ef7eb2e8f9f7 232 */
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
<> 144:ef7eb2e8f9f7 235 * @{
<> 144:ef7eb2e8f9f7 236 */
<> 144:ef7eb2e8f9f7 237 #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
<> 144:ef7eb2e8f9f7 238 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
<> 144:ef7eb2e8f9f7 239 #define IS_PWR_WAKEUP_PIN(__PIN__) (((__PIN__) == PWR_WAKEUP_PIN1) || \
<> 144:ef7eb2e8f9f7 240 ((__PIN__) == PWR_WAKEUP_PIN2) || \
<> 144:ef7eb2e8f9f7 241 ((__PIN__) == PWR_WAKEUP_PIN3) || \
<> 144:ef7eb2e8f9f7 242 ((__PIN__) == PWR_WAKEUP_PIN4) || \
<> 144:ef7eb2e8f9f7 243 ((__PIN__) == PWR_WAKEUP_PIN5) || \
<> 144:ef7eb2e8f9f7 244 ((__PIN__) == PWR_WAKEUP_PIN6) || \
<> 144:ef7eb2e8f9f7 245 ((__PIN__) == PWR_WAKEUP_PIN1_HIGH) || \
<> 144:ef7eb2e8f9f7 246 ((__PIN__) == PWR_WAKEUP_PIN2_HIGH) || \
<> 144:ef7eb2e8f9f7 247 ((__PIN__) == PWR_WAKEUP_PIN3_HIGH) || \
<> 144:ef7eb2e8f9f7 248 ((__PIN__) == PWR_WAKEUP_PIN4_HIGH) || \
<> 144:ef7eb2e8f9f7 249 ((__PIN__) == PWR_WAKEUP_PIN5_HIGH) || \
<> 144:ef7eb2e8f9f7 250 ((__PIN__) == PWR_WAKEUP_PIN6_HIGH) || \
<> 144:ef7eb2e8f9f7 251 ((__PIN__) == PWR_WAKEUP_PIN1_LOW) || \
<> 144:ef7eb2e8f9f7 252 ((__PIN__) == PWR_WAKEUP_PIN2_LOW) || \
<> 144:ef7eb2e8f9f7 253 ((__PIN__) == PWR_WAKEUP_PIN3_LOW) || \
<> 144:ef7eb2e8f9f7 254 ((__PIN__) == PWR_WAKEUP_PIN4_LOW) || \
<> 144:ef7eb2e8f9f7 255 ((__PIN__) == PWR_WAKEUP_PIN5_LOW) || \
<> 144:ef7eb2e8f9f7 256 ((__PIN__) == PWR_WAKEUP_PIN6_LOW))
<> 144:ef7eb2e8f9f7 257 /**
<> 144:ef7eb2e8f9f7 258 * @}
<> 144:ef7eb2e8f9f7 259 */
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 /**
<> 144:ef7eb2e8f9f7 262 * @}
<> 144:ef7eb2e8f9f7 263 */
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 /**
<> 144:ef7eb2e8f9f7 266 * @}
<> 144:ef7eb2e8f9f7 267 */
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 /**
<> 144:ef7eb2e8f9f7 270 * @}
<> 144:ef7eb2e8f9f7 271 */
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 274 }
<> 144:ef7eb2e8f9f7 275 #endif
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 #endif /* __STM32F7xx_HAL_PWR_EX_H */
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/