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targets/hal/TARGET_NXP/TARGET_LPC82X/pwmout_api.c@81:8b5f63428415, 2016-03-04 (annotated)

Committer:
mbed_official
Date:
Fri Mar 04 11:30:11 2016 +0000
Revision:
81:8b5f63428415
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 1020d7cb91f47e620cbf53b1c96328824512afc4



Full URL: https://github.com/mbedmicro/mbed/commit/1020d7cb91f47e620cbf53b1c96328824512afc4/



[LPC824] Fixed PwmOut SCT Bugs

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "pwmout_api.h"
bogdanm 0:9b334a45a8ff 18 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 19 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 20 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 #if DEVICE_PWMOUT
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 // bit flags for used SCTs
bogdanm 0:9b334a45a8ff 25 static unsigned char sct_used = 0;
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 static int get_available_sct()
bogdanm 0:9b334a45a8ff 28 {
bogdanm 0:9b334a45a8ff 29 int i;
bogdanm 0:9b334a45a8ff 30 for (i = 0; i < 4; i++) {
bogdanm 0:9b334a45a8ff 31 if ((sct_used & (1 << i)) == 0)
bogdanm 0:9b334a45a8ff 32 return i;
bogdanm 0:9b334a45a8ff 33 }
bogdanm 0:9b334a45a8ff 34 return -1;
bogdanm 0:9b334a45a8ff 35 }
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 void pwmout_init(pwmout_t* obj, PinName pin)
bogdanm 0:9b334a45a8ff 38 {
bogdanm 0:9b334a45a8ff 39 MBED_ASSERT(pin != (PinName)NC);
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 int sct_n = get_available_sct();
bogdanm 0:9b334a45a8ff 42 if (sct_n == -1) {
bogdanm 0:9b334a45a8ff 43 error("No available SCT");
bogdanm 0:9b334a45a8ff 44 }
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 sct_used |= (1 << sct_n);
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 obj->pwm = (LPC_SCT_Type*)LPC_SCT;
bogdanm 0:9b334a45a8ff 49 obj->pwm_ch = sct_n;
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 LPC_SCT_Type* pwm = obj->pwm;
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 // Enable the SCT clock
bogdanm 0:9b334a45a8ff 54 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8);
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 // Clear peripheral reset the SCT:
bogdanm 0:9b334a45a8ff 57 LPC_SYSCON->PRESETCTRL |= (1 << 8);
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 switch(sct_n) {
bogdanm 0:9b334a45a8ff 60 case 0:
bogdanm 0:9b334a45a8ff 61 // SCT_OUT0
bogdanm 0:9b334a45a8ff 62 LPC_SWM->PINASSIGN[7] &= ~0xFF000000;
bogdanm 0:9b334a45a8ff 63 LPC_SWM->PINASSIGN[7] |= ((pin >> PIN_SHIFT) << 24);
bogdanm 0:9b334a45a8ff 64 break;
bogdanm 0:9b334a45a8ff 65 case 1:
bogdanm 0:9b334a45a8ff 66 // SCT_OUT1
bogdanm 0:9b334a45a8ff 67 LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
bogdanm 0:9b334a45a8ff 68 LPC_SWM->PINASSIGN[8] |= (pin >> PIN_SHIFT);
bogdanm 0:9b334a45a8ff 69 break;
bogdanm 0:9b334a45a8ff 70 case 2:
bogdanm 0:9b334a45a8ff 71 // SCT2_OUT2
bogdanm 0:9b334a45a8ff 72 LPC_SWM->PINASSIGN[8] &= ~0x0000FF00;
bogdanm 0:9b334a45a8ff 73 LPC_SWM->PINASSIGN[8] |= ((pin >> PIN_SHIFT) << 8);
bogdanm 0:9b334a45a8ff 74 break;
bogdanm 0:9b334a45a8ff 75 case 3:
bogdanm 0:9b334a45a8ff 76 // SCT3_OUT3
bogdanm 0:9b334a45a8ff 77 LPC_SWM->PINASSIGN[8] &= ~0x00FF0000;
bogdanm 0:9b334a45a8ff 78 LPC_SWM->PINASSIGN[8] |= ((pin >> PIN_SHIFT) << 16);
bogdanm 0:9b334a45a8ff 79 break;
bogdanm 0:9b334a45a8ff 80 default:
bogdanm 0:9b334a45a8ff 81 break;
bogdanm 0:9b334a45a8ff 82 }
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 // Unified 32-bit counter, autolimit
bogdanm 0:9b334a45a8ff 85 pwm->CONFIG |= ((0x3 << 17) | 0x01);
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 // halt and clear the counter
bogdanm 0:9b334a45a8ff 88 pwm->CTRL |= (1 << 2) | (1 << 3);
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 // System Clock -> us_ticker (1)MHz
bogdanm 0:9b334a45a8ff 91 pwm->CTRL &= ~(0x7F << 5);
bogdanm 0:9b334a45a8ff 92 pwm->CTRL |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5);
bogdanm 0:9b334a45a8ff 93
mbed_official 81:8b5f63428415 94 // Set event number
bogdanm 0:9b334a45a8ff 95 pwm->OUT[sct_n].SET = (1 << ((sct_n * 2) + 0));
bogdanm 0:9b334a45a8ff 96 pwm->OUT[sct_n].CLR = (1 << ((sct_n * 2) + 1));
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 pwm->EVENT[(sct_n * 2) + 0].CTRL = (1 << 12) | ((sct_n * 2) + 0); // match event
bogdanm 0:9b334a45a8ff 99 pwm->EVENT[(sct_n * 2) + 0].STATE = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 100 pwm->EVENT[(sct_n * 2) + 1].CTRL = (1 << 12) | ((sct_n * 2) + 1);
bogdanm 0:9b334a45a8ff 101 pwm->EVENT[(sct_n * 2) + 1].STATE = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 // default to 20ms: standard for servos, and fine for e.g. brightness control
bogdanm 0:9b334a45a8ff 104 pwmout_period_ms(obj, 20);
bogdanm 0:9b334a45a8ff 105 pwmout_write (obj, 0);
bogdanm 0:9b334a45a8ff 106 }
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 void pwmout_free(pwmout_t* obj)
bogdanm 0:9b334a45a8ff 109 {
bogdanm 0:9b334a45a8ff 110 // Disable the SCT clock
bogdanm 0:9b334a45a8ff 111 LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 8);
bogdanm 0:9b334a45a8ff 112 sct_used &= ~(1 << obj->pwm_ch);
bogdanm 0:9b334a45a8ff 113 }
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 void pwmout_write(pwmout_t* obj, float value)
bogdanm 0:9b334a45a8ff 116 {
bogdanm 0:9b334a45a8ff 117 if (value < 0.0f) {
bogdanm 0:9b334a45a8ff 118 value = 0.0;
bogdanm 0:9b334a45a8ff 119 } else if (value > 1.0f) {
mbed_official 81:8b5f63428415 120 value = 1.0f;
bogdanm 0:9b334a45a8ff 121 }
mbed_official 81:8b5f63428415 122 uint32_t t_on = (uint32_t)((float)(obj->pwm->MATCHREL[obj->pwm_ch * 2] + 1) * value);
mbed_official 81:8b5f63428415 123 if (t_on > 0) { // duty is not 0%
mbed_official 81:8b5f63428415 124 if (value != 1.0f) { // duty is not 100%
mbed_official 81:8b5f63428415 125 obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = t_on - 1;
mbed_official 81:8b5f63428415 126 // unhalt the counter
mbed_official 81:8b5f63428415 127 obj->pwm->CTRL &= ~(1 << 2);
mbed_official 81:8b5f63428415 128 } else { // duty is 100%
mbed_official 81:8b5f63428415 129 // halt and clear the counter
mbed_official 81:8b5f63428415 130 obj->pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 81:8b5f63428415 131 // output level tied to high
mbed_official 81:8b5f63428415 132 obj->pwm->OUTPUT |= (1 << obj->pwm_ch);
mbed_official 81:8b5f63428415 133 }
mbed_official 81:8b5f63428415 134 } else { // duty is 0%
mbed_official 81:8b5f63428415 135 // halt and clear the counter
mbed_official 81:8b5f63428415 136 obj->pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 81:8b5f63428415 137 // output level tied to low
mbed_official 81:8b5f63428415 138 obj->pwm->OUTPUT &= ~(1 << obj->pwm_ch);
mbed_official 81:8b5f63428415 139 }
bogdanm 0:9b334a45a8ff 140 }
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 float pwmout_read(pwmout_t* obj)
bogdanm 0:9b334a45a8ff 143 {
mbed_official 81:8b5f63428415 144 uint32_t t_off = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0] + 1;
mbed_official 81:8b5f63428415 145 uint32_t t_on = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] + 1;
bogdanm 0:9b334a45a8ff 146 float v = (float)t_on/(float)t_off;
bogdanm 0:9b334a45a8ff 147 return (v > 1.0f) ? (1.0f) : (v);
bogdanm 0:9b334a45a8ff 148 }
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 void pwmout_period(pwmout_t* obj, float seconds)
bogdanm 0:9b334a45a8ff 151 {
bogdanm 0:9b334a45a8ff 152 pwmout_period_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 153 }
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 void pwmout_period_ms(pwmout_t* obj, int ms)
bogdanm 0:9b334a45a8ff 156 {
bogdanm 0:9b334a45a8ff 157 pwmout_period_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 158 }
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 // Set the PWM period, keeping the duty cycle the same.
bogdanm 0:9b334a45a8ff 161 void pwmout_period_us(pwmout_t* obj, int us)
bogdanm 0:9b334a45a8ff 162 {
mbed_official 81:8b5f63428415 163 // The period are off by one for MATCHREL, so +1 to get actual value
mbed_official 81:8b5f63428415 164 uint32_t t_off = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0] + 1;
mbed_official 81:8b5f63428415 165 uint32_t t_on = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] + 1;
bogdanm 0:9b334a45a8ff 166 float v = (float)t_on/(float)t_off;
mbed_official 81:8b5f63428415 167 obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0] = (uint32_t)us - 1;
mbed_official 81:8b5f63428415 168 if (us > 0) { // PWM period is not 0
mbed_official 81:8b5f63428415 169 obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = (uint32_t)((float)us * (float)v) - 1;
mbed_official 81:8b5f63428415 170 // unhalt the counter
mbed_official 81:8b5f63428415 171 obj->pwm->CTRL &= ~(1 << 2);
mbed_official 81:8b5f63428415 172 } else { // PWM period is 0
mbed_official 81:8b5f63428415 173 // halt and clear the counter
mbed_official 81:8b5f63428415 174 obj->pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 81:8b5f63428415 175 // output level tied to low
mbed_official 81:8b5f63428415 176 obj->pwm->OUTPUT &= ~(1 << obj->pwm_ch);
mbed_official 81:8b5f63428415 177 }
bogdanm 0:9b334a45a8ff 178 }
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 void pwmout_pulsewidth(pwmout_t* obj, float seconds)
bogdanm 0:9b334a45a8ff 181 {
bogdanm 0:9b334a45a8ff 182 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 183 }
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
bogdanm 0:9b334a45a8ff 186 {
bogdanm 0:9b334a45a8ff 187 pwmout_pulsewidth_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 188 }
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 void pwmout_pulsewidth_us(pwmout_t* obj, int us)
bogdanm 0:9b334a45a8ff 191 {
mbed_official 81:8b5f63428415 192 if (us > 0) { // PWM peried is not 0
mbed_official 81:8b5f63428415 193 obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = (uint32_t)us - 1;
mbed_official 81:8b5f63428415 194 obj->pwm->CTRL &= ~(1 << 2);
mbed_official 81:8b5f63428415 195 } else { //PWM period is 0
mbed_official 81:8b5f63428415 196 // halt and clear the counter
mbed_official 81:8b5f63428415 197 obj->pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 81:8b5f63428415 198 // output level tied to low
mbed_official 81:8b5f63428415 199 obj->pwm->OUTPUT &= ~(1 << obj->pwm_ch);
mbed_official 81:8b5f63428415 200 }
bogdanm 0:9b334a45a8ff 201 }
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 #endif