SAKURA Internet / mbed-dev

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_pcd.h@178:7b4eb50f6890, 2017-11-29 (annotated)

Committer:
misodengaku
Date:
Wed Nov 29 06:30:35 2017 +0000
Revision:
178:7b4eb50f6890
Parent:
151:5eaa88a5bcc7 
sco-evb-01 patch

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_pcd.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 151:5eaa88a5bcc7 5 * @version V1.7.0
<> 151:5eaa88a5bcc7 6 * @date 31-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of PCD HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 41 #ifndef __STM32L0xx_HAL_PCD_H
<> 144:ef7eb2e8f9f7 42 #define __STM32L0xx_HAL_PCD_H
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 45 extern "C" {
<> 144:ef7eb2e8f9f7 46 #endif
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 51 #include "stm32l0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 52 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 53 * @{
<> 144:ef7eb2e8f9f7 54 */
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /** @defgroup PCD PCD
<> 144:ef7eb2e8f9f7 57 * @{
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /** @defgroup PCD_Exported_Types PCD Exported Types
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 /**
<> 144:ef7eb2e8f9f7 66 * @brief PCD State structures definition
<> 144:ef7eb2e8f9f7 67 */
<> 144:ef7eb2e8f9f7 68 typedef enum
<> 144:ef7eb2e8f9f7 69 {
<> 151:5eaa88a5bcc7 70 HAL_PCD_STATE_RESET = 0x00U,
<> 151:5eaa88a5bcc7 71 HAL_PCD_STATE_READY = 0x01U,
<> 151:5eaa88a5bcc7 72 HAL_PCD_STATE_ERROR = 0x02U,
<> 151:5eaa88a5bcc7 73 HAL_PCD_STATE_BUSY = 0x03U,
<> 151:5eaa88a5bcc7 74 HAL_PCD_STATE_TIMEOUT = 0x04U
<> 144:ef7eb2e8f9f7 75 } PCD_StateTypeDef;
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 typedef enum
<> 144:ef7eb2e8f9f7 78 {
<> 144:ef7eb2e8f9f7 79 /* double buffered endpoint direction */
<> 144:ef7eb2e8f9f7 80 PCD_EP_DBUF_OUT,
<> 144:ef7eb2e8f9f7 81 PCD_EP_DBUF_IN,
<> 144:ef7eb2e8f9f7 82 PCD_EP_DBUF_ERR,
<> 144:ef7eb2e8f9f7 83 }PCD_EP_DBUF_DIR;
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 /* endpoint buffer number */
<> 144:ef7eb2e8f9f7 86 typedef enum
<> 144:ef7eb2e8f9f7 87 {
<> 144:ef7eb2e8f9f7 88 PCD_EP_NOBUF,
<> 144:ef7eb2e8f9f7 89 PCD_EP_BUF0,
<> 144:ef7eb2e8f9f7 90 PCD_EP_BUF1
<> 144:ef7eb2e8f9f7 91 }PCD_EP_BUF_NUM;
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 /**
<> 144:ef7eb2e8f9f7 95 * @brief PCD Initialization Structure definition
<> 144:ef7eb2e8f9f7 96 */
<> 144:ef7eb2e8f9f7 97 typedef struct
<> 144:ef7eb2e8f9f7 98 {
<> 144:ef7eb2e8f9f7 99 uint32_t dev_endpoints; /*!< Device Endpoints number.
<> 144:ef7eb2e8f9f7 100 This parameter depends on the used USB core.
<> 144:ef7eb2e8f9f7 101 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 uint32_t speed; /*!< USB Core speed.
<> 144:ef7eb2e8f9f7 104 This parameter can be any value of @ref PCD_Speed */
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
<> 144:ef7eb2e8f9f7 107 This parameter can be any value of @ref PCD_USB_EP0_MPS */
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 uint32_t phy_itface; /*!< Select the used PHY interface.
<> 144:ef7eb2e8f9f7 110 This parameter can be any value of @ref PCD_USB_Core_PHY */
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
<> 144:ef7eb2e8f9f7 113 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 uint32_t low_power_enable; /*!< Enable or disable Low Power mode
<> 144:ef7eb2e8f9f7 116 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 uint32_t lpm_enable; /*!< Enable or disable Link Power Management.
<> 144:ef7eb2e8f9f7 119 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
<> 144:ef7eb2e8f9f7 122 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 }PCD_InitTypeDef;
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 typedef struct
<> 144:ef7eb2e8f9f7 127 {
<> 144:ef7eb2e8f9f7 128 uint8_t num; /*!< Endpoint number
<> 144:ef7eb2e8f9f7 129 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 uint8_t is_in; /*!< Endpoint direction
<> 144:ef7eb2e8f9f7 132 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 uint8_t is_stall; /*!< Endpoint stall condition
<> 144:ef7eb2e8f9f7 135 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 uint8_t type; /*!< Endpoint type
<> 144:ef7eb2e8f9f7 138 This parameter can be any value of @ref PCD_USB_EP_Type */
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 uint16_t pmaadress; /*!< PMA Address
<> 144:ef7eb2e8f9f7 141 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 uint16_t pmaaddr0; /*!< PMA Address0
<> 144:ef7eb2e8f9f7 145 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 uint16_t pmaaddr1; /*!< PMA Address1
<> 144:ef7eb2e8f9f7 149 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 uint8_t doublebuffer; /*!< Double buffer enable
<> 144:ef7eb2e8f9f7 153 This parameter can be 0 or 1 */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 uint32_t maxpacket; /*!< Endpoint Max packet size
<> 144:ef7eb2e8f9f7 156 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 uint32_t xfer_len; /*!< Current transfer length */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 }PCD_EPTypeDef;
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 typedef USB_TypeDef PCD_TypeDef;
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /**
<> 144:ef7eb2e8f9f7 170 * @brief PCD Handle Structure definition
<> 144:ef7eb2e8f9f7 171 */
<> 144:ef7eb2e8f9f7 172 typedef struct
<> 144:ef7eb2e8f9f7 173 {
<> 144:ef7eb2e8f9f7 174 PCD_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 175 PCD_InitTypeDef Init; /*!< PCD required parameters */
<> 144:ef7eb2e8f9f7 176 __IO uint8_t USB_Address; /*!< USB Address */
<> 144:ef7eb2e8f9f7 177 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
<> 144:ef7eb2e8f9f7 178 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
<> 144:ef7eb2e8f9f7 179 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
<> 144:ef7eb2e8f9f7 180 __IO PCD_StateTypeDef State; /*!< PCD communication state */
<> 144:ef7eb2e8f9f7 181 uint32_t Setup[12]; /*!< Setup packet buffer */
<> 144:ef7eb2e8f9f7 182 void *pData; /*!< Pointer to upper stack Handler */
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 } PCD_HandleTypeDef;
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 /**
<> 144:ef7eb2e8f9f7 187 * @}
<> 144:ef7eb2e8f9f7 188 */
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 #include "stm32l0xx_hal_pcd_ex.h"
<> 144:ef7eb2e8f9f7 192 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 193 /** @defgroup PCD_Exported_Constants PCD Exported Constants
<> 144:ef7eb2e8f9f7 194 * @{
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /** @defgroup PCD_EndPoint PCD End Point
<> 144:ef7eb2e8f9f7 198 * @{
<> 144:ef7eb2e8f9f7 199 */
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201
<> 151:5eaa88a5bcc7 202 #define PCD_ENDP0 ((uint8_t)0U)
<> 151:5eaa88a5bcc7 203 #define PCD_ENDP1 ((uint8_t)1U)
<> 151:5eaa88a5bcc7 204 #define PCD_ENDP2 ((uint8_t)2U)
<> 151:5eaa88a5bcc7 205 #define PCD_ENDP3 ((uint8_t)3U)
<> 151:5eaa88a5bcc7 206 #define PCD_ENDP4 ((uint8_t)4U)
<> 151:5eaa88a5bcc7 207 #define PCD_ENDP5 ((uint8_t)5U)
<> 151:5eaa88a5bcc7 208 #define PCD_ENDP6 ((uint8_t)6U)
<> 151:5eaa88a5bcc7 209 #define PCD_ENDP7 ((uint8_t)7U)
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 /* Endpoint Kind */
<> 151:5eaa88a5bcc7 212 #define PCD_SNG_BUF 0U
<> 151:5eaa88a5bcc7 213 #define PCD_DBL_BUF 1U
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 /**
<> 144:ef7eb2e8f9f7 218 * @}
<> 144:ef7eb2e8f9f7 219 */
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /** @defgroup PCD_Speed PCD Speed
<> 144:ef7eb2e8f9f7 223 * @{
<> 144:ef7eb2e8f9f7 224 */
<> 151:5eaa88a5bcc7 225 #define PCD_SPEED_HIGH 0U /* Not Supported */
<> 151:5eaa88a5bcc7 226 #define PCD_SPEED_FULL 2U
<> 144:ef7eb2e8f9f7 227 /**
<> 144:ef7eb2e8f9f7 228 * @}
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 /** @defgroup PCD_USB_Core_PHY PCD USB Core PHY
<> 144:ef7eb2e8f9f7 232 * @{
<> 144:ef7eb2e8f9f7 233 */
<> 151:5eaa88a5bcc7 234 #define PCD_PHY_EMBEDDED 2U
<> 144:ef7eb2e8f9f7 235 /**
<> 144:ef7eb2e8f9f7 236 * @}
<> 144:ef7eb2e8f9f7 237 */
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /** @defgroup PCD_USB_EP0_MPS PCD USB EP0 MPS
<> 144:ef7eb2e8f9f7 240 * @{
<> 144:ef7eb2e8f9f7 241 */
<> 151:5eaa88a5bcc7 242 #define DEP0CTL_MPS_64 0U
<> 151:5eaa88a5bcc7 243 #define DEP0CTL_MPS_32 1U
<> 151:5eaa88a5bcc7 244 #define DEP0CTL_MPS_16 2U
<> 151:5eaa88a5bcc7 245 #define DEP0CTL_MPS_8 3U
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 #define PCD_EP0MPS_64 DEP0CTL_MPS_64
<> 144:ef7eb2e8f9f7 248 #define PCD_EP0MPS_32 DEP0CTL_MPS_32
<> 144:ef7eb2e8f9f7 249 #define PCD_EP0MPS_16 DEP0CTL_MPS_16
<> 144:ef7eb2e8f9f7 250 #define PCD_EP0MPS_08 DEP0CTL_MPS_8
<> 144:ef7eb2e8f9f7 251 /**
<> 144:ef7eb2e8f9f7 252 * @}
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /** @defgroup PCD_USB_EP_Type PCD USB EP Type
<> 144:ef7eb2e8f9f7 256 * @{
<> 144:ef7eb2e8f9f7 257 */
<> 151:5eaa88a5bcc7 258 #define PCD_EP_TYPE_CTRL 0U
<> 151:5eaa88a5bcc7 259 #define PCD_EP_TYPE_ISOC 1U
<> 151:5eaa88a5bcc7 260 #define PCD_EP_TYPE_BULK 2U
<> 151:5eaa88a5bcc7 261 #define PCD_EP_TYPE_INTR 3U
<> 144:ef7eb2e8f9f7 262 /**
<> 144:ef7eb2e8f9f7 263 * @}
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 /** @defgroup PCD_Interrupt_Clock PCD Interrupt
<> 144:ef7eb2e8f9f7 270 * @brief macros to handle interrupts and specific clock configurations
<> 144:ef7eb2e8f9f7 271 * @{
<> 144:ef7eb2e8f9f7 272 */
<> 144:ef7eb2e8f9f7 273 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 274 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t) ~(__INTERRUPT__))
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 #define USB_WAKEUP_EXTI_LINE (EXTI_IMR_IM18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
<> 144:ef7eb2e8f9f7 279 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 280 #define __HAL_USB_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 /* Internal macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /* SetENDPOINT */
<> 151:5eaa88a5bcc7 285 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&USBx->EP0R + bEpNum * 2U)= (uint16_t)wRegValue)
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 /* GetENDPOINT */
<> 151:5eaa88a5bcc7 288 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&USBx->EP0R + bEpNum * 2U))
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 /**
<> 144:ef7eb2e8f9f7 293 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
<> 144:ef7eb2e8f9f7 294 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 295 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 296 * @param wType: Endpoint Type.
<> 144:ef7eb2e8f9f7 297 * @retval None
<> 144:ef7eb2e8f9f7 298 */
<> 144:ef7eb2e8f9f7 299 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT(USBx, bEpNum,\
<> 144:ef7eb2e8f9f7 300 ((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_MASK) | wType )))
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 /**
<> 144:ef7eb2e8f9f7 303 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
<> 144:ef7eb2e8f9f7 304 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 305 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 306 * @retval Endpoint Type
<> 144:ef7eb2e8f9f7 307 */
<> 144:ef7eb2e8f9f7 308 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_FIELD)
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 /**
<> 144:ef7eb2e8f9f7 312 * @brief free buffer used from the application realizing it to the line
<> 144:ef7eb2e8f9f7 313 * toggles bit SW_BUF in the double buffered endpoint register
<> 144:ef7eb2e8f9f7 314 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 315 * @param bEpNum, bDir
<> 144:ef7eb2e8f9f7 316 * @retval None
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
<> 144:ef7eb2e8f9f7 319 do {\
<> 144:ef7eb2e8f9f7 320 if (bDir == PCD_EP_DBUF_OUT)\
<> 144:ef7eb2e8f9f7 321 { /* OUT double buffered endpoint */\
<> 144:ef7eb2e8f9f7 322 PCD_TX_DTOG(USBx, bEpNum);\
<> 144:ef7eb2e8f9f7 323 }\
<> 144:ef7eb2e8f9f7 324 else if (bDir == PCD_EP_DBUF_IN)\
<> 144:ef7eb2e8f9f7 325 { /* IN double buffered endpoint */\
<> 144:ef7eb2e8f9f7 326 PCD_RX_DTOG(USBx, bEpNum);\
<> 144:ef7eb2e8f9f7 327 }\
<> 144:ef7eb2e8f9f7 328 } while(0)
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /**
<> 144:ef7eb2e8f9f7 331 * @brief gets direction of the double buffered endpoint
<> 144:ef7eb2e8f9f7 332 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 333 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 334 * @retval EP_DBUF_OUT, EP_DBUF_IN,
<> 144:ef7eb2e8f9f7 335 * EP_DBUF_ERR if the endpoint counter not yet programmed.
<> 144:ef7eb2e8f9f7 336 */
<> 144:ef7eb2e8f9f7 337 #define PCD_GET_DB_DIR(USBx, bEpNum)\
<> 144:ef7eb2e8f9f7 338 do {\
<> 151:5eaa88a5bcc7 339 if ((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum) & 0xFC00U) != 0U)\
<> 144:ef7eb2e8f9f7 340 return(PCD_EP_DBUF_OUT);\
<> 151:5eaa88a5bcc7 341 else if (((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x03FFU) != 0U)\
<> 144:ef7eb2e8f9f7 342 return(PCD_EP_DBUF_IN);\
<> 144:ef7eb2e8f9f7 343 else\
<> 144:ef7eb2e8f9f7 344 return(PCD_EP_DBUF_ERR);\
<> 144:ef7eb2e8f9f7 345 } while(0)
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 /**
<> 144:ef7eb2e8f9f7 348 * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
<> 144:ef7eb2e8f9f7 349 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 350 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 351 * @param wState: new state
<> 144:ef7eb2e8f9f7 352 * @retval None
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do {\
<> 144:ef7eb2e8f9f7 355 register uint16_t _wRegVal; \
<> 144:ef7eb2e8f9f7 356 \
<> 144:ef7eb2e8f9f7 357 _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_DTOGMASK;\
<> 144:ef7eb2e8f9f7 358 /* toggle first bit ? */ \
<> 151:5eaa88a5bcc7 359 if((USB_EPTX_DTOG1 & wState)!= 0U) \
<> 144:ef7eb2e8f9f7 360 _wRegVal ^= USB_EPTX_DTOG1; \
<> 144:ef7eb2e8f9f7 361 /* toggle second bit ? */ \
<> 151:5eaa88a5bcc7 362 if((USB_EPTX_DTOG2 & wState)!= 0U) \
<> 144:ef7eb2e8f9f7 363 _wRegVal ^= USB_EPTX_DTOG2; \
<> 144:ef7eb2e8f9f7 364 PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
<> 144:ef7eb2e8f9f7 365 } while(0) /* PCD_SET_EP_TX_STATUS */
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 /**
<> 144:ef7eb2e8f9f7 368 * @brief sets the status for rx transfer (bits STAT_TX[1:0])
<> 144:ef7eb2e8f9f7 369 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 370 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 371 * @param wState: new state
<> 144:ef7eb2e8f9f7 372 * @retval None
<> 144:ef7eb2e8f9f7 373 */
<> 144:ef7eb2e8f9f7 374 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do {\
<> 144:ef7eb2e8f9f7 375 register uint16_t _wRegVal; \
<> 144:ef7eb2e8f9f7 376 \
<> 144:ef7eb2e8f9f7 377 _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_DTOGMASK;\
<> 144:ef7eb2e8f9f7 378 /* toggle first bit ? */ \
<> 151:5eaa88a5bcc7 379 if((USB_EPRX_DTOG1 & wState)!= 0U) \
<> 144:ef7eb2e8f9f7 380 _wRegVal ^= USB_EPRX_DTOG1; \
<> 144:ef7eb2e8f9f7 381 /* toggle second bit ? */ \
<> 151:5eaa88a5bcc7 382 if((USB_EPRX_DTOG2 & wState)!= 0U) \
<> 144:ef7eb2e8f9f7 383 _wRegVal ^= USB_EPRX_DTOG2; \
<> 144:ef7eb2e8f9f7 384 PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
<> 144:ef7eb2e8f9f7 385 } while(0) /* PCD_SET_EP_RX_STATUS */
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 /**
<> 144:ef7eb2e8f9f7 388 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
<> 144:ef7eb2e8f9f7 389 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 390 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 391 * @param wStaterx: new state.
<> 144:ef7eb2e8f9f7 392 * @param wStatetx: new state.
<> 144:ef7eb2e8f9f7 393 * @retval None
<> 144:ef7eb2e8f9f7 394 */
<> 144:ef7eb2e8f9f7 395 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) do {\
<> 144:ef7eb2e8f9f7 396 register uint32_t _wRegVal; \
<> 144:ef7eb2e8f9f7 397 \
<> 144:ef7eb2e8f9f7 398 _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
<> 144:ef7eb2e8f9f7 399 /* toggle first bit ? */ \
<> 151:5eaa88a5bcc7 400 if((USB_EPRX_DTOG1 & wStaterx)!= 0U) \
<> 144:ef7eb2e8f9f7 401 _wRegVal ^= USB_EPRX_DTOG1; \
<> 144:ef7eb2e8f9f7 402 /* toggle second bit ? */ \
<> 151:5eaa88a5bcc7 403 if((USB_EPRX_DTOG2 & wStaterx)!= 0U) \
<> 144:ef7eb2e8f9f7 404 _wRegVal ^= USB_EPRX_DTOG2; \
<> 144:ef7eb2e8f9f7 405 /* toggle first bit ? */ \
<> 151:5eaa88a5bcc7 406 if((USB_EPTX_DTOG1 & wStatetx)!= 0U) \
<> 144:ef7eb2e8f9f7 407 _wRegVal ^= USB_EPTX_DTOG1; \
<> 144:ef7eb2e8f9f7 408 /* toggle second bit ? */ \
<> 151:5eaa88a5bcc7 409 if((USB_EPTX_DTOG2 & wStatetx)!= 0U) \
<> 144:ef7eb2e8f9f7 410 _wRegVal ^= USB_EPTX_DTOG2; \
<> 144:ef7eb2e8f9f7 411 PCD_SET_ENDPOINT(USBx, bEpNum, _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
<> 144:ef7eb2e8f9f7 412 } while(0) /* PCD_SET_EP_TXRX_STATUS */
<> 144:ef7eb2e8f9f7 413
<> 144:ef7eb2e8f9f7 414 /**
<> 144:ef7eb2e8f9f7 415 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
<> 144:ef7eb2e8f9f7 416 * /STAT_RX[1:0])
<> 144:ef7eb2e8f9f7 417 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 418 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 419 * @retval status
<> 144:ef7eb2e8f9f7 420 */
<> 144:ef7eb2e8f9f7 421 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_STAT)
<> 144:ef7eb2e8f9f7 422
<> 144:ef7eb2e8f9f7 423 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_STAT)
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 /**
<> 144:ef7eb2e8f9f7 426 * @brief sets directly the VALID tx/rx-status into the endpoint register
<> 144:ef7eb2e8f9f7 427 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 428 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 429 * @retval None
<> 144:ef7eb2e8f9f7 430 */
<> 144:ef7eb2e8f9f7 431 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS(USBx, bEpNum, USB_EP_TX_VALID))
<> 144:ef7eb2e8f9f7 432
<> 144:ef7eb2e8f9f7 433 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS(USBx, bEpNum, USB_EP_RX_VALID))
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 /**
<> 144:ef7eb2e8f9f7 436 * @brief checks stall condition in an endpoint.
<> 144:ef7eb2e8f9f7 437 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 438 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 439 * @retval TRUE = endpoint in stall condition.
<> 144:ef7eb2e8f9f7 440 */
<> 144:ef7eb2e8f9f7 441 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS(USBx, bEpNum) \
<> 144:ef7eb2e8f9f7 442 == USB_EP_TX_STALL)
<> 144:ef7eb2e8f9f7 443 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS(USBx, bEpNum) \
<> 144:ef7eb2e8f9f7 444 == USB_EP_RX_STALL)
<> 144:ef7eb2e8f9f7 445
<> 144:ef7eb2e8f9f7 446 /**
<> 144:ef7eb2e8f9f7 447 * @brief set & clear EP_KIND bit.
<> 144:ef7eb2e8f9f7 448 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 449 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 450 * @retval None
<> 144:ef7eb2e8f9f7 451 */
<> 144:ef7eb2e8f9f7 452 #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum, \
<> 144:ef7eb2e8f9f7 453 (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT(USBx, bEpNum) | USB_EP_KIND) & USB_EPREG_MASK))))
<> 144:ef7eb2e8f9f7 454 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum, \
<> 144:ef7eb2e8f9f7 455 (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPKIND_MASK))))
<> 144:ef7eb2e8f9f7 456
<> 144:ef7eb2e8f9f7 457 /**
<> 144:ef7eb2e8f9f7 458 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
<> 144:ef7eb2e8f9f7 459 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 460 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 461 * @retval None
<> 144:ef7eb2e8f9f7 462 */
<> 144:ef7eb2e8f9f7 463 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND(USBx, bEpNum)
<> 144:ef7eb2e8f9f7 464 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND(USBx, bEpNum)
<> 144:ef7eb2e8f9f7 465
<> 144:ef7eb2e8f9f7 466 /**
<> 144:ef7eb2e8f9f7 467 * @brief Sets/clears directly EP_KIND bit in the endpoint register.
<> 144:ef7eb2e8f9f7 468 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 469 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 470 * @retval None
<> 144:ef7eb2e8f9f7 471 */
<> 144:ef7eb2e8f9f7 472 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND(USBx, bEpNum)
<> 144:ef7eb2e8f9f7 473 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND(USBx, bEpNum)
<> 144:ef7eb2e8f9f7 474
<> 144:ef7eb2e8f9f7 475 /**
<> 144:ef7eb2e8f9f7 476 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
<> 144:ef7eb2e8f9f7 477 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 478 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 479 * @retval None
<> 144:ef7eb2e8f9f7 480 */
<> 144:ef7eb2e8f9f7 481 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum,\
<> 151:5eaa88a5bcc7 482 PCD_GET_ENDPOINT(USBx, bEpNum) & 0x7FFFU & USB_EPREG_MASK))
<> 144:ef7eb2e8f9f7 483 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum,\
<> 151:5eaa88a5bcc7 484 PCD_GET_ENDPOINT(USBx, bEpNum) & 0xFF7FU & USB_EPREG_MASK))
<> 144:ef7eb2e8f9f7 485
<> 144:ef7eb2e8f9f7 486 /**
<> 144:ef7eb2e8f9f7 487 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
<> 144:ef7eb2e8f9f7 488 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 489 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 490 * @retval None
<> 144:ef7eb2e8f9f7 491 */
<> 144:ef7eb2e8f9f7 492 #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum, \
<> 144:ef7eb2e8f9f7 493 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK)))
<> 144:ef7eb2e8f9f7 494 #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum, \
<> 144:ef7eb2e8f9f7 495 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK)))
<> 144:ef7eb2e8f9f7 496
<> 144:ef7eb2e8f9f7 497 /**
<> 144:ef7eb2e8f9f7 498 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
<> 144:ef7eb2e8f9f7 499 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 500 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 501 * @retval None
<> 144:ef7eb2e8f9f7 502 */
<> 144:ef7eb2e8f9f7 503 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_RX) != 0)\
<> 144:ef7eb2e8f9f7 504 PCD_RX_DTOG(USBx, bEpNum)
<> 144:ef7eb2e8f9f7 505 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_TX) != 0)\
<> 144:ef7eb2e8f9f7 506 PCD_TX_DTOG(USBx, bEpNum)
<> 144:ef7eb2e8f9f7 507
<> 144:ef7eb2e8f9f7 508 /**
<> 144:ef7eb2e8f9f7 509 * @brief Sets address in an endpoint register.
<> 144:ef7eb2e8f9f7 510 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 511 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 512 * @param bAddr: Address.
<> 144:ef7eb2e8f9f7 513 * @retval None
<> 144:ef7eb2e8f9f7 514 */
<> 144:ef7eb2e8f9f7 515 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT(USBx, bEpNum,\
<> 144:ef7eb2e8f9f7 516 USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK) | bAddr)
<> 144:ef7eb2e8f9f7 517
<> 144:ef7eb2e8f9f7 518 /**
<> 144:ef7eb2e8f9f7 519 * @brief Gets address in an endpoint register.
<> 144:ef7eb2e8f9f7 520 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 521 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 522 * @retval None
<> 144:ef7eb2e8f9f7 523 */
<> 144:ef7eb2e8f9f7 524 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPADDR_FIELD))
<> 151:5eaa88a5bcc7 525 #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U)+ ((uint32_t)USBx + 0x400U)))
<> 151:5eaa88a5bcc7 526 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+2U)+ ((uint32_t)USBx + 0x400U)))
<> 151:5eaa88a5bcc7 527 #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+4U)+ ((uint32_t)USBx + 0x400U)))
<> 151:5eaa88a5bcc7 528 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+6U)+ ((uint32_t)USBx + 0x400U)))
<> 144:ef7eb2e8f9f7 529
<> 144:ef7eb2e8f9f7 530 /**
<> 144:ef7eb2e8f9f7 531 * @brief sets address of the tx/rx buffer.
<> 144:ef7eb2e8f9f7 532 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 533 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 534 * @param wAddr: address to be set (must be word aligned).
<> 144:ef7eb2e8f9f7 535 * @retval None
<> 144:ef7eb2e8f9f7 536 */
<> 151:5eaa88a5bcc7 537 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1U) << 1U))
<> 151:5eaa88a5bcc7 538 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1U) << 1U))
<> 144:ef7eb2e8f9f7 539
<> 144:ef7eb2e8f9f7 540 /**
<> 144:ef7eb2e8f9f7 541 * @brief Gets address of the tx/rx buffer.
<> 144:ef7eb2e8f9f7 542 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 543 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 544 * @retval address of the buffer.
<> 144:ef7eb2e8f9f7 545 */
<> 144:ef7eb2e8f9f7 546 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS(USBx, bEpNum))
<> 144:ef7eb2e8f9f7 547 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS(USBx, bEpNum))
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 /**
<> 144:ef7eb2e8f9f7 550 * @brief Sets counter of rx buffer with no. of blocks.
<> 144:ef7eb2e8f9f7 551 * @param dwReg: Register.
<> 144:ef7eb2e8f9f7 552 * @param wCount: Counter.
<> 144:ef7eb2e8f9f7 553 * @param wNBlocks: Nb of block
<> 144:ef7eb2e8f9f7 554 * @retval None
<> 144:ef7eb2e8f9f7 555 */
<> 144:ef7eb2e8f9f7 556 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) do {\
<> 144:ef7eb2e8f9f7 557 wNBlocks = wCount >> 5;\
<> 144:ef7eb2e8f9f7 558 if((wCount & 0x1f) == 0)\
<> 144:ef7eb2e8f9f7 559 wNBlocks--;\
<> 151:5eaa88a5bcc7 560 *pdwReg = (uint16_t)((wNBlocks << 10U) | 0x8000U);\
<> 144:ef7eb2e8f9f7 561 } while(0) /* PCD_CALC_BLK32 */
<> 144:ef7eb2e8f9f7 562
<> 144:ef7eb2e8f9f7 563 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) do {\
<> 144:ef7eb2e8f9f7 564 wNBlocks = wCount >> 1;\
<> 144:ef7eb2e8f9f7 565 if((wCount & 0x1) != 0)\
<> 144:ef7eb2e8f9f7 566 wNBlocks++;\
<> 151:5eaa88a5bcc7 567 *pdwReg = (uint16_t)(wNBlocks << 10U);\
<> 144:ef7eb2e8f9f7 568 } while(0) /* PCD_CALC_BLK2 */
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) do {\
<> 144:ef7eb2e8f9f7 571 uint16_t wNBlocks;\
<> 144:ef7eb2e8f9f7 572 if(wCount > 62){PCD_CALC_BLK32(dwReg,wCount,wNBlocks);}\
<> 144:ef7eb2e8f9f7 573 else {PCD_CALC_BLK2(dwReg,wCount,wNBlocks);}\
<> 144:ef7eb2e8f9f7 574 } while(0) /* PCD_SET_EP_CNT_RX_REG */
<> 144:ef7eb2e8f9f7 575
<> 144:ef7eb2e8f9f7 576 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) do {\
<> 144:ef7eb2e8f9f7 577 uint16_t *pdwReg = PCD_EP_TX_CNT(USBx, bEpNum); \
<> 144:ef7eb2e8f9f7 578 PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
<> 144:ef7eb2e8f9f7 579 } while(0)
<> 144:ef7eb2e8f9f7 580 /**
<> 144:ef7eb2e8f9f7 581 * @brief sets counter for the tx/rx buffer.
<> 144:ef7eb2e8f9f7 582 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 583 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 584 * @param wCount: Counter value.
<> 144:ef7eb2e8f9f7 585 * @retval None
<> 144:ef7eb2e8f9f7 586 */
<> 144:ef7eb2e8f9f7 587 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT(USBx, bEpNum) = wCount)
<> 144:ef7eb2e8f9f7 588 #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) do {\
<> 144:ef7eb2e8f9f7 589 uint16_t *pdwReg = PCD_EP_RX_CNT(USBx, bEpNum); \
<> 144:ef7eb2e8f9f7 590 PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
<> 144:ef7eb2e8f9f7 591 } while(0)
<> 144:ef7eb2e8f9f7 592
<> 144:ef7eb2e8f9f7 593 /**
<> 144:ef7eb2e8f9f7 594 * @brief gets counter of the tx buffer.
<> 144:ef7eb2e8f9f7 595 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 596 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 597 * @retval Counter value
<> 144:ef7eb2e8f9f7 598 */
<> 151:5eaa88a5bcc7 599 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x3ffU)
<> 151:5eaa88a5bcc7 600 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum)) & 0x3ffU)
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 /**
<> 144:ef7eb2e8f9f7 603 * @brief Sets buffer 0/1 address in a double buffer endpoint.
<> 144:ef7eb2e8f9f7 604 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 605 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 606 * @param wBuf0Addr: buffer 0 address.
<> 144:ef7eb2e8f9f7 607 * @retval Counter value
<> 144:ef7eb2e8f9f7 608 */
<> 144:ef7eb2e8f9f7 609 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wBuf0Addr);}
<> 144:ef7eb2e8f9f7 610 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wBuf1Addr);}
<> 144:ef7eb2e8f9f7 611
<> 144:ef7eb2e8f9f7 612 /**
<> 144:ef7eb2e8f9f7 613 * @brief Sets addresses in a double buffer endpoint.
<> 144:ef7eb2e8f9f7 614 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 615 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 616 * @param wBuf0Addr: buffer 0 address.
<> 144:ef7eb2e8f9f7 617 * @param wBuf1Addr = buffer 1 address.
<> 144:ef7eb2e8f9f7 618 * @retval None
<> 144:ef7eb2e8f9f7 619 */
<> 144:ef7eb2e8f9f7 620 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
<> 144:ef7eb2e8f9f7 621 PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr);\
<> 144:ef7eb2e8f9f7 622 PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr);\
<> 144:ef7eb2e8f9f7 623 } /* PCD_SET_EP_DBUF_ADDR */
<> 144:ef7eb2e8f9f7 624
<> 144:ef7eb2e8f9f7 625 /**
<> 144:ef7eb2e8f9f7 626 * @brief Gets buffer 0/1 address of a double buffer endpoint.
<> 144:ef7eb2e8f9f7 627 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 628 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 629 * @retval None
<> 144:ef7eb2e8f9f7 630 */
<> 144:ef7eb2e8f9f7 631 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS(USBx, bEpNum))
<> 144:ef7eb2e8f9f7 632 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS(USBx, bEpNum))
<> 144:ef7eb2e8f9f7 633
<> 144:ef7eb2e8f9f7 634 /**
<> 144:ef7eb2e8f9f7 635 * @brief Gets buffer 0/1 address of a double buffer endpoint.
<> 144:ef7eb2e8f9f7 636 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 637 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 638 * @param bDir: endpoint dir EP_DBUF_OUT = OUT and EP_DBUF_IN = IN
<> 144:ef7eb2e8f9f7 639 * @param wCount: Counter value
<> 144:ef7eb2e8f9f7 640 * @retval None
<> 144:ef7eb2e8f9f7 641 */
<> 144:ef7eb2e8f9f7 642 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
<> 144:ef7eb2e8f9f7 643 if(bDir == PCD_EP_DBUF_OUT)\
<> 144:ef7eb2e8f9f7 644 /* OUT endpoint */ \
<> 144:ef7eb2e8f9f7 645 {PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount);} \
<> 144:ef7eb2e8f9f7 646 else if(bDir == PCD_EP_DBUF_IN)\
<> 144:ef7eb2e8f9f7 647 /* IN endpoint */ \
<> 144:ef7eb2e8f9f7 648 *PCD_EP_TX_CNT(USBx, bEpNum) = (uint32_t)wCount; \
<> 144:ef7eb2e8f9f7 649 } /* SetEPDblBuf0Count*/
<> 144:ef7eb2e8f9f7 650
<> 144:ef7eb2e8f9f7 651 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
<> 144:ef7eb2e8f9f7 652 if(bDir == PCD_EP_DBUF_OUT)\
<> 144:ef7eb2e8f9f7 653 /* OUT endpoint */ \
<> 144:ef7eb2e8f9f7 654 {PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount);}\
<> 144:ef7eb2e8f9f7 655 else if(bDir == PCD_EP_DBUF_IN)\
<> 144:ef7eb2e8f9f7 656 /* IN endpoint */\
<> 144:ef7eb2e8f9f7 657 *PCD_EP_RX_CNT(USBx, bEpNum) = (uint32_t)wCount; \
<> 144:ef7eb2e8f9f7 658 } /* SetEPDblBuf1Count */
<> 144:ef7eb2e8f9f7 659
<> 144:ef7eb2e8f9f7 660 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do {\
<> 144:ef7eb2e8f9f7 661 PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount); \
<> 144:ef7eb2e8f9f7 662 PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount); \
<> 144:ef7eb2e8f9f7 663 } while(0) /* PCD_SET_EP_DBUF_CNT */
<> 144:ef7eb2e8f9f7 664
<> 144:ef7eb2e8f9f7 665 /**
<> 144:ef7eb2e8f9f7 666 * @brief Gets buffer 0/1 rx/tx counter for double buffering.
<> 144:ef7eb2e8f9f7 667 * @param USBx: USB device.
<> 144:ef7eb2e8f9f7 668 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 669 * @retval None
<> 144:ef7eb2e8f9f7 670 */
<> 144:ef7eb2e8f9f7 671 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT(USBx, bEpNum))
<> 144:ef7eb2e8f9f7 672 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT(USBx, bEpNum))
<> 144:ef7eb2e8f9f7 673
<> 144:ef7eb2e8f9f7 674 /**
<> 144:ef7eb2e8f9f7 675 * @}
<> 144:ef7eb2e8f9f7 676 */
<> 144:ef7eb2e8f9f7 677
<> 144:ef7eb2e8f9f7 678 /**
<> 144:ef7eb2e8f9f7 679 * @}
<> 144:ef7eb2e8f9f7 680 */
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 683 /** @defgroup PCD_Exported_Functions PCD Exported Functions
<> 144:ef7eb2e8f9f7 684 * @{
<> 144:ef7eb2e8f9f7 685 */
<> 144:ef7eb2e8f9f7 686
<> 144:ef7eb2e8f9f7 687 /** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 688 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 689 * @{
<> 144:ef7eb2e8f9f7 690 */
<> 144:ef7eb2e8f9f7 691 /* Initialization/de-initialization functions **********************************/
<> 144:ef7eb2e8f9f7 692 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 693 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 694 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 695 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 696 /**
<> 144:ef7eb2e8f9f7 697 * @}
<> 144:ef7eb2e8f9f7 698 */
<> 144:ef7eb2e8f9f7 699 /** @defgroup PCD_Exported_Functions_Group2 IO Data transfers functions
<> 144:ef7eb2e8f9f7 700 * @brief Data transfers functions
<> 144:ef7eb2e8f9f7 701 * @{
<> 144:ef7eb2e8f9f7 702 */
<> 144:ef7eb2e8f9f7 703
<> 144:ef7eb2e8f9f7 704 /* I/O operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 705 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 706 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 707 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 708 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 709
<> 144:ef7eb2e8f9f7 710 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 711 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 712 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 713 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 714 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 715 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 716 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 717 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 718 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 719 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 720 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 721 /**
<> 144:ef7eb2e8f9f7 722 * @}
<> 144:ef7eb2e8f9f7 723 */
<> 144:ef7eb2e8f9f7 724
<> 144:ef7eb2e8f9f7 725 /** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 726 * @brief management functions
<> 144:ef7eb2e8f9f7 727 * @{
<> 144:ef7eb2e8f9f7 728 */
<> 144:ef7eb2e8f9f7 729 /* Peripheral Control functions ************************************************/
<> 144:ef7eb2e8f9f7 730 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 731 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 732 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
<> 144:ef7eb2e8f9f7 733 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
<> 144:ef7eb2e8f9f7 734 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 735 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 736 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 737 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 738 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 739 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 740 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 741 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 742 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 743 void PCD_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
<> 144:ef7eb2e8f9f7 744 void PCD_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
<> 144:ef7eb2e8f9f7 745 /**
<> 144:ef7eb2e8f9f7 746 * @}
<> 144:ef7eb2e8f9f7 747 */
<> 144:ef7eb2e8f9f7 748 /** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 749 * @brief Peripheral State functions
<> 144:ef7eb2e8f9f7 750 * @{
<> 144:ef7eb2e8f9f7 751 */
<> 144:ef7eb2e8f9f7 752
<> 144:ef7eb2e8f9f7 753 /* Peripheral State functions **************************************************/
<> 144:ef7eb2e8f9f7 754 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 755
<> 144:ef7eb2e8f9f7 756 /**
<> 144:ef7eb2e8f9f7 757 * @}
<> 144:ef7eb2e8f9f7 758 */
<> 144:ef7eb2e8f9f7 759
<> 144:ef7eb2e8f9f7 760 /**
<> 144:ef7eb2e8f9f7 761 * @}
<> 144:ef7eb2e8f9f7 762 */
<> 144:ef7eb2e8f9f7 763
<> 144:ef7eb2e8f9f7 764 /* Define the private group ***********************************/
<> 144:ef7eb2e8f9f7 765 /**************************************************************/
<> 144:ef7eb2e8f9f7 766 /** @defgroup PCD_Private PCD Private
<> 144:ef7eb2e8f9f7 767 * @{
<> 144:ef7eb2e8f9f7 768 */
<> 144:ef7eb2e8f9f7 769 /**
<> 144:ef7eb2e8f9f7 770 * @}
<> 144:ef7eb2e8f9f7 771 */
<> 144:ef7eb2e8f9f7 772 /**************************************************************/
<> 144:ef7eb2e8f9f7 773
<> 144:ef7eb2e8f9f7 774 /**
<> 144:ef7eb2e8f9f7 775 * @}
<> 144:ef7eb2e8f9f7 776 */
<> 144:ef7eb2e8f9f7 777
<> 144:ef7eb2e8f9f7 778 /**
<> 144:ef7eb2e8f9f7 779 * @}
<> 144:ef7eb2e8f9f7 780 */
<> 144:ef7eb2e8f9f7 781
<> 144:ef7eb2e8f9f7 782 #endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
<> 144:ef7eb2e8f9f7 783
<> 144:ef7eb2e8f9f7 784 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 785 }
<> 144:ef7eb2e8f9f7 786 #endif
<> 144:ef7eb2e8f9f7 787
<> 144:ef7eb2e8f9f7 788
<> 144:ef7eb2e8f9f7 789 #endif /* __STM32L0xx_HAL_PCD_H */
<> 144:ef7eb2e8f9f7 790
<> 144:ef7eb2e8f9f7 791 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 792