bh1726.h

00001 /*   Copyright 2016 Rohm Semiconductor
00002 
00003    Licensed under the Apache License, Version 2.0 (the "License");
00004    you may not use this file except in compliance with the License.
00005    You may obtain a copy of the License at
00006 
00007        http://www.apache.org/licenses/LICENSE-2.0
00008 
00009    Unless required by applicable law or agreed to in writing, software
00010    distributed under the License is distributed on an "AS IS" BASIS,
00011    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00012    See the License for the specific language governing permissions and
00013    limitations under the License.
00014 */
00015 #ifndef BH1726_H
00016 #define BH1726_H
00017 
00018 /* registers */
00019 #define BH1726_REGISTER_DUMP_START 0x80
00020 #define BH1726_CONTROL 0x80
00021 // ADC Light integration time. Cycle = 256-itime; integration time= cycle x 2.7ms; measurement time = 2ms + integration time
00022 #define BH1726_TIMING 0x81
00023 #define BH1726_INTERRUPT 0x82
00024 #define BH1726_TH_LOW_LSBS 0x83
00025 #define BH1726_TH_LOW_MSBS 0x84
00026 #define BH1726_TH_UP_LSBS 0x85
00027 #define BH1726_TH_UP_MSBS 0x86
00028 #define BH1726_GAIN 0x87
00029 #define BH1726_ID 0x92
00030 #define BH1726_DATA0_LSBS 0x94
00031 #define BH1726_DATA0_MSBS 0x95
00032 #define BH1726_DATA1_LSBS 0x96
00033 #define BH1726_DATA1_MSBS 0x97
00034 #define BH1726_WAIT 0x98
00035 // special command, no data
00036 #define BH1726_INTERRUPT_OUTPUT_RESET 0xE1
00037 // special command, no data
00038 #define BH1726_SOFTWARE_RESET 0xE4
00039 #define BH1726_REGISTER_DUMP_END 0x98
00040 /* registers bits */
00041 #define BH1726_CONTROL_ADC_INTR_INACTIVE (0x00 << 5)
00042 #define BH1726_CONTROL_ADC_INTR_ACTIVE (0x01 << 5)
00043 #define BH1726_CONTROL_ADC_VALID_FALSE (0x00 << 4)
00044 // Updated since last reading
00045 #define BH1726_CONTROL_ADC_VALID_TRUE (0x01 << 4)
00046 #define BH1726_CONTROL_ADC_EN_FALSE (0x00 << 1)
00047 #define BH1726_CONTROL_ADC_EN_TRUE (0x01 << 1)
00048 #define BH1726_CONTROL_POWER_OFF (0x00 << 0)
00049 #define BH1726_CONTROL_POWER_ON (0x01 << 0)
00050 // 691.2ms
00051 #define BH1726_TIMING_ITIME_256CYCLE (0x00 << 0)
00052 // 399.6ms
00053 #define BH1726_TIMING_ITIME_148CYCLE (0x6C << 0)
00054 // 199.8ms
00055 #define BH1726_TIMING_ITIME_74CYCLE (0xB6 << 0)
00056 // 135ms
00057 #define BH1726_TIMING_ITIME_50CYCLE (0xCE << 0)
00058 // 102.6ms
00059 #define BH1726_TIMING_ITIME_38CYCLE (0xDA << 0)
00060 // 51.3ms
00061 #define BH1726_TIMING_ITIME_19CYCLE (0xED << 0)
00062 // 5.4ms
00063 #define BH1726_TIMING_ITIME_2CYCLE (0xFE << 0)
00064 // 2.7ms
00065 #define BH1726_TIMING_ITIME_1CYCLE (0xFF << 0)
00066 #define BH1726_INTERRUPT_INT_LATCH_YES (0x00 << 5)
00067 #define BH1726_INTERRUPT_INT_LATCH_NO (0x01 << 5)
00068 #define BH1726_INTERRUPT_INT_EN_FALSE (0x00 << 4)
00069 #define BH1726_INTERRUPT_INT_EN_TRUE (0x01 << 4)
00070 #define BH1726_INTERRUPT_PERSIST_DRDY (0x00 << 0)
00071 #define BH1726_INTERRUPT_PERSIST_AFTER_1 (0x01 << 0)
00072 #define BH1726_INTERRUPT_PERSIST_AFTER_2 (0x02 << 0)
00073 #define BH1726_INTERRUPT_PERSIST_AFTER_3 (0x03 << 0)
00074 #define BH1726_INTERRUPT_PERSIST_AFTER_4 (0x04 << 0)
00075 #define BH1726_GAIN_GAIN0_X1 (0x00 << 2)
00076 #define BH1726_GAIN_GAIN0_X2 (0x01 << 2)
00077 #define BH1726_GAIN_GAIN0_X64 (0x02 << 2)
00078 #define BH1726_GAIN_GAIN0_X128 (0x03 << 2)
00079 #define BH1726_GAIN_GAIN1_X1 (0x00 << 0)
00080 #define BH1726_GAIN_GAIN1_X2 (0x01 << 0)
00081 #define BH1726_GAIN_GAIN1_X64 (0x02 << 0)
00082 #define BH1726_GAIN_GAIN1_X128 (0x03 << 0)
00083 #define BH1726_ID_NUMBER_FOR_PART (0x72 << 0)
00084 #define BH1726_WAIT_WAIT_NO (0x00 << 0)
00085 // after each measurement (low current consumption mode)
00086 #define BH1726_WAIT_WAIT_300MS (0x01 << 0)
00087  /*registers bit masks */
00088 #define BH1726_CONTROL_ADC_INTR_MASK 0x20
00089 #define BH1726_CONTROL_ADC_VALID_MASK 0x10
00090 
00091 #define BH1726_CONTROL_ADC_EN_MASK 0x02
00092 #define BH1726_CONTROL_POWER_MASK 0x01
00093 #define BH1726_TIMING_ITIME_MASK 0xFF
00094 
00095 #define BH1726_INTERRUPT_INT_LATCH_MASK 0x20
00096 #define BH1726_INTERRUPT_INT_EN_MASK 0x10
00097 #define BH1726_INTERRUPT_PERSIST_MASK 0x0F
00098 #define BH1726_GAIN_GAIN0_MASK 0x0C
00099 #define BH1726_GAIN_GAIN1_MASK 0x03
00100 #define BH1726_ID_NUMBER_MASK 0xFF
00101 #define BH1726_WAIT_WAIT_MASK 0x01
00102 
00103 #endif /* BH1726_H */