x_nucleo_iks01a1.h

00001 /**
00002   ******************************************************************************
00003   * @file    x_nucleo_iks01a1.h
00004   * @author  MEMS Application Team
00005   * @version V1.0.0
00006   * @date    30-July-2014
00007   * @brief   This file contains definitions for the x_nucleo_iks01a1.c 
00008   *          board specific functions.
00009   ******************************************************************************
00010   * @attention
00011   *
00012   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
00013   *
00014   * Redistribution and use in source and binary forms, with or without modification,
00015   * are permitted provided that the following conditions are met:
00016   *   1. Redistributions of source code must retain the above copyright notice,
00017   *      this list of conditions and the following disclaimer.
00018   *   2. Redistributions in binary form must reproduce the above copyright notice,
00019   *      this list of conditions and the following disclaimer in the documentation
00020   *      and/or other materials provided with the distribution.
00021   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00022   *      may be used to endorse or promote products derived from this software
00023   *      without specific prior written permission.
00024   *
00025   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00026   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00027   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00028   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00029   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00030   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00031   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00032   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00033   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00034   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00035   *
00036   ******************************************************************************
00037   */
00038 
00039 
00040 /* Define to prevent recursive inclusion -------------------------------------*/
00041 #ifndef __X_NUCLEO_IKS01A1_H
00042 #define __X_NUCLEO_IKS01A1_H
00043 
00044 #include "cube_hal.h"
00045 
00046 #ifdef __cplusplus
00047  extern "C" {
00048 #endif
00049 
00050 /* Includes ------------------------------------------------------------------*/
00051 #ifdef USE_STM32F4XX_NUCLEO
00052 #include "stm32f4xx_hal.h"
00053 #endif
00054 #ifdef USE_STM32L0XX_NUCLEO
00055 #include "stm32l0xx_hal.h"
00056 #endif
00057 #include <stdint.h>
00058 
00059 /** @addtogroup BSP
00060   * @{
00061   */
00062 
00063 /** @addtogroup X_NUCLEO_IKS01A1
00064   * @{
00065   */
00066 
00067 /** @defgroup X_NUCLEO_IKS01A1_Exported_Types
00068   * @{
00069   */
00070 
00071 typedef struct {
00072     int32_t AXIS_X;
00073     int32_t AXIS_Y;
00074     int32_t AXIS_Z;
00075 } AxesRaw_TypeDef;
00076 
00077 /**
00078   * @}
00079   */
00080 
00081 /** @defgroup X_NUCLEO_IKS01A1_Exported_Constants
00082   * @{
00083   */
00084 
00085 /* I2C clock speed configuration (in Hz) */
00086 #ifndef NUCLEO_I2C_SHIELDS_SPEED
00087     #define NUCLEO_I2C_SHIELDS_SPEED                         100000
00088 #endif /* I2C_ONBOARD_SENSORS_SPEED */
00089 
00090 /* I2C peripheral configuration defines (control interface of the audio codec) */
00091 #define NUCLEO_I2C_SHIELDS                            I2C1
00092 #define NUCLEO_I2C_SHIELDS_CLK_ENABLE()               __I2C1_CLK_ENABLE()
00093 #define NUCLEO_I2C_SHIELDS_SCL_SDA_GPIO_CLK_ENABLE()  __GPIOB_CLK_ENABLE()
00094 #define NUCLEO_I2C_SHIELDS_SCL_SDA_AF                 GPIO_AF4_I2C1
00095 #define NUCLEO_I2C_SHIELDS_SCL_SDA_GPIO_PORT          GPIOB
00096 #define NUCLEO_I2C_SHIELDS_SCL_PIN                    GPIO_PIN_8
00097 #define NUCLEO_I2C_SHIELDS_SDA_PIN                    GPIO_PIN_9
00098 
00099 #define NUCLEO_I2C_SHIELDS_FORCE_RESET()              __I2C1_FORCE_RESET()
00100 #define NUCLEO_I2C_SHIELDS_RELEASE_RESET()            __I2C1_RELEASE_RESET()
00101 
00102 /* I2C interrupt requests */
00103 //#define NUCLEO_I2C_SHIELDS_EV_IRQn                    I2C1_EV_IRQn
00104 #ifdef STM32F401xE
00105 #define NUCLEO_I2C_SHIELDS_EV_IRQn                    I2C1_EV_IRQn
00106 #endif
00107 #ifdef STM32L053xx
00108 #define NUCLEO_I2C_SHIELDS_EV_IRQn                    I2C1_IRQn    
00109 #endif    
00110 #define NUCLEO_I2C_SHIELDS_ER_IRQn                    I2C1_ER_IRQn
00111 
00112 #ifdef USE_FREE_RTOS
00113     #define NUCLEO_I2C_SHIELDS_MUTEX                  I2C1_Mutex_id
00114     #define NUCLEO_I2C_SHIELDS_MUTEX_TAKE()           osMutexWait(NUCLEO_I2C_SHIELDS_MUTEX, 0)
00115     #define NUCLEO_I2C_SHIELDS_MUTEX_RELEASE()        osMutexRelease(NUCLEO_I2C_SHIELDS_MUTEX)
00116 #endif
00117 
00118 /* Maximum Timeout values for flags waiting loops. These timeouts are not based
00119    on accurate values, they just guarantee that the application will not remain
00120    stuck if the SPI communication is corrupted.
00121    You may modify these timeout values depending on CPU frequency and application
00122    conditions (interrupts routines ...). */
00123 #define NUCLEO_I2C_SHIELDS_TIMEOUT_MAX    0x1000 /*<! The value of the maximal timeout for BUS waiting loops */
00124 
00125 
00126 
00127 /* User can use this section to tailor USARTx/UARTx instance used and associated
00128    resources */
00129 /* Definition for USARTx clock resources */
00130 #define USARTx                           USART2
00131 #define USARTx_CLK_ENABLE()              __USART2_CLK_ENABLE();
00132 #define DMAx_CLK_ENABLE()                __DMA1_CLK_ENABLE()
00133 #define USARTx_RX_GPIO_CLK_ENABLE()      __GPIOA_CLK_ENABLE()
00134 #define USARTx_TX_GPIO_CLK_ENABLE()      __GPIOA_CLK_ENABLE()
00135 
00136 #define USARTx_FORCE_RESET()             __USART2_FORCE_RESET()
00137 #define USARTx_RELEASE_RESET()           __USART2_RELEASE_RESET()
00138 
00139 /* Definition for USARTx Pins */
00140 #define USARTx_TX_PIN                    GPIO_PIN_2
00141 #define USARTx_TX_GPIO_PORT              GPIOA
00142 #define USARTx_TX_AF                     GPIO_AF7_USART2
00143 #define USARTx_RX_PIN                    GPIO_PIN_3
00144 #define USARTx_RX_GPIO_PORT              GPIOA
00145 #define USARTx_RX_AF                     GPIO_AF7_USART2
00146 
00147 /* Definition for USARTx's DMA */
00148 #define USARTx_TX_DMA_CHANNEL            DMA_CHANNEL_4
00149 #define USARTx_TX_DMA_STREAM             DMA1_Stream6
00150 #define USARTx_RX_DMA_CHANNEL            DMA_CHANNEL_4
00151 #define USARTx_RX_DMA_STREAM             DMA1_Stream5
00152 
00153 
00154 
00155 /* Definition for interrupt Pins */
00156 #define HUM_TEMP_DRDY_GPIO_PORT           GPIOB
00157 #define HUM_TEMP_DRDY_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00158 #define HUM_TEMP_DRDY_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00159 #define HUM_TEMP_DRDY_PIN                 GPIO_PIN_10
00160 #define HUM_TEMP_DRDY_EXTI_IRQn           EXTI15_10_IRQn
00161 
00162 #define IMU_6AXES_INT1_GPIO_PORT           GPIOB
00163 #define IMU_6AXES_INT1_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00164 #define IMU_6AXES_INT1_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00165 #define IMU_6AXES_INT1_PIN                 GPIO_PIN_5
00166 #define IMU_6AXES_INT1_EXTI_IRQn           EXTI9_5_IRQn
00167 
00168 #define MAGNETO_DRDY_GPIO_PORT           GPIOC
00169 #define MAGNETO_DRDY_GPIO_CLK_ENABLE()   __GPIOC_CLK_ENABLE()
00170 #define MAGNETO_DRDY_GPIO_CLK_DISABLE()  __GPIOC_CLK_DISABLE()
00171 #define MAGNETO_DRDY_PIN                 GPIO_PIN_0
00172 #define MAGNETO_DRDY_EXTI_IRQn           EXTI0_IRQn
00173 
00174 #define MAGNETO_INT1_GPIO_PORT           GPIOC
00175 #define MAGNETO_INT1_GPIO_CLK_ENABLE()   __GPIOC_CLK_ENABLE()
00176 #define MAGNETO_INT1_GPIO_CLK_DISABLE()  __GPIOC_CLK_DISABLE()
00177 #define MAGNETO_INT1_PIN                 GPIO_PIN_1
00178 #define MAGNETO_INT1_EXTI_IRQn           EXTI1_IRQn
00179 
00180 #define PRESSURE_INT1_GPIO_PORT           GPIOB
00181 #define PRESSURE_INT1_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00182 #define PRESSURE_INT1_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00183 #define PRESSURE_INT1_PIN                 GPIO_PIN_4
00184 #define PRESSURE_INT1_EXTI_IRQn           EXTI4_IRQn
00185 
00186 // ready for use
00187 #define USER_INT_GPIO_PORT           GPIOA
00188 #define USER_INT_GPIO_CLK_ENABLE()   __GPIOA_CLK_ENABLE()
00189 #define USER_INT_GPIO_CLK_DISABLE()  __GPIOA_CLK_DISABLE()
00190 #define USER_INT_PIN                 GPIO_PIN_10
00191 #define USER_INT_EXTI_IRQn           EXTI15_10_IRQn
00192 
00193 // ready for use
00194 #define MEMS_INT1_GPIO_PORT           GPIOA
00195 #define MEMS_INT1_GPIO_CLK_ENABLE()   __GPIOA_CLK_ENABLE()
00196 #define MEMS_INT1_GPIO_CLK_DISABLE()  __GPIOA_CLK_DISABLE()
00197 #define MEMS_INT1_PIN                 GPIO_PIN_4
00198 #define MEMS_INT1_EXTI_IRQn           EXTI4_IRQn
00199 
00200 // ready for use
00201 #define MEMS_INT2_GPIO_PORT           GPIOB
00202 #define MEMS_INT2_GPIO_CLK_ENABLE()   __GPIOB_CLK_ENABLE()
00203 #define MEMS_INT2_GPIO_CLK_DISABLE()  __GPIOB_CLK_DISABLE()
00204 #define MEMS_INT2_PIN                 GPIO_PIN_0
00205 #define MEMS_INT2_EXTI_IRQn           EXTI0_IRQn
00206 
00207 
00208 /** @defgroup X_NUCLEO_IKS01A1_Exported_Macros
00209   * @{
00210   */
00211 
00212 /**
00213   * @}
00214   */
00215 
00216 /** @defgroup X_NUCLEO_IKS01A1_Exported_Functions
00217   * @{
00218   */
00219 
00220 
00221 /**
00222   * @}
00223   */
00224 
00225 /**
00226   * @}
00227   */
00228 
00229 /**
00230   * @}
00231   */
00232 
00233 #ifdef __cplusplus
00234   }
00235 #endif
00236 
00237 #endif /* __X_NUCLEO_IKS01A1_H */
00238 
00239 
00240 
00241 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00242