Rigado / mbed-src-bmd-200

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   mbed_blinky-bmd-200 bmd-200_accel_demo firstRig

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC82X/us_ticker.c@592:5e2eb8beba71, 2015-07-10 (annotated)

Committer:
dcnichols
Date:
Fri Jul 10 17:36:27 2015 +0000
Revision:
592:5e2eb8beba71
Parent:
512:53fc1beb5664 
updating to latest mbed-src

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 337:6ed01c00b962 1 /* mbed Microcontroller Library
mbed_official 337:6ed01c00b962 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 337:6ed01c00b962 3 *
mbed_official 337:6ed01c00b962 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 337:6ed01c00b962 5 * you may not use this file except in compliance with the License.
mbed_official 337:6ed01c00b962 6 * You may obtain a copy of the License at
mbed_official 337:6ed01c00b962 7 *
mbed_official 337:6ed01c00b962 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 337:6ed01c00b962 9 *
mbed_official 337:6ed01c00b962 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 337:6ed01c00b962 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 337:6ed01c00b962 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 337:6ed01c00b962 13 * See the License for the specific language governing permissions and
mbed_official 337:6ed01c00b962 14 * limitations under the License.
mbed_official 337:6ed01c00b962 15 */
mbed_official 337:6ed01c00b962 16 #include <stddef.h>
mbed_official 337:6ed01c00b962 17 #include "us_ticker_api.h"
mbed_official 337:6ed01c00b962 18 #include "PeripheralNames.h"
mbed_official 337:6ed01c00b962 19
mbed_official 337:6ed01c00b962 20 static int us_ticker_inited = 0;
mbed_official 512:53fc1beb5664 21 int MRT_Clock_MHz;
mbed_official 512:53fc1beb5664 22 unsigned int ticker_fullcount_us;
mbed_official 512:53fc1beb5664 23 unsigned long int ticker_expired_count_us = 0;
mbed_official 337:6ed01c00b962 24
mbed_official 337:6ed01c00b962 25 #define US_TICKER_TIMER_IRQn MRT_IRQn
mbed_official 337:6ed01c00b962 26
mbed_official 512:53fc1beb5664 27 void us_ticker_init(void) {
mbed_official 512:53fc1beb5664 28
mbed_official 337:6ed01c00b962 29 if (us_ticker_inited)
mbed_official 337:6ed01c00b962 30 return;
mbed_official 337:6ed01c00b962 31
mbed_official 337:6ed01c00b962 32 us_ticker_inited = 1;
mbed_official 337:6ed01c00b962 33
mbed_official 512:53fc1beb5664 34 // Calculate MRT clock value (MRT has no prescaler)
mbed_official 512:53fc1beb5664 35 MRT_Clock_MHz = (SystemCoreClock / 1000000);
mbed_official 512:53fc1beb5664 36 // Calculate fullcounter value in us (MRT has 31 bits and clock is 30MHz)
mbed_official 512:53fc1beb5664 37 ticker_fullcount_us = 0x80000000UL/MRT_Clock_MHz;
mbed_official 512:53fc1beb5664 38
mbed_official 337:6ed01c00b962 39 // Enable the MRT clock
mbed_official 337:6ed01c00b962 40 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10);
mbed_official 337:6ed01c00b962 41
mbed_official 337:6ed01c00b962 42 // Clear peripheral reset the MRT
mbed_official 337:6ed01c00b962 43 LPC_SYSCON->PRESETCTRL |= (1 << 7);
mbed_official 337:6ed01c00b962 44
mbed_official 512:53fc1beb5664 45 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
mbed_official 337:6ed01c00b962 46 LPC_MRT->INTVAL0 = 0xFFFFFFFFUL;
mbed_official 512:53fc1beb5664 47 // Enable Ch0 interrupt, Mode 0 is Repeat Interrupt
mbed_official 512:53fc1beb5664 48 LPC_MRT->CTRL0 = (0x0 << 1) | (0x1 << 0);
mbed_official 337:6ed01c00b962 49
mbed_official 512:53fc1beb5664 50 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
mbed_official 337:6ed01c00b962 51 LPC_MRT->INTVAL1 = 0x80000000UL;
mbed_official 512:53fc1beb5664 52 // Disable ch1 interrupt, Mode 0 is Repeat Interrupt
mbed_official 512:53fc1beb5664 53 LPC_MRT->CTRL1 = (0x0 << 1) | (0x0 << 0);
mbed_official 512:53fc1beb5664 54
mbed_official 337:6ed01c00b962 55 // Set MRT interrupt vector
mbed_official 337:6ed01c00b962 56 NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
mbed_official 337:6ed01c00b962 57 NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 337:6ed01c00b962 58 }
mbed_official 337:6ed01c00b962 59
mbed_official 512:53fc1beb5664 60 //TIMER0 is used for us ticker and timers (Timer, wait(), wait_us() etc)
mbed_official 512:53fc1beb5664 61 uint32_t us_ticker_read() {
mbed_official 512:53fc1beb5664 62
mbed_official 337:6ed01c00b962 63 if (!us_ticker_inited)
mbed_official 337:6ed01c00b962 64 us_ticker_init();
mbed_official 337:6ed01c00b962 65
mbed_official 337:6ed01c00b962 66 // Generate ticker value
mbed_official 512:53fc1beb5664 67 // MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
mbed_official 512:53fc1beb5664 68 // Calculate expected value using number of expired times to mimic a 32bit timer @ 1 MHz
mbed_official 512:53fc1beb5664 69 return (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz + ticker_expired_count_us;
mbed_official 337:6ed01c00b962 70 }
mbed_official 337:6ed01c00b962 71
mbed_official 512:53fc1beb5664 72 //TIMER1 is used for Timestamped interrupts (Ticker(), Timeout())
mbed_official 512:53fc1beb5664 73 void us_ticker_set_interrupt(timestamp_t timestamp) {
mbed_official 512:53fc1beb5664 74
mbed_official 512:53fc1beb5664 75 // MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
mbed_official 512:53fc1beb5664 76 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
mbed_official 512:53fc1beb5664 77 // Note: The MRT has less counter headroom available than the typical mbed 32bit timer @ 1 MHz.
mbed_official 512:53fc1beb5664 78 // The calculated counter interval until the next timestamp will be truncated and an
mbed_official 512:53fc1beb5664 79 // 'early' interrupt will be generated in case the max required count interval exceeds
mbed_official 512:53fc1beb5664 80 // the available 31 bits space. However, the mbed us_ticker interrupt handler will
mbed_official 512:53fc1beb5664 81 // check current time against the next scheduled timestamp and simply re-issue the
mbed_official 512:53fc1beb5664 82 // same interrupt again when needed. The calculated counter interval will now be smaller.
mbed_official 512:53fc1beb5664 83 LPC_MRT->INTVAL1 = (((timestamp - us_ticker_read()) * MRT_Clock_MHz) | 0x80000000UL);
mbed_official 512:53fc1beb5664 84
mbed_official 337:6ed01c00b962 85 // Enable interrupt
mbed_official 337:6ed01c00b962 86 LPC_MRT->CTRL1 |= 1;
mbed_official 337:6ed01c00b962 87 }
mbed_official 337:6ed01c00b962 88
mbed_official 512:53fc1beb5664 89 //Disable Timestamped interrupts triggered by TIMER1
mbed_official 512:53fc1beb5664 90 void us_ticker_disable_interrupt() {
mbed_official 512:53fc1beb5664 91 //Timer1 for Timestamped interrupts (31 bits downcounter @ SystemCoreClock)
mbed_official 337:6ed01c00b962 92 LPC_MRT->CTRL1 &= ~1;
mbed_official 337:6ed01c00b962 93 }
mbed_official 337:6ed01c00b962 94
mbed_official 512:53fc1beb5664 95 void us_ticker_clear_interrupt() {
mbed_official 512:53fc1beb5664 96
mbed_official 512:53fc1beb5664 97 //Timer1 for Timestamped interrupts (31 bits downcounter @ SystemCoreClock)
mbed_official 337:6ed01c00b962 98 if (LPC_MRT->STAT1 & 1)
mbed_official 337:6ed01c00b962 99 LPC_MRT->STAT1 = 1;
mbed_official 337:6ed01c00b962 100
mbed_official 512:53fc1beb5664 101 //Timer0 for us counter (31 bits downcounter @ SystemCoreClock)
mbed_official 337:6ed01c00b962 102 if (LPC_MRT->STAT0 & 1) {
mbed_official 337:6ed01c00b962 103 LPC_MRT->STAT0 = 1;
mbed_official 512:53fc1beb5664 104 ticker_expired_count_us += ticker_fullcount_us;
mbed_official 337:6ed01c00b962 105 }
mbed_official 337:6ed01c00b962 106 }