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targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/efm32gg_wdog.h@592:5e2eb8beba71, 2015-07-10 (annotated)

Committer:
dcnichols
Date:
Fri Jul 10 17:36:27 2015 +0000
Revision:
592:5e2eb8beba71
Parent:
529:c320967f86b9 
updating to latest mbed-src

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 529:c320967f86b9 1 /**************************************************************************//**
mbed_official 529:c320967f86b9 2 * @file efm32gg_wdog.h
mbed_official 529:c320967f86b9 3 * @brief EFM32GG_WDOG register and bit field definitions
mbed_official 529:c320967f86b9 4 * @version 3.20.6
mbed_official 529:c320967f86b9 5 ******************************************************************************
mbed_official 529:c320967f86b9 6 * @section License
mbed_official 529:c320967f86b9 7 * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
mbed_official 529:c320967f86b9 8 ******************************************************************************
mbed_official 529:c320967f86b9 9 *
mbed_official 529:c320967f86b9 10 * Permission is granted to anyone to use this software for any purpose,
mbed_official 529:c320967f86b9 11 * including commercial applications, and to alter it and redistribute it
mbed_official 529:c320967f86b9 12 * freely, subject to the following restrictions:
mbed_official 529:c320967f86b9 13 *
mbed_official 529:c320967f86b9 14 * 1. The origin of this software must not be misrepresented; you must not
mbed_official 529:c320967f86b9 15 * claim that you wrote the original software.@n
mbed_official 529:c320967f86b9 16 * 2. Altered source versions must be plainly marked as such, and must not be
mbed_official 529:c320967f86b9 17 * misrepresented as being the original software.@n
mbed_official 529:c320967f86b9 18 * 3. This notice may not be removed or altered from any source distribution.
mbed_official 529:c320967f86b9 19 *
mbed_official 529:c320967f86b9 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
mbed_official 529:c320967f86b9 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
mbed_official 529:c320967f86b9 22 * providing the Software "AS IS", with no express or implied warranties of any
mbed_official 529:c320967f86b9 23 * kind, including, but not limited to, any implied warranties of
mbed_official 529:c320967f86b9 24 * merchantability or fitness for any particular purpose or warranties against
mbed_official 529:c320967f86b9 25 * infringement of any proprietary rights of a third party.
mbed_official 529:c320967f86b9 26 *
mbed_official 529:c320967f86b9 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
mbed_official 529:c320967f86b9 28 * incidental, or special damages, or any other relief, or for any claim by
mbed_official 529:c320967f86b9 29 * any third party, arising from your use of this Software.
mbed_official 529:c320967f86b9 30 *
mbed_official 529:c320967f86b9 31 *****************************************************************************/
mbed_official 529:c320967f86b9 32 /**************************************************************************//**
mbed_official 529:c320967f86b9 33 * @defgroup EFM32GG_WDOG
mbed_official 529:c320967f86b9 34 * @{
mbed_official 529:c320967f86b9 35 * @brief EFM32GG_WDOG Register Declaration
mbed_official 529:c320967f86b9 36 *****************************************************************************/
mbed_official 529:c320967f86b9 37 typedef struct
mbed_official 529:c320967f86b9 38 {
mbed_official 529:c320967f86b9 39 __IO uint32_t CTRL; /**< Control Register */
mbed_official 529:c320967f86b9 40 __IO uint32_t CMD; /**< Command Register */
mbed_official 529:c320967f86b9 41
mbed_official 529:c320967f86b9 42 __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
mbed_official 529:c320967f86b9 43 } WDOG_TypeDef; /** @} */
mbed_official 529:c320967f86b9 44
mbed_official 529:c320967f86b9 45 /**************************************************************************//**
mbed_official 529:c320967f86b9 46 * @defgroup EFM32GG_WDOG_BitFields
mbed_official 529:c320967f86b9 47 * @{
mbed_official 529:c320967f86b9 48 *****************************************************************************/
mbed_official 529:c320967f86b9 49
mbed_official 529:c320967f86b9 50 /* Bit fields for WDOG CTRL */
mbed_official 529:c320967f86b9 51 #define _WDOG_CTRL_RESETVALUE 0x00000F00UL /**< Default value for WDOG_CTRL */
mbed_official 529:c320967f86b9 52 #define _WDOG_CTRL_MASK 0x00003F7FUL /**< Mask for WDOG_CTRL */
mbed_official 529:c320967f86b9 53 #define WDOG_CTRL_EN (0x1UL << 0) /**< Watchdog Timer Enable */
mbed_official 529:c320967f86b9 54 #define _WDOG_CTRL_EN_SHIFT 0 /**< Shift value for WDOG_EN */
mbed_official 529:c320967f86b9 55 #define _WDOG_CTRL_EN_MASK 0x1UL /**< Bit mask for WDOG_EN */
mbed_official 529:c320967f86b9 56 #define _WDOG_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 57 #define WDOG_CTRL_EN_DEFAULT (_WDOG_CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 58 #define WDOG_CTRL_DEBUGRUN (0x1UL << 1) /**< Debug Mode Run Enable */
mbed_official 529:c320967f86b9 59 #define _WDOG_CTRL_DEBUGRUN_SHIFT 1 /**< Shift value for WDOG_DEBUGRUN */
mbed_official 529:c320967f86b9 60 #define _WDOG_CTRL_DEBUGRUN_MASK 0x2UL /**< Bit mask for WDOG_DEBUGRUN */
mbed_official 529:c320967f86b9 61 #define _WDOG_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 62 #define WDOG_CTRL_DEBUGRUN_DEFAULT (_WDOG_CTRL_DEBUGRUN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 63 #define WDOG_CTRL_EM2RUN (0x1UL << 2) /**< Energy Mode 2 Run Enable */
mbed_official 529:c320967f86b9 64 #define _WDOG_CTRL_EM2RUN_SHIFT 2 /**< Shift value for WDOG_EM2RUN */
mbed_official 529:c320967f86b9 65 #define _WDOG_CTRL_EM2RUN_MASK 0x4UL /**< Bit mask for WDOG_EM2RUN */
mbed_official 529:c320967f86b9 66 #define _WDOG_CTRL_EM2RUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 67 #define WDOG_CTRL_EM2RUN_DEFAULT (_WDOG_CTRL_EM2RUN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 68 #define WDOG_CTRL_EM3RUN (0x1UL << 3) /**< Energy Mode 3 Run Enable */
mbed_official 529:c320967f86b9 69 #define _WDOG_CTRL_EM3RUN_SHIFT 3 /**< Shift value for WDOG_EM3RUN */
mbed_official 529:c320967f86b9 70 #define _WDOG_CTRL_EM3RUN_MASK 0x8UL /**< Bit mask for WDOG_EM3RUN */
mbed_official 529:c320967f86b9 71 #define _WDOG_CTRL_EM3RUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 72 #define WDOG_CTRL_EM3RUN_DEFAULT (_WDOG_CTRL_EM3RUN_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 73 #define WDOG_CTRL_LOCK (0x1UL << 4) /**< Configuration lock */
mbed_official 529:c320967f86b9 74 #define _WDOG_CTRL_LOCK_SHIFT 4 /**< Shift value for WDOG_LOCK */
mbed_official 529:c320967f86b9 75 #define _WDOG_CTRL_LOCK_MASK 0x10UL /**< Bit mask for WDOG_LOCK */
mbed_official 529:c320967f86b9 76 #define _WDOG_CTRL_LOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 77 #define WDOG_CTRL_LOCK_DEFAULT (_WDOG_CTRL_LOCK_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 78 #define WDOG_CTRL_EM4BLOCK (0x1UL << 5) /**< Energy Mode 4 Block */
mbed_official 529:c320967f86b9 79 #define _WDOG_CTRL_EM4BLOCK_SHIFT 5 /**< Shift value for WDOG_EM4BLOCK */
mbed_official 529:c320967f86b9 80 #define _WDOG_CTRL_EM4BLOCK_MASK 0x20UL /**< Bit mask for WDOG_EM4BLOCK */
mbed_official 529:c320967f86b9 81 #define _WDOG_CTRL_EM4BLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 82 #define WDOG_CTRL_EM4BLOCK_DEFAULT (_WDOG_CTRL_EM4BLOCK_DEFAULT << 5) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 83 #define WDOG_CTRL_SWOSCBLOCK (0x1UL << 6) /**< Software Oscillator Disable Block */
mbed_official 529:c320967f86b9 84 #define _WDOG_CTRL_SWOSCBLOCK_SHIFT 6 /**< Shift value for WDOG_SWOSCBLOCK */
mbed_official 529:c320967f86b9 85 #define _WDOG_CTRL_SWOSCBLOCK_MASK 0x40UL /**< Bit mask for WDOG_SWOSCBLOCK */
mbed_official 529:c320967f86b9 86 #define _WDOG_CTRL_SWOSCBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 87 #define WDOG_CTRL_SWOSCBLOCK_DEFAULT (_WDOG_CTRL_SWOSCBLOCK_DEFAULT << 6) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 88 #define _WDOG_CTRL_PERSEL_SHIFT 8 /**< Shift value for WDOG_PERSEL */
mbed_official 529:c320967f86b9 89 #define _WDOG_CTRL_PERSEL_MASK 0xF00UL /**< Bit mask for WDOG_PERSEL */
mbed_official 529:c320967f86b9 90 #define _WDOG_CTRL_PERSEL_DEFAULT 0x0000000FUL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 91 #define WDOG_CTRL_PERSEL_DEFAULT (_WDOG_CTRL_PERSEL_DEFAULT << 8) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 92 #define _WDOG_CTRL_CLKSEL_SHIFT 12 /**< Shift value for WDOG_CLKSEL */
mbed_official 529:c320967f86b9 93 #define _WDOG_CTRL_CLKSEL_MASK 0x3000UL /**< Bit mask for WDOG_CLKSEL */
mbed_official 529:c320967f86b9 94 #define _WDOG_CTRL_CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 95 #define _WDOG_CTRL_CLKSEL_ULFRCO 0x00000000UL /**< Mode ULFRCO for WDOG_CTRL */
mbed_official 529:c320967f86b9 96 #define _WDOG_CTRL_CLKSEL_LFRCO 0x00000001UL /**< Mode LFRCO for WDOG_CTRL */
mbed_official 529:c320967f86b9 97 #define _WDOG_CTRL_CLKSEL_LFXO 0x00000002UL /**< Mode LFXO for WDOG_CTRL */
mbed_official 529:c320967f86b9 98 #define WDOG_CTRL_CLKSEL_DEFAULT (_WDOG_CTRL_CLKSEL_DEFAULT << 12) /**< Shifted mode DEFAULT for WDOG_CTRL */
mbed_official 529:c320967f86b9 99 #define WDOG_CTRL_CLKSEL_ULFRCO (_WDOG_CTRL_CLKSEL_ULFRCO << 12) /**< Shifted mode ULFRCO for WDOG_CTRL */
mbed_official 529:c320967f86b9 100 #define WDOG_CTRL_CLKSEL_LFRCO (_WDOG_CTRL_CLKSEL_LFRCO << 12) /**< Shifted mode LFRCO for WDOG_CTRL */
mbed_official 529:c320967f86b9 101 #define WDOG_CTRL_CLKSEL_LFXO (_WDOG_CTRL_CLKSEL_LFXO << 12) /**< Shifted mode LFXO for WDOG_CTRL */
mbed_official 529:c320967f86b9 102
mbed_official 529:c320967f86b9 103 /* Bit fields for WDOG CMD */
mbed_official 529:c320967f86b9 104 #define _WDOG_CMD_RESETVALUE 0x00000000UL /**< Default value for WDOG_CMD */
mbed_official 529:c320967f86b9 105 #define _WDOG_CMD_MASK 0x00000001UL /**< Mask for WDOG_CMD */
mbed_official 529:c320967f86b9 106 #define WDOG_CMD_CLEAR (0x1UL << 0) /**< Watchdog Timer Clear */
mbed_official 529:c320967f86b9 107 #define _WDOG_CMD_CLEAR_SHIFT 0 /**< Shift value for WDOG_CLEAR */
mbed_official 529:c320967f86b9 108 #define _WDOG_CMD_CLEAR_MASK 0x1UL /**< Bit mask for WDOG_CLEAR */
mbed_official 529:c320967f86b9 109 #define _WDOG_CMD_CLEAR_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CMD */
mbed_official 529:c320967f86b9 110 #define _WDOG_CMD_CLEAR_UNCHANGED 0x00000000UL /**< Mode UNCHANGED for WDOG_CMD */
mbed_official 529:c320967f86b9 111 #define _WDOG_CMD_CLEAR_CLEARED 0x00000001UL /**< Mode CLEARED for WDOG_CMD */
mbed_official 529:c320967f86b9 112 #define WDOG_CMD_CLEAR_DEFAULT (_WDOG_CMD_CLEAR_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_CMD */
mbed_official 529:c320967f86b9 113 #define WDOG_CMD_CLEAR_UNCHANGED (_WDOG_CMD_CLEAR_UNCHANGED << 0) /**< Shifted mode UNCHANGED for WDOG_CMD */
mbed_official 529:c320967f86b9 114 #define WDOG_CMD_CLEAR_CLEARED (_WDOG_CMD_CLEAR_CLEARED << 0) /**< Shifted mode CLEARED for WDOG_CMD */
mbed_official 529:c320967f86b9 115
mbed_official 529:c320967f86b9 116 /* Bit fields for WDOG SYNCBUSY */
mbed_official 529:c320967f86b9 117 #define _WDOG_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for WDOG_SYNCBUSY */
mbed_official 529:c320967f86b9 118 #define _WDOG_SYNCBUSY_MASK 0x00000003UL /**< Mask for WDOG_SYNCBUSY */
mbed_official 529:c320967f86b9 119 #define WDOG_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
mbed_official 529:c320967f86b9 120 #define _WDOG_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for WDOG_CTRL */
mbed_official 529:c320967f86b9 121 #define _WDOG_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for WDOG_CTRL */
mbed_official 529:c320967f86b9 122 #define _WDOG_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
mbed_official 529:c320967f86b9 123 #define WDOG_SYNCBUSY_CTRL_DEFAULT (_WDOG_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
mbed_official 529:c320967f86b9 124 #define WDOG_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */
mbed_official 529:c320967f86b9 125 #define _WDOG_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for WDOG_CMD */
mbed_official 529:c320967f86b9 126 #define _WDOG_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for WDOG_CMD */
mbed_official 529:c320967f86b9 127 #define _WDOG_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
mbed_official 529:c320967f86b9 128 #define WDOG_SYNCBUSY_CMD_DEFAULT (_WDOG_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
mbed_official 529:c320967f86b9 129
mbed_official 529:c320967f86b9 130 /** @} End of group EFM32GG_WDOG */
mbed_official 529:c320967f86b9 131
mbed_official 529:c320967f86b9 132