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Dependents: mbed_blinky-bmd-200 bmd-200_accel_demo firstRig
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Revision 556:a1b9575155a3, committed 2015-05-27
- Comitter:
- mbed_official
- Date:
- Wed May 27 13:30:08 2015 +0100
- Parent:
- 555:0a217666a41a
- Child:
- 557:063b9f2f393c
- Commit message:
- Synchronized with git revision a74a8f14fd8c4bf3dc09980c4bf9498ebcf4c207
Full URL: https://github.com/mbedmicro/mbed/commit/a74a8f14fd8c4bf3dc09980c4bf9498ebcf4c207/
Changed in this revision
--- a/api/SPI.h Wed May 27 09:30:08 2015 +0100
+++ b/api/SPI.h Wed May 27 13:30:08 2015 +0100
@@ -45,10 +45,21 @@
*
* #include "mbed.h"
*
+ * // hardware ssel (where applicable)
+ * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
+ *
+ * // software ssel
* SPI device(p5, p6, p7); // mosi, miso, sclk
+ * DigitalOut cs(p8); // ssel
*
* int main() {
+ * // hardware ssel (where applicable)
+ * //int response = device.write(0xFF);
+ *
+ * // software ssel
+ * cs = 0;
* int response = device.write(0xFF);
+ * cs = 1;
* }
* @endcode
*/
@@ -58,16 +69,14 @@
/** Create a SPI master connected to the specified pins
*
- * Pin Options:
- * (5, 6, 7) or (11, 12, 13)
- *
* mosi or miso can be specfied as NC if not used
*
* @param mosi SPI Master Out, Slave In pin
* @param miso SPI Master In, Slave Out pin
* @param sclk SPI Clock pin
+ * @param ssel SPI chip select pin
*/
- SPI(PinName mosi, PinName miso, PinName sclk, PinName _unused=NC);
+ SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
/** Configure the data transmission format
*
--- a/api/SPISlave.h Wed May 27 09:30:08 2015 +0100
+++ b/api/SPISlave.h Wed May 27 13:30:08 2015 +0100
@@ -54,16 +54,12 @@
/** Create a SPI slave connected to the specified pins
*
- * Pin Options:
- * (5, 6, 7i, 8) or (11, 12, 13, 14)
- *
* mosi or miso can be specfied as NC if not used
*
* @param mosi SPI Master Out, Slave In pin
* @param miso SPI Master In, Slave Out pin
* @param sclk SPI Clock pin
* @param ssel SPI chip select pin
- * @param name (optional) A string to identify the object
*/
SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
--- a/common/SPI.cpp Wed May 27 09:30:08 2015 +0100
+++ b/common/SPI.cpp Wed May 27 13:30:08 2015 +0100
@@ -23,7 +23,7 @@
CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
#endif
-SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName _unused) :
+SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
_spi(),
#if DEVICE_SPI_ASYNCH
_irq(this),
@@ -32,7 +32,7 @@
_bits(8),
_mode(0),
_hz(1000000) {
- spi_init(&_spi, mosi, miso, sclk, NC);
+ spi_init(&_spi, mosi, miso, sclk, ssel);
spi_format(&_spi, _bits, _mode, 0);
spi_frequency(&_spi, _hz);
}
--- a/targets/hal/TARGET_Freescale/TARGET_K20XX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_K20XX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -41,14 +41,6 @@
obj->spi->MCR &= ~(SPI_MCR_MDIS_MASK | SPI_MCR_HALT_MASK);
//obj->spi->MCR |= SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK;
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
// not halt in the debug mode
obj->spi->SR |= SPI_SR_EOQF_MASK;
--- a/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -60,14 +60,6 @@
break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
// enable SPI
obj->spi->C1 |= SPI_C1_SPE_MASK;
--- a/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -40,14 +40,6 @@
case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
// enable SPI
obj->spi->C1 |= SPI_C1_SPE_MASK;
--- a/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL43Z/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL43Z/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -81,14 +81,6 @@
case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
// enable SPI
obj->spi->C1 |= SPI_C1_SPE_MASK;
obj->spi->C2 &= ~SPI_C2_SPIMODE_MASK; //8bit
--- a/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -98,14 +98,6 @@
case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
// enable SPI
obj->spi->C1 |= SPI_C1_SPE_MASK;
obj->spi->C2 &= ~SPI_C2_SPIMODE_MASK; //8bit
--- a/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -43,14 +43,7 @@
uint32_t spi_address[] = SPI_BASE_ADDRS;
DSPI_HAL_Init(spi_address[obj->instance]);
DSPI_HAL_Disable(spi_address[obj->instance]);
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
DSPI_HAL_SetDelay(spi_address[obj->instance], kDspiCtar0, 0, 0, kDspiPcsToSck);
- spi_frequency(obj, 1000000);
DSPI_HAL_Enable(spi_address[obj->instance]);
DSPI_HAL_StartTransfer(spi_address[obj->instance]);
--- a/targets/hal/TARGET_Maxim/TARGET_MAX32610/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_Maxim/TARGET_MAX32610/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -88,10 +88,6 @@
obj->spi->gen_ctrl = (MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN |
MXC_F_SPI_GEN_CTRL_TX_FIFO_EN |
MXC_F_SPI_GEN_CTRL_RX_FIFO_EN );
-
- // Give instance the default settings
- spi_format(obj, DEFAULT_CHAR, DEFAULT_MODE, 0);
- spi_frequency(obj, DEFAULT_FREQ);
}
//******************************************************************************
--- a/targets/hal/TARGET_NXP/TARGET_LPC11U6X/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC11U6X/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -85,17 +85,6 @@
break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
-
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
--- a/targets/hal/TARGET_NXP/TARGET_LPC11UXX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC11UXX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -50,17 +50,6 @@
break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
-
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
--- a/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -87,17 +87,6 @@
break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
-
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
--- a/targets/hal/TARGET_NXP/TARGET_LPC13XX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC13XX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -79,17 +79,6 @@
break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
-
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
--- a/targets/hal/TARGET_NXP/TARGET_LPC15XX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC15XX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -158,17 +158,6 @@
LPC_SYSCON->SYSAHBCLKCTRL1 |= (0x1 << (obj->spi_n + 9));
LPC_SYSCON->PRESETCTRL1 |= (0x1 << (obj->spi_n + 9));
LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (obj->spi_n + 9));
-
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the spi channel
- spi_enable(obj);
}
void spi_free(spi_t *obj)
--- a/targets/hal/TARGET_NXP/TARGET_LPC176X/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC176X/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -72,17 +72,6 @@
case SPI_0: LPC_SC->PCONP |= 1 << 21; break;
case SPI_1: LPC_SC->PCONP |= 1 << 10; break;
}
-
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
--- a/targets/hal/TARGET_NXP/TARGET_LPC23XX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC23XX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -73,17 +73,6 @@
case SPI_1: LPC_SC->PCONP |= 1 << 10; break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
-
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
--- a/targets/hal/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -93,17 +93,6 @@
case SPI_2: LPC_SC->PCONP |= 1 << 20; break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
-
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
--- a/targets/hal/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -73,17 +73,6 @@
case SPI_2: LPC_SC->PCONP |= 1 << 20; break;
}
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
-
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
--- a/targets/hal/TARGET_NXP/TARGET_LPC43XX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC43XX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -91,17 +91,6 @@
case SPI_0: LPC_CGU->BASE_CLK[CLK_BASE_SSP0] = (1 << 11) | (CLKIN_MAINPLL << 24); break;
case SPI_1: LPC_CGU->BASE_CLK[CLK_BASE_SSP1] = (1 << 11) | (CLKIN_MAINPLL << 24); break;
}
-
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
--- a/targets/hal/TARGET_NXP/TARGET_LPC81X/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC81X/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -100,17 +100,6 @@
LPC_SYSCON->PRESETCTRL |= (0x1<<1);
break;
}
-
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
}
void spi_free(spi_t *obj) {}
--- a/targets/hal/TARGET_NXP/TARGET_LPC82X/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC82X/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -103,17 +103,7 @@
LPC_SYSCON->PRESETCTRL &= ~(1 << obj->spi_n);
LPC_SYSCON->PRESETCTRL |= (1 << obj->spi_n);
- // set default format and frequency
- if (ssel == (PinName)NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
obj->spi->DLY = 2; // 2 SPI clock times pre-delay
-
- // enable the ssp channel
- spi_enable(obj);
}
void spi_free(spi_t *obj)
--- a/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -96,14 +96,6 @@
obj->spi->SPBFCR = 0xf0; // and set trigger count: read 1, write 1
obj->spi->SPBFCR = 0x30; // and reset buffer
- // set default format and frequency
- if ((int)ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F0/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -100,13 +100,10 @@
obj->pin_sclk = sclk;
obj->pin_ssel = ssel;
- if (ssel == NC) { // SW NSS Master mode
- obj->mode = SPI_MODE_MASTER;
+ if (ssel != NC) {
+ pinmap_pinout(ssel, PinMap_SPI_SSEL);
+ } else {
obj->nss = SPI_NSS_SOFT;
- } else { // Slave
- pinmap_pinout(ssel, PinMap_SPI_SSEL);
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
}
init_spi(obj);
@@ -162,14 +159,12 @@
break;
}
- if (slave == 0) {
- obj->mode = SPI_MODE_MASTER;
- obj->nss = SPI_NSS_SOFT;
- } else {
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
+ if (obj->nss != SPI_NSS_SOFT) {
+ obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
}
+ obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
+
init_spi(obj);
}
--- a/targets/hal/TARGET_STM/TARGET_STM32F1/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F1/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -100,13 +100,10 @@
obj->pin_sclk = sclk;
obj->pin_ssel = ssel;
- if (ssel == NC) { // SW NSS Master mode
- obj->mode = SPI_MODE_MASTER;
+ if (ssel != NC) {
+ pinmap_pinout(ssel, PinMap_SPI_SSEL);
+ } else {
obj->nss = SPI_NSS_SOFT;
- } else { // Slave
- pinmap_pinout(ssel, PinMap_SPI_SSEL);
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
}
init_spi(obj);
@@ -162,14 +159,12 @@
break;
}
- if (slave == 0) {
- obj->mode = SPI_MODE_MASTER;
- obj->nss = SPI_NSS_SOFT;
- } else {
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
+ if (obj->nss != SPI_NSS_SOFT) {
+ obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
}
+ obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
+
init_spi(obj);
}
--- a/targets/hal/TARGET_STM/TARGET_STM32F3/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F3/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -115,13 +115,10 @@
obj->pin_sclk = sclk;
obj->pin_ssel = ssel;
- if (ssel == NC) { // SW NSS Master mode
- obj->mode = SPI_MODE_MASTER;
+ if (ssel != NC) {
+ pinmap_pinout(ssel, PinMap_SPI_SSEL);
+ } else {
obj->nss = SPI_NSS_SOFT;
- } else { // Slave
- pinmap_pinout(ssel, PinMap_SPI_SSEL);
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
}
init_spi(obj);
@@ -189,14 +186,12 @@
break;
}
- if (slave == 0) {
- obj->mode = SPI_MODE_MASTER;
- obj->nss = SPI_NSS_SOFT;
- } else {
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
+ if (obj->nss != SPI_NSS_SOFT) {
+ obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
}
+ obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
+
init_spi(obj);
}
--- a/targets/hal/TARGET_STM/TARGET_STM32F3XX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F3XX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -123,13 +123,10 @@
obj->cpha = SPI_CPHA_1Edge;
obj->br_presc = SPI_BaudRatePrescaler_256;
- if (ssel == NC) { // Master
- obj->mode = SPI_Mode_Master;
- obj->nss = SPI_NSS_Soft;
- } else { // Slave
+ if (ssel != NC) {
pinmap_pinout(ssel, PinMap_SPI_SSEL);
- obj->mode = SPI_Mode_Slave;
- obj->nss = SPI_NSS_Soft;
+ } else {
+ obj->nss = SPI_NSS_SOFT;
}
init_spi(obj);
@@ -167,14 +164,12 @@
break;
}
- if (slave == 0) {
- obj->mode = SPI_Mode_Master;
- obj->nss = SPI_NSS_Soft;
- } else {
- obj->mode = SPI_Mode_Slave;
- obj->nss = SPI_NSS_Hard;
+ if (obj->nss != SPI_NSS_SOFT) {
+ obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
}
+ obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
+
init_spi(obj);
}
--- a/targets/hal/TARGET_STM/TARGET_STM32F4/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F4/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -117,13 +117,10 @@
obj->pin_sclk = sclk;
obj->pin_ssel = ssel;
- if (ssel == NC) { // SW NSS Master mode
- obj->mode = SPI_MODE_MASTER;
+ if (ssel != NC) {
+ pinmap_pinout(ssel, PinMap_SPI_SSEL);
+ } else {
obj->nss = SPI_NSS_SOFT;
- } else { // Slave
- pinmap_pinout(ssel, PinMap_SPI_SSEL);
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
}
init_spi(obj);
@@ -201,14 +198,12 @@
break;
}
- if (slave == 0) {
- obj->mode = SPI_MODE_MASTER;
- obj->nss = SPI_NSS_SOFT;
- } else {
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
+ if (obj->nss != SPI_NSS_SOFT) {
+ obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
}
+ obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
+
init_spi(obj);
}
--- a/targets/hal/TARGET_STM/TARGET_STM32F4XX/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F4XX/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -92,18 +92,6 @@
RCC->APB1ENR |= RCC_APB1ENR_SPI3EN;
break;
}
-
-
- // set default format and frequency
- if (ssel == NC) {
- spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
- } else {
- spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
- }
- spi_frequency(obj, 1000000);
-
- // enable the ssp channel
- ssp_enable(obj);
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
@@ -111,8 +99,7 @@
pinmap_pinout(sclk, PinMap_SPI_SCLK);
if (ssel != NC) {
pinmap_pinout(ssel, PinMap_SPI_SSEL);
- }
- else {
+ } else {
// Use software slave management
obj->spi->CR1 |= SPI_CR1_SSM | SPI_CR1_SSI;
}
@@ -133,6 +120,11 @@
((slave) ? 0: 1) << 2 |
((bits == 16) ? 1 : 0) << 11;
+ if (slave) {
+ // Use software slave management
+ obj->spi->CR1 |= SPI_CR1_SSM | SPI_CR1_SSI;
+ }
+
if (obj->spi->SR & SPI_SR_MODF) {
obj->spi->CR1 = obj->spi->CR1;
}
--- a/targets/hal/TARGET_STM/TARGET_STM32L0/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32L0/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -103,13 +103,10 @@
obj->pin_sclk = sclk;
obj->pin_ssel = ssel;
- if (ssel == NC) { // SW NSS Master mode
- obj->mode = SPI_MODE_MASTER;
+ if (ssel != NC) {
+ pinmap_pinout(ssel, PinMap_SPI_SSEL);
+ } else {
obj->nss = SPI_NSS_SOFT;
- } else { // Slave
- pinmap_pinout(ssel, PinMap_SPI_SSEL);
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
}
init_spi(obj);
@@ -165,14 +162,12 @@
break;
}
- if (slave == 0) {
- obj->mode = SPI_MODE_MASTER;
- obj->nss = SPI_NSS_SOFT;
- } else {
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
+ if (obj->nss != SPI_NSS_SOFT) {
+ obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
}
+ obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
+
init_spi(obj);
}
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/spi_api.c Wed May 27 09:30:08 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32L1/spi_api.c Wed May 27 13:30:08 2015 +0100
@@ -103,13 +103,10 @@
obj->pin_sclk = sclk;
obj->pin_ssel = ssel;
- if (ssel == NC) { // SW NSS Master mode
- obj->mode = SPI_MODE_MASTER;
+ if (ssel != NC) {
+ pinmap_pinout(ssel, PinMap_SPI_SSEL);
+ } else {
obj->nss = SPI_NSS_SOFT;
- } else { // Slave
- pinmap_pinout(ssel, PinMap_SPI_SSEL);
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
}
init_spi(obj);
@@ -171,14 +168,12 @@
break;
}
- if (slave == 0) {
- obj->mode = SPI_MODE_MASTER;
- obj->nss = SPI_NSS_SOFT;
- } else {
- obj->mode = SPI_MODE_SLAVE;
- obj->nss = SPI_NSS_HARD_INPUT;
+ if (obj->nss != SPI_NSS_SOFT) {
+ obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
}
+ obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
+
init_spi(obj);
}
